  ?   8     (            
                               '    tsd,px30-ringneck-haikou rockchip,px30                                   +         0   7Theobroma Systems PX30-uQ7 SoM on Haikou devkit    aliases          =/i2c@ff180000            B/i2c@ff190000            G/i2c@ff1a0000            L/i2c@ff1b0000            Q/serial@ff030000             Y/serial@ff158000             a/serial@ff160000             i/serial@ff168000             q/serial@ff170000             y/serial@ff178000             /spi@ff1d0000            /spi@ff1d8000            /mmc@ff390000            /mmc@ff380000            /i2c@ff190000/rtc@6f             /i2c@ff180000/pmic@20            /ethernet@ff360000           /mmc@ff370000         cpus                         +       cpu@0            cpu           arm,cortex-a35                            psci                                                          Z                               +         cpu@1            cpu           arm,cortex-a35                           psci                                                          Z                               +         cpu@2            cpu           arm,cortex-a35                           psci                                                          Z                               +   	      cpu@3            cpu           arm,cortex-a35                           psci                                                          Z                               +   
      idle-states         3psci       cpu-sleep             arm,idle-state           @        Q           h   x        y                     +         cluster-sleep             arm,idle-state           @        Q          h          y                    +               opp-table-0           operating-points-v2                  +      opp-600000000               #F          ~ ~ p          @               opp-816000000               0,            p          @      opp-1008000000              <            p          @      opp-1200000000              G              p          @      opp-1296000000              M?d          p p p          @         arm-pmu           arm,cortex-a35-pmu        0         d          e          f          g                    	   
      display-subsystem             rockchip,display-subsystem                      	  disabled          external-gmac-clock           fixed-clock                 gmac_clkin          %          psci              arm,psci-1.0             smc       timer             arm,armv8-timer       0                                
        thermal-zones      soc-thermal         2           H          V          h          trips      trip-point-0            x p                   passive       trip-point-1            x L                   passive         +         soc-crit            x 8                	   critical             cooling-maps       map0                                                 gpu-thermal         2   d        H          h         trips      gpu-threshold           x p                   passive       gpu-target          x L                   passive         +         gpu-crit            x 8                	   critical             cooling-maps       map0                                         xin24m            fixed-clock         %            n6         xin24m          +   f      power-management@ff000000         $    rockchip,px30-pmu syscon simple-mfd                           power-controller              rockchip,px30-power-controller                                  +            +   h   power-domain@5                                       <                                power-domain@7                                   ;                             power-domain@9              	                     C      @      ?                             power-domain@10             
      @                                9      7      8      :                                      power-domain@11                                        K                                power-domain@12                   X                                                        D      5      6                                      power-domain@13                   (                                 3                  !   "   #                  power-domain@14                            I           $                        syscon@ff010000       '    rockchip,px30-pmugrf syscon simple-mfd                                             +           +      io-domains        $    rockchip,px30-pmu-io-voltage-domain         okay               %           %      reboot-mode           syscon-reboot-mode                     RB        RB	        RB        RB         $RB         serial@ff030000       $    rockchip,px30-uart snps,dw-apb-uart                                                     &      &           2baudclk apb_pclk            >   '       '           Ctx rx           M           W           ddefault         r   (        okay          i2s@ff060000              rockchip,px30-i2s-tdm                                                                             2mclk_tx mclk_rx hclk            >   '      '           Ctx rx           |   )                          
  tx-m rx-m           ddefault         r   *   +   ,   -                    okay                     +         i2s@ff070000          &    rockchip,px30-i2s rockchip,rk3066-i2s                                                                       2i2s_clk i2s_hclk            >   '      '           Ctx rx           ddefault         r   .   /   0   1                  	  disabled          i2s@ff080000          &    rockchip,px30-i2s rockchip,rk3066-i2s                                                                       2i2s_clk i2s_hclk            >   '      '           Ctx rx           ddefault         r   2   3   4   5                  	  disabled          interrupt-controller@ff131000             arm,gic-400                                        @                                 @             `                       	          +         syscon@ff140000       $    rockchip,px30-grf syscon simple-mfd                                            +           +   )   io-domains             rockchip,px30-io-voltage-domain         okay               %           6        
   %           %        &   %        4   7        B   %      lvds              rockchip,px30-lvds          V   8        [dphy            |   )        elvds          	  disabled       ports                        +       port@0                                    +       endpoint@0                       u   9        +         endpoint@1                      u   :        +            port@1                             serial@ff158000       $    rockchip,px30-uart snps,dw-apb-uart                                                            I        2baudclk apb_pclk            >   '      '           Ctx rx           M           W           ddefault         r   ;   <   =      	  disabled          serial@ff160000       $    rockchip,px30-uart snps,dw-apb-uart                                                             J        2baudclk apb_pclk            >   '      '           Ctx rx           M           W           ddefault         r   >      	  disabled          serial@ff168000       $    rockchip,px30-uart snps,dw-apb-uart                                                            K        2baudclk apb_pclk            >   '      '           Ctx rx           M           W           ddefault         r   ?   @   A      	  disabled          serial@ff170000       $    rockchip,px30-uart snps,dw-apb-uart                                                             L        2baudclk apb_pclk            >   '      '   	        Ctx rx           M           W           ddefault         r   B   C   D      	  disabled          serial@ff178000       $    rockchip,px30-uart snps,dw-apb-uart                                                            M        2baudclk apb_pclk            M           W           ddefault         r   E   F        okay               G             i2c@ff180000          &    rockchip,px30-i2c rockchip,rk3399-i2c                                             N      	  2i2c pclk                              ddefault         r   H                     +            okay       pmic@20           rockchip,rk809                           G                      r   I        ddefault         %            xin32k                               J           J           J           J           %           %           %           J   regulators     DCDC_REG1           vdd_log         - ~        E p        ]  q         r            regulator-state-mem                   ~         DCDC_REG2           vdd_arm         - ~        E p        ]  q         r                 +      regulator-state-mem                   ~         DCDC_REG3           vcc_ddr          r            regulator-state-mem                   DCDC_REG4           vcc_3v0_1v8         - w@        E -         r                 +   7   regulator-state-mem                   -         DCDC_REG5           vcc_3v3         - 2Z        E 2Z         r                 +   %   regulator-state-mem                   2Z         LDO_REG2            vcc_1v8         - w@        E w@         r                 +   e   regulator-state-mem                   w@         LDO_REG3            vcc_1v0         - B@        E B@         r            regulator-state-mem                   B@         LDO_REG5          	  vccio_sd            - w@        E 2Z         r                 +   6   regulator-state-mem                   2Z         LDO_REG7             r                 - B@        E B@        vcc_lcd    regulator-state-mem                   B@         LDO_REG8            vcc_1v8_lcd         - w@        E w@         r            regulator-state-mem                   w@         LDO_REG9          	  vcca_1v8            - w@        E w@         r            regulator-state-mem                   w@                  i2c@ff190000          &    rockchip,px30-i2c rockchip,rk3399-i2c                                             O      	  2i2c pclk                              ddefault         r   K                     +            okay                fan@18            ti,amc6821                                rtc@6f            isil,isl1208                o         i2c@ff1a0000          &    rockchip,px30-i2c rockchip,rk3399-i2c                                             P      	  2i2c pclk                   	           ddefault         r   L                     +            okay                codec@a           fsl,sgtl5000                
            M                       N           O           P        +            i2c@ff1b0000          &    rockchip,px30-i2c rockchip,rk3399-i2c                                              Q      	  2i2c pclk                   
           ddefault         r   Q                     +            okay       eeprom@50               P          atmel,24c01         
                         O         spi@ff1d0000          &    rockchip,px30-spi rockchip,rk3066-spi                                                          $     U        2spiclk apb_pclk         >   '      '           Ctx rx                      ddefault         r   R   S   T   U                     +          	  disabled          spi@ff1d8000          &    rockchip,px30-spi rockchip,rk3066-spi                                                         %     V        2spiclk apb_pclk         >   '      '           Ctx rx                      ddefault         r   V   W   X   Y   Z                     +            okay          watchdog@ff1e0000             rockchip,px30-wdt snps,dw-wdt                                       [               %           okay          pwm@ff200000          &    rockchip,px30-pwm rockchip,rk3328-pwm                                         "     S      	  2pwm pclk            ddefault         r   [        %           okay          pwm@ff200010          &    rockchip,px30-pwm rockchip,rk3328-pwm                                        "     S      	  2pwm pclk            ddefault         r   \        %         	  disabled          pwm@ff200020          &    rockchip,px30-pwm rockchip,rk3328-pwm                                         "     S      	  2pwm pclk            ddefault         r   ]        %         	  disabled          pwm@ff200030          &    rockchip,px30-pwm rockchip,rk3328-pwm                  0                      "     S      	  2pwm pclk            ddefault         r   ^        %         	  disabled          pwm@ff208000          &    rockchip,px30-pwm rockchip,rk3328-pwm                                        #     T      	  2pwm pclk            ddefault         r   _        %         	  disabled          pwm@ff208010          &    rockchip,px30-pwm rockchip,rk3328-pwm                                       #     T      	  2pwm pclk            ddefault         r   `        %         	  disabled          pwm@ff208020          &    rockchip,px30-pwm rockchip,rk3328-pwm                                        #     T      	  2pwm pclk            ddefault         r   a        %         	  disabled          pwm@ff208030          &    rockchip,px30-pwm rockchip,rk3328-pwm                 0                      #     T      	  2pwm pclk            ddefault         r   b        %         	  disabled          timer@ff210000        *    rockchip,px30-timer rockchip,rk3288-timer                !                                         Y      &        2pclk timer        dma-controller@ff240000           arm,pl330 arm,primecell              $        @                                      0                     	  2apb_pclk            G           +   '      tsadc@ff280000            rockchip,px30-tsadc              (                        $           R      ,        b  P               ,     X        2tsadc apb_pclk                      
  tsadc-apb           |   )        w         dinit default sleep          r   c           d           c                   okay            +         saradc@ff288000       ,    rockchip,px30-saradc rockchip,rk3399-saradc              (                       T                             -     W        2saradc apb_pclk                       saradc-apb          okay               e      nvmem@ff290000            rockchip,px30-otp                )        @                /     Z     a        2otp apb_pclk phy                          phy                      +      id@7                         cpu-leakage@17                       performance@1e                                        clock-controller@ff2b0000             rockchip,px30-cru                +                     f   &           2xin24m gpll         |   )        %                    8  R                                   @      I        bFq   рр          +         clock-controller@ff2bc000             rockchip,px30-pmucru                 +                    f        2xin24m          |   )        %                      R   &      &      &           bG          +   &      syscon@ff2c0000       ,    rockchip,px30-usb2phy-grf syscon simple-mfd              ,                              +      usb2phy@100           rockchip,px30-usb2phy                               &   
        2phyclk          %            R                 g        usb480m_phy         okay            +   g   host-port                              D         
  
linestate           okay            +   j      otg-port                      $         B          A          @           
otg-bvalid otg-id linestate         okay            +   i            phy@ff2e0000              rockchip,px30-dsi-dphy               .                     &        E      	  2ref pclk                  >        apb                        h         	  disabled            +   8      phy@ff2f0000              rockchip,px30-csi-dphy               /        @               F        2pclk                           h                 /        apb         |   )      	  disabled            +         usb@ff300000          0    rockchip,px30-usb rockchip,rk3066-usb snps,dwc2              0                        >                         2otg         (otg         0           B          Q            @               V   i      	  [usb2-phy               h           okay          usb@ff340000              generic-ehci                 4                        <                         V   j        [usb            h           okay          usb@ff350000              generic-ohci                 5                        =                         V   j        [usb            h           okay          ethernet@ff360000             rockchip,px30-gmac               6                        +           
macirq        @         >      ?      ?      @      A           C      L      [  2stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac clk_mac_speed          |   )        `rmii            ddefault         r   k   l           h   	              ^      
  stmmaceth           okay            i   m               y              P  P           %        output        mmc@ff370000          .    rockchip,px30-dw-mshc rockchip,rk3288-dw-mshc                7        @                6                         ;      C      D        2biu ciu ciu-drive ciu-sample                                  р        ddefault         r   n   o   p   q           h           okay               6                                             %        6   G               ?        J   O      mmc@ff380000          .    rockchip,px30-dw-mshc rockchip,rk3288-dw-mshc                8        @                7                         8      E      F        2biu ciu ciu-drive ciu-sample                                  р        ddefault         r   r   s   t           h   
      	  disabled          mmc@ff390000          .    rockchip,px30-dw-mshc rockchip,rk3288-dw-mshc                9        @                5                         9      G      H        2biu ciu ciu-drive ciu-sample                                  р        ddefault         r   u   v   w           h   
        okay                      V        e   x         p        J   %           7      spi@ff3a0000              rockchip,sfc                 :        @                8                  :             2clk_sfc hclk_sfc            r   y   z   {        ddefault            h   
      	  disabled          nand-controller@ff3b0000              rockchip,px30-nfc                ;        @                9                        7        2ahb nfc         R      7        bр        ddefault          r   |   }   ~                          h   
      	  disabled          opp-table-1           operating-points-v2         +      opp-200000000                         ~      opp-300000000                               opp-400000000               ׄ                opp-480000000               8          *         gpu@ff400000          $    rockchip,px30-mali arm,mali-bifrost              @        @       $         /          .          -           
job mmu gpu                I                       h                      okay            +         video-codec@ff442000              rockchip,px30-vpu                D                        P          O         
  
vepu vdpu                              
  2aclk hclk           ~              h         iommu@ff442800            rockchip,iommu               D(                       Q                                2aclk iface                         h           +         dsi@ff450000          (    rockchip,px30-mipi-dsi snps,dw-mipi-dsi              E                        K                 D        2pclk            V   8        [dphy               h                 =        apb         |   )                     +          	  disabled       ports                        +       port@0                                    +       endpoint@0                       u           +         endpoint@1                      u           +            port@1                          vop@ff460000              rockchip,px30-vop-big                F                       M                                      2aclk_vop dclk_vop hclk_vop                3      4      5        axi ahb dclk            ~              h         	  disabled       port                         +            +      endpoint@0                       u           +         endpoint@1                      u           +   9            iommu@ff460f00            rockchip,iommu               F                       M                                2aclk iface             h                     	  disabled            +         vop@ff470000              rockchip,px30-vop-lit                G                       N                                      2aclk_vop dclk_vop hclk_vop                7      8      9        axi ahb dclk            ~              h         	  disabled       port                         +            +      endpoint@0                       u           +         endpoint@1                      u           +   :            iommu@ff470f00            rockchip,iommu               G                       N                                2aclk iface             h                     	  disabled            +         isp@ff4a0000              rockchip,px30-cif-isp                J               $         F          I          J           
isp mi mipi                 3                 _        2isp aclk hclk pclk          ~           V           [dphy               h         	  disabled       ports                        +       port@0                                    +                iommu@ff4a8000            rockchip,iommu               J                       F                                2aclk iface             h                                +         qos@ff518000              rockchip,px30-qos syscon                 Q                 +         qos@ff520000              rockchip,px30-qos syscon                 R                  +   $      qos@ff52c000              rockchip,px30-qos syscon                 R                 +         qos@ff538000              rockchip,px30-qos syscon                 S                 +         qos@ff538080              rockchip,px30-qos syscon                 S                +         qos@ff538100              rockchip,px30-qos syscon                 S                 +         qos@ff538180              rockchip,px30-qos syscon                 S                +         qos@ff540000              rockchip,px30-qos syscon                 T                  +         qos@ff540080              rockchip,px30-qos syscon                 T                 +         qos@ff548000              rockchip,px30-qos syscon                 T                 +         qos@ff548080              rockchip,px30-qos syscon                 T                +          qos@ff548100              rockchip,px30-qos syscon                 T                 +   !      qos@ff548180              rockchip,px30-qos syscon                 T                +   "      qos@ff548200              rockchip,px30-qos syscon                 T                 +   #      qos@ff550000              rockchip,px30-qos syscon                 U                  +         qos@ff550080              rockchip,px30-qos syscon                 U                 +         qos@ff550100              rockchip,px30-qos syscon                 U                 +         qos@ff550180              rockchip,px30-qos syscon                 U                +         qos@ff558000              rockchip,px30-qos syscon                 U                 +         qos@ff558080              rockchip,px30-qos syscon                 U                +         pinctrl           rockchip,px30-pinctrl           |   )                                +               gpio@ff040000             rockchip,gpio-bank                                                      &                                                   +   G      gpio@ff250000             rockchip,gpio-bank               %                                         \                                                +         gpio@ff260000             rockchip,gpio-bank               &                                         ]                                           bios-disable-override-hog                                  bios_disable_override                  bios-disable-n-hog                        bios_disable                               gpio@ff270000             rockchip,gpio-bank               '                                         ^                                                +   m      pcfg-pull-up             	        +         pcfg-pull-down           	      pcfg-pull-none           	        +         pcfg-pull-none-2ma           	        	+         pcfg-pull-up-2ma             	        	+         pcfg-pull-up-4ma             	        	+           +         pcfg-pull-none-4ma           	        	+         pcfg-pull-down-4ma           	        	+         pcfg-pull-none-8ma           	        	+           +         pcfg-pull-up-8ma             	        	+           +         pcfg-pull-none-12ma          	        	+           +         pcfg-pull-up-12ma            	        	+           +         pcfg-pull-none-smt           	         	:        +         pcfg-output-high                   pcfg-output-low          	O      pcfg-input-high          	         	Z        +         pcfg-input           	Z      i2c0       i2c0-xfer            	g                    	              +   H         i2c1       i2c1-xfer            	g                                  +   K         i2c2       i2c2-xfer            	g                                +   L         i2c3       i2c3-xfer            	g                                +   Q         tsadc      tsadc-otp-pin           	g                      +   c      tsadc-otp-out           	g                     +   d         uart0      uart0-xfer           	g       
                           +   (      uart0-cts           	g                   uart0-rts           	g                      uart1      uart1-xfer           	g                                +   ;      uart1-cts           	g                    +   <      uart1-rts           	g                    +   =         uart2-m0       uart2m0-xfer             	g                                +   >         uart2-m1       uart2m1-xfer             	g                                 uart3-m0       uart3m0-xfer             	g                                uart3m0-cts         	g                   uart3m0-rts         	g                      uart3-m1       uart3m1-xfer             	g                                +   ?      uart3m1-cts         	g                    +   @      uart3m1-rts         	g                    +   A         uart4      uart4-xfer           	g                                +   B      uart4-cts           	g                    +   C      uart4-rts           	g                    +   D         uart5      uart5-xfer           	g                                +   E      uart5-cts           	g                  uart5-rts           	g                     spi0       spi0-clk            	g                    +   R      spi0-csn            	g                    +   S      spi0-miso           	g                    +   T      spi0-mosi           	g                    +   U      spi0-clk-hs         	g                  spi0-miso-hs            	g                  spi0-mosi-hs            	g                     spi1       spi1-clk            	g                    +   V      spi1-csn0           	g      	              +   W      spi1-csn1           	g      
              +   X      spi1-miso           	g                    +   Y      spi1-mosi           	g                    +   Z      spi1-clk-hs         	g                  spi1-miso-hs            	g                  spi1-mosi-hs            	g                     pdm    pdm-clk0m0          	g                  pdm-clk0m1          	g                  pdm-clk1            	g                  pdm-sdi0m0          	g                  pdm-sdi0m1          	g                  pdm-sdi1            	g                  pdm-sdi2            	g                  pdm-sdi3            	g                  pdm-clk0m0-sleep            	g                   pdm-clk0m1-sleep            	g                   pdm-clk1-sleep          	g                   pdm-sdi0m0-sleep            	g                   pdm-sdi0m1-sleep            	g                   pdm-sdi1-sleep          	g                   pdm-sdi2-sleep          	g                   pdm-sdi3-sleep          	g                      i2s0       i2s0-8ch-mclk           	g                  i2s0-8ch-sclktx         	g                    +   *      i2s0-8ch-sclkrx         	g                  i2s0-8ch-lrcktx         	g                    +   +      i2s0-8ch-lrckrx         	g                  i2s0-8ch-sdo0           	g                    +   ,      i2s0-8ch-sdo1           	g                  i2s0-8ch-sdo2           	g                  i2s0-8ch-sdo3           	g                  i2s0-8ch-sdi0           	g                    +   -      i2s0-8ch-sdi1           	g                  i2s0-8ch-sdi2           	g      	            i2s0-8ch-sdi3           	g                     i2s1       i2s1-2ch-mclk           	g                  i2s1-2ch-sclk           	g                    +   .      i2s1-2ch-lrck           	g                    +   /      i2s1-2ch-sdi            	g                    +   0      i2s1-2ch-sdo            	g                    +   1         i2s2       i2s2-2ch-mclk           	g                  i2s2-2ch-sclk           	g                    +   2      i2s2-2ch-lrck           	g                    +   3      i2s2-2ch-sdi            	g                    +   4      i2s2-2ch-sdo            	g                    +   5         sdmmc      sdmmc-clk           	g                    +   n      sdmmc-cmd           	g                    +   o      sdmmc-det           	g                     +   p      sdmmc-bus1          	g                  sdmmc-bus4        @  	g                                                        +   q         sdio       sdio-clk            	g                    +   t      sdio-cmd            	g                    +   s      sdio-bus4         @  	g                                                        +   r         emmc       emmc-clk            	g      	              +   u      emmc-cmd            	g      
              +   v      emmc-rstnout            	g                  emmc-bus1           	g                   emmc-bus4         @  	g                                                       emmc-bus8           	g                                                                                                         +   w      emmc-reset          	g                     +            flash      flash-cs0           	g                    +         flash-rdy           	g      	              +         flash-dqs           	g      
              +         flash-ale           	g                    +   |      flash-cle           	g                    +   ~      flash-wrn           	g                    +         flash-csl           	g                  flash-rdn           	g                    +         flash-bus8          	g                                                                                                         +   }         sfc    sfc-bus4          @  	g                                                         +   {      sfc-bus2             	g                               sfc-cs0         	g                    +   z      sfc-clk         	g      	              +   y         lcdc       lcdc-rgb-dclk-pin           	g                   lcdc-rgb-m0-hsync-pin           	g                  lcdc-rgb-m0-vsync-pin           	g                  lcdc-rgb-m0-den-pin         	g                  lcdc-rgb888-m0-data-pins           	g                                                                  
            	                                                                                                                                                                                                                        lcdc-rgb666-m0-data-pins            	g                                                                  
            	                                                                                                                                                lcdc-rgb565-m0-data-pins            	g                                                                  
            	                                                                                                                        lcdc-rgb888-m1-data-pins           	g                                          
                                                                                                                                                                        lcdc-rgb666-m1-data-pins            	g                                          
                                                                                                lcdc-rgb565-m1-data-pins            	g                                          
                                                                           pwm0       pwm0-pin            	g                     +   [         pwm1       pwm1-pin            	g                     +   \         pwm2       pwm2-pin            	g                    +   ]         pwm3       pwm3-pin            	g                     +   ^         pwm4       pwm4-pin            	g                    +   _         pwm5       pwm5-pin            	g                    +   `         pwm6       pwm6-pin            	g                    +   a         pwm7       pwm7-pin            	g                    +   b         gmac       rmii-pins           	g                                                                                                       	              +   k      mac-refclk-12ma         	g      
              +   l      mac-refclk          	g      
               cif-m0     cif-clkout-m0           	g                  dvp-d2d9-m0         	g                                                                                                                   	            
                        dvp-d0d1-m0          	g                              d10-d11-m0           	g                                 cif-m1     cif-clkout-m1           	g                  dvp-d2d9-m1         	g                                                      	                                                                                                dvp-d0d1-m1          	g                              d10-d11-m1           	g                                 isp    isp-prelight            	g                     leds       module-led-pin          	g                     +         sd-card-led-pin         	g                     +            pmic       pmic-int            	g                      +   I         haikou     haikou-keys-pin       P  	g                                                                         +            uart       uart5-rts-pin           	g                      +   F            emmc-pwrseq           mmc-pwrseq-emmc         r           ddefault         	u                  +   x      leds          
    gpio-leds           ddefault         r              okay       led-0                           
  	heartbeat         
  	heartbeat           	         led-1              m               	mmc2            	sd          	            vccsys-regulator              regulator-fixed         vcc5v0_sys           r                 - LK@        E LK@        +   J      chosen          	serial0:115200n8          gpio-keys         
    gpio-keys           r           ddefault    button-batlow-n         	BATLOW#         	              m            button-slp-btn-n          	  	SLP_BTN#            	                          button-wake-n           	WAKE#           	                                   switch-lid-btn-n          	  	LID_BTN#            	            	              m               i2s0-sound            simple-audio-card           	i2s         	Haikou,I2S-codec            
           
           
=      simple-audio-card,codec         
_            
i        +         simple-audio-card,cpu           
_            sgtl5000-oscillator           fixed-clock         %            w          +   M      dc-12v-regulator              regulator-fixed         dc_12v           r                 -          E          +         vcc3v3-baseboard-regulator            regulator-fixed         vcc3v3_baseboard             r                 - 2Z        E 2Z        
|           +   O      vcc5v0-baseboard-regulator            regulator-fixed         vcc5v0_baseboard             r                 - LK@        E LK@        
|           +         vdda-codec-regulator              regulator-fixed         vdda_codec                   - 2Z        E 2Z        
|           +   N      vddd-codec-regulator              regulator-fixed         vddd_codec                   - j         E j         
|           +   P         	compatible interrupt-parent #address-cells #size-cells model i2c0 i2c1 i2c2 i2c3 serial0 serial1 serial2 serial3 serial4 serial5 spi0 spi1 mmc0 mmc1 rtc0 rtc1 ethernet0 mmc2 device_type reg enable-method clocks #cooling-cells cpu-idle-states dynamic-power-coefficient operating-points-v2 cpu-supply phandle entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend interrupts interrupt-affinity ports status clock-frequency clock-output-names #clock-cells polling-delay-passive polling-delay sustainable-power thermal-sensors temperature hysteresis trip cooling-device contribution #power-domain-cells pm_qos pmuio1-supply pmuio2-supply offset mode-bootloader mode-fastboot mode-loader mode-normal mode-recovery clock-names dmas dma-names reg-shift reg-io-width pinctrl-names pinctrl-0 rockchip,grf resets reset-names #sound-dai-cells rockchip,trcm-sync-tx-only #interrupt-cells interrupt-controller vccio1-supply vccio2-supply vccio3-supply vccio4-supply vccio5-supply vccio6-supply vccio-oscgpi-supply phys phy-names rockchip,output remote-endpoint rts-gpios rockchip,system-power-controller wakeup-source vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply vcc7-supply vcc9-supply regulator-name regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-always-on regulator-boot-on regulator-on-in-suspend regulator-suspend-microvolt regulator-off-in-suspend VDDA-supply VDDIO-supply VDDD-supply pagesize vcc-supply num-cs #pwm-cells arm,pl330-periph-burst #dma-cells assigned-clocks assigned-clock-rates rockchip,hw-tshut-temp pinctrl-1 pinctrl-2 #thermal-sensor-cells #io-channel-cells vref-supply bits #reset-cells assigned-clock-parents #phy-cells interrupt-names power-domains dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size phy-mode snps,reset-gpio snps,reset-active-low snps,reset-delays-us phy-supply clock_in_out bus-width fifo-depth max-frequency vqmmc-supply sd-uhs-sdr12 sd-uhs-sdr25 sd-uhs-sdr50 cap-mmc-highspeed cap-sd-highspeed cd-gpios disable-wp vmmc-supply mmc-hs200-1_8v mmc-pwrseq non-removable iommus #iommu-cells rockchip,disable-mmu-reset rockchip,pmu ranges gpio-controller #gpio-cells output-high line-name gpio-hog input bias-pull-up bias-pull-down bias-disable drive-strength input-schmitt-enable output-low input-enable rockchip,pins reset-gpios function linux,default-trigger color stdout-path label linux,code linux,input-type simple-audio-card,format simple-audio-card,name simple-audio-card,mclk-fs simple-audio-card,frame-master simple-audio-card,bitclock-master sound-dai system-clock-fixed vin-supply 