     8  ~L   (            b  ~                             $    rockchip,rk3308-evb rockchip,rk3308                                  +            7Rockchip RK3308 EVB    aliases          =/pinctrl/gpio@ff220000           C/pinctrl/gpio@ff230000           I/pinctrl/gpio@ff240000           O/pinctrl/gpio@ff250000           U/pinctrl/gpio@ff260000           [/i2c@ff040000            `/i2c@ff050000            e/i2c@ff060000            j/i2c@ff070000            o/serial@ff0a0000             w/serial@ff0b0000             /serial@ff0c0000             /serial@ff0d0000             /serial@ff0e0000             /spi@ff120000            /spi@ff130000            /spi@ff140000         cpus                         +       cpu@0            cpu           arm,cortex-a35                            psci                                           Z                                          )           4         cpu@1            cpu           arm,cortex-a35                           psci                                              4         cpu@2            cpu           arm,cortex-a35                           psci                                              4   	      cpu@3            cpu           arm,cortex-a35                           psci                                              4   
      idle-states         <psci       cpu-sleep             arm,idle-state           I        Z           q   x                             4            l2-cache              cache                               4            opp-table-0           operating-points-v2                  4      opp-408000000               Q          ~ ~ r`          @               opp-600000000               #F          ~ ~ r`          @      opp-816000000               0,            r`          @      opp-1008000000              <          * * r`          @         arm-pmu           arm,cortex-a35-pmu        0         S          T          U          V                    	   
      external-mac-clock            fixed-clock               
  (mac_clkin           ;          psci              arm,psci-1.0             smc       timer             arm,armv8-timer       0                                
        xin24m            fixed-clock         ;            n6         (xin24m          4   O      grf@ff000000          &    rockchip,rk3308-grf syscon simple-mfd                                  4   4   io-domains        "    rockchip,rk3308-io-voltage-domain         	  Hdisabled          reboot-mode           syscon-reboot-mode          O           VRB        fRB        rRB         ~RB        RB	         syscon@ff008000       .    rockchip,rk3308-usb2phy-grf syscon simple-mfd                        @                      +      usb2phy@100           rockchip,rk3308-usb2phy                                                        H        phyclk          (usb480m_phy         ;          	  Hdisabled            4      otg-port          $         C          D          E           otg-bvalid otg-id linestate                   	  Hdisabled            4   :      host-port                  J         
  linestate                     	  Hdisabled            4   ;            syscon@ff00b000       -    rockchip,rk3308-detect-grf syscon simple-mfd                                               +         syscon@ff00c000       +    rockchip,rk3308-core-grf syscon simple-mfd                                             +         i2c@ff040000          (    rockchip,rk3308-i2c rockchip,rk3399-i2c                                                  	  i2c pclk                              default                                 +          	  Hdisabled          i2c@ff050000          (    rockchip,rk3308-i2c rockchip,rk3399-i2c                                                  	  i2c pclk                              default                                 +          	  Hdisabled          i2c@ff060000          (    rockchip,rk3308-i2c rockchip,rk3399-i2c                                                  	  i2c pclk                              default                                 +          	  Hdisabled          i2c@ff070000          (    rockchip,rk3308-i2c rockchip,rk3399-i2c                                                  	  i2c pclk                              default                                 +          	  Hdisabled          watchdog@ff080000              rockchip,rk3308-wdt snps,dw-wdt                                                     
         	  Hdisabled          serial@ff0a0000       &    rockchip,rk3308-uart snps,dw-apb-uart                
                                                        baudclk apb_pclk                        
           default                        	  Hdisabled          serial@ff0b0000       &    rockchip,rk3308-uart snps,dw-apb-uart                                                                        baudclk apb_pclk                        
           default                        	  Hdisabled          serial@ff0c0000       &    rockchip,rk3308-uart snps,dw-apb-uart                                                                        baudclk apb_pclk                        
           default                  	  Hdisabled          serial@ff0d0000       &    rockchip,rk3308-uart snps,dw-apb-uart                                                                        baudclk apb_pclk                        
           default                  	  Hdisabled          serial@ff0e0000       &    rockchip,rk3308-uart snps,dw-apb-uart                                                                        baudclk apb_pclk                        
           default                    Hokay          spi@ff120000          (    rockchip,rk3308-spi rockchip,rk3066-spi                                                              +                                 spiclk apb_pclk                              tx rx           default                           	  Hdisabled          spi@ff130000          (    rockchip,rk3308-spi rockchip,rk3066-spi                                                              +                                 spiclk apb_pclk                             tx rx           default                      !      	  Hdisabled          spi@ff140000          (    rockchip,rk3308-spi rockchip,rk3066-spi                                                              +                                 spiclk apb_pclk            "      "           tx rx           default            #   $   %   &      	  Hdisabled          pwm@ff160000          (    rockchip,rk3308-pwm rockchip,rk3328-pwm                                      y            	  pwm pclk            default            '        &         	  Hdisabled          pwm@ff160010          (    rockchip,rk3308-pwm rockchip,rk3328-pwm                                     y            	  pwm pclk            default            (        &         	  Hdisabled          pwm@ff160020          (    rockchip,rk3308-pwm rockchip,rk3328-pwm                                      y            	  pwm pclk            default            )        &         	  Hdisabled          pwm@ff160030          (    rockchip,rk3308-pwm rockchip,rk3328-pwm               0                      y            	  pwm pclk            default            *        &         	  Hdisabled          pwm@ff170000          (    rockchip,rk3308-pwm rockchip,rk3328-pwm                                      x            	  pwm pclk            default            +        &         	  Hdisabled          pwm@ff170010          (    rockchip,rk3308-pwm rockchip,rk3328-pwm                                     x            	  pwm pclk            default            ,        &         	  Hdisabled          pwm@ff170020          (    rockchip,rk3308-pwm rockchip,rk3328-pwm                                      x            	  pwm pclk            default            -        &         	  Hdisabled          pwm@ff170030          (    rockchip,rk3308-pwm rockchip,rk3328-pwm               0                      x            	  pwm pclk            default            .        &         	  Hdisabled          pwm@ff180000          (    rockchip,rk3308-pwm rockchip,rk3328-pwm                                                  	  pwm pclk            default            /        &           Hokay            4   b      pwm@ff180010          (    rockchip,rk3308-pwm rockchip,rk3328-pwm                                                 	  pwm pclk            default            0        &         	  Hdisabled          pwm@ff180020          (    rockchip,rk3308-pwm rockchip,rk3328-pwm                                                  	  pwm pclk            default            1        &         	  Hdisabled          pwm@ff180030          (    rockchip,rk3308-pwm rockchip,rk3328-pwm               0                                  	  pwm pclk            default            2        &         	  Hdisabled          rktimer@ff1a0000              rockchip,rk3288-timer                                                                         pclk timer        saradc@ff1e0000       .    rockchip,rk3308-saradc rockchip,rk3399-saradc                                        %                  %              saradc apb_pclk         1           C      F        Jsaradc-apb          Hokay            V   3        4   [      efuse@ff210000            rockchip,rk3308-otp              !        @                      +                  '                    otp apb_pclk phy            C      T        Jphy    id@7                         cpu-leakage@17                       logic-leakage@18                            dma-controller@ff2c0000           arm,pl330 arm,primecell              ,        @                                       b                     	  apb_pclk            y           4         dma-controller@ff2d0000           arm,pl330 arm,primecell              -        @                                      b                     	  apb_pclk            y           4   "      i2s@ff320000              rockchip,rk3308-i2s-tdm              2                        2           mclk_tx mclk_rx hclk                   T      V                 "      "           rx tx           C                  
  Jtx-m rx-m              4      	  Hdisabled          i2s@ff330000              rockchip,rk3308-i2s-tdm              3                        3           mclk_tx mclk_rx hclk                   X      Z                 "           rx          C                  
  Jtx-m rx-m              4      	  Hdisabled          i2s@ff350000          (    rockchip,rk3308-i2s rockchip,rk3066-i2s              5                        4                  \              i2s_clk i2s_hclk               "      "   	        tx rx           C                    Jreset-m reset-h         default            5   6   7   8      	  Hdisabled          i2s@ff360000          (    rockchip,rk3308-i2s rockchip,rk3066-i2s              6                        5                  ^              i2s_clk i2s_hclk               "           rx          C                    Jreset-m reset-h       	  Hdisabled          spdif-tx@ff3a0000         ,    rockchip,rk3308-spdif rockchip,rk3066-spdif              :                        7                  b            
  mclk hclk              "           tx          default            9      	  Hdisabled          usb@ff400000          2    rockchip,rk3308-usb rockchip,rk3066-usb snps,dwc2                @                        B                          otg         otg                                          @                  :      	  usb2-phy          	  Hdisabled          usb@ff440000              generic-ehci                 D                        G                                      ;        usb       	  Hdisabled          usb@ff450000              generic-ohci                 E                        H                                      ;        usb       	  Hdisabled          mmc@ff480000          0    rockchip,rk3308-dw-mshc rockchip,rk3288-dw-mshc              H        @                L                                    0      1      2        biu ciu ciu-drive ciu-sample                       р        default            <   =   >   ?      	  Hdisabled          mmc@ff490000          0    rockchip,rk3308-dw-mshc rockchip,rk3288-dw-mshc              I        @                M                                    :      ;      <        biu ciu ciu-drive ciu-sample                       р      	  Hdisabled          mmc@ff4a0000          0    rockchip,rk3308-dw-mshc rockchip,rk3288-dw-mshc              J        @                N                                    5      6      7        biu ciu ciu-drive ciu-sample                       р        default            @   A   B      	  Hdisabled          nand-controller@ff4b0000          (    rockchip,rk3308-nfc rockchip,rv1108-nfc              K        @                Q                        -        ahb nfc               -        р           C   D   E   F   G   H   I        default       	  Hdisabled          ethernet@ff4e0000             rockchip,rk3308-gmac                 N                        @           macirq        @         @      B      B      A      @                  C      [  stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac clk_mac_speed          rmii            default            J   K        C      }      
  Jstmmaceth              4      	  Hdisabled          spi@ff4c0000              rockchip,sfc                 L        @                R                  =              clk_sfc hclk_sfc               L   M   N        default       	  Hdisabled          clock-controller@ff500000             rockchip,rk3308-cru              P                     O        xin24m             4        ;                                               4         codec@ff560000            rockchip,rk3308-codec                V                    4        mclk_tx mclk_rx hclk                   U      W              Jcodec           C              &          	  Hdisabled          interrupt-controller@ff580000             arm,gic-400       @       X            X              X@             X`                       	           7            H                     4         sram@fff80000         
    mmio-sram                                 ]                                  +      ddr-sram@0                        vad-sram@8000                          pinctrl           rockchip,rk3308-pinctrl            4                     +            ]        default            P   gpio@ff220000             rockchip,gpio-bank               "                        (                           d        t            H        7           4   ]      gpio@ff230000             rockchip,gpio-bank               #                        )                           d        t            H        7         gpio@ff240000             rockchip,gpio-bank               $                        *                           d        t            H        7         gpio@ff250000             rockchip,gpio-bank               %                        +                           d        t            H        7         gpio@ff260000             rockchip,gpio-bank               &                        ,                           d        t            H        7         pcfg-pull-up                     4   Z      pcfg-pull-down                   4   W      pcfg-pull-none                   4   S      pcfg-pull-none-2ma                            pcfg-pull-up-2ma                              pcfg-pull-up-4ma                                4   Y      pcfg-pull-none-4ma                              4   X      pcfg-pull-down-4ma                            pcfg-pull-none-8ma                              4   Q      pcfg-pull-up-8ma                                4   R      pcfg-pull-none-12ma                             4   U      pcfg-pull-up-12ma                               4   T      pcfg-pull-none-smt                            4   V      pcfg-output-high                   pcfg-output-low                pcfg-input-high                         pcfg-input                 emmc       emmc-clk                  	      Q      emmc-cmd                        R      emmc-pwren                      S      emmc-rstn                 
      S      emmc-bus1                        R      emmc-bus4         @               R            R            R            R      emmc-bus8                        R            R            R            R            R            R            R            R         flash      flash-csn0                      S        4   F      flash-rdy                       S        4   H      flash-ale                       S        4   C      flash-cle                 	      S        4   E      flash-wrn                       S        4   I      flash-rdn                 
      S        4   G      flash-bus8                       T            T            T            T            T            T            T            T        4   D         sfc    sfc-bus4          @               S            S            S            S        4   N      sfc-bus2                          S            S      sfc-cs0                     S        4   M      sfc-clk                     S        4   L         gmac       rmii-pins                       U            U            U            S            S            S            S            S            S        4   J      mac-refclk-12ma                     U        4   K      mac-refclk                      S         gmac-m1    rmiim1-pins                     U            U            U            S            S             S            S            S            S      macm1-refclk-12ma                       U      macm1-refclk                        S         i2c0       i2c0-xfer                        V            V        4            i2c1       i2c1-xfer                         V             V        4            i2c2       i2c2-xfer                        V            V        4            i2c3-m0    i2c3m0-xfer                       V             V        4            i2c3-m1    i2c3m1-xfer                      V            V         i2c3-m2    i2c3m2-xfer                      V             V         i2s_2ch_0      i2s-2ch-0-mclk                      S      i2s-2ch-0-sclk                      S        4   5      i2s-2ch-0-lrck                      S        4   6      i2s-2ch-0-sdo                       S        4   8      i2s-2ch-0-sdi                       S        4   7         i2s_8ch_0      i2s-8ch-0-mclk                      S      i2s-8ch-0-sclktx                        S      i2s-8ch-0-sclkrx                        S      i2s-8ch-0-lrcktx                        S      i2s-8ch-0-lrckrx                        S      i2s-8ch-0-sdo0                	      S      i2s-8ch-0-sdo1                
      S      i2s-8ch-0-sdo2                      S      i2s-8ch-0-sdo3                      S      i2s-8ch-0-sdi0                      S      i2s-8ch-0-sdi1                      S      i2s-8ch-0-sdi2                      S      i2s-8ch-0-sdi3                      S         i2s_8ch_1_m0       i2s-8ch-1-m0-mclk                       S      i2s-8ch-1-m0-sclktx                     S      i2s-8ch-1-m0-sclkrx                     S      i2s-8ch-1-m0-lrcktx                     S      i2s-8ch-1-m0-lrckrx                     S      i2s-8ch-1-m0-sdo0                       S      i2s-8ch-1-m0-sdo1-sdi3                      S      i2s-8ch-1-m0-sdo2-sdi2                	      S      i2s-8ch-1-m0-sdo3_sdi1                
      S      i2s-8ch-1-m0-sdi0                       S         i2s_8ch_1_m1       i2s-8ch-1-m1-mclk                       S      i2s-8ch-1-m1-sclktx                     S      i2s-8ch-1-m1-sclkrx                     S      i2s-8ch-1-m1-lrcktx                     S      i2s-8ch-1-m1-lrckrx                     S      i2s-8ch-1-m1-sdo0                       S      i2s-8ch-1-m1-sdo1-sdi3                      S      i2s-8ch-1-m1-sdo2-sdi2                      S      i2s-8ch-1-m1-sdo3_sdi1                      S      i2s-8ch-1-m1-sdi0                       S         pdm_m0     pdm-m0-clk                      S      pdm-m0-sdi0                     S      pdm-m0-sdi1               
      S      pdm-m0-sdi2               	      S      pdm-m0-sdi3                     S         pdm_m1     pdm-m1-clk                      S      pdm-m1-sdi0                     S      pdm-m1-sdi1                     S      pdm-m1-sdi2                     S      pdm-m1-sdi3                     S         pdm_m2     pdm-m2-clkm                     S      pdm-m2-clk                      S      pdm-m2-sdi0                     S      pdm-m2-sdi1                     S      pdm-m2-sdi2                     S      pdm-m2-sdi3                     S         pwm0       pwm0-pin                         S      pwm0-pin-pull-down                       W        4   /         pwm1       pwm1-pin                         S        4   0      pwm1-pin-pull-down                       W         pwm2       pwm2-pin                         S        4   1      pwm2-pin-pull-down                       W         pwm3       pwm3-pin                         S        4   2      pwm3-pin-pull-down                       W         pwm4       pwm4-pin                         S        4   +      pwm4-pin-pull-down                       W         pwm5       pwm5-pin                         S        4   ,      pwm5-pin-pull-down                       W         pwm6       pwm6-pin                         S        4   -      pwm6-pin-pull-down                       W         pwm7       pwm7-pin                        S        4   .      pwm7-pin-pull-down                      W         pwm8       pwm8-pin                  
      S        4   '      pwm8-pin-pull-down                
      W         pwm9       pwm9-pin                        S        4   (      pwm9-pin-pull-down                      W         pwm10      pwm10-pin                       S        4   )      pwm10-pin-pull-down                     W         pwm11      pwm11-pin                       S        4   *      pwm11-pin-pull-down                     W         rtc    rtc-32k                      S        4   P         sdmmc      sdmmc-clk                       X        4   <      sdmmc-cmd                       Y        4   =      sdmmc-det                        Y        4   >      sdmmc-pwren                     X      sdmmc-bus1                      Y      sdmmc-bus4        @              Y            Y            Y            Y        4   ?         sdio       sdio-clk                        Q        4   B      sdio-cmd                        R        4   A      sdio-pwren                       Q      sdio-wrpt                        Q      sdio-intn                         Q      sdio-bus1                        R      sdio-bus4         @               R            R            R            R        4   @         spdif_in       spdif-in                         S         spdif_out      spdif-out                        S        4   9         spi0       spi0-clk                        Y        4         spi0-csn0                       Y        4         spi0-miso                        Y        4         spi0-mosi                       Y        4            spi1       spi1-clk                        Y        4         spi1-csn0                       Y        4         spi1-miso                 
      Y        4          spi1-mosi                       Y        4   !         spi1-m1    spi1m1-miso                     Y      spi1m1-mosi                     Y      spi1m1-clk                      Y      spi1m1-csn0               	      Y         spi2       spi2-clk                        Y        4   #      spi2-csn0                       Y        4   $      spi2-miso                       Y        4   %      spi2-mosi                       Y        4   &         tsadc      tsadc-otp-pin                  
       S      tsadc-otp-out                  
      S         uart0      uart0-xfer                       Z             Z        4         uart0-cts                       S        4         uart0-rts                       S        4         uart0-rts-pin                        S         uart1      uart1-xfer                       Z            Z        4         uart1-cts                       S        4         uart1-rts                       S        4            uart2-m0       uart2m0-xfer                         Z            Z        4            uart2-m1       uart2m1-xfer                         Z            Z         uart3      uart3-xfer                       Z            Z        4            uart3-m1       uart3m1-xfer                          Z             Z         uart4      uart4-xfer                 	      Z            Z        4         uart4-cts                       S      uart4-rts                       S      uart4-rts-pin                        S         buttons    pwr-key                       Z        4   \         usb    usb-drv                       S        4   a         sdio-pwrseq    wifi-enable-h                         S            chosen          serial4:1500000n8         adc-keys0         	    adc-keys               [            buttons         (   d        6 w@   button-func         P        	  [function            a  FP         adc-keys1         	    adc-keys               [           buttons         (   d        6 w@   button-esc          P           [micmute         a >      button-home         P  u        [mode            a       button-menu         P           [play            a 	      button-down         P   r        [volume down         a       button-up           P   s      
  [volume up           a  FP         gpio-keys         
    gpio-keys            {        default            \   key-power              ]              P   t        [GPIO Key Power             d                  vcc12v-dcin           regulator-fixed         vcc12v_dcin                                               4   ^      vcc5v0-sys            regulator-fixed         vcc5v0_sys           LK@         LK@                             ^        4   `      vcc-1v8           regulator-fixed         vcc_1v8          w@         w@                             _        4   3      vcc-ddr           regulator-fixed         vcc_ddr          `         `                             `      vcc-io            regulator-fixed         vcc_io           2Z         2Z                             `        4   _      vccio-flash           regulator-fixed         vccio_flash          2Z         2Z                             _      vcc5v0-host           regulator-fixed            ]                !        default            a      
  vbus_host              `      vdd-core              pwm-regulator           4   b               	  vdd_core             x         r`                          9           W   `        4         vdd-log           regulator-fixed         vdd_log                                                `      vdd-1v0           regulator-fixed         vdd_1v0          B@         B@                             `         	compatible interrupt-parent #address-cells #size-cells model gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 serial0 serial1 serial2 serial3 serial4 spi0 spi1 spi2 device_type reg enable-method clocks #cooling-cells dynamic-power-coefficient operating-points-v2 cpu-idle-states next-level-cache cpu-supply phandle entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us cache-level cache-unified opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend interrupts interrupt-affinity clock-frequency clock-output-names #clock-cells status offset mode-bootloader mode-loader mode-normal mode-recovery mode-fastboot assigned-clocks assigned-clock-parents clock-names interrupt-names #phy-cells pinctrl-names pinctrl-0 reg-shift reg-io-width dmas dma-names #pwm-cells #io-channel-cells resets reset-names vref-supply arm,pl330-periph-burst #dma-cells rockchip,grf dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size phys phy-names bus-width fifo-depth max-frequency assigned-clock-rates phy-mode #reset-cells #sound-dai-cells #interrupt-cells interrupt-controller ranges gpio-controller #gpio-cells bias-pull-up bias-pull-down bias-disable drive-strength input-schmitt-enable output-high output-low input-enable rockchip,pins stdout-path io-channels io-channel-names poll-interval keyup-threshold-microvolt linux,code label press-threshold-microvolt autorepeat gpios debounce-interval wakeup-source regulator-name regulator-min-microvolt regulator-max-microvolt regulator-always-on regulator-boot-on vin-supply gpio enable-active-high pwms regulator-settling-time-up-us pwm-supply 