  V   8  R   (            v  RX                                 apm,mustang apm,xgene-storm                                  +            7APM X-Gene Mustang board       cpus                         +       cpu@0            =cpu           apm,potenza          I                 Mspin-table           [              l         cpu@1            =cpu           apm,potenza          I                Mspin-table           [              l         cpu@100          =cpu           apm,potenza          I                Mspin-table           [              l         cpu@101          =cpu           apm,potenza          I               Mspin-table           [              l         cpu@200          =cpu           apm,potenza          I                Mspin-table           [              l         cpu@201          =cpu           apm,potenza          I               Mspin-table           [              l         cpu@300          =cpu           apm,potenza          I                Mspin-table           [              l         cpu@301          =cpu           apm,potenza          I               Mspin-table           [              l         l2-cache-0            cache            }                               l2-cache-1            cache            }                               l2-cache-2            cache            }                               l2-cache-3            cache            }                                  interrupt-controller@78010000             arm,cortex-a15-gic                              @   I    x             x             x              x                         	                    refclk            fixed-clock                                refclk                    timer             arm,armv8-timer       0                                                   pmu           apm,potenza-pmu                        soc           simple-bus                       +                                               clocks                       +                pcppll@17000100           apm,xgene-pcppll-clock                                     pcppll           I                      pcppll           D          socpll@17000120           apm,xgene-socpll-clock                                     socpll           I                      socpll           D                     socplldiv2            fixed-factor-clock                                     socplldiv2          %           0            socplldiv2                    ahbclk@17000000           apm,xgene-device-clock                                      I                       :div-reg         D  d        S           a             ahbclk                    sdioclk@1f2ac000              apm,xgene-device-clock                                       I    *                               :csr-reg div-reg         o            z                                 D  x        S           a             sdioclk                   ethclk            apm,xgene-device-clock                                     ethclk           I                      :div-reg         D  8        S   	        a             ethclk              	      menetclk              apm,xgene-device-clock                         	             I                    :csr-reg       	   menetclk                #      sge0clk@1f21c000              apm,xgene-device-clock                                      I    !                :csr-reg         z   
                    sge0clk             &      xge0clk@1f61c000              apm,xgene-device-clock                                      I    a                :csr-reg         z            xge0clk             )      xge1clk@1f62c000              apm,xgene-device-clock        	  disabled                                        I    b                :csr-reg         z            xge1clk             +      sataphy1clk@1f21c000              apm,xgene-device-clock                                      I    !                :csr-reg          sataphy1clk       	  disabled            o           z                                             sataphy1clk@1f22c000              apm,xgene-device-clock                                      I    "                :csr-reg          sataphy2clk         okay            o           z   :                                         sataphy1clk@1f23c000              apm,xgene-device-clock                                      I    #                :csr-reg          sataphy3clk         okay            o           z   :                                         sata01clk@1f21c000            apm,xgene-device-clock                                      I    !                :csr-reg       
   sata01clk           o           z                          9                  sata23clk@1f22c000            apm,xgene-device-clock                                      I    "                :csr-reg       
   sata23clk           o           z                          9                  sata45clk@1f23c000            apm,xgene-device-clock                                      I    #                :csr-reg       
   sata45clk           o           z                          9                   rtcclk@17000000           apm,xgene-device-clock                                      I                       :csr-reg         o           z                                  rtcclk              "      rngpkaclk@17000000            apm,xgene-device-clock                                      I                       :csr-reg         o           z                               
   rngpkaclk               ,      pcie0clk@1f2bc000           okay              apm,xgene-device-clock                                      I    +                :csr-reg       	   pcie0clk                      pcie1clk@1f2cc000         	  disabled              apm,xgene-device-clock                                      I    ,                :csr-reg       	   pcie1clk                      pcie2clk@1f2dc000         	  disabled              apm,xgene-device-clock                                      I    -                :csr-reg       	   pcie2clk                      pcie3clk@1f50c000         	  disabled              apm,xgene-device-clock                                      I    P                :csr-reg       	   pcie3clk                      pcie4clk@1f51c000         	  disabled              apm,xgene-device-clock                                      I    Q                :csr-reg       	   pcie4clk                      dmaclk@1f27c000           apm,xgene-device-clock                                      I    '                :csr-reg          dmaclk              -         msi@79000000              apm,xgene1-msi                    I    y                                                                                                                                                                                                     system-clk-controller@17000000            apm,xgene-scu syscon             I                          
      reboot@17000014           syscon-reboot              
        L           ~         csw@7e200000              apm,xgene-csw syscon             I    ~                            mcba@7e700000             apm,xgene-mcb syscon             I    ~p                           mcbb@7e720000             apm,xgene-mcb syscon             I    ~r                           efuse@1054a000            apm,xgene-efuse syscon           I    T                           rb@7e000000           apm,xgene-rb syscon          I    ~                            edac@78800000             apm,xgene-edac                       +                                                                             I    x               $                     !          '      edacmc@7e800000           apm,xgene-edac-mc            I    ~                           edacmc@7e840000           apm,xgene-edac-mc            I    ~                          edacmc@7e880000           apm,xgene-edac-mc            I    ~                          edacmc@7e8c0000           apm,xgene-edac-mc            I    ~                          edacpmd@7c000000              apm,xgene-edac-pmd           I    |                             edacpmd@7c200000              apm,xgene-edac-pmd           I    |                            edacpmd@7c400000              apm,xgene-edac-pmd           I    |@                           edacpmd@7c600000              apm,xgene-edac-pmd           I    |`                           edacl3@7e600000           apm,xgene-edac-l3            I    ~`               edacsoc@7e930000              apm,xgene-edac-soc-v1            I    ~                  pmu@78810000              apm,xgene-pmu-v2                         +                                                       I    x                         "      pmul3c@7e610000           apm,xgene-pmu-l3c            I    ~a               pmuiob@7e940000           apm,xgene-pmu-iob            I    ~               pmucmcb@7e710000              apm,xgene-pmu-mcb            I    ~q                           pmucmcb@7e730000              apm,xgene-pmu-mcb            I    ~s                          pmucmc@7e810000           apm,xgene-pmu-mc             I    ~                           pmucmc@7e850000           apm,xgene-pmu-mc             I    ~                          pmucmc@7e890000           apm,xgene-pmu-mc             I    ~                          pmucmc@7e8d0000           apm,xgene-pmu-mc             I    ~                             pcie@1f2b0000           okay             =pci       $    apm,xgene-storm-pcie apm,xgene-pcie                      +                         I    +                              :csr cfg       T                                                  C                              8  B                        B                                  &               0                       C                                                                                                                         Q                       ^         pcie@1f2c0000         	  disabled             =pci       $    apm,xgene-storm-pcie apm,xgene-pcie                      +                         I    ,                              :csr cfg       T                                        р          C                              8  B                        B                                  &               0                       C                                                                                                                         Q                       ^         pcie@1f2d0000         	  disabled             =pci       $    apm,xgene-storm-pcie apm,xgene-pcie                      +                         I    -                              :csr cfg       T                                                  C                              8  B                        B                                  &               0                       C                                                                                                                         Q                       ^         pcie@1f500000         	  disabled             =pci       $    apm,xgene-storm-pcie apm,xgene-pcie                      +                         I    P                              :csr cfg       T                                                  C                              8  B                        B                                  &               0                       C                                                                                                                         Q                       ^         pcie@1f510000         	  disabled             =pci       $    apm,xgene-storm-pcie apm,xgene-pcie                      +                         I    Q                               :csr cfg       T                                                  C                              8  B                        B                                  &               0                       C                                                                                                                         Q                       ^         mailbox@10540000              apm,xgene-slimpro-mbox           I    T                 i         `                                                                                                      i2cslimpro            apm,xgene-slimpro-i2c           u             hwmonslimpro              apm,xgene-slimpro-hwmon         u            serial@1c020000         okay          	    ns16550a             I                     |                                         L         serial@1c021000       	  disabled          	    ns16550a             I                    |                                         M         serial@1c022000       	  disabled          	    ns16550a             I                     |                                         N         serial@1c023000       	  disabled          	    ns16550a             I    0                |                                         O         mmc@1c000000              arasan,sdhci-4.9a            I                              I            Q                 clk_xin clk_ahb                               okay          gpio0@1701c000            apm,xgene-gpio           I            @                          gpio@1c024000             snps,dw-apb-gpio             I    @                             +       gpio-controller@0             snps,dw-apb-gpio-port                                            I             i2c@10512000          	  disabled                         +              snps,designware-i2c          I    Q                         D                                                phy@1f21a000              apm,xgene-phy            I    !                                        	  disabled                                            
   
      
   
                  phy@1f22a000              apm,xgene-phy            I    "                                          okay                                            
   
      
   
                  phy@1f23a000              apm,xgene-phy            I    #                                          okay                                            
   
      
   
            !      sata@1a000000             apm,xgene-ahci        P   I                  !             !            !            !p                                    Q      	  disabled                                        	  sata-phy          sata@1a400000             apm,xgene-ahci        P   I    @             "             "            "            "p                                    Q        okay                                        	  sata-phy          sata@1a800000             apm,xgene-ahci        @   I                 #             #            #                                    Q        okay                               !          	  sata-phy          usb@19000000          	  disabled          
    snps,dwc3            I                                          Q        host          usb@19800000          	  disabled          
    snps,dwc3            I                                         Q        host          gpio@17001000             apm,xgene-gpio-sb            I                                       H          (          )          *          +          ,          -                                                 *      rtc@10510000              apm,xgene-rtc            I    Q                         F                          "          mdio@17020000             apm,xgene-mdio-rgmii                         +             I                        #       phy@3            I               %      phy@4            I               '      phy@5            I               (         ethernet@17020000             apm,xgene-enet          okay          0   I                                                :enet_csr ring_csr ring_cmd                  <            Q           #                            rgmii           -   $   %   mdio              apm,xgene-mdio                       +       ethernet-phy@3            ethernet-phy-id001c.c915             I               $            ethernet@1f210000             apm,xgene1-sgenet           okay          0   I    !                                             :enet_csr ring_csr ring_cmd                                        Q           &                            sgmii           -   '      ethernet@1f210030             apm,xgene1-sgenet           okay          0   I    ! 0                                           :enet_csr ring_csr ring_cmd                                       8            Q                        sgmii           -   (      ethernet@1f610000             apm,xgene1-xgenet           okay          0   I    a             `                               :enet_csr ring_csr ring_cmd        `          `          a          b          c          d          e          f          g           @             Q           )                            xgmii           H   *            ethernet@1f620000             apm,xgene1-xgenet         	  disabled          0   I    b             `                               :enet_csr ring_csr ring_cmd                  l          m           8            Q           +                            xgmii         rng@10520000              apm,xgene-rng            I    R                         A              ,          dma@1f270000              apm,xgene-storm-dma          =dma       @   I    '                                   @      T              <                                                              Q           -             chosen        memory@100000000             =memory           I                    gpio-keys         
    gpio-keys      button          TPOWER           Z   t        e               *                        poweroff_mbox@10548000        $    apm,mustang-poweroff-mailbox syscon          I    T        0            .      poweroff@10548010             syscon-poweroff            .        L           ~            	compatible interrupt-parent #address-cells #size-cells model device_type reg enable-method cpu-release-addr next-level-cache cache-level cache-unified phandle #interrupt-cells interrupt-controller interrupts #clock-cells clock-frequency clock-output-names ranges dma-ranges clocks clock-names clock-mult clock-div reg-names divider-offset divider-width divider-shift csr-offset csr-mask enable-offset enable-mask status msi-controller regmap regmap-csw regmap-mcba regmap-mcbb regmap-efuse regmap-rb memory-controller pmd-controller enable-bit-index bus-range interrupt-map-mask interrupt-map dma-coherent msi-parent #mbox-cells mboxes reg-shift no-1-8-v gpio-controller #gpio-cells snps,nr-gpios bus_num #phy-cells apm,tx-boost-gain apm,tx-eye-tuning phys phy-names dr_mode local-mac-address phy-connection-type phy-handle port-id channel rxlos-gpios label linux,code linux,input-type 