Ðþí  !   H  \   (            Â      €                                           RTSM_VE_AEMv8A            arm,rtsm_ve,aemv8a arm,vexpress                      "            1      clock-24000000           fixed-clock          =             Jn6          Zv2m:clk24mhz             m         clock-1000000            fixed-clock          =             J B@         Zv2m:refclk1mhz           m         clock-32768          fixed-clock          =             J  €          Zv2m:refclk32khz          m         regulator-3v3            regulator-fixed          u3V3          „ 2Z          œ 2Z           ´         m         mcc          arm,vexpress,config-bus          È      clock-controller             arm,vexpress-osc             ã               üjepÈîà         =             Zv2m:oscclk1          m         reset            arm,vexpress-reset           ã             muxfpga          arm,vexpress-muxfpga             ã             shutdown             arm,vexpress-shutdown            ã             reboot           arm,vexpress-reboot          ã   	          dvimode          arm,vexpress-dvimode             ã                bus@8000000          simple-bus           "            1                                                          ?     ´  2                                                                                                                                                                                                                                     	          	              
          
                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                !          !              "          "              #          #              $          $              %          %              &          &              '          '              (          (              )          )              *          *      motherboard-bus@8000000          arm,vexpress,v2m-p1 simple-bus           "            1         x                                                                                                            flash@0          arm,vexpress-flash cfi-flash            @                             D         ethernet@202000000           smsc,lan91c111          @                 O         iofpga-bus@300000000             simple-bus           "            1                       !     sysreg@10000             arm,vexpress-sysreg         @               Z        j            m         sysctl@20000             arm,sp810 arm,primecell         @              v                 }refclk timclk apb_pclk           =         0   Ztimerclken0 timerclken1 timerclken2 timerclken3          ‰                                 ™                     m         aaci@40000           arm,pl041 arm,primecell         @              O           v         	  }apb_pclk          mmc@50000            arm,pl180 arm,primecell         @              O   	   
        °                   ¹                  Â ·         Ð           v              }mclk apb_pclk         kmi@60000            arm,pl050 arm,primecell         @              O           v              }KMIREFCLK apb_pclk        kmi@70000            arm,pl050 arm,primecell         @              O           v              }KMIREFCLK apb_pclk        serial@90000             arm,pl011 arm,primecell         @ 	             O           v              }uartclk apb_pclk          serial@a0000             arm,pl011 arm,primecell         @ 
             O           v              }uartclk apb_pclk          serial@b0000             arm,pl011 arm,primecell         @              O           v              }uartclk apb_pclk          serial@c0000             arm,pl011 arm,primecell         @              O           v              }uartclk apb_pclk          watchdog@f0000           arm,sp805 arm,primecell         @              O            v              }wdog_clk apb_pclk         timer@110000             arm,sp804 arm,primecell         @              O           v                        }timclken1 timclken2 apb_pclk          timer@120000             arm,sp804 arm,primecell         @              O           v                       }timclken1 timclken2 apb_pclk          virtio@130000            virtio,mmio         @              O   *      rtc@170000           arm,pl031 arm,primecell         @              O           v         	  }apb_pclk          clcd@1f0000          arm,pl111 arm,primecell         @            	  Ücombined            O           v              }clcdclk apb_pclk            ì   	   port       endpoint            ú   
        
                   m                        chosen          $serial0:115200n8          aliases       G  0/bus@8000000/motherboard-bus@8000000/iofpga-bus@300000000/serial@90000        G  8/bus@8000000/motherboard-bus@8000000/iofpga-bus@300000000/serial@a0000        G  @/bus@8000000/motherboard-bus@8000000/iofpga-bus@300000000/serial@b0000        G  H/bus@8000000/motherboard-bus@8000000/iofpga-bus@300000000/serial@c0000        cpus             "            1       cpu@0           Pcpu       
   arm,armv8           @                \spin-table          j    € ÿø        {         cpu@1           Pcpu       
   arm,armv8           @               \spin-table          j    € ÿø        {         cpu@2           Pcpu       
   arm,armv8           @               \spin-table          j    € ÿø        {         cpu@3           Pcpu       
   arm,armv8           @               \spin-table          j    € ÿø        {         l2-cache0            cache           Œ            ˜         m            memory@80000000         Pmemory           @    €       €      €       €         reserved-memory          "            1               vram@18000000            shared-dma-pool         @            €           ¦         m   	         interrupt-controller@2c001000            arm,gic-400 arm,cortex-a15-gic                      "             ­      @  @    ,             ,               , @             , `                 O      	           m         timer            arm,armv8-timer       0  O                              
           Jõá       pmu          arm,armv8-pmuv3       0  O       <          =          >          ?         panel            arm,rtsm-display       port       endpoint            ú            m   
               	model compatible interrupt-parent #address-cells #size-cells #clock-cells clock-frequency clock-output-names phandle regulator-name regulator-min-microvolt regulator-max-microvolt regulator-always-on arm,vexpress,config-bridge arm,vexpress-sysreg,func freq-range ranges #interrupt-cells interrupt-map-mask interrupt-map reg bank-width interrupts gpio-controller #gpio-cells clocks clock-names assigned-clocks assigned-clock-parents cd-gpios wp-gpios max-frequency vmmc-supply interrupt-names memory-region remote-endpoint arm,pl11x,tft-r0g0b0-pads stdout-path serial0 serial1 serial2 serial3 device_type enable-method cpu-release-addr next-level-cache cache-level cache-unified no-map interrupt-controller 