  |C   8  t   (            o  t                                                                   2   ,Emtop Embedded Solutions i.MX8M Mini Baseboard V1         ;   2ees,imx8mm-emtop-baseboard ees,imx8mm-emtop-som fsl,imx8mm     aliases       &   =/soc@0/bus@30800000/ethernet@30be0000         "   G/soc@0/bus@30000000/gpio@30200000         "   M/soc@0/bus@30000000/gpio@30210000         "   S/soc@0/bus@30000000/gpio@30220000         "   Y/soc@0/bus@30000000/gpio@30230000         "   _/soc@0/bus@30000000/gpio@30240000         !   e/soc@0/bus@30800000/i2c@30a20000          !   j/soc@0/bus@30800000/i2c@30a30000          !   o/soc@0/bus@30800000/i2c@30a40000          !   t/soc@0/bus@30800000/i2c@30a50000          !   y/soc@0/bus@30800000/mmc@30b40000          !   ~/soc@0/bus@30800000/mmc@30b50000          !   /soc@0/bus@30800000/mmc@30b60000          6   /soc@0/bus@30800000/spba-bus@30800000/serial@30860000         6   /soc@0/bus@30800000/spba-bus@30800000/serial@30890000         6   /soc@0/bus@30800000/spba-bus@30800000/serial@30880000         $   /soc@0/bus@30800000/serial@30a60000       3   /soc@0/bus@30800000/spba-bus@30800000/spi@30820000        3   /soc@0/bus@30800000/spba-bus@30800000/spi@30830000        3   /soc@0/bus@30800000/spba-bus@30800000/spi@30840000        cpus                                 idle-states          psci       cpu-pd-wait          2arm,idle-state             3                                          
                    cpu@0           &cpu          2arm,cortex-a53          2            6  l        D              Kpsci            Y           f   @        x                         @                                                    speed_grade                                             
      cpu@1           &cpu          2arm,cortex-a53          2           6  l        D              Kpsci            Y           f   @        x                         @                                                                                   cpu@2           &cpu          2arm,cortex-a53          2           6  l        D              Kpsci            Y           f   @        x                         @                                                                                   cpu@3           &cpu          2arm,cortex-a53          2           6  l        D              Kpsci            Y           f   @        x                         @                                                                                   l2-cache0            2cache                       )        [           h   @        z                       opp-table            2operating-points-v2          7              opp-1200000000          B    G         I P        W              h I         y      opp-1600000000          B    _^         I ~        W              h I         y      opp-1800000000          B    kI         I B@        W              h I         y         clock-osc-32k            2fixed-clock                                osc_32k                  clock-osc-24m            2fixed-clock                     n6         osc_24m                  clock-ext1           2fixed-clock                     k@      	  clk_ext1                     clock-ext2           2fixed-clock                     k@      	  clk_ext2                     clock-ext3           2fixed-clock                     k@      	  clk_ext3                     clock-ext4           2fixed-clock                     k@      	  clk_ext4                     psci             2arm,psci-1.0             smc       pmu          2arm,cortex-a53-pmu                        timer            2arm,armv8-timer       0                                
           z                thermal-zones      cpu-thermal                                    trips      trip0            L                  -passive            	      trip1            s                	  -critical             cooling-maps       map0            "   	      0  '   
                        usbphynop1          6             2usb-nop-xceiv           D              A              Q      2      	  hmain_clk            t              4      usbphynop2          6             2usb-nop-xceiv           D              A              Q      2      	  hmain_clk            t              6      soc@0            2fsl,imx8mm-soc simple-bus                                                >           @       @                         soc_unique_id      bus@30000000             2fsl,aips-bus simple-bus         20    @                                   0   0    @     spba-bus@30000000            2fsl,spba-bus simple-bus                                  20                  sai@30010000                         2fsl,imx8mm-sai fsl,imx8mq-sai           20                    _            D                                  hbus mclk1 mclk2 mclk3                                               rx tx         	  disabled          sai@30020000                         2fsl,imx8mm-sai fsl,imx8mq-sai           20                    `            D                                  hbus mclk1 mclk2 mclk3                                              rx tx         	  disabled          sai@30030000                         2fsl,imx8mm-sai fsl,imx8mq-sai           20                    2            D                                  hbus mclk1 mclk2 mclk3                                              rx tx         	  disabled          sai@30050000                         2fsl,imx8mm-sai fsl,imx8mq-sai           20                    Z            D                                  hbus mclk1 mclk2 mclk3                               	               rx tx         	  disabled          sai@30060000                         2fsl,imx8mm-sai fsl,imx8mq-sai           20                    Z            D                                  hbus mclk1 mclk2 mclk3                  
                            rx tx         	  disabled          audio-controller@30080000            2fsl,imx8mm-micfil           20           0         m          n          ,          -         (  D                  &      '            )  hipg_clk ipg_clk_app pll8k pll11k clkext3                                rx                    	  disabled          spdif@30090000           2fsl,imx35-spdif         20	                             P  D      ^            r                           ^                           :  hcore rxtx0 rxtx1 rxtx2 rxtx3 rxtx4 rxtx5 rxtx6 rxtx7 spba                                              rx tx         	  disabled             gpio@30200000            2fsl,imx8mm-gpio fsl,imx35-gpio          20                     @          A           D                                                                
              #      gpio@30210000            2fsl,imx8mm-gpio fsl,imx35-gpio          20!                    B          C           D                                                                (         gpio@30220000            2fsl,imx8mm-gpio fsl,imx35-gpio          20"                    D          E           D                                                                =              B      gpio@30230000            2fsl,imx8mm-gpio fsl,imx35-gpio          20#                    F          G           D                                                                W               +      gpio@30240000            2fsl,imx8mm-gpio fsl,imx35-gpio          20$                    H          I           D                                                                w         tmu@30260000             2fsl,imx8mm-tmu          20&             D                         calib           	                     watchdog@30280000            2fsl,imx8mm-wdt fsl,imx21-wdt            20(                    N           D              okay            default         -            7      watchdog@30290000            2fsl,imx8mm-wdt fsl,imx21-wdt            20)                    O           D            	  disabled          watchdog@302a0000            2fsl,imx8mm-wdt fsl,imx21-wdt            20*                    
           D            	  disabled          dma-controller@302c0000           2fsl,imx8mm-sdma fsl,imx8mq-sdma         20,                    g           D                    hipg ahb         L           Wimx/sdma/sdma-imx7d.bin                  dma-controller@302b0000           2fsl,imx8mm-sdma fsl,imx8mq-sdma         20+                    "           D                    hipg ahb         L           Wimx/sdma/sdma-imx7d.bin       pinctrl@30330000             2fsl,imx8mm-iomuxc           203                   emtop-gpio-led-grp        0  p  4                    8                         A      emtop-i2c1-grp        0  p    |            @                 @            !      emtop-pmic-grp          p   4                 A           "      emtop-uart2-grp       0  p  <              @  @                @                  emtop-usdhc3-grp           p  8                 <                                                    $                 (                 0                    h                 l                 p                  d                        $      emtop-usdhc3-100mhz-grp        p  8                 <                                                    $                 (                 0                    h                 l                 p                  d                        %      emtop-usdhc3-200mhz-grp        p  8                 <                                                    $                 (                 0                    h                 l                 p                  d                        &      emtop-wdog-grp          p   0                                 fec1grp      h  p   h                    l                 p                    t                    x                    |                                                                                                                                                                                                               )         syscon@30340000          2fsl,imx8mm-iomuxc-gpr syscon            204                (      efuse@30350000           2fsl,imx8mm-ocotp syscon         205             D                                  unique-id@4         2                       speed-grade@10          2                       calib@3c            2   <                    mac-address@90          2                 '         clock-controller@30360000            2fsl,imx8mm-anatop           206                      snvs@30370000         #   2fsl,sec-v4.0-mon syscon simple-mfd          207                   snvs-rtc-lp          2fsl,sec-v4.0-mon-rtc-lp         y              4                                    D            	  hsnvs-rtc          snvs-powerkey            2fsl,sec-v4.0-pwrkey         y                             D              hsnvs-pwrkey            t               	  disabled          snvs-lpgpr        +   2fsl,imx8mm-snvs-lpgpr fsl,imx7d-snvs-lpgpr           clock-controller@30380000            2fsl,imx8mm-ccm          208                    U          V                      D                        4  hosc_32k osc_24m clk_ext1 clk_ext2 clk_ext3 clk_ext4       8  A      B            [      ^      `                     Q      8      ,      /      8                    ׄ ׄ ,p                   reset-controller@30390000         %   2fsl,imx8mm-src fsl,imx8mq-src syscon            209                    Y                               gpc@303a0000             2fsl,imx8mm-gpc          20:                    W                                       pgc                              power-domain@0                      2            D      X        A      X        Q      @                 power-domain@1                      2           t           D                 9      power-domain@2                      2                    power-domain@3                      2                    power-domain@4                      2           D            Z        A      Y      Z        Q      8      8        / ׄ                  power-domain@5                      2            D      Z                                         t              ;      power-domain@6                      2           D              A      T        Q      8           =      power-domain@7                      2              >      power-domain@8                      2              ?      power-domain@9                      2   	           @      power-domain@10                     2   
        D                    A      U      V        Q      A      8        e             1      power-domain@11                     2              2               bus@30400000             2fsl,aips-bus simple-bus         20@   @                                   0@  0@   @     pwm@30660000             2fsl,imx8mm-pwm fsl,imx27-pwm            20f                    Q           D                    hipg per                  	  disabled          pwm@30670000             2fsl,imx8mm-pwm fsl,imx27-pwm            20g                    R           D                    hipg per                  	  disabled          pwm@30680000             2fsl,imx8mm-pwm fsl,imx27-pwm            20h                    S           D                    hipg per                  	  disabled          pwm@30690000             2fsl,imx8mm-pwm fsl,imx27-pwm            20i                    T           D                    hipg per                  	  disabled          timer@306a0000           2nxp,sysctr-timer            20j                    /           D           hper          bus@30800000             2fsl,aips-bus simple-bus         20   @                                   0  0   @              spba-bus@30800000            2fsl,spba-bus simple-bus                                  20                 spi@30820000          !   2fsl,imx8mm-ecspi fsl,imx51-ecspi                                      20                               D                    hipg per                                           rx tx         	  disabled          spi@30830000          !   2fsl,imx8mm-ecspi fsl,imx51-ecspi                                      20                                D                    hipg per                                          rx tx         	  disabled          spi@30840000          !   2fsl,imx8mm-ecspi fsl,imx51-ecspi                                      20                    !           D                    hipg per                                          rx tx         	  disabled          serial@30860000          2fsl,imx8mm-uart fsl,imx6q-uart          20                               D                    hipg per                                            rx tx         	  disabled          serial@30880000          2fsl,imx8mm-uart fsl,imx6q-uart          20                               D                    hipg per                                            rx tx         	  disabled          serial@30890000          2fsl,imx8mm-uart fsl,imx6q-uart          20                               D                    hipg per         okay            default         -             crypto@30900000          2fsl,sec-v4.0                                     20                 0                    [           D      ]      _      	  haclk ipg       jr@1000          2fsl,sec-v4.0-job-ring           2                     i         	  disabled          jr@2000          2fsl,sec-v4.0-job-ring           2                      j         jr@3000          2fsl,sec-v4.0-job-ring           2  0                   r            i2c@30a20000             2fsl,imx8mm-i2c fsl,imx21-i2c                                      20                    #           D              okay                     default         -   !   pmic@25          2nxp,pca9450c            2   %        default         -   "             #                 regulators     BUCK1           BUCK1            5          B@         *         <        P  5      BUCK2           BUCK2            5                   *         <        P  5                 BUCK3           BUCK3            5          B@         *         <      BUCK4           BUCK4            -         6         *         <      BUCK5           BUCK5            -P         0         *         <      BUCK6           BUCK6                     O         *         <      LDO1            LDO1             -P         0         *         <      LDO2            LDO2             5          kh         *         <      LDO3            LDO3                               *         <      LDO4            LDO4             \         kh         *         <      LDO5            LDO5             -P         6               i2c@30a30000             2fsl,imx8mm-i2c fsl,imx21-i2c                                      20                    $           D            	  disabled          i2c@30a40000                                       2fsl,imx8mm-i2c fsl,imx21-i2c            20                    %           D            	  disabled          i2c@30a50000             2fsl,imx8mm-i2c fsl,imx21-i2c                                      20                    &           D            	  disabled          serial@30a60000          2fsl,imx8mm-uart fsl,imx6q-uart          20                               D                    hipg per                                            rx tx         	  disabled          mailbox@30aa0000             2fsl,imx8mm-mu fsl,imx6sx-mu         20                    X           D              e         mmc@30b40000          !   2fsl,imx8mm-usdhc fsl,imx7d-usdhc            20                               D      _      S              hipg ahb per         q                               	  disabled          mmc@30b50000          !   2fsl,imx8mm-usdhc fsl,imx7d-usdhc            20                               D      _      S              hipg ahb per         q                               	  disabled          mmc@30b60000          !   2fsl,imx8mm-usdhc fsl,imx7d-usdhc            20                               D      _      S              hipg ahb per         q                                 okay          "  default state_100mhz state_200mhz           -   $           %           &               spi@30bb0000                                       2nxp,imx8mm-fspi         20                   fspi_base fspi_mmap                k           D                    hfspi_en fspi          	  disabled          dma-controller@30bd0000           2fsl,imx8mm-sdma fsl,imx8mq-sdma         20                               D            ]        hipg ahb         L           Wimx/sdma/sdma-imx7d.bin                  ethernet@30be0000         -   2fsl,imx8mm-fec fsl,imx8mq-fec fsl,imx6sx-fec            20           0         v          w          x          y         (  D                  u      t      v      "  hipg ahb ptp enet_clk_ref enet_out            A      R      u      t      v         Q      6      :      ;      9             sY@                                     '        mac-address            (              okay            default         -   )      	  rgmii-id               *            mdio                                 ethernet-phy@4           2ethernet-phy-ieee802.3-c22          2           #   +              /  '        ?   ,           *   vddio-regulator          w@         w@           ,                  bus@32c00000             2fsl,aips-bus simple-bus         22   @                                   2  2   @     lcdif@32e00000        "   2fsl,imx8mm-lcdif fsl,imx6sx-lcdif           22             D      k                    hpix axi disp_axi            A      k      U      V        Q      (      A      8        n6 e                            t   -         	  disabled       port       endpoint            L   .           /            dsi@32e10000             2fsl,imx8mm-mipi-dsim            22             D                    hbus_clk sclk_mipi           A              Q      6                          t   -         	  disabled       ports                                port@0          2       endpoint            L   /           .         port@1          2      endpoint                   csi@32e20000             2fsl,imx8mm-csi fsl,imx7-csi         22                               D              hmclk            t   -          	  disabled       port       endpoint            L   0           3            blk-ctrl@32e28000             2fsl,imx8mm-disp-blk-ctrl syscon         22            t   1   1   1   2   2      '  \bus csi-bridge lcdif mipi-dsi mipi-csi        P  D                                                                  o  hcsi-bridge-axi csi-bridge-apb csi-bridge-core lcdif-axi lcdif-apb lcdif-pix dsi-pclk dsi-ref csi-aclk csi-pclk                        -      mipi-csi@32e30000            2fsl,imx8mm-mipi-csi2            22                               A              Q      A        -@         D                                hpclk wrap phy axi           t   -         	  disabled       ports                                port@0          2          port@1          2      endpoint            L   3           0               usb@32e40000          +   2fsl,imx8mm-usb fsl,imx7d-usb fsl,imx27-usb          22                    (           D              A      X        Q      @        o   4        t   5            t         	  disabled          usbmisc@32e40200          7   2fsl,imx8mm-usbmisc fsl,imx7d-usbmisc fsl,imx6q-usbmisc                     22               5      usb@32e50000          +   2fsl,imx8mm-usb fsl,imx7d-usb fsl,imx27-usb          22                    )           D              A      X        Q      @        o   6        t   7            t         	  disabled          usbmisc@32e50200          7   2fsl,imx8mm-usbmisc fsl,imx7d-usbmisc fsl,imx6q-usbmisc                     22               7      pcie-phy@32f00000            2fsl,imx8mm-pcie-phy         22             D      h        href         A      h                 Q      :                      pciephy         6          	  disabled               :         dma-controller@33000000       &   2fsl,imx7d-dma-apbh fsl,imx28-dma-apbh           23             0                                                  L                      D                 8      nand-controller@33002000          )   2fsl,imx8mm-gpmi-nand fsl,imx7d-gpmi-nand                                      23       3 @   @         gpmi-nand bch                             bch         D                    hgpmi_io gpmi_bch_apb               8            rx-tx         	  disabled          pcie@33800000            2fsl,imx8mm-pcie         23   @               dbi config                                   &pci                      0                                                                              z           msi                                                                    }                            |                            {                            z                                  D            h      i        hpcie pcie_bus pcie_aux          t   9                            apps turnoff            o   :      	  pcie-phy          	  disabled          pcie-ep@33800000             2fsl,imx8mm-pcie-ep          23   @                dbi addr_space                                       dma                    D            h      i        hpcie pcie_bus pcie_aux          t   9                            apps turnoff            o   :      	  pcie-phy            &           5         	  disabled          gpu@38000000             2vivante,gc          28                                 D      Z                          hreg bus core shader         A            *        Q      *            /         t   ;      gpu@38008000             2vivante,gc          28                               D      Z                    hreg bus core            A            *        Q      *            /         t   ;      video-codec@38300000             2nxp,imx8mm-vpu-g1           280                               D              t   <          video-codec@38310000             2nxp,imx8mq-vpu-g2           281                               D              t   <         blk-ctrl@38330000            2fsl,imx8mm-vpu-blk-ctrl syscon          283             t   =   >   ?   @        \bus g1 g2 h1            D                        	  hg1 g2 h1            A      c      d        Q      +      +        #F #F                       <      interrupt-controller@38800000            2arm,gic-v3          28     8                                       	                    memory-controller@3d400000           2fsl,imx8mm-ddrc fsl,imx8m-ddrc          2=@   @          hcore pll alt apb             D                  a      b      ddr-pmu@3d800000          %   2fsl,imx8mm-ddr-pmu fsl,imx8m-ddr-pmu            2=   @                 b            chosen        6  D/soc@0/bus@30800000/spba-bus@30800000/serial@30890000         leds          
   2gpio-leds           default         -   A   led-0           Ppower           )   B             
  Yheartbeat               	interrupt-parent #address-cells #size-cells model compatible ethernet0 gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 mmc0 mmc1 mmc2 serial0 serial1 serial2 serial3 spi0 spi1 spi2 entry-method arm,psci-suspend-param local-timer-stop entry-latency-us exit-latency-us min-residency-us phandle device_type reg clock-latency clocks enable-method i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache operating-points-v2 nvmem-cells nvmem-cell-names cpu-idle-states #cooling-cells cpu-supply cache-level cache-unified opp-shared opp-hz opp-microvolt opp-supported-hw clock-latency-ns opp-suspend #clock-cells clock-frequency clock-output-names interrupts arm,no-tick-in-suspend polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device #phy-cells assigned-clocks assigned-clock-parents clock-names power-domains ranges dma-ranges #sound-dai-cells dmas dma-names status gpio-controller #gpio-cells interrupt-controller #interrupt-cells gpio-ranges #thermal-sensor-cells pinctrl-names pinctrl-0 fsl,ext-reset-output #dma-cells fsl,sdma-ram-script-name fsl,pins regmap offset linux,keycode wakeup-source assigned-clock-rates #reset-cells #power-domain-cells resets #pwm-cells regulator-name regulator-min-microvolt regulator-max-microvolt regulator-boot-on regulator-always-on regulator-ramp-delay #mbox-cells fsl,tuning-start-tap fsl,tuning-step bus-width pinctrl-1 pinctrl-2 non-removable reg-names fsl,num-tx-queues fsl,num-rx-queues fsl,stop-mode phy-mode phy-handle fsl,magic-packet reset-gpios reset-assert-us vddio-supply remote-endpoint power-domain-names phys fsl,usbmisc #index-cells reset-names dma-channels interrupt-names bus-range num-lanes num-viewport interrupt-map-mask interrupt-map fsl,max-link-speed linux,pci-domain phy-names num-ib-windows num-ob-windows stdout-path function linux,default-trigger 