  ;   8      (                                                                                 "   ,PHYTEC phyBOARD-Polis-i.MX8MM RDK         F   2phytec,imx8mm-phyboard-polis-rdk phytec,imx8mm-phycore-som fsl,imx8mm      aliases       &   =/soc@0/bus@30800000/ethernet@30be0000         "   G/soc@0/bus@30000000/gpio@30200000         "   M/soc@0/bus@30000000/gpio@30210000         "   S/soc@0/bus@30000000/gpio@30220000         "   Y/soc@0/bus@30000000/gpio@30230000         "   _/soc@0/bus@30000000/gpio@30240000         !   e/soc@0/bus@30800000/i2c@30a20000          !   j/soc@0/bus@30800000/i2c@30a30000          !   o/soc@0/bus@30800000/i2c@30a40000          !   t/soc@0/bus@30800000/i2c@30a50000          !   y/soc@0/bus@30800000/mmc@30b40000          !   ~/soc@0/bus@30800000/mmc@30b50000          !   /soc@0/bus@30800000/mmc@30b60000          6   /soc@0/bus@30800000/spba-bus@30800000/serial@30860000         6   /soc@0/bus@30800000/spba-bus@30800000/serial@30890000         6   /soc@0/bus@30800000/spba-bus@30800000/serial@30880000         $   /soc@0/bus@30800000/serial@30a60000       3   /soc@0/bus@30800000/spba-bus@30800000/spi@30820000        3   /soc@0/bus@30800000/spba-bus@30800000/spi@30830000        3   /soc@0/bus@30800000/spba-bus@30800000/spi@30840000        (   /soc@0/bus@30800000/i2c@30a20000/rtc@52       .   /soc@0/bus@30000000/snvs@30370000/snvs-rtc-lp         cpus                                 idle-states          psci       cpu-pd-wait          2arm,idle-state             3                                         
        (            cpu@0           0cpu          2arm,cortex-a53          <            @  l        N              Upsci            c           p   @                                 @                                                    speed_grade                                          (   
      cpu@1           0cpu          2arm,cortex-a53          <           @  l        N              Upsci            c           p   @                                 @                                                                          (         cpu@2           0cpu          2arm,cortex-a53          <           @  l        N              Upsci            c           p   @                                 @                                                                          (         cpu@3           0cpu          2arm,cortex-a53          <           @  l        N              Upsci            c           p   @                                 @                                                                          (         l2-cache0            2cache           '            3        e           r   @                   (            opp-table            2operating-points-v2          A        (      opp-1200000000          L    G         S P        a              r I               opp-1600000000          L    _^         S ~        a              r I               opp-1800000000          L    kI         S B@        a              r I                  clock-osc-32k            2fixed-clock                                osc_32k         (         clock-osc-24m            2fixed-clock                     n6         osc_24m         (         clock-ext1           2fixed-clock                     k@      	  clk_ext1            (         clock-ext2           2fixed-clock                     k@      	  clk_ext2            (         clock-ext3           2fixed-clock                     k@      	  clk_ext3            (         clock-ext4           2fixed-clock                     k@      	  clk_ext4            (         psci             2arm,psci-1.0             smc       pmu          2arm,cortex-a53-pmu                        timer            2arm,armv8-timer       0                                
           z                thermal-zones      cpu-thermal                                    trips      trip0            L        !          7passive         (   	      trip1            s        !        	  7critical             cooling-maps       map0            ,   	      0  1   
                        usbphynop1          @             2usb-nop-xceiv           N              K              [      2      	  rmain_clk            ~           (   N      usbphynop2          @             2usb-nop-xceiv           N              K              [      2      	  rmain_clk            ~           (   Q      soc@0            2fsl,imx8mm-soc simple-bus                                                >           @       @                         soc_unique_id      bus@30000000             2fsl,aips-bus simple-bus         <0    @                                   0   0    @     spba-bus@30000000            2fsl,spba-bus simple-bus                                  <0                  sai@30010000                         2fsl,imx8mm-sai fsl,imx8mq-sai           <0                    _            N                                  rbus mclk1 mclk2 mclk3                                               rx tx         	  disabled          sai@30020000                         2fsl,imx8mm-sai fsl,imx8mq-sai           <0                    `            N                                  rbus mclk1 mclk2 mclk3                                              rx tx         	  disabled          sai@30030000                         2fsl,imx8mm-sai fsl,imx8mq-sai           <0                    2            N                                  rbus mclk1 mclk2 mclk3                                              rx tx         	  disabled          sai@30050000                         2fsl,imx8mm-sai fsl,imx8mq-sai           <0                    Z            N                                  rbus mclk1 mclk2 mclk3                               	               rx tx         	  disabled          sai@30060000                         2fsl,imx8mm-sai fsl,imx8mq-sai           <0                    Z            N                                  rbus mclk1 mclk2 mclk3                  
                            rx tx         	  disabled          audio-controller@30080000            2fsl,imx8mm-micfil           <0           0         m          n          ,          -         (  N                  &      '            )  ripg_clk ipg_clk_app pll8k pll11k clkext3                                rx                    	  disabled          spdif@30090000           2fsl,imx35-spdif         <0	                             P  N      ^            r                           ^                           :  rcore rxtx0 rxtx1 rxtx2 rxtx3 rxtx4 rxtx5 rxtx6 rxtx7 spba                                              rx tx         	  disabled             gpio@30200000            2fsl,imx8mm-gpio fsl,imx35-gpio          <0                     @          A           N                                                                
         r   LED_RED WDOG_INT X_RTC_INT    RESET_ETHPHY CAN_nINT CAN_EN nENABLE_FLATLINK  USB_OTG_VBUS_EN  LED_GREEN LED_BLUE           (   #      gpio@30210000            2fsl,imx8mm-gpio fsl,imx35-gpio          <0!                    B          C           N                                                                (         R        BT_REG_ON WL_REG_ON BT_DEV_WAKE BT_HOST_WAKE   X_SD2_CD_B       SD2_RESET_B           (   '      gpio@30220000            2fsl,imx8mm-gpio fsl,imx35-gpio          <0"                    D          E           N                                                                =         gpio@30230000            2fsl,imx8mm-gpio fsl,imx35-gpio          <0#                    F          G           N                                                                W          *          FAN miniPCIe_nPERST   COEX1 COEX2           (   W      gpio@30240000            2fsl,imx8mm-gpio fsl,imx35-gpio          <0$                    H          I           N                                                                w                    ECSPI1_SS0         (          tmu@30260000             2fsl,imx8mm-tmu          <0&             N                         calib           #            (         watchdog@30280000            2fsl,imx8mm-wdt fsl,imx21-wdt            <0(                    N           N              okay             9        Ndefault         \         watchdog@30290000            2fsl,imx8mm-wdt fsl,imx21-wdt            <0)                    O           N            	  disabled          watchdog@302a0000            2fsl,imx8mm-wdt fsl,imx21-wdt            <0*                    
           N            	  disabled          dma-controller@302c0000           2fsl,imx8mm-sdma fsl,imx8mq-sdma         <0,                    g           N                    ripg ahb         f           qimx/sdma/sdma-imx7d.bin         (         dma-controller@302b0000           2fsl,imx8mm-sdma fsl,imx8mq-sdma         <0+                    "           N                    ripg ahb         f           qimx/sdma/sdma-imx7d.bin       pinctrl@30330000             2fsl,imx8mm-iomuxc           <03             (      fec1grp      h     h                    l                                                                                                                                          |                    x                    t                    p                                                            D                         (   F      flexspi0grp              \                  `                  t                  x                  |                                        (   B      i2c1grp       0                  @     |            @         (   /      i2c1gpiogrp       0                       |                     (   0      rtcgrp             4                        (   3      sn65dsi83grp               P                          (   1      usdhc3grp              p                  d                  h                 l                                                  $                 (                 0                 8                 <                       (   ?      usdhc3-100mhzgrp               p                  d                  h                 l                                                  $                 (                 0                 8                 <                       (   @      usdhc3-200mhzgrp               p                  d                  h                 l                                                  $                 (                 0                 8                 <                       (   A      wdoggrp            0                &        (         btgrp         H                            (                    ,                       (   -      can-engrp              L                          (   a      can-intgrp             H                          (   $      ecspi1grp         `      d                   `                   \                    h                       (   !      ecspi2grp         `      t                   p                   l                   x                       (   &      fan0grp           |                        (   _      i2c4grp       0    ,              @   0              @         (   4      i2c4gpiogrp       0    ,                 0                       (   5      leds1grp          H     ,                    `                    d                         (   `      pciegrp       H                                                                 (   V      regusdhc2vmmcgrp                 T              @        (   c      tpmgrp               4             @        (   (      uart1grp          `                                                          $                       (   )      uart2btgrp        `      8                <                   D                @                       (   +      uart3grp          0    D             @  H                @        (   *      usbotg1pwrgrp              X                          (   b      usdhc1grp                                                                                                                                          (   7      usdhc2gpiogrp                8              @        (   :      usdhc2grp              8                    <                   @                   D                   H                   L                   P                      (   9      usdhc2-100mhzgrp               8                    <                   @                   D                   H                   L                   P                      (   ;      usdhc2-200mhzgrp               8                    <                   @                   D                   H                   L                   P                      (   <      wlangrp              $                       (   8         syscon@30340000          2fsl,imx8mm-iomuxc-gpr syscon            <04             (   D      efuse@30350000           2fsl,imx8mm-ocotp syscon         <05             N                                  unique-id@4         <              (         speed-grade@10          <              (         calib@3c            <   <           (         mac-address@90          <              (   C         clock-controller@30360000            2fsl,imx8mm-anatop           <06                      snvs@30370000         #   2fsl,sec-v4.0-mon syscon simple-mfd          <07             (      snvs-rtc-lp          2fsl,sec-v4.0-mon-rtc-lp                       4                                    N            	  rsnvs-rtc          snvs-powerkey            2fsl,sec-v4.0-pwrkey                                      N              rsnvs-pwrkey            t                 okay          snvs-lpgpr        +   2fsl,imx8mm-snvs-lpgpr fsl,imx7d-snvs-lpgpr           clock-controller@30380000            2fsl,imx8mm-ccm          <08                    U          V                      N                        4  rosc_32k osc_24m clk_ext1 clk_ext2 clk_ext3 clk_ext4       8  K      B            [      ^      `                     [      8      ,      /      8                    ׄ ׄ ,p          (         reset-controller@30390000         %   2fsl,imx8mm-src fsl,imx8mq-src syscon            <09                    Y                      (         gpc@303a0000             2fsl,imx8mm-gpc          <0:                    W                                       pgc                              power-domain@0                      <            N      X        K      X        [      @        (         power-domain@1                      <           ~           N              (   T      power-domain@2                      <           (         power-domain@3                      <           (         power-domain@4                      <           N            Z        K      Y      Z        [      8      8        / ׄ         (         power-domain@5                      <            N      Z                                         ~           (   X      power-domain@6                      <           N              K      T        [      8        (   Z      power-domain@7                      <           (   [      power-domain@8                      <           (   \      power-domain@9                      <   	        (   ]      power-domain@10                     <   
        N                    K      U      V        [      A      8        e          (   K      power-domain@11                     <           (   L               bus@30400000             2fsl,aips-bus simple-bus         <0@   @                                   0@  0@   @     pwm@30660000             2fsl,imx8mm-pwm fsl,imx27-pwm            <0f                    Q           N                    ripg per                  	  disabled          pwm@30670000             2fsl,imx8mm-pwm fsl,imx27-pwm            <0g                    R           N                    ripg per                  	  disabled          pwm@30680000             2fsl,imx8mm-pwm fsl,imx27-pwm            <0h                    S           N                    ripg per                  	  disabled          pwm@30690000             2fsl,imx8mm-pwm fsl,imx27-pwm            <0i                    T           N                    ripg per                  	  disabled          timer@306a0000           2nxp,sysctr-timer            <0j                    /           N           rper          bus@30800000             2fsl,aips-bus simple-bus         <0   @                                   0  0   @              spba-bus@30800000            2fsl,spba-bus simple-bus                                  <0                 spi@30820000          !   2fsl,imx8mm-ecspi fsl,imx51-ecspi                                      <0                               N                    ripg per                                           rx tx           okay                   	           Ndefault         \   !   can@0            2microchip,mcp251xfd         N   "             #                      Ndefault         \   $        <            1-             %         spi@30830000          !   2fsl,imx8mm-ecspi fsl,imx51-ecspi                                      <0                                N                    ripg per                                          rx tx           okay                              Ndefault         \   &   tpm@0         !   2infineon,slb9670 tcg,tpm_tis-spi                 '                      Ndefault         \   (        <                      spi@30840000          !   2fsl,imx8mm-ecspi fsl,imx51-ecspi                                      <0                    !           N                    ripg per                                          rx tx         	  disabled          serial@30860000          2fsl,imx8mm-uart fsl,imx6q-uart          <0                               N                    ripg per                                            rx tx           okay            K              [      1        Ndefault         \   )         /      serial@30880000          2fsl,imx8mm-uart fsl,imx6q-uart          <0                               N                    ripg per                                            rx tx           okay            Ndefault         \   *      serial@30890000          2fsl,imx8mm-uart fsl,imx6q-uart          <0                               N                    ripg per         okay            K              [      1         ?        Ndefault         \   +         /   bluetooth            2brcm,bcm43438-bt            N   ,        rlpo         L   '               `host-wakeup              '           	           p         Ndefault         \   -        z   '                  .            crypto@30900000          2fsl,sec-v4.0                                     <0                 0                    [           N      ]      _      	  raclk ipg       jr@1000          2fsl,sec-v4.0-job-ring           <                     i         	  disabled          jr@2000          2fsl,sec-v4.0-job-ring           <                      j         jr@3000          2fsl,sec-v4.0-job-ring           <  0                   r            i2c@30a20000             2fsl,imx8mm-i2c fsl,imx21-i2c                                      <0                    #           N              okay                     Ndefault gpio            \   /           0                                       pmic@8           2nxp,pf8121a         <      regulators     ldo1                               2Z         2Z        
NVCC_SD1 (LDO1)    regulator-state-mem                   ldo2                               2Z         w@        
NVCC_SD2 (LDO2)         (   >   regulator-state-mem                   ldo3                               &%         `        
VCC_ENET_2V5 (LDO3)    regulator-state-mem                   ldo4                               w@         `        
VDDA_1V8 (LDO4)    regulator-state-mem          2        J `        j `         buck1                                               
VDD_SOC_VDDA_PHY_0P8 (BUCK1)       regulator-state-mem          2        J         j          buck2                              B@         B@        
VDD_GPU_DRAM (BUCK2)       regulator-state-mem          2        j B@        J B@         buck3                              B@                 
VDD_VPU (BUCK3)    regulator-state-mem                   buck4                                               
VDD_MIPI_0P9 (BUCK4)       regulator-state-mem                   buck5                                               
VDD_ARM (BUCK5)         (      regulator-state-mem                   buck6                              w@         w@        
VDD_1V8 (BUCK6)    regulator-state-mem          2        j w@        J w@         buck7                                               
NVCC_DRAM_1P1V (BUCK7)        vsnvs                              w@         w@        
NVCC_SNVS_1P8 (VSNVS)               bridge@2d            2ti,sn65dsi83               #   
           Ndefault         \   1        <   -      	  disabled          eeprom@51            2atmel,24c32                     <   Q           2      rtc@52           2microcrystal,rv3028                            #        Ndefault         \   3        <   R                              i2c@30a30000             2fsl,imx8mm-i2c fsl,imx21-i2c                                      <0                    $           N            	  disabled          i2c@30a40000                                       2fsl,imx8mm-i2c fsl,imx21-i2c            <0                    %           N            	  disabled          i2c@30a50000             2fsl,imx8mm-i2c fsl,imx21-i2c                                      <0                    &           N            	  disabled                     Ndefault gpio            \   4           5                                          serial@30a60000          2fsl,imx8mm-uart fsl,imx6q-uart          <0                               N                    ripg per                                            rx tx         	  disabled          mailbox@30aa0000             2fsl,imx8mm-mu fsl,imx6sx-mu         <0                    X           N                       mmc@30b40000          !   2fsl,imx8mm-usdhc fsl,imx7d-usdhc            <0                               N      _      S              ripg ahb per                               	           okay            K      y                    6                  ,        Ndefault         \   7   8                             wifi@1           2brcm,bcm4329-fmac           <            mmc@30b50000          !   2fsl,imx8mm-usdhc fsl,imx7d-usdhc            <0                               N      _      S              ripg ahb per                               	           okay            K      z                 5   '               >      "  Ndefault state_100mhz state_200mhz           \   9   :           ;   :        I   <   :        S   =        _   >      mmc@30b60000          !   2fsl,imx8mm-usdhc fsl,imx7d-usdhc            <0                               N      _      S              ripg ahb per                               	           okay            K              ׄ          l      "  Ndefault state_100mhz state_200mhz           \   ?           @        I   A               spi@30bb0000                                       2nxp,imx8mm-fspi         <0                   fspi_base fspi_mmap                k           N                    rfspi_en fspi            okay            Ndefault         \   B   flash@0                                   2jedec,spi-nor           <            Ĵ                                dma-controller@30bd0000           2fsl,imx8mm-sdma fsl,imx8mq-sdma         <0                               N            ]        ripg ahb         f           qimx/sdma/sdma-imx7d.bin         (         ethernet@30be0000         -   2fsl,imx8mm-fec fsl,imx8mq-fec fsl,imx6sx-fec            <0           0         v          w          x          y         (  N                  u      t      v      "  ripg ahb ptp enet_clk_ref enet_out            K      R      u      t      v         [      6      :      ;      9             sY@                                     C        mac-address            D              okay                   	  rgmii-id               E        Ndefault         \   F   mdio                                 ethernet-phy@0           2ethernet-phy-ieee802.3-c22                           -           ;           P           <            e   #               q                    (   E               bus@32c00000             2fsl,aips-bus simple-bus         <2   @                                   2  2   @     lcdif@32e00000        "   2fsl,imx8mm-lcdif fsl,imx6sx-lcdif           <2             N      k                    rpix axi disp_axi            K      k      U      V        [      (      A      8        n6 e                            ~   G         	  disabled       port       endpoint               H        (   I            dsi@32e10000             2fsl,imx8mm-mipi-dsim            <2             N                    rbus_clk sclk_mipi           K              [      6                          ~   G         	  disabled       ports                                port@0          <       endpoint               I        (   H         port@1          <      endpoint                   csi@32e20000             2fsl,imx8mm-csi fsl,imx7-csi         <2                               N              rmclk            ~   G          	  disabled       port       endpoint               J        (   M            blk-ctrl@32e28000             2fsl,imx8mm-disp-blk-ctrl syscon         <2            ~   K   K   K   L   L      '  bus csi-bridge lcdif mipi-dsi mipi-csi        P  N                                                                  o  rcsi-bridge-axi csi-bridge-apb csi-bridge-core lcdif-axi lcdif-apb lcdif-pix dsi-pclk dsi-ref csi-aclk csi-pclk                     (   G      mipi-csi@32e30000            2fsl,imx8mm-mipi-csi2            <2                               K              [      A        -@         N                                rpclk wrap phy axi           ~   G         	  disabled       ports                                port@0          <          port@1          <      endpoint               M        (   J               usb@32e40000          +   2fsl,imx8mm-usb fsl,imx7d-usb fsl,imx27-usb          <2                    (           N              K      X        [      @           N           O            ~           okay                     otg                             	            	<        	H   P      usbmisc@32e40200          7   2fsl,imx8mm-usbmisc fsl,imx7d-usbmisc fsl,imx6q-usbmisc          	T           <2            (   O      usb@32e50000          +   2fsl,imx8mm-usb fsl,imx7d-usb fsl,imx27-usb          <2                    )           N              K      X        [      @           Q           R            ~           okay             	a        host                       	         usbmisc@32e50200          7   2fsl,imx8mm-usbmisc fsl,imx7d-usbmisc fsl,imx6q-usbmisc          	T           <2            (   R      pcie-phy@32f00000            2fsl,imx8mm-pcie-phy         <2             N      h        rref         K      h                 [      :                      	vpciephy         @            okay             	        	           	   -        	           (   U         dma-controller@33000000       &   2fsl,imx7d-dma-apbh fsl,imx28-dma-apbh           <3             0                                                  f           	           N              (   S      nand-controller@33002000          )   2fsl,imx8mm-gpmi-nand fsl,imx7d-gpmi-nand                                      <3       3 @   @         gpmi-nand bch                             `bch         N                    rgpmi_io gpmi_bch_apb               S            rx-tx         	  disabled          pcie@33800000            2fsl,imx8mm-pcie         <3   @               dbi config                                   0pci         	             0                                                 	           	                  z           `msi                    
                       
                         }                            |                            {                            z           
"           
5            N            h      i        rpcie pcie_bus pcie_aux          ~   T                            	vapps turnoff               U      	  
Fpcie-phy            okay            K      i      g        [      9      >         沀        Ndefault         \   V        
P   W   	         pcie-ep@33800000             2fsl,imx8mm-pcie-ep          <3   @                dbi addr_space          	                             `dma         
"           N            h      i        rpcie pcie_bus pcie_aux          ~   T                            	vapps turnoff               U      	  
Fpcie-phy            
[           
j         	  disabled          gpu@38000000             2vivante,gc          <8                                 N      Z                          rreg bus core shader         K            *        [      *            /         ~   X      gpu@38008000             2vivante,gc          <8                               N      Z                    rreg bus core            K            *        [      *            /         ~   X      video-codec@38300000             2nxp,imx8mm-vpu-g1           <80                               N              ~   Y          video-codec@38310000             2nxp,imx8mq-vpu-g2           <81                               N              ~   Y         blk-ctrl@38330000            2fsl,imx8mm-vpu-blk-ctrl syscon          <83             ~   Z   [   \   ]        bus g1 g2 h1            N                        	  rg1 g2 h1            K      c      d        [      +      +        #F #F                    (   Y      interrupt-controller@38800000            2arm,gic-v3          <8     8                                       	           (         memory-controller@3d400000           2fsl,imx8mm-ddrc fsl,imx8m-ddrc          <=@   @          rcore pll alt apb             N                  a      b           ^   opp-table            2operating-points-v2         (   ^   opp-25000000            L    }x@      opp-100000000           L           opp-750000000           L    ,            ddr-pmu@3d800000          %   2fsl,imx8mm-ddr-pmu fsl,imx8m-ddr-pmu            <=   @                 b            memory@40000000         0memory          <    @                regulator-vdd-3v3-s          2regulator-fixed                            2Z         2Z      
  
VDD_3V3_S           (   2      chosen        6  
y/soc@0/bus@30800000/spba-bus@30800000/serial@30880000         bt-lp-clock          2fixed-clock                    bt_osc_32k                      (   ,      can-clock            2fixed-clock         bZ         can_osc_40m                     (   "      fan       	   2gpio-fan               W               
          2           Ndefault         \   _                 leds          
   2gpio-leds           Ndefault         \   `   led-0           
           
disk               #               
mmc2          led-1           
           
disk               #               
mmc1          led-2           
           
cpu            #             
  
heartbeat            pwr-seq          2mmc-pwrseq-simple           
   d        
   <        e   '              (   6      regulator-can-en             2regulator-fixed         
V   #   	           Ndefault         \   a         2Z         2Z        
CAN_EN          
           (   %      regulator-usb-otg1           2regulator-fixed         
V   #                
        Ndefault         \   b        
usb_otg1_vbus            LK@         LK@        (   P      regulator-usdhc2             2regulator-fixed         
V   '                
          N         Ndefault         \   c         2Z         2Z        
VSD_3V3         (   =      regulator-vcc-3v3            2regulator-fixed          2Z         2Z        
VCC_3V3         (   .         	interrupt-parent #address-cells #size-cells model compatible ethernet0 gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 mmc0 mmc1 mmc2 serial0 serial1 serial2 serial3 spi0 spi1 spi2 rtc0 rtc1 entry-method arm,psci-suspend-param local-timer-stop entry-latency-us exit-latency-us min-residency-us phandle device_type reg clock-latency clocks enable-method i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache operating-points-v2 nvmem-cells nvmem-cell-names cpu-idle-states #cooling-cells cpu-supply cache-level cache-unified opp-shared opp-hz opp-microvolt opp-supported-hw clock-latency-ns opp-suspend #clock-cells clock-frequency clock-output-names interrupts arm,no-tick-in-suspend polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device #phy-cells assigned-clocks assigned-clock-parents clock-names power-domains ranges dma-ranges #sound-dai-cells dmas dma-names status gpio-controller #gpio-cells interrupt-controller #interrupt-cells gpio-ranges gpio-line-names #thermal-sensor-cells fsl,ext-reset-output pinctrl-names pinctrl-0 #dma-cells fsl,sdma-ram-script-name fsl,pins regmap offset linux,keycode wakeup-source assigned-clock-rates #reset-cells #power-domain-cells resets #pwm-cells cs-gpios spi-max-frequency xceiver-supply uart-has-rtscts fsl,dte-mode device-wakeup-gpios interrupt-names max-speed shutdown-gpios vddio-supply pinctrl-1 scl-gpios sda-gpios regulator-always-on regulator-boot-on regulator-max-microvolt regulator-min-microvolt regulator-name regulator-off-in-suspend regulator-on-in-suspend regulator-suspend-min-microvolt regulator-suspend-max-microvolt enable-gpios pagesize vcc-supply aux-voltage-chargeable trickle-resistor-ohms #mbox-cells fsl,tuning-start-tap fsl,tuning-step bus-width mmc-pwrseq non-removable no-1-8-v cd-gpios disable-wp pinctrl-2 vmmc-supply vqmmc-supply keep-power-in-suspend reg-names spi-rx-bus-width spi-tx-bus-width fsl,num-tx-queues fsl,num-rx-queues fsl,stop-mode fsl,magic-packet phy-mode phy-handle enet-phy-lane-no-swap ti,clk-output-sel ti,fifo-depth ti,rx-internal-delay ti,tx-internal-delay reset-gpios reset-assert-us reset-deassert-us remote-endpoint power-domain-names phys fsl,usbmisc adp-disable dr_mode over-current-active-low samsung,picophy-pre-emp-curr-control samsung,picophy-dc-vol-level-adjust srp-disable vbus-supply #index-cells disable-over-current reset-names fsl,clkreq-unsupported fsl,refclk-pad-mode fsl,tx-deemph-gen1 fsl,tx-deemph-gen2 dma-channels bus-range num-lanes num-viewport interrupt-map-mask interrupt-map fsl,max-link-speed linux,pci-domain phy-names reset-gpio num-ib-windows num-ob-windows stdout-path gpio-fan,speed-map color function linux,default-trigger post-power-on-delay-ms power-off-delay-us startup-delay-us enable-active-high off-on-delay-us 