     8     (            O  h                                                                      ,PHYTEC phyGATE-Tauri-L-iMX8MM         C   2phytec,imx8mm-phygate-tauri-l phytec,imx8mm-phycore-som fsl,imx8mm     aliases       &   =/soc@0/bus@30800000/ethernet@30be0000         "   G/soc@0/bus@30000000/gpio@30200000         "   M/soc@0/bus@30000000/gpio@30210000         "   S/soc@0/bus@30000000/gpio@30220000         "   Y/soc@0/bus@30000000/gpio@30230000         "   _/soc@0/bus@30000000/gpio@30240000         !   e/soc@0/bus@30800000/i2c@30a20000          !   j/soc@0/bus@30800000/i2c@30a30000          !   o/soc@0/bus@30800000/i2c@30a40000          !   t/soc@0/bus@30800000/i2c@30a50000          !   y/soc@0/bus@30800000/mmc@30b40000          !   ~/soc@0/bus@30800000/mmc@30b50000          !   /soc@0/bus@30800000/mmc@30b60000          6   /soc@0/bus@30800000/spba-bus@30800000/serial@30860000         6   /soc@0/bus@30800000/spba-bus@30800000/serial@30890000         6   /soc@0/bus@30800000/spba-bus@30800000/serial@30880000         $   /soc@0/bus@30800000/serial@30a60000       3   /soc@0/bus@30800000/spba-bus@30800000/spi@30820000        3   /soc@0/bus@30800000/spba-bus@30800000/spi@30830000        3   /soc@0/bus@30800000/spba-bus@30800000/spi@30840000        (   /soc@0/bus@30800000/i2c@30a20000/rtc@52       .   /soc@0/bus@30000000/snvs@30370000/snvs-rtc-lp         cpus                                 idle-states          psci       cpu-pd-wait          2arm,idle-state             3                                         
        (            cpu@0           0cpu          2arm,cortex-a53          <            @  l        N              Upsci            c           p   @                                 @                                                    speed_grade                                          (   
      cpu@1           0cpu          2arm,cortex-a53          <           @  l        N              Upsci            c           p   @                                 @                                                                          (         cpu@2           0cpu          2arm,cortex-a53          <           @  l        N              Upsci            c           p   @                                 @                                                                          (         cpu@3           0cpu          2arm,cortex-a53          <           @  l        N              Upsci            c           p   @                                 @                                                                          (         l2-cache0            2cache           '            3        e           r   @                   (            opp-table            2operating-points-v2          A        (      opp-1200000000          L    G         S P        a              r I               opp-1600000000          L    _^         S ~        a              r I               opp-1800000000          L    kI         S B@        a              r I                  clock-osc-32k            2fixed-clock                                osc_32k         (         clock-osc-24m            2fixed-clock                     n6         osc_24m         (         clock-ext1           2fixed-clock                     k@      	  clk_ext1            (         clock-ext2           2fixed-clock                     k@      	  clk_ext2            (         clock-ext3           2fixed-clock                     k@      	  clk_ext3            (         clock-ext4           2fixed-clock                     k@      	  clk_ext4            (         psci             2arm,psci-1.0             smc       pmu          2arm,cortex-a53-pmu                        timer            2arm,armv8-timer       0                                
           z                thermal-zones      cpu-thermal                                    trips      trip0            L        !          7passive         (   	      trip1            s        !        	  7critical            (   h         cooling-maps       map0            ,   	      0  1   
                        usbphynop1          @             2usb-nop-xceiv           N              K              [      2      	  rmain_clk            ~           (   P      usbphynop2          @             2usb-nop-xceiv           N              K              [      2      	  rmain_clk            ~           (   T      soc@0            2fsl,imx8mm-soc simple-bus                                                >           @       @                         soc_unique_id           (   i   bus@30000000             2fsl,aips-bus simple-bus         <0    @                                   0   0    @          (   j   spba-bus@30000000            2fsl,spba-bus simple-bus                                  <0                       (   k   sai@30010000                         2fsl,imx8mm-sai fsl,imx8mq-sai           <0                    _            N                                  rbus mclk1 mclk2 mclk3                                               rx tx         	  disabled            (   l      sai@30020000                         2fsl,imx8mm-sai fsl,imx8mq-sai           <0                    `            N                                  rbus mclk1 mclk2 mclk3                                              rx tx         	  disabled            (   m      sai@30030000                         2fsl,imx8mm-sai fsl,imx8mq-sai           <0                    2            N                                  rbus mclk1 mclk2 mclk3                                              rx tx         	  disabled            (   n      sai@30050000                         2fsl,imx8mm-sai fsl,imx8mq-sai           <0                    Z            N                                  rbus mclk1 mclk2 mclk3                               	               rx tx         	  disabled            (   o      sai@30060000                         2fsl,imx8mm-sai fsl,imx8mq-sai           <0                    Z            N                                  rbus mclk1 mclk2 mclk3                  
                            rx tx         	  disabled            (   p      audio-controller@30080000            2fsl,imx8mm-micfil           <0           0         m          n          ,          -         (  N                  &      '            )  ripg_clk ipg_clk_app pll8k pll11k clkext3                                rx                    	  disabled            (   q      spdif@30090000           2fsl,imx35-spdif         <0	                             P  N      ^            r                           ^                           :  rcore rxtx0 rxtx1 rxtx2 rxtx3 rxtx4 rxtx5 rxtx6 rxtx7 spba                                              rx tx         	  disabled            (   r         gpio@30200000            2fsl,imx8mm-gpio fsl,imx35-gpio          <0                     @          A           N                                                                
         8    WDOG_INT X_RTC_INT    RESET_ETHPHY   nENABLE_FLATLINK         (   '      gpio@30210000            2fsl,imx8mm-gpio fsl,imx35-gpio          <0!                    B          C           N                                                                (           (   )      gpio@30220000            2fsl,imx8mm-gpio fsl,imx35-gpio          <0"                    D          E           N                                                                =           (   [      gpio@30230000            2fsl,imx8mm-gpio fsl,imx35-gpio          <0#                    F          G           N                                                                W            (   5      gpio@30240000            2fsl,imx8mm-gpio fsl,imx35-gpio          <0$                    H          I           N                                                                w           (   #      tmu@30260000             2fsl,imx8mm-tmu          <0&             N                         calib           #            (         watchdog@30280000            2fsl,imx8mm-wdt fsl,imx21-wdt            <0(                    N           N              okay             9        Ndefault         \           (   s      watchdog@30290000            2fsl,imx8mm-wdt fsl,imx21-wdt            <0)                    O           N            	  disabled            (   t      watchdog@302a0000            2fsl,imx8mm-wdt fsl,imx21-wdt            <0*                    
           N            	  disabled            (   u      dma-controller@302c0000           2fsl,imx8mm-sdma fsl,imx8mq-sdma         <0,                    g           N                    ripg ahb         f           qimx/sdma/sdma-imx7d.bin         (         dma-controller@302b0000           2fsl,imx8mm-sdma fsl,imx8mq-sdma         <0+                    "           N                    ripg ahb         f           qimx/sdma/sdma-imx7d.bin         (   v      pinctrl@30330000             2fsl,imx8mm-iomuxc           <03             (      fec1grp      h     h                    l                                                                                                                                          |                    x                    t                    p                                                            D                         (   H      flexspi0grp              \                  `                  t                  x                  |                                        (   D      i2c1grp       0                  @     |            @         (   .      i2c1gpiogrp       0                       |                     (   /      rtcgrp             4                        (   2      sn65dsi83grp               P                          (   0      usdhc3grp              p                  d                  h                 l                                                  $                 (                 0                 8                 <                       (   A      usdhc3-100mhzgrp               p                  d                  h                 l                                                  $                 (                 0                 8                 <                       (   B      usdhc3-200mhzgrp               p                  d                  h                 l                                                  $                 (                 0                 8                 <                       (   C      wdoggrp            0                &        (         can-intgrp             H                          (   (      ecspi1grp         H      d                   `                   \                       (   $      ecspi1csgrp       H       h                   x                   L                       (   %      keygrp             L                          (   c      i2c2grp       0                  @                  @         (   3      i2c2gpiogrp       0                                             (   4      i2c3grp       0    $              @   (              @         (   7      i2c3gpiogrp       0    (                 $                       (   8      i2c4grp       0    ,              @   0              @         (   9      i2c4gpiogrp       0    0                 ,                       (   :      leds1grp          0      <                   X                       (   d      pciegrp       0    L                                           (   Z      pwm1grp            ,                @        (         pwm3grp             P              @        (          pwm4grp            d                @        (   !      regusdhc2vmmcgrp                 T              @        (   g      tempsensegrp                @                       (   6      tpmgrp               4             @        (   *      uart1grp          0    8                    4                        (   +      uart2grp          0    @                    <                        (   -      uart3grp          0    D             @  H                @        (   ,      usbhubpwrgrp               `                          (   e      usbotg1pwrgrp              X                          (   f      usbotg1grp             \                        (   R      usdhc1grp                                                                                                                                          (   w      usdhc2gpiogrp                8              @        (   <      usdhc2grp              8                    <                   @                   D                   H                   L                   P                      (   ;      usdhc2100mhzgrp            8                    <                   @                   D                   H                   L                   P                      (   =      usdhc2200mhzgrp            8                    <                   @                   D                   H                   L                   P                      (   >         syscon@30340000          2fsl,imx8mm-iomuxc-gpr syscon            <04             (   F      efuse@30350000           2fsl,imx8mm-ocotp syscon         <05             N                                       (   x   unique-id@4         <              (         speed-grade@10          <              (         calib@3c            <   <           (         mac-address@90          <              (   E         clock-controller@30360000            2fsl,imx8mm-anatop           <06                        (   y      snvs@30370000         #   2fsl,sec-v4.0-mon syscon simple-mfd          <07             (      snvs-rtc-lp          2fsl,sec-v4.0-mon-rtc-lp                       4                                    N            	  rsnvs-rtc            (   z      snvs-powerkey            2fsl,sec-v4.0-pwrkey                                      N              rsnvs-pwrkey            t               	  disabled            (   {      snvs-lpgpr        +   2fsl,imx8mm-snvs-lpgpr fsl,imx7d-snvs-lpgpr          (   |         clock-controller@30380000            2fsl,imx8mm-ccm          <08                    U          V                      N                        4  rosc_32k osc_24m clk_ext1 clk_ext2 clk_ext3 clk_ext4       8  K      B            [      ^      `                     [      8      ,      /      8                    ׄ ׄ ,p          (         reset-controller@30390000         %   2fsl,imx8mm-src fsl,imx8mq-src syscon            <09                    Y                      (         gpc@303a0000             2fsl,imx8mm-gpc          <0:                    W                                            (   }   pgc                              power-domain@0                      <            N      X        K      X        [      @        (         power-domain@1                      <           ~           N              (   X      power-domain@2                      <           (         power-domain@3                      <           (         power-domain@4                      <           N            Z        K      Y      Z        [      8      8        / ׄ         (         power-domain@5                      <            N      Z                                         ~           (   \      power-domain@6                      <           N              K      T        [      8        (   ^      power-domain@7                      <           (   _      power-domain@8                      <           (   `      power-domain@9                      <   	        (   a      power-domain@10                     <   
        N                    K      U      V        [      A      8        e          (   M      power-domain@11                     <           (   N               bus@30400000             2fsl,aips-bus simple-bus         <0@   @                                   0@  0@   @          (   ~   pwm@30660000             2fsl,imx8mm-pwm fsl,imx27-pwm            <0f                    Q           N                    ripg per                    okay            Ndefault         \           (         pwm@30670000             2fsl,imx8mm-pwm fsl,imx27-pwm            <0g                    R           N                    ripg per                  	  disabled            (         pwm@30680000             2fsl,imx8mm-pwm fsl,imx27-pwm            <0h                    S           N                    ripg per                    okay            Ndefault         \            (         pwm@30690000             2fsl,imx8mm-pwm fsl,imx27-pwm            <0i                    T           N                    ripg per                    okay            Ndefault         \   !        (         timer@306a0000           2nxp,sysctr-timer            <0j                    /           N           rper         (            bus@30800000             2fsl,aips-bus simple-bus         <0   @                                   0  0   @                   (      spba-bus@30800000            2fsl,spba-bus simple-bus                                  <0                      (      spi@30820000          !   2fsl,imx8mm-ecspi fsl,imx51-ecspi                                      <0                               N                    ripg per             "             "                 rx tx           okay          $     #   	      #         #              Ndefault         \   $   %        (      can@0            2microchip,mcp251xfd         <            N   &                           '        Ndefault         \   (                 (         tpm@1         !   2infineon,slb9670 tcg,tpm_tis-spi                               )        Ndefault         \   *        <           CՀ        (            spi@30830000          !   2fsl,imx8mm-ecspi fsl,imx51-ecspi                                      <0                                N                    ripg per             "            "                 rx tx         	  disabled            (         spi@30840000          !   2fsl,imx8mm-ecspi fsl,imx51-ecspi                                      <0                    !           N                    ripg per             "            "                 rx tx         	  disabled            (         serial@30860000          2fsl,imx8mm-uart fsl,imx6q-uart          <0                               N                    ripg per             "             "                  rx tx           okay            K              [      1        Ndefault         \   +        (         serial@30880000          2fsl,imx8mm-uart fsl,imx6q-uart          <0                               N                    ripg per             "             "                  rx tx           okay            Ndefault         \   ,        (         serial@30890000          2fsl,imx8mm-uart fsl,imx6q-uart          <0                               N                    ripg per         okay            K              [      1        Ndefault         \   -        (            crypto@30900000          2fsl,sec-v4.0                                     <0                 0                    [           N      ]      _      	  raclk ipg            (      jr@1000          2fsl,sec-v4.0-job-ring           <                     i         	  disabled            (         jr@2000          2fsl,sec-v4.0-job-ring           <                      j           (         jr@3000          2fsl,sec-v4.0-job-ring           <  0                   r           (            i2c@30a20000             2fsl,imx8mm-i2c fsl,imx21-i2c                                      <0                    #           N              okay                     Ndefault gpio            \   .            /        *   #              4   #              (      pmic@8           2nxp,pf8121a         <      regulators     ldo1             >         R        d 2Z        | 2Z        NVCC_SD1 (LDO1)         (      regulator-state-mem                   ldo2             >         R        d 2Z        | w@        NVCC_SD2 (LDO2)         (   @   regulator-state-mem                   ldo3             >         R        d &%        | `        VCC_ENET_2V5 (LDO3)         (      regulator-state-mem                   ldo4             >         R        d w@        | `        VDDA_1V8 (LDO4)         (      regulator-state-mem                   `         `         buck1            >         R        d         |         VDD_SOC_VDDA_PHY_0P8 (BUCK1)            (      regulator-state-mem                                     buck2            >         R        d B@        | B@        VDD_GPU_DRAM (BUCK2)            (      regulator-state-mem                   B@         B@         buck3            >         R        d B@        |         VDD_VPU (BUCK3)         (      regulator-state-mem                   buck4            >         R        d         |         VDD_MIPI_0P9 (BUCK4)            (      regulator-state-mem                   buck5            >         R        d         |         VDD_ARM (BUCK5)         (      regulator-state-mem                   buck6            >         R        d w@        | w@        VDD_1V8 (BUCK6)         (      regulator-state-mem                   w@         w@         buck7            >         R        d         |         NVCC_DRAM_1P1V (BUCK7)          (         vsnvs            >         R        d w@        | w@        NVCC_SNVS_1P8 (VSNVS)           (               bridge@2d            2ti,sn65dsi83               '   
           Ndefault         \   0        <   -      	  disabled            (         eeprom@51            2atmel,24c32         !            <   Q        *   1      rtc@52           2microcrystal,rv3028                            '        Ndefault         \   2        <   R        5           L          (            i2c@30a30000             2fsl,imx8mm-i2c fsl,imx21-i2c                                      <0                    $           N              okay                     Ndefault         \   3            4        *   #              4   #              (      temperature-sensor@49         
   2ti,tmp102           <   I             5                      Ndefault         \   6        #           (            i2c@30a40000                                       2fsl,imx8mm-i2c fsl,imx21-i2c            <0                    %           N              okay                     Ndefault         \   7            8        *   #              4   #              (         i2c@30a50000             2fsl,imx8mm-i2c fsl,imx21-i2c                                      <0                    &           N              okay                     Ndefault         \   9            :        *   #              4   #              (         serial@30a60000          2fsl,imx8mm-uart fsl,imx6q-uart          <0                               N                    ripg per             "             "                  rx tx         	  disabled            (         mailbox@30aa0000             2fsl,imx8mm-mu fsl,imx6sx-mu         <0                    X           N              b           (         mmc@30b40000          !   2fsl,imx8mm-usdhc fsl,imx7d-usdhc            <0                               N      _      S              ripg ahb per         n                               	  disabled            (         mmc@30b50000          !   2fsl,imx8mm-usdhc fsl,imx7d-usdhc            <0                               N      _      S              ripg ahb per         n                                 okay            K      z                    )                     "  Ndefault state_100mhz state_200mhz           \   ;   <            =   <           >   <           ?           @        (         mmc@30b60000          !   2fsl,imx8mm-usdhc fsl,imx7d-usdhc            <0                               N      _      S              ripg ahb per         n                                 okay            K              ׄ                "  Ndefault state_100mhz state_200mhz           \   A            B           C                 (         spi@30bb0000                                       2nxp,imx8mm-fspi         <0                   fspi_base fspi_mmap                k           N                    rfspi_en fspi            okay            Ndefault         \   D        (      flash@0                                   2jedec,spi-nor           <            Ĵ                               (            dma-controller@30bd0000           2fsl,imx8mm-sdma fsl,imx8mq-sdma         <0                               N            ]        ripg ahb         f           qimx/sdma/sdma-imx7d.bin         (   "      ethernet@30be0000         -   2fsl,imx8mm-fec fsl,imx8mq-fec fsl,imx6sx-fec            <0           0         v          w          x          y         (  N                  u      t      v      "  ripg ahb ptp enet_clk_ref enet_out            K      R      u      t      v         [      6      :      ;      9             sY@            $           6              E        mac-address         H   F              okay             V      	  grgmii-id            p   G        Ndefault         \   H        (      mdio                                 ethernet-phy@0           2ethernet-phy-ieee802.3-c22           {                                                 <               '                                   (   G               bus@32c00000             2fsl,aips-bus simple-bus         <2   @                                   2  2   @          (      lcdif@32e00000        "   2fsl,imx8mm-lcdif fsl,imx6sx-lcdif           <2             N      k                    rpix axi disp_axi            K      k      U      V        [      (      A      8        n6 e                            ~   I         	  disabled            (      port       endpoint            	   J        (   K            dsi@32e10000             2fsl,imx8mm-mipi-dsim            <2             N                    rbus_clk sclk_mipi           K              [      6                          ~   I         	  disabled            (      ports                                port@0          <       endpoint            	   K        (   J         port@1          <      endpoint            (                  csi@32e20000             2fsl,imx8mm-csi fsl,imx7-csi         <2                               N              rmclk            ~   I          	  disabled            (      port       endpoint            	   L        (   O            blk-ctrl@32e28000             2fsl,imx8mm-disp-blk-ctrl syscon         <2            ~   M   M   M   N   N      '  bus csi-bridge lcdif mipi-dsi mipi-csi        P  N                                                                  o  rcsi-bridge-axi csi-bridge-apb csi-bridge-core lcdif-axi lcdif-apb lcdif-pix dsi-pclk dsi-ref csi-aclk csi-pclk                     (   I      mipi-csi@32e30000            2fsl,imx8mm-mipi-csi2            <2                               K              [      A        -@         N                                rpclk wrap phy axi           ~   I         	  disabled            (      ports                                port@0          <          port@1          <      endpoint            	   O        (   L               usb@32e40000          +   2fsl,imx8mm-usb fsl,imx7d-usb fsl,imx27-usb          <2                    (           N              K      X        [      @        ,   P        1   Q            ~           okay             =        Iotg          Q        i                      Ndefault         \   R                    S        (         usbmisc@32e40200          7   2fsl,imx8mm-usbmisc fsl,imx7d-usbmisc fsl,imx6q-usbmisc                     <2            (   Q      usb@32e50000          +   2fsl,imx8mm-usb fsl,imx7d-usb fsl,imx27-usb          <2                    )           N              K      X        [      @        ,   T        1   U            ~           okay                     Ihost            i                         V        (         usbmisc@32e50200          7   2fsl,imx8mm-usbmisc fsl,imx7d-usbmisc fsl,imx6q-usbmisc                     <2            (   U      pcie-phy@32f00000            2fsl,imx8mm-pcie-phy         <2             N      h        rref         K      h                 [      :                      pciephy         @            okay                     	           	#   -        	6           (   Y         dma-controller@33000000       &   2fsl,imx7d-dma-apbh fsl,imx28-dma-apbh           <3             0                                                  f           	I           N              (   W      nand-controller@33002000          )   2fsl,imx8mm-gpmi-nand fsl,imx7d-gpmi-nand                                      <3       3 @   @         gpmi-nand bch                             	Vbch         N                    rgpmi_io gpmi_bch_apb               W            rx-tx         	  disabled            (         pcie@33800000            2fsl,imx8mm-pcie         <3   @               dbi config                                   0pci         	f             0                                                 	p           	z                  z           	Vmsi                    	                       	                         }                            |                            {                            z           	           	            N            h      i        rpcie pcie_bus pcie_aux          ~   X                            apps turnoff            ,   Y      	  	pcie-phy            okay            K      i      h      g        [      9      :      >          沀        Ndefault         \   Z        	   [              (         pcie-ep@33800000             2fsl,imx8mm-pcie-ep          <3   @                dbi addr_space          	p                             	Vdma         	           N            h      i        rpcie pcie_bus pcie_aux          ~   X                            apps turnoff            ,   Y      	  	pcie-phy            	           	         	  disabled            (         gpu@38000000             2vivante,gc          <8                                 N      Z                          rreg bus core shader         K            *        [      *            /         ~   \        (         gpu@38008000             2vivante,gc          <8                               N      Z                    rreg bus core            K            *        [      *            /         ~   \        (         video-codec@38300000             2nxp,imx8mm-vpu-g1           <80                               N              ~   ]            (         video-codec@38310000             2nxp,imx8mq-vpu-g2           <81                               N              ~   ]           (         blk-ctrl@38330000            2fsl,imx8mm-vpu-blk-ctrl syscon          <83             ~   ^   _   `   a        bus g1 g2 h1            N                        	  rg1 g2 h1            K      c      d        [      +      +        #F #F                    (   ]      interrupt-controller@38800000            2arm,gic-v3          <8     8                                       	           (         memory-controller@3d400000           2fsl,imx8mm-ddrc fsl,imx8m-ddrc          <=@   @          rcore pll alt apb             N                  a      b           b        (      opp-table            2operating-points-v2         (   b   opp-25000000            L    }x@      opp-100000000           L           opp-750000000           L    ,            ddr-pmu@3d800000          %   2fsl,imx8mm-ddr-pmu fsl,imx8m-ddr-pmu            <=   @                 b            memory@40000000         0memory          <    @                regulator-vdd-3v3-s          2regulator-fixed          >         R        d 2Z        | 2Z      
  VDD_3V3_S           (   1      chosen        6  	/soc@0/bus@30800000/spba-bus@30800000/serial@30880000         clock-can            2fixed-clock         bZ         can_osc_40m                     (   &      gpio-keys         
   2gpio-keys           Ndefault         \   c   key            '   	           
KEY-A           
            leds          
   2gpio-leds           Ndefault         \   d   led-1           
              #               
"none          led-2           
              5               
"none             pwr-seq          2mmc-pwrseq-simple           
8   d        
O   <           )              (         regulator-hub-otg1           2regulator-fixed         	   '                
b        Ndefault         \   e        usb_hub_vbus            d LK@        | LK@        (   V      regulator-usb-otg1           2regulator-fixed         	   '                
b        Ndefault         \   f        usb_otg1_vbus           d LK@        | LK@        (   S      regulator-usdhc2             2regulator-fixed         	   )                
b        
u  N         Ndefault         \   g        d 2Z        | 2Z        VSD_3V3         (   ?      __symbols__         
/cpus/idle-states/cpu-pd-wait           
/cpus/cpu@0         
/cpus/cpu@1         
/cpus/cpu@2         
/cpus/cpu@3         
/cpus/l2-cache0         
/opp-table          
/clock-osc-32k          
/clock-osc-24m          
/clock-ext1         
/clock-ext2         
/clock-ext3         
/clock-ext4       '  
/thermal-zones/cpu-thermal/trips/trip0        '  
/thermal-zones/cpu-thermal/trips/trip1          /usbphynop1         /usbphynop2         /soc@0          !/soc@0/bus@30000000       &  '/soc@0/bus@30000000/spba-bus@30000000         3  -/soc@0/bus@30000000/spba-bus@30000000/sai@30010000        3  2/soc@0/bus@30000000/spba-bus@30000000/sai@30020000        3  7/soc@0/bus@30000000/spba-bus@30000000/sai@30030000        3  </soc@0/bus@30000000/spba-bus@30000000/sai@30050000        3  A/soc@0/bus@30000000/spba-bus@30000000/sai@30060000        @  F/soc@0/bus@30000000/spba-bus@30000000/audio-controller@30080000       5  M/soc@0/bus@30000000/spba-bus@30000000/spdif@30090000          "   M/soc@0/bus@30000000/gpio@30200000         "   S/soc@0/bus@30000000/gpio@30210000         "   Y/soc@0/bus@30000000/gpio@30220000         "   _/soc@0/bus@30000000/gpio@30230000         "  T/soc@0/bus@30000000/gpio@30240000         !  Z/soc@0/bus@30000000/tmu@30260000          &  ^/soc@0/bus@30000000/watchdog@30280000         &  d/soc@0/bus@30000000/watchdog@30290000         &  j/soc@0/bus@30000000/watchdog@302a0000         ,  p/soc@0/bus@30000000/dma-controller@302c0000       ,  v/soc@0/bus@30000000/dma-controller@302b0000       %  |/soc@0/bus@30000000/pinctrl@30330000          -  /soc@0/bus@30000000/pinctrl@30330000/fec1grp          1  /soc@0/bus@30000000/pinctrl@30330000/flexspi0grp          -  /soc@0/bus@30000000/pinctrl@30330000/i2c1grp          1  /soc@0/bus@30000000/pinctrl@30330000/i2c1gpiogrp          ,  /soc@0/bus@30000000/pinctrl@30330000/rtcgrp       2  /soc@0/bus@30000000/pinctrl@30330000/sn65dsi83grp         /  /soc@0/bus@30000000/pinctrl@30330000/usdhc3grp        6  /soc@0/bus@30000000/pinctrl@30330000/usdhc3-100mhzgrp         6  /soc@0/bus@30000000/pinctrl@30330000/usdhc3-200mhzgrp         -  /soc@0/bus@30000000/pinctrl@30330000/wdoggrp          0  &/soc@0/bus@30000000/pinctrl@30330000/can-intgrp       /  6/soc@0/bus@30000000/pinctrl@30330000/ecspi1grp        1  E/soc@0/bus@30000000/pinctrl@30330000/ecspi1csgrp          ,  W/soc@0/bus@30000000/pinctrl@30330000/keygrp       -  h/soc@0/bus@30000000/pinctrl@30330000/i2c2grp          1  u/soc@0/bus@30000000/pinctrl@30330000/i2c2gpiogrp          -  /soc@0/bus@30000000/pinctrl@30330000/i2c3grp          1  /soc@0/bus@30000000/pinctrl@30330000/i2c3gpiogrp          -  /soc@0/bus@30000000/pinctrl@30330000/i2c4grp          1  /soc@0/bus@30000000/pinctrl@30330000/i2c4gpiogrp          .  /soc@0/bus@30000000/pinctrl@30330000/leds1grp         -  /soc@0/bus@30000000/pinctrl@30330000/pciegrp          -  /soc@0/bus@30000000/pinctrl@30330000/pwm1grp          -  /soc@0/bus@30000000/pinctrl@30330000/pwm3grp          -  /soc@0/bus@30000000/pinctrl@30330000/pwm4grp          6  /soc@0/bus@30000000/pinctrl@30330000/regusdhc2vmmcgrp         2  /soc@0/bus@30000000/pinctrl@30330000/tempsensegrp         ,  0/soc@0/bus@30000000/pinctrl@30330000/tpmgrp       .  </soc@0/bus@30000000/pinctrl@30330000/uart1grp         .  J/soc@0/bus@30000000/pinctrl@30330000/uart2grp         .  X/soc@0/bus@30000000/pinctrl@30330000/uart3grp         2  f/soc@0/bus@30000000/pinctrl@30330000/usbhubpwrgrp         3  x/soc@0/bus@30000000/pinctrl@30330000/usbotg1pwrgrp        0  /soc@0/bus@30000000/pinctrl@30330000/usbotg1grp       /  /soc@0/bus@30000000/pinctrl@30330000/usdhc1grp        3  /soc@0/bus@30000000/pinctrl@30330000/usdhc2gpiogrp        /  /soc@0/bus@30000000/pinctrl@30330000/usdhc2grp        5  /soc@0/bus@30000000/pinctrl@30330000/usdhc2100mhzgrp          5  /soc@0/bus@30000000/pinctrl@30330000/usdhc2200mhzgrp          $  /soc@0/bus@30000000/syscon@30340000       #  /soc@0/bus@30000000/efuse@30350000        /  /soc@0/bus@30000000/efuse@30350000/unique-id@4        2  /soc@0/bus@30000000/efuse@30350000/speed-grade@10         ,  /soc@0/bus@30000000/efuse@30350000/calib@3c       2  (/soc@0/bus@30000000/efuse@30350000/mac-address@90         .  8/soc@0/bus@30000000/clock-controller@30360000         "  ?/soc@0/bus@30000000/snvs@30370000         .  D/soc@0/bus@30000000/snvs@30370000/snvs-rtc-lp         0  M/soc@0/bus@30000000/snvs@30370000/snvs-powerkey       -  Y/soc@0/bus@30000000/snvs@30370000/snvs-lpgpr          .  d/soc@0/bus@30000000/clock-controller@30380000         .  h/soc@0/bus@30000000/reset-controller@30390000         !  l/soc@0/bus@30000000/gpc@303a0000          4  p/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@0       4  |/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@1       4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@2       4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@3       4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@4       4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@5       4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@6       4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@7       4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@8       4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@9       5  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@10          5  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@11            /soc@0/bus@30400000       !  /soc@0/bus@30400000/pwm@30660000          !  /soc@0/bus@30400000/pwm@30670000          !  /soc@0/bus@30400000/pwm@30680000          !  /soc@0/bus@30400000/pwm@30690000          #  /soc@0/bus@30400000/timer@306a0000          /soc@0/bus@30800000       &  /soc@0/bus@30800000/spba-bus@30800000         3  >/soc@0/bus@30800000/spba-bus@30800000/spi@30820000        9  /soc@0/bus@30800000/spba-bus@30800000/spi@30820000/can@0          9  8/soc@0/bus@30800000/spba-bus@30800000/spi@30820000/tpm@1          3  /soc@0/bus@30800000/spba-bus@30800000/spi@30830000        3  /soc@0/bus@30800000/spba-bus@30800000/spi@30840000        6  D/soc@0/bus@30800000/spba-bus@30800000/serial@30860000         6  `/soc@0/bus@30800000/spba-bus@30800000/serial@30880000         6  R/soc@0/bus@30800000/spba-bus@30800000/serial@30890000         $  $/soc@0/bus@30800000/crypto@30900000       ,  +/soc@0/bus@30800000/crypto@30900000/jr@1000       ,  3/soc@0/bus@30800000/crypto@30900000/jr@2000       ,  ;/soc@0/bus@30800000/crypto@30900000/jr@3000       !   j/soc@0/bus@30800000/i2c@30a20000          8  C/soc@0/bus@30800000/i2c@30a20000/pmic@8/regulators/ldo1       8  P/soc@0/bus@30800000/i2c@30a20000/pmic@8/regulators/ldo2       8  ]/soc@0/bus@30800000/i2c@30a20000/pmic@8/regulators/ldo3       8  j/soc@0/bus@30800000/i2c@30a20000/pmic@8/regulators/ldo4       9  w/soc@0/bus@30800000/i2c@30a20000/pmic@8/regulators/buck1          9  /soc@0/bus@30800000/i2c@30a20000/pmic@8/regulators/buck2          9  /soc@0/bus@30800000/i2c@30a20000/pmic@8/regulators/buck3          9  /soc@0/bus@30800000/i2c@30a20000/pmic@8/regulators/buck4          9  /soc@0/bus@30800000/i2c@30a20000/pmic@8/regulators/buck5          9  /soc@0/bus@30800000/i2c@30a20000/pmic@8/regulators/buck6          9  /soc@0/bus@30800000/i2c@30a20000/pmic@8/regulators/buck7          9  /soc@0/bus@30800000/i2c@30a20000/pmic@8/regulators/vsnvs          +  /soc@0/bus@30800000/i2c@30a20000/bridge@2d        (  /soc@0/bus@30800000/i2c@30a20000/rtc@52       !   o/soc@0/bus@30800000/i2c@30a30000          7  /soc@0/bus@30800000/i2c@30a30000/temperature-sensor@49        !   t/soc@0/bus@30800000/i2c@30a40000          !  /soc@0/bus@30800000/i2c@30a50000          $  /soc@0/bus@30800000/serial@30a60000       %  [/soc@0/bus@30800000/mailbox@30aa0000          !  /soc@0/bus@30800000/mmc@30b40000          !  /soc@0/bus@30800000/mmc@30b50000          !  /soc@0/bus@30800000/mmc@30b60000          !  /soc@0/bus@30800000/spi@30bb0000          )  /soc@0/bus@30800000/spi@30bb0000/flash@0          ,  /soc@0/bus@30800000/dma-controller@30bd0000       &  /soc@0/bus@30800000/ethernet@30be0000         :  /soc@0/bus@30800000/ethernet@30be0000/mdio/ethernet-phy@0           /soc@0/bus@32c00000       #  !/soc@0/bus@32c00000/lcdif@32e00000        1  '/soc@0/bus@32c00000/lcdif@32e00000/port/endpoint          !  5/soc@0/bus@32c00000/dsi@32e10000          7  >/soc@0/bus@32c00000/dsi@32e10000/ports/port@0/endpoint        7  N/soc@0/bus@32c00000/dsi@32e10000/ports/port@1/endpoint        !  [/soc@0/bus@32c00000/csi@32e20000          /  _/soc@0/bus@32c00000/csi@32e20000/port/endpoint        &  f/soc@0/bus@32c00000/blk-ctrl@32e28000         &  t/soc@0/bus@32c00000/mipi-csi@32e30000         <  }/soc@0/bus@32c00000/mipi-csi@32e30000/ports/port@1/endpoint       !  /soc@0/bus@32c00000/usb@32e40000          %  /soc@0/bus@32c00000/usbmisc@32e40200          !  /soc@0/bus@32c00000/usb@32e50000          %  /soc@0/bus@32c00000/usbmisc@32e50200          &  /soc@0/bus@32c00000/pcie-phy@32f00000           /soc@0/dma-controller@33000000           /soc@0/nand-controller@33002000         /soc@0/pcie@33800000            /soc@0/pcie-ep@33800000         /soc@0/gpu@38000000         /soc@0/gpu@38008000         /soc@0/video-codec@38300000         /soc@0/video-codec@38310000         /soc@0/blk-ctrl@38330000          %  /soc@0/interrupt-controller@38800000          "  /soc@0/memory-controller@3d400000         ,  /soc@0/memory-controller@3d400000/opp-table         /regulator-vdd-3v3-s            /clock-can        	  /pwr-seq            ,/regulator-hub-otg1         =/regulator-usb-otg1         /regulator-usdhc2            	interrupt-parent #address-cells #size-cells model compatible ethernet0 gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 mmc0 mmc1 mmc2 serial0 serial1 serial2 serial3 spi0 spi1 spi2 rtc0 rtc1 entry-method arm,psci-suspend-param local-timer-stop entry-latency-us exit-latency-us min-residency-us phandle device_type reg clock-latency clocks enable-method i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache operating-points-v2 nvmem-cells nvmem-cell-names cpu-idle-states #cooling-cells cpu-supply cache-level cache-unified opp-shared opp-hz opp-microvolt opp-supported-hw clock-latency-ns opp-suspend #clock-cells clock-frequency clock-output-names interrupts arm,no-tick-in-suspend polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device #phy-cells assigned-clocks assigned-clock-parents clock-names power-domains ranges dma-ranges #sound-dai-cells dmas dma-names status gpio-controller #gpio-cells interrupt-controller #interrupt-cells gpio-ranges gpio-line-names #thermal-sensor-cells fsl,ext-reset-output pinctrl-names pinctrl-0 #dma-cells fsl,sdma-ram-script-name fsl,pins regmap offset linux,keycode wakeup-source assigned-clock-rates #reset-cells #power-domain-cells resets #pwm-cells cs-gpios spi-max-frequency pinctrl-1 scl-gpios sda-gpios regulator-always-on regulator-boot-on regulator-max-microvolt regulator-min-microvolt regulator-name regulator-off-in-suspend regulator-on-in-suspend regulator-suspend-min-microvolt regulator-suspend-max-microvolt enable-gpios pagesize vcc-supply aux-voltage-chargeable trickle-resistor-ohms #mbox-cells fsl,tuning-start-tap fsl,tuning-step bus-width cd-gpios disable-wp pinctrl-2 vmmc-supply vqmmc-supply keep-power-in-suspend non-removable reg-names spi-rx-bus-width spi-tx-bus-width fsl,num-tx-queues fsl,num-rx-queues fsl,stop-mode fsl,magic-packet phy-mode phy-handle enet-phy-lane-no-swap ti,clk-output-sel ti,fifo-depth ti,rx-internal-delay ti,tx-internal-delay reset-gpios reset-assert-us reset-deassert-us remote-endpoint power-domain-names phys fsl,usbmisc adp-disable dr_mode over-current-active-low samsung,picophy-pre-emp-curr-control samsung,picophy-dc-vol-level-adjust srp-disable vbus-supply #index-cells disable-over-current reset-names fsl,clkreq-unsupported fsl,refclk-pad-mode fsl,tx-deemph-gen1 fsl,tx-deemph-gen2 dma-channels interrupt-names bus-range num-lanes num-viewport interrupt-map-mask interrupt-map fsl,max-link-speed linux,pci-domain phy-names reset-gpio num-ib-windows num-ob-windows stdout-path label linux,code color linux,default-trigger post-power-on-delay-ms power-off-delay-us enable-active-high off-on-delay-us cpu_pd_wait A53_0 A53_1 A53_2 A53_3 A53_L2 a53_opp_table osc_32k osc_24m clk_ext1 clk_ext2 clk_ext3 clk_ext4 cpu_alert0 cpu_crit0 usbphynop1 usbphynop2 soc aips1 spba2 sai1 sai2 sai3 sai5 sai6 micfil spdif1 gpio5 tmu wdog1 wdog2 wdog3 sdma2 sdma3 iomuxc pinctrl_fec1 pinctrl_flexspi0 pinctrl_i2c1 pinctrl_i2c1_gpio pinctrl_rtc pinctrl_sn65dsi83 pinctrl_usdhc3 pinctrl_usdhc3_100mhz pinctrl_usdhc3_200mhz pinctrl_wdog pinctrl_can_int pinctrl_ecspi1 pinctrl_ecspi1_cs pinctrl_gpiokeys pinctrl_i2c2 pinctrl_i2c2_gpio pinctrl_i2c3 pinctrl_i2c3_gpio pinctrl_i2c4 pinctrl_i2c4_gpio pinctrl_leds pinctrl_pcie pinctrl_pwm1 pinctrl_pwm3 pinctrl_pwm4 pinctrl_reg_usdhc2_vmmc pinctrl_tempsense pinctrl_tpm pinctrl_uart1 pinctrl_uart2 pinctrl_uart3 pinctrl_usbhubpwr pinctrl_usbotg1pwr pinctrl_usbotg1 pinctrl_usdhc1 pinctrl_usdhc2_gpio pinctrl_usdhc2 pinctrl_usdhc2_100mhz pinctrl_usdhc2_200mhz gpr ocotp imx8mm_uid cpu_speed_grade tmu_calib fec_mac_address anatop snvs snvs_rtc snvs_pwrkey snvs_lpgpr clk src gpc pgc_hsiomix pgc_pcie pgc_otg1 pgc_otg2 pgc_gpumix pgc_gpu pgc_vpumix pgc_vpu_g1 pgc_vpu_g2 pgc_vpu_h1 pgc_dispmix pgc_mipi aips2 pwm2 system_counter aips3 spba1 can0 ecspi2 ecspi3 crypto sec_jr0 sec_jr1 sec_jr2 reg_nvcc_sd1 reg_nvcc_sd2 reg_vcc_enet reg_vdda_1v8 reg_soc_vdda_phy reg_vdd_gpu_dram reg_vdd_vpu reg_vdd_mipi reg_vdd_arm reg_vdd_1v8 reg_nvcc_dram reg_vsnvs rv3028 temp_sense0 uart4 flexspi som_flash sdma1 ethphy0 aips4 lcdif lcdif_to_dsim mipi_dsi dsim_from_lcdif mipi_dsi_out csi csi_in disp_blk_ctrl mipi_csi imx8mm_mipi_csi_out usbmisc1 usbotg2 usbmisc2 pcie_phy dma_apbh gpmi pcie0 pcie0_ep gpu_3d gpu_2d vpu_blk_ctrl gic ddrc ddrc_opp_table reg_vdd_3v3_s can_osc_40m usdhc1_pwrseq reg_usb_hub_vbus reg_usb_otg1_vbus 