  E   8     (                                                                                 3   ,Gateworks Venice GW75xx-0x i.MX8MM Development Kit        &   2gateworks,imx8mm-gw75xx-0x fsl,imx8mm      aliases       &   =/soc@0/bus@30800000/ethernet@30be0000         "   G/soc@0/bus@30000000/gpio@30200000         "   M/soc@0/bus@30000000/gpio@30210000         "   S/soc@0/bus@30000000/gpio@30220000         "   Y/soc@0/bus@30000000/gpio@30230000         "   _/soc@0/bus@30000000/gpio@30240000         !   e/soc@0/bus@30800000/i2c@30a20000          !   j/soc@0/bus@30800000/i2c@30a30000          !   o/soc@0/bus@30800000/i2c@30a40000          !   t/soc@0/bus@30800000/i2c@30a50000          !   y/soc@0/bus@30800000/mmc@30b40000          !   ~/soc@0/bus@30800000/mmc@30b50000          !   /soc@0/bus@30800000/mmc@30b60000          6   /soc@0/bus@30800000/spba-bus@30800000/serial@30860000         6   /soc@0/bus@30800000/spba-bus@30800000/serial@30890000         6   /soc@0/bus@30800000/spba-bus@30800000/serial@30880000         $   /soc@0/bus@30800000/serial@30a60000       3   /soc@0/bus@30800000/spba-bus@30800000/spi@30820000        3   /soc@0/bus@30800000/spba-bus@30800000/spi@30830000        3   /soc@0/bus@30800000/spba-bus@30800000/spi@30840000        cpus                                 idle-states          psci       cpu-pd-wait          2arm,idle-state             3                                          
                    cpu@0           &cpu          2arm,cortex-a53          2            6  l        D              Kpsci            Y           f   @        x                         @                                                    speed_grade                                             
      cpu@1           &cpu          2arm,cortex-a53          2           6  l        D              Kpsci            Y           f   @        x                         @                                                                                   cpu@2           &cpu          2arm,cortex-a53          2           6  l        D              Kpsci            Y           f   @        x                         @                                                                                   cpu@3           &cpu          2arm,cortex-a53          2           6  l        D              Kpsci            Y           f   @        x                         @                                                                                   l2-cache0            2cache                       )        [           h   @        z                       opp-table            2operating-points-v2          7              opp-1200000000          B    G         I P        W              h I         y      opp-1600000000          B    _^         I ~        W              h I         y      opp-1800000000          B    kI         I B@        W              h I         y         clock-osc-32k            2fixed-clock                                osc_32k                  clock-osc-24m            2fixed-clock                     n6         osc_24m                  clock-ext1           2fixed-clock                     k@      	  clk_ext1                     clock-ext2           2fixed-clock                     k@      	  clk_ext2                     clock-ext3           2fixed-clock                     k@      	  clk_ext3                     clock-ext4           2fixed-clock                     k@      	  clk_ext4                     psci             2arm,psci-1.0             smc       pmu          2arm,cortex-a53-pmu                        timer            2arm,armv8-timer       0                                
           z                thermal-zones      cpu-thermal                                    trips      trip0            L                  -passive            	      trip1            s                	  -critical             cooling-maps       map0            "   	      0  '   
                        usbphynop1          6             2usb-nop-xceiv           D              A              Q      2      	  hmain_clk            t              @      usbphynop2          6             2usb-nop-xceiv           D              A              Q      2      	  hmain_clk            t              B      soc@0            2fsl,imx8mm-soc simple-bus                                                >           @       @                         soc_unique_id      bus@30000000             2fsl,aips-bus simple-bus         20    @                                   0   0    @     spba-bus@30000000            2fsl,spba-bus simple-bus                                  20                  sai@30010000                         2fsl,imx8mm-sai fsl,imx8mq-sai           20                    _            D                                  hbus mclk1 mclk2 mclk3                                               rx tx         	  disabled          sai@30020000                         2fsl,imx8mm-sai fsl,imx8mq-sai           20                    `            D                                  hbus mclk1 mclk2 mclk3                                              rx tx         	  disabled          sai@30030000                         2fsl,imx8mm-sai fsl,imx8mq-sai           20                    2            D                                  hbus mclk1 mclk2 mclk3                                              rx tx         	  disabled          sai@30050000                         2fsl,imx8mm-sai fsl,imx8mq-sai           20                    Z            D                                  hbus mclk1 mclk2 mclk3                               	               rx tx         	  disabled          sai@30060000                         2fsl,imx8mm-sai fsl,imx8mq-sai           20                    Z            D                                  hbus mclk1 mclk2 mclk3                  
                            rx tx         	  disabled          audio-controller@30080000            2fsl,imx8mm-micfil           20           0         m          n          ,          -         (  D                  &      '            )  hipg_clk ipg_clk_app pll8k pll11k clkext3                                rx                    	  disabled          spdif@30090000           2fsl,imx35-spdif         20	                             P  D      ^            r                           ^                           :  hcore rxtx0 rxtx1 rxtx2 rxtx3 rxtx4 rxtx5 rxtx6 rxtx7 spba                                              rx tx         	  disabled             gpio@30200000            2fsl,imx8mm-gpio fsl,imx35-gpio          20                     @          A           D                                                                
         *  	             gpioa gpiob                               V      gpio@30210000            2fsl,imx8mm-gpio fsl,imx35-gpio          20!                    B          C           D                                                                (              (      gpio@30220000            2fsl,imx8mm-gpio fsl,imx35-gpio          20"                    D          E           D                                                                =         gpio@30230000            2fsl,imx8mm-gpio fsl,imx35-gpio          20#                    F          G           D                                                                W          4  	   pci_usb_sel    pci_wdis#                                    J      gpio@30240000            2fsl,imx8mm-gpio fsl,imx35-gpio          20$                    H          I           D                                                                w         *  	    gpioc gpiod                                        "      tmu@30260000             2fsl,imx8mm-tmu          20&             D                         calib                                watchdog@30280000            2fsl,imx8mm-wdt fsl,imx21-wdt            20(                    N           D              okay            /default         =            G      watchdog@30290000            2fsl,imx8mm-wdt fsl,imx21-wdt            20)                    O           D            	  disabled          watchdog@302a0000            2fsl,imx8mm-wdt fsl,imx21-wdt            20*                    
           D            	  disabled          dma-controller@302c0000           2fsl,imx8mm-sdma fsl,imx8mq-sdma         20,                    g           D                    hipg ahb         \           gimx/sdma/sdma-imx7d.bin                  dma-controller@302b0000           2fsl,imx8mm-sdma fsl,imx8mq-sdma         20+                    "           D                    hipg ahb         \           gimx/sdma/sdma-imx7d.bin       pinctrl@30330000             2fsl,imx8mm-iomuxc           203             /default         =                 fec1grp      h     h                    l                 p                    t                    x                    |                                                                                                                                                                                       \                         7      gscgrp                             Y           '      i2c1grp       0      |            @                 @            %      i2c1gpiogrp       0      |           @                @            &      i2c2grp       0                  @                  @            *      i2c2gpiogrp       0                 @                 @            +      uart2grp          0    <              @  @                @           $      usdhc3grp            8                 <                                                    $                 (                 0                    h                 l                 p                  d                        2      usdhc3-100mhzgrp             8                 <                                                    $                 (                 0                    h                 l                 p                  d                        3      usdhc3-200mhzgrp             8                 <                                                    $                 (                 0                    h                 l                 p                  d                        4      wdoggrp            0                                 hoggrp             \              @  @   `              @  @  h             @   x             @     X           @  @    T           @  @                 gpioledgrp        0    \                  d                           S      i2c3grp       0    $              @   (              @            ,      pciegrp           t                          I      ppsgrp            p                          T      regusb2grp             H                            U      regusdhc2vmmcgrp                 T              @           W      spi2grp       `      l              @    p              @    t              @    x             @           !      uart1grp          0    4              @  8                @           #      usdhc2grp                <                   @                   D                   H                   L                   P                 8                           -      usdhc2-100mhzgrp                 <                   @                   D                   H                   L                   P                 8                           /      usdhc2-200mhzgrp                 <                   @                   D                   H                   L                   P                 8                           0      usdhc2gpiogrp                8                        .         syscon@30340000          2fsl,imx8mm-iomuxc-gpr syscon            204                6      efuse@30350000           2fsl,imx8mm-ocotp syscon         205             D                                  unique-id@4         2                       speed-grade@10          2                       calib@3c            2   <                    mac-address@90          2                 5         clock-controller@30360000            2fsl,imx8mm-anatop           206                      snvs@30370000         #   2fsl,sec-v4.0-mon syscon simple-mfd          207                   snvs-rtc-lp          2fsl,sec-v4.0-mon-rtc-lp                       4                                    D            	  hsnvs-rtc          snvs-powerkey            2fsl,sec-v4.0-pwrkey                                      D              hsnvs-pwrkey            t               	  disabled          snvs-lpgpr        +   2fsl,imx8mm-snvs-lpgpr fsl,imx7d-snvs-lpgpr           clock-controller@30380000            2fsl,imx8mm-ccm          208                    U          V                      D                        4  hosc_32k osc_24m clk_ext1 clk_ext2 clk_ext3 clk_ext4       8  A      B            [      ^      `                     Q      8      ,      /      8                    ׄ ׄ ,p                   reset-controller@30390000         %   2fsl,imx8mm-src fsl,imx8mq-src syscon            209                    Y                               gpc@303a0000             2fsl,imx8mm-gpc          20:                    W                                       pgc                              power-domain@0                      2            D      X        A      X        Q      @                 power-domain@1                      2           t           D                 G      power-domain@2                      2                    power-domain@3                      2                    power-domain@4                      2           D            Z        A      Y      Z        Q      8      8        / ׄ                  power-domain@5                      2            D      Z                                         t              K      power-domain@6                      2           D              A      T        Q      8           M      power-domain@7                      2              N      power-domain@8                      2              O      power-domain@9                      2   	           P      power-domain@10                     2   
        D                    A      U      V        Q      A      8        e             =      power-domain@11                     2              >               bus@30400000             2fsl,aips-bus simple-bus         20@   @                                   0@  0@   @     pwm@30660000             2fsl,imx8mm-pwm fsl,imx27-pwm            20f                    Q           D                    hipg per                  	  disabled          pwm@30670000             2fsl,imx8mm-pwm fsl,imx27-pwm            20g                    R           D                    hipg per                  	  disabled          pwm@30680000             2fsl,imx8mm-pwm fsl,imx27-pwm            20h                    S           D                    hipg per                  	  disabled          pwm@30690000             2fsl,imx8mm-pwm fsl,imx27-pwm            20i                    T           D                    hipg per                  	  disabled          timer@306a0000           2nxp,sysctr-timer            20j                    /           D           hper          bus@30800000             2fsl,aips-bus simple-bus         20   @                                   0  0   @              spba-bus@30800000            2fsl,spba-bus simple-bus                                  20                 spi@30820000          !   2fsl,imx8mm-ecspi fsl,imx51-ecspi                                      20                               D                    hipg per                                             rx tx         	  disabled          spi@30830000          !   2fsl,imx8mm-ecspi fsl,imx51-ecspi                                      20                                D                    hipg per                                            rx tx           okay            /default         =   !           "            spi@30840000          !   2fsl,imx8mm-ecspi fsl,imx51-ecspi                                      20                    !           D                    hipg per                                            rx tx         	  disabled          serial@30860000          2fsl,imx8mm-uart fsl,imx6q-uart          20                               D                    hipg per                                              rx tx           okay            /default         =   #      serial@30880000          2fsl,imx8mm-uart fsl,imx6q-uart          20                               D                    hipg per                                              rx tx         	  disabled          serial@30890000          2fsl,imx8mm-uart fsl,imx6q-uart          20                               D                    hipg per         okay            /default         =   $         crypto@30900000          2fsl,sec-v4.0                                     20                 0                    [           D      ]      _      	  haclk ipg       jr@1000          2fsl,sec-v4.0-job-ring           2                     i         	  disabled          jr@2000          2fsl,sec-v4.0-job-ring           2                      j         jr@3000          2fsl,sec-v4.0-job-ring           2  0                   r            i2c@30a20000             2fsl,imx8mm-i2c fsl,imx21-i2c                                      20                    #           D              okay                     /default gpio            =   %           &           "                 "         gsc@20           2gw,gsc          2            =   '             (                                                                       )   adc          2gw,gsc-adc                               channel@6           "            2           *temp          channel@8           "           2           *vdd_bat       channel@16          "           2         	  *fan_tach          channel@82          "           2           *vdd_vin         0  VT        channel@84          "           2         	  *vdd_adc1            0  '  '      channel@86          "           2         	  *vdd_adc2            0  '  '      channel@88          "           2         	  *vdd_dram          channel@8c          "           2           *vdd_1p2       channel@8e          "           2           *vdd_1p0       channel@90          "           2           *vdd_2p5         0  '  '      channel@92          "           2           *vdd_3p3         0  '  '      channel@98          "           2         	  *vdd_0p95          channel@9a          "           2           *vdd_1p8       channel@a2          "           2           *vdd_gsc         0  '  '         fan-controller@0             2gw,gsc-fan          2   
         gpio@23          2nxp,pca9555         2   #                                 )                      R      eeprom@50            2atmel,24c02         2   P        H         eeprom@51            2atmel,24c02         2   Q        H         eeprom@52            2atmel,24c02         2   R        H         eeprom@53            2atmel,24c02         2   S        H         rtc@68           2dallas,ds1672           2   h      pmic@69          2mps,mp5416          2   i   regulators     buck1           Qbuck1           ` 5         x B@         9         g                        buck2           Qbuck2           ` 5         x          !         OX                        buck3           Qbuck3           ` 5         x B@         9         g                          buck4           Qbuck4           ` w@        x w@         !         OX                        ldo1            Qldo1            ` w@        x w@                        ldo2            Qldo2            ` 5         x 5                         ldo3            Qldo3            `         x                         ldo4            Qldo4            ` w@        x w@                                 i2c@30a30000             2fsl,imx8mm-i2c fsl,imx21-i2c                                      20                    $           D              okay                     /default         =   *           +           "                 "         eeprom@52            2atmel,24c32         2   R        H             i2c@30a40000                                       2fsl,imx8mm-i2c fsl,imx21-i2c            20                    %           D              okay                     /default         =   ,      i2c@30a50000             2fsl,imx8mm-i2c fsl,imx21-i2c                                      20                    &           D            	  disabled          serial@30a60000          2fsl,imx8mm-uart fsl,imx6q-uart          20                               D                    hipg per                                              rx tx         	  disabled          mailbox@30aa0000             2fsl,imx8mm-mu fsl,imx6sx-mu         20                    X           D                       mmc@30b40000          !   2fsl,imx8mm-usdhc fsl,imx7d-usdhc            20                               D      _      S              hipg ahb per                                        	  disabled          mmc@30b50000          !   2fsl,imx8mm-usdhc fsl,imx7d-usdhc            20                               D      _      S              hipg ahb per                                          okay          "  /default state_100mhz state_200mhz           =   -   .           /   .           0   .        )   (              2   1      mmc@30b60000          !   2fsl,imx8mm-usdhc fsl,imx7d-usdhc            20                               D      _      S              hipg ahb per                                          okay          "  /default state_100mhz state_200mhz           =   2           3           4         >      spi@30bb0000                                       2nxp,imx8mm-fspi         20                   Lfspi_base fspi_mmap                k           D                    hfspi_en fspi          	  disabled          dma-controller@30bd0000           2fsl,imx8mm-sdma fsl,imx8mq-sdma         20                               D            ]        hipg ahb         \           gimx/sdma/sdma-imx7d.bin                   ethernet@30be0000         -   2fsl,imx8mm-fec fsl,imx8mq-fec fsl,imx6sx-fec            20           0         v          w          x          y         (  D                  u      t      v      "  hipg ahb ptp enet_clk_ref enet_out            A      R      u      t      v         Q      6      :      ;      9             sY@            V           h              5        mac-address         z   6            	  disabled            /default         =   7      	  rgmii-id               8   mdio                                 ethernet-phy@0           2ethernet-phy-ieee802.3-c22          2                                                           8   leds                                 led@1           2                      lan         keep          led@2           2                      lan         keep                         bus@32c00000             2fsl,aips-bus simple-bus         22   @                                   2  2   @     lcdif@32e00000        "   2fsl,imx8mm-lcdif fsl,imx6sx-lcdif           22             D      k                    hpix axi disp_axi            A      k      U      V        Q      (      A      8        n6 e                            t   9         	  disabled       port       endpoint               :           ;            dsi@32e10000             2fsl,imx8mm-mipi-dsim            22             D                    hbus_clk sclk_mipi           A              Q      6                          t   9         	  disabled       ports                                port@0          2       endpoint               ;           :         port@1          2      endpoint                   csi@32e20000             2fsl,imx8mm-csi fsl,imx7-csi         22                               D              hmclk            t   9          	  disabled       port       endpoint               <           ?            blk-ctrl@32e28000             2fsl,imx8mm-disp-blk-ctrl syscon         22            t   =   =   =   >   >      '  bus csi-bridge lcdif mipi-dsi mipi-csi        P  D                                                                  o  hcsi-bridge-axi csi-bridge-apb csi-bridge-core lcdif-axi lcdif-apb lcdif-pix dsi-pclk dsi-ref csi-aclk csi-pclk                        9      mipi-csi@32e30000            2fsl,imx8mm-mipi-csi2            22                               A              Q      A        -@         D                                hpclk wrap phy axi           t   9         	  disabled       ports                                port@0          2          port@1          2      endpoint               ?           <               usb@32e40000          +   2fsl,imx8mm-usb fsl,imx7d-usb fsl,imx27-usb          22                    (           D              A      X        Q      @        "   @        '   A            t           okay            3peripheral        usbmisc@32e40200          7   2fsl,imx8mm-usbmisc fsl,imx7d-usbmisc fsl,imx6q-usbmisc          ;           22               A      usb@32e50000          +   2fsl,imx8mm-usb fsl,imx7d-usb fsl,imx27-usb          22                    )           D              A      X        Q      @        "   B        '   C            t           okay            3host            H   D      usbmisc@32e50200          7   2fsl,imx8mm-usbmisc fsl,imx7d-usbmisc fsl,imx6q-usbmisc          ;           22               C      pcie-phy@32f00000            2fsl,imx8mm-pcie-phy         22             D   E        href         A      h                 Q      :                      Tpciephy         6            okay            `            t           H         dma-controller@33000000       &   2fsl,imx7d-dma-apbh fsl,imx28-dma-apbh           23             0                                                  \                      D                 F      nand-controller@33002000          )   2fsl,imx8mm-gpmi-nand fsl,imx7d-gpmi-nand                                      23       3 @   @         Lgpmi-nand bch                             bch         D                    hgpmi_io gpmi_bch_apb               F            rx-tx         	  disabled          pcie@33800000            2fsl,imx8mm-pcie         23   @               Ldbi config                                   &pci                      0                                                                              z           msi                                                                    }                            |                            {                            z                                  D            h      i        hpcie pcie_bus pcie_aux          t   G                            Tapps turnoff            "   H      	  pcie-phy            okay            /default         =   I           J            pcie-ep@33800000             2fsl,imx8mm-pcie-ep          23   @                Ldbi addr_space                                       dma                    D            h      i        hpcie pcie_bus pcie_aux          t   G                            Tapps turnoff            "   H      	  pcie-phy            #           2         	  disabled          gpu@38000000             2vivante,gc          28                                 D      Z                          hreg bus core shader         A            *        Q      *            /         t   K      gpu@38008000             2vivante,gc          28                               D      Z                    hreg bus core            A            *        Q      *            /         t   K      video-codec@38300000             2nxp,imx8mm-vpu-g1           280                               D              t   L          video-codec@38310000             2nxp,imx8mq-vpu-g2           281                               D              t   L         blk-ctrl@38330000            2fsl,imx8mm-vpu-blk-ctrl syscon          283             t   M   N   O   P        bus g1 g2 h1            D                        	  hg1 g2 h1            A      c      d        Q      +      +        #F #F                       L      interrupt-controller@38800000            2arm,gic-v3          28     8                                       	                    memory-controller@3d400000           2fsl,imx8mm-ddrc fsl,imx8m-ddrc          2=@   @          hcore pll alt apb             D                  a      b           Q   opp-table            2operating-points-v2            Q   opp-25000000            B    }x@      opp-100000000           B           opp-750000000           B    ,            ddr-pmu@3d800000          %   2fsl,imx8mm-ddr-pmu fsl,imx8m-ddr-pmu            2=   @                 b            memory@40000000         &memory          2    @                gpio-keys         
   2gpio-keys      key-user-pb         *user_pb            R              A         key-user-pb1x         
  *user_pb1x           A               )                  key-erased          *key_erased          A               )                 key-eeprom-wp         
  *eeprom_wp           A               )                 key-tamper          *tamper          A               )                 switch-hold         *switch_hold         A               )                    led-controller        
   2gpio-leds           /default         =   S   led-0           status                        J                on        
  Lheartbeat         led-1           status                        J               off          clock-pcie0          2fixed-clock                                 E      pps       	   2pps-gpio            /default         =   T           J               okay          regulator-usb2-vbus          2regulator-fixed         /default         =   U      
  Qusb2_vbus              V                b        ` LK@        x LK@           D      regulator-usdhc2             2regulator-fixed         /default         =   W      	  QSD2_3P3V            ` 2Z        x 2Z           (                b           1      chosen        6  u/soc@0/bus@30800000/spba-bus@30800000/serial@30890000            	interrupt-parent #address-cells #size-cells model compatible ethernet0 gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 mmc0 mmc1 mmc2 serial0 serial1 serial2 serial3 spi0 spi1 spi2 entry-method arm,psci-suspend-param local-timer-stop entry-latency-us exit-latency-us min-residency-us phandle device_type reg clock-latency clocks enable-method i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache operating-points-v2 nvmem-cells nvmem-cell-names cpu-idle-states #cooling-cells cpu-supply cache-level cache-unified opp-shared opp-hz opp-microvolt opp-supported-hw clock-latency-ns opp-suspend #clock-cells clock-frequency clock-output-names interrupts arm,no-tick-in-suspend polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device #phy-cells assigned-clocks assigned-clock-parents clock-names power-domains ranges dma-ranges #sound-dai-cells dmas dma-names status gpio-controller #gpio-cells interrupt-controller #interrupt-cells gpio-ranges gpio-line-names #thermal-sensor-cells pinctrl-names pinctrl-0 fsl,ext-reset-output #dma-cells fsl,sdma-ram-script-name fsl,pins regmap offset linux,keycode wakeup-source assigned-clock-rates #reset-cells #power-domain-cells resets #pwm-cells cs-gpios pinctrl-1 scl-gpios sda-gpios gw,mode label gw,voltage-divider-ohms pagesize regulator-name regulator-min-microvolt regulator-max-microvolt regulator-min-microamp regulator-max-microamp regulator-boot-on regulator-always-on #mbox-cells fsl,tuning-start-tap fsl,tuning-step bus-width pinctrl-2 cd-gpios vmmc-supply non-removable reg-names fsl,num-tx-queues fsl,num-rx-queues fsl,stop-mode phy-mode phy-handle ti,rx-internal-delay ti,tx-internal-delay tx-fifo-depth rx-fifo-depth color function default-state remote-endpoint power-domain-names phys fsl,usbmisc dr_mode #index-cells vbus-supply reset-names fsl,refclk-pad-mode fsl,clkreq-unsupported dma-channels interrupt-names bus-range num-lanes num-viewport interrupt-map-mask interrupt-map fsl,max-link-speed linux,pci-domain phy-names reset-gpio num-ib-windows num-ob-windows linux,code linux,default-trigger enable-active-high stdout-path 