    8     (            z  l                                                                      ,PHYTEC phyBOARD-Pollux i.MX8MP        G   2phytec,imx8mp-phyboard-pollux-rdk phytec,imx8mp-phycore-som fsl,imx8mp     aliases       &   =/soc@0/bus@30800000/ethernet@30be0000         &   G/soc@0/bus@30800000/ethernet@30bf0000         "   Q/soc@0/bus@30000000/gpio@30200000         "   W/soc@0/bus@30000000/gpio@30210000         "   ]/soc@0/bus@30000000/gpio@30220000         "   c/soc@0/bus@30000000/gpio@30230000         "   i/soc@0/bus@30000000/gpio@30240000         !   o/soc@0/bus@30800000/i2c@30a20000          !   t/soc@0/bus@30800000/i2c@30a30000          !   y/soc@0/bus@30800000/i2c@30a40000          !   ~/soc@0/bus@30800000/i2c@30a50000          !   /soc@0/bus@30800000/i2c@30ad0000          !   /soc@0/bus@30800000/i2c@30ae0000          !   /soc@0/bus@30800000/mmc@30b40000          !   /soc@0/bus@30800000/mmc@30b50000          !   /soc@0/bus@30800000/mmc@30b60000          6   /soc@0/bus@30800000/spba-bus@30800000/serial@30860000         6   /soc@0/bus@30800000/spba-bus@30800000/serial@30890000         6   /soc@0/bus@30800000/spba-bus@30800000/serial@30880000         $   /soc@0/bus@30800000/serial@30a60000       !   /soc@0/bus@30800000/spi@30bb0000          (   /soc@0/bus@30800000/i2c@30a20000/rtc@52       .   /soc@0/bus@30000000/snvs@30370000/snvs-rtc-lp         cpus                                 cpu@0            cpu          2arm,cortex-a53                          l                       psci                           @                   *           7   @        I           V           g           sspeed_grade                                                   cpu@1            cpu          2arm,cortex-a53                         l                       psci                           @                   *           7   @        I           V                                                     cpu@2            cpu          2arm,cortex-a53                         l                       psci                           @                   *           7   @        I           V                                                     cpu@3            cpu          2arm,cortex-a53                         l                       psci                           @                   *           7   @        I           V                                                     l2-cache0            2cache                                              @                               opp-table            2operating-points-v2                        opp-1200000000              G          P                      I               opp-1600000000              _^          ~                       I               opp-1800000000              kI          B@                        I                  clock-osc-32k            2fixed-clock         "            /           ?osc_32k            !      clock-osc-24m            2fixed-clock         "            /n6         ?osc_24m            "      clock-ext1           2fixed-clock         "            /k@      	  ?clk_ext1               #      clock-ext2           2fixed-clock         "            /k@      	  ?clk_ext2               $      clock-ext3           2fixed-clock         "            /k@      	  ?clk_ext3               %      clock-ext4           2fixed-clock         "            /k@      	  ?clk_ext4               &      funnel           2arm,coresight-static-funnel    in-ports                                 port@0                  endpoint            R                       port@1                 endpoint            R                       port@2                 endpoint            R   	                    port@3                 endpoint            R   
                       out-ports      port       endpoint            R                             reserved-memory                                   b   dsp@92400000                 @                  i      	  pdisabled                        pmu          2arm,cortex-a53-pmu          w              psci             2arm,psci-1.0             smc       thermal-zones      cpu-thermal                                       trips      trip0            L                   passive                  trip1            s                	   critical                        cooling-maps       map0                     0                          soc-thermal                                        trips      trip0            L                   passive                  trip1            s                	   critical                        cooling-maps       map0                     0                             timer            2arm,armv8-timer       0  w                              
          / z                soc@0            2fsl,imx8mp-soc simple-bus                                    b            >           g           ssoc_unique_id                 etm@28440000          "   2arm,coresight-etm4x arm,primecell            (D                               ]      	  apb_pclk                  out-ports      port       endpoint            R                             etm@28540000          "   2arm,coresight-etm4x arm,primecell            (T                               ]      	  apb_pclk                  out-ports      port       endpoint            R                             etm@28640000          "   2arm,coresight-etm4x arm,primecell            (d                               ]      	  apb_pclk                  out-ports      port       endpoint            R              	               etm@28740000          "   2arm,coresight-etm4x arm,primecell            (t                               ]      	  apb_pclk                  out-ports      port       endpoint            R              
               funnel@28c03000       +   2arm,coresight-dynamic-funnel arm,primecell           (0                   ]      	  apb_pclk       in-ports                                 port@0                  endpoint            R                       port@1                 endpoint                        port@2                 endpoint                           out-ports      port       endpoint            R                             etf@28c04000              2arm,coresight-tmc arm,primecell          (@                   ]      	  apb_pclk       in-ports       port       endpoint            R                          out-ports      port       endpoint            R                             etr@28c06000              2arm,coresight-tmc arm,primecell          (`                   ]      	  apb_pclk       in-ports       port       endpoint            R                             bus@30000000             2fsl,aips-bus simple-bus          0    @                                    b              gpio@30200000            2fsl,imx8mp-gpio fsl,imx35-gpio           0              w       @          A                                               $        9           J                   B  V  X_PMIC_WDOG_B  PMIC_SD_VSEL        USB1_OTG_PWR   X_nETHPHY_INT              r      gpio@30210000            2fsl,imx8mp-gpio fsl,imx35-gpio           0!             w       B          C                                               $        9           J          #         )  V            X_SD2_CD_B       SD2_RESET_B               A      gpio@30220000            2fsl,imx8mp-gpio fsl,imx35-gpio           0"             w       D          E                                               $        9            J          8                     &  V                    nCAN1_EN nCAN2_EN                    gpio@30230000            2fsl,imx8mp-gpio fsl,imx35-gpio           0#             w       F          G                                               $        9           J          R          0  V                  X_PMIC_IRQ_B  nENET0_INT_PWDN            6      gpio@30240000            2fsl,imx8mp-gpio fsl,imx35-gpio           0$             w       H          I                                               $        9           J          r              +      tmu@30260000             2fsl,imx8mp-tmu           0&                           g           scalib           f                    watchdog@30280000            2fsl,imx8mp-wdt fsl,imx21-wdt             0(             w       N                         pokay            |default                                      watchdog@30290000            2fsl,imx8mp-wdt fsl,imx21-wdt             0)             w       O                       	  pdisabled                     watchdog@302a0000            2fsl,imx8mp-wdt fsl,imx21-wdt             0*             w       
                       	  pdisabled                     timer@302d0000           2fsl,imx8mp-gpt fsl,imx6dl-gpt            0-             w       7                                ipg per                  timer@302e0000           2fsl,imx8mp-gpt fsl,imx6dl-gpt            0.             w       6                                ipg per                  timer@302f0000           2fsl,imx8mp-gpt fsl,imx6dl-gpt            0/             w       5                                ipg per                  pinctrl@30330000             2fsl,imx8mp-iomuxc            03                   fecgrp       P    X                  \    |           `               d               h                  l                  t                  x                  |                                                                                          p                        I      flexspi0grp              @                  D                   X                   \                   `                  d                         G      i2c1grp       0      d         @      `         @            4      i2c1gpiogrp       0       `                 d                        5      pmicirqgrp                           @           7      usdhc3grp               H  0             L  $             P  (             T  ,            h              l              p              t              |             $              (                       D      usdhc3-100mhzgrp                H  0             L  $             P  (             T  ,            h              l              p              t              |             $              (                       E      usdhc3-200mhzgrp                H  0             L  $             P  (             T  ,            h              l              p              t              |             $              (                       F      wdoggrp              |                               ecspi1grp         `      H  \               D  `               @  X               L                          ,      eqosgrp      h     T                    X                 |                                                                                x                    t                    h                    d                    `                    \                    l                    p                                              L      flexcan1grp       0    <    L         T  8               T           0      flexcan2grp       0    D    P         T  @               T           2      flexcan1reggrp            0               T                 flexcan2reggrp            4               T                 i2c2grp       0      h         @     l         @            :      i2c2gpiogrp       0      h                 l                        ;      lvds1grp                 <                               pcie0grp          `     4                 @   <                 `   @                 `   L                 @           q      pwm3grp             4                         )      regusdhc2vmmcgrp                 8              @                 rtcgrp                                      9      uart1grp          0                  @  $                @           -      usb1vbusgrp            D                                  uart2grp          `    (             @  ,                @                 @               @           .      usdhc2-gpiogrp                             @           >      usdhc2grp                                    $                   (                   ,                   0                   4                 $                           =      usdhc2-100mhzgrp                                     $                   (                   ,                   0                   4                 $                           ?      usdhc2-200mhzgrp                                     $                   (                   ,                   0                   4                 $                           @         syscon@30340000          2fsl,imx8mp-iomuxc-gpr syscon             04                /      efuse@30350000        )   2fsl,imx8mp-ocotp fsl,imx8mm-ocotp syscon             05                                                           unique-id@8                                 speed-grade@10                                  mac-address@90                            H      mac-address@96                            K      calib@264              d                       clock-controller@30360000         $   2fsl,imx8mp-anatop fsl,imx8mm-anatop          06             "                    snvs@30370000         #   2fsl,sec-v4.0-mon syscon simple-mfd           07                    snvs-rtc-lp          2fsl,sec-v4.0-mon-rtc-lp                        4        w                                         	  snvs-rtc                     snvs-powerkey            2fsl,sec-v4.0-pwrkey                     w                                 snvs-pwrkey            t                 pokay                     snvs-lpgpr        +   2fsl,imx8mp-snvs-lpgpr fsl,imx7d-snvs-lpgpr                      clock-controller@30380000            2fsl,imx8mp-ccm           08             w       U          V           "               !   "   #   $   %   &      4  osc_32k osc_24m clk_ext1 clk_ext2 clk_ext3 clk_ext4       (        B            g      h            (        8      ,      A      8      @                ; / e                  reset-controller@30390000            2fsl,imx8mp-src syscon            09             w       Y                         a      gpc@303a0000             2fsl,imx8mp-gpc           0:                          w       W            $        9                 pgc                              power-domain@0          %                            [      power-domain@1          %                           f      power-domain@2          %                           d      power-domain@3          %                           e      power-domain@4          %                               i      j                  2      i      j              8      8      8        / /             y      power-domain@5          %                                   6              l      H              8      8        ׄ #F            P      power-domain@6          %                                       9   '           t      power-domain@7          %                                    f              e      f              8      8        / ׄ            '      power-domain@8          %                                         (      power-domain@9          %                	                    4        9   '           s      power-domain@10         %                
                              Z      power-domain@11         %            9   (                                     v      power-domain@12         %            9   (                          
           w      power-domain@13         %            9   (                          	           x      power-domain@14         %                                    c              d      c              @      3        e k@           g      power-domain@15         %                           h      power-domain@16         %                           \      power-domain@17         %                              7                  7              @        e            c      power-domain@18         %                                         ]               bus@30400000             2fsl,aips-bus simple-bus          0@   @                                    b              pwm@30660000             2fsl,imx8mp-pwm fsl,imx27-pwm             0f             w       Q                                ipg per         G         	  pdisabled                     pwm@30670000             2fsl,imx8mp-pwm fsl,imx27-pwm             0g             w       R                                ipg per         G         	  pdisabled                     pwm@30680000             2fsl,imx8mp-pwm fsl,imx27-pwm             0h             w       S                                ipg per         G           pokay            |default            )                 pwm@30690000             2fsl,imx8mp-pwm fsl,imx27-pwm             0i             w       T                                ipg per         G         	  pdisabled                     timer@306a0000           2nxp,sysctr-timer             0j             w       /               "        per                  timer@306e0000           2fsl,imx8mp-gpt fsl,imx6dl-gpt            0n             w       3                                ipg per                  timer@306f0000           2fsl,imx8mp-gpt fsl,imx6dl-gpt            0o             w       3                                ipg per                  timer@30700000           2fsl,imx8mp-gpt fsl,imx6dl-gpt            0p             w       4                                ipg per                     bus@30800000             2fsl,aips-bus simple-bus          0   @                                    b              spba-bus@30800000            2fsl,spba-bus simple-bus          0                                       b   spi@30820000                                    "   2fsl,imx8mp-ecspi fsl,imx6ul-ecspi            0             w                                       ipg per         Ĵ                             8         R   *             *                 Wrx tx           pokay            a   +   	           |default            ,              tpm@0         !   2infineon,slb9670 tcg,tpm_tis-spi                         jCՀ                    spi@30830000                                    "   2fsl,imx8mp-ecspi fsl,imx6ul-ecspi            0             w                                        ipg per         Ĵ                             8         R   *            *                 Wrx tx         	  pdisabled                     spi@30840000                                    "   2fsl,imx8mp-ecspi fsl,imx6ul-ecspi            0             w       !                                ipg per         Ĵ                             8         R   *            *                 Wrx tx         	  pdisabled                     serial@30860000          2fsl,imx8mp-uart fsl,imx6q-uart           0             w                                       ipg per          R   *             *                  Wrx tx           pokay            |default            -                 serial@30880000          2fsl,imx8mp-uart fsl,imx6q-uart           0             w                                       ipg per          R   *             *                  Wrx tx         	  pdisabled                     serial@30890000          2fsl,imx8mp-uart fsl,imx6q-uart           0             w                                       ipg per          R   *             *                  Wrx tx           pokay                                1        |default            .         |                 can@308c0000             2fsl,imx8mp-flexcan           0             w                         n              ipg per               t              0        bZ                        /              pokay            |default            0           1                 can@308d0000             2fsl,imx8mp-flexcan           0             w                         n              ipg per               u              0        bZ                        /              pokay            |default            2           3                    crypto@30900000          2fsl,sec-v4.0                                      0             b    0             w       [                  k      n      	  aclk ipg                  jr@1000          2fsl,sec-v4.0-job-ring                          w       i         	  pdisabled                     jr@2000          2fsl,sec-v4.0-job-ring                           w       j                    jr@3000          2fsl,sec-v4.0-job-ring              0            w       r                       i2c@30a20000             2fsl,imx8mp-i2c fsl,imx21-i2c                                       0             w       #                          pokay            /         |default gpio               4           5           +                 +                    pmic@25          2nxp,pca9450c                %        w                   6        |default            7              regulators     BUCK1                              B@         H        ,VDD_SOC (BUCK1)         ;  5                 BUCK2           P ~        d P                                    H        ,VDD_ARM (BUCK2)         ;  5                 BUCK4                              2Z         2Z        ,VDD_3V3 (BUCK4)                  BUCK5                              w@         w@        ,VDD_1V8 (BUCK5)                  BUCK6                                               ,NVCC_DRAM_1V1 (BUCK6)                    LDO1                               0                 ,NVCC_SNVS_1V8 (LDO1)                     LDO3                               w@         w@        ,VDDA_1V8 (LDO3)                  LDO5                               2Z         w@        ,NVCC_SD2 (LDO5)            C            eeprom@51            2atmel,24c32             Q        |               8      rtc@52           2microcrystal,rv3028             R        |default            9             6        w                                                        i2c@30a30000             2fsl,imx8mp-i2c fsl,imx21-i2c                                       0             w       $                          pokay            /         |default gpio               :           ;           +                 +                    eeprom@51            2atmel,24c02             Q        |              <      leds@62          2nxp,pca9533             b   led-1                     led-2                     led-3                           i2c@30a40000             2fsl,imx8mp-i2c fsl,imx21-i2c                                       0             w       %                        	  pdisabled                     i2c@30a50000             2fsl,imx8mp-i2c fsl,imx21-i2c                                       0             w       &                        	  pdisabled                     serial@30a60000          2fsl,imx8mp-uart fsl,imx6q-uart           0             w                                       ipg per          R   *             *                  Wrx tx         	  pdisabled                     mailbox@30aa0000             2fsl,imx8mp-mu fsl,imx6sx-mu          0             w       X                                              mailbox@30e60000             2fsl,imx8mp-mu fsl,imx6sx-mu          0             w                           	  pdisabled               ~      i2c@30ad0000             2fsl,imx8mp-i2c fsl,imx21-i2c                                       0             w       L                        	  pdisabled                     i2c@30ae0000             2fsl,imx8mp-i2c fsl,imx21-i2c                                       0             w       M                        	  pdisabled                     mmc@30b40000          2   2fsl,imx8mp-usdhc fsl,imx8mm-usdhc fsl,imx7d-usdhc            0             w                         n      _             ipg ahb per                                        	  pdisabled                     mmc@30b50000          2   2fsl,imx8mp-usdhc fsl,imx8mm-usdhc fsl,imx7d-usdhc            0             w                         n      _             ipg ahb per                                          pokay                                 "  |default state_100mhz state_200mhz              =   >           ?   >           @   >           A                          B        "   C                 mmc@30b60000          2   2fsl,imx8mp-usdhc fsl,imx8mm-usdhc fsl,imx7d-usdhc            0             w                         n      _             ipg ahb per                                          pokay                         ׄ       "  |default state_100mhz state_200mhz              D           E           F         /                 spi@30bb0000             2nxp,imx8mp-fspi          0                   =fspi_base fspi_mmap         w       k                                fspi_en fspi            Ĵ                                                 pokay            |default            G              flash@0          2jedec,spi-nor                        jĴ         G           X                       dma-controller@30bd0000           2fsl,imx8mp-sdma fsl,imx8mq-sdma          0             w                               k        ipg ahb         i           timx/sdma/sdma-imx7d.bin            *      ethernet@30be0000         -   2fsl,imx8mp-fec fsl,imx8mq-fec fsl,imx6sx-fec             0           0  w       v          w          x          y         (                                       "  ipg ahb ptp enet_clk_ref enet_out                  ^                                 6      :      ;      9             sY@                                  g   H        smac-address            /            	  pdisabled           |default            I           J      	  rgmii-id                           mdio                                 ethernet-phy@0        	  pdisabled phy         2ethernet-phy-ieee802.3-c22                                                            $           9              J            ethernet@30bf0000         '   2nxp,imx8mp-dwmac-eqos snps,dwmac-5.10a           0             w                            Nmacirq eth_wake_irq                                           stmmaceth pclk ptp_ref tx                 ^                          6      :      ;             sY@        g   K        smac-address         ^   /           pokay            |default            L      	  rgmii-id               M              mdio             2snps,dwmac-mdio                              ethernet-phy@1           2ethernet-phy-ieee802.3-c22                      $           9                                          M               bus@30c00000             2fsl,aips-bus simple-bus          0   @                                    b              spba-bus@30c00000            2fsl,spba-bus simple-bus          0                                       b   sai@30c10000             2fsl,imx8mp-sai fsl,imx8mq-sai            0             h          (      N              N      N      N           bus mclk0 mclk1 mclk2 mclk3          R   O              O                  Wrx tx           w       _         	  pdisabled                     sai@30c20000             2fsl,imx8mp-sai fsl,imx8mq-sai            0             h          (      N             N      N      N           bus mclk0 mclk1 mclk2 mclk3          R   O             O                  Wrx tx           w       `         	  pdisabled                     sai@30c30000             2fsl,imx8mp-sai fsl,imx8mq-sai            0             h          (      N             N   	   N   
   N           bus mclk0 mclk1 mclk2 mclk3          R   O             O                  Wrx tx           w       2         	  pdisabled                     sai@30c50000             2fsl,imx8mp-sai fsl,imx8mq-sai            0             h          (      N             N      N      N           bus mclk0 mclk1 mclk2 mclk3          R   O             O   	               Wrx tx           w       Z         	  pdisabled                     sai@30c60000             2fsl,imx8mp-sai fsl,imx8mq-sai            0             h          (      N             N      N      N           bus mclk0 mclk1 mclk2 mclk3          R   O   
          O                  Wrx tx           w       Z         	  pdisabled                     sai@30c80000             2fsl,imx8mp-sai fsl,imx8mq-sai            0             h          (      N             N      N      N           bus mclk0 mclk1 mclk2 mclk3          R   O             O                  Wrx tx           w       o         	  pdisabled                     easrc@30c90000        "   2fsl,imx8mp-easrc fsl,imx8mn-easrc            0             w       z               N           mem         R   O             O             O             O             O             O             O             O                @  Wctx0_rx ctx0_tx ctx1_rx ctx1_tx ctx2_rx ctx2_tx ctx3_rx ctx3_tx         yimx/easrc/easrc-imx8mn.bin            @                 	  pdisabled                     audio-controller@30ca0000            2fsl,imx8mp-micfil            0             h          0  w       m          n          ,          -         (      N      N   6      &      '            )  ipg_clk ipg_clk_app pll8k pll11k clkext3            R   O                 Wrx        	  pdisabled                     aud2htx@30cb0000             2fsl,imx8mp-aud2htx           0             w                      N   !        bus         R   O                  Wtx        	  pdisabled                     xcvr@30cc0000            2fsl,imx8mp-xcvr           0     0    0    0            =ram regs rxfifo txfifo        $  w                                           N      N   &   N      N   #        ipg phy spba pll_ipg             R   O             O                  Wrx tx              N          	  pdisabled                        dma-controller@30e00000           2fsl,imx8mp-sdma fsl,imx8mq-sdma          0             i               N                ipg ahb         w       "           timx/sdma/sdma-imx7d.bin                  dma-controller@30e10000           2fsl,imx8mp-sdma fsl,imx8mq-sdma          0             i               N                ipg ahb         w       g           timx/sdma/sdma-imx7d.bin            O      clock-controller@30e20000            2fsl,imx8mp-audio-blk-ctrl            0             "                    8              {      |      }                        "  ahb sai1 sai2 sai3 sai5 sai6 sai7           9   P                            p              N         interconnect@32700000            2fsl,imx8mp-noc fsl,imx8m-noc             2p                    g                      Q           ^   opp-table            2operating-points-v2            Q   opp-200000000                      opp-1000000000              ;             bus@32c00000             2fsl,aips-bus simple-bus          2   @                                    b              isi@32e00000             2fsl,imx8mp-isi           2    @         w                 *                              axi apb            R        9   R         	  pdisabled                  ports                                port@0                  endpoint            R   S           U         port@1                 endpoint            R   T           V               isp@32e10000             2fsl,imx8mp-isp           2             w       J                                   isp aclk hclk           9   R              R          	  pdisabled                  ports                                port@1                          isp@32e20000             2fsl,imx8mp-isp           2             w       K                                   isp aclk hclk           9   R              R         	  pdisabled                  ports                                port@1                          dwe@32e30000             2nxp,imx8mp-dw100             2             w       d                              axi ahb         9   R                    csi@32e40000          *   2fsl,imx8mp-mipi-csi2 fsl,imx8mm-mipi-csi2            2             w                  /沀                                      pclk wrap phy axi                                     >              9   R         	  pdisabled                  ports                                port@0                     port@1                 endpoint            R   U           S               csi@32e50000          *   2fsl,imx8mp-mipi-csi2 fsl,imx8mm-mipi-csi2            2             w       P           /沀                                      pclk wrap phy axi                                     >              9   R         	  pdisabled                  ports                                port@0                     port@1                 endpoint            R   V           T               dsi@32e60000             2fsl,imx8mp-mipi-dsim             2                                 bus_clk sclk_mipi                 b                    8               n6         n6         w                  9   R          	  pdisabled                  ports                                port@0                  endpoint            R   W           X         port@1                 endpoint                              display-controller@32e80000          2fsl,imx8mp-lcdif             2                                     pix axi disp_axi            w                  9   R         	  pdisabled                  port       endpoint            R   X           W            display-controller@32e90000          2fsl,imx8mp-lcdif             2             w                                          pix axi disp_axi            9   R           pokay                  port       endpoint            R   Y           _            blk-ctrl@32ec0000         !   2fsl,imx8mp-media-blk-ctrl syscon             2                                    (  9   Z   [   [   Z   Z   \   Z   ]   ]   \      F  bus mipi-dsi1 mipi-csi1 lcdif1 isi mipi-csi2 lcdif2 isp dwe mipi-dsi2              ^      ^      ^      ^      ^      ^      ^      ^      ^       ^      ^   !   ^      ^   "   ^      ^   #   ^         /  
lcdif-rd lcdif-wr isi0 isi1 isi2 isp0 isp1 dwe        @                                                 &  apb axi cam1 cam2 disp1 disp2 isp phy         0        a      b           9     8            (        A      8      (      (      @        e          e 5'        %              R   bridge@5c            2fsl,imx8mp-ldb              \     (         	  =ldb lvds                  I        ldb                             (        pokay                  ports                                port@0                  endpoint            R   _           Y         port@1                 endpoint                        port@2                 endpoint            R   `                             pcie-phy@32f00000            2fsl,imx8mp-pcie-phy          2                a      a           pciephy perst           9   b           )            pokay                b        ref         4            H           p      blk-ctrl@32f10000             2fsl,imx8mp-hsio-blk-ctrl syscon          2     $                           	  usb pcie            9   c   c   d   e   c   f      (  bus usb usb-phy1 usb-phy2 pcie pcie-phy       @     ^      ^      ^      ^      ^      ^      ^      ^           
noc-pcie usb1 usb2 pcie         %           "               b      blk-ctrl@32fc0000             2fsl,imx8mp-hdmi-blk-ctrl syscon          2           (         c                               apb axi ref_266m ref_24m fdcc         (  9   g   g   g   g   g   g   g   h   g   g      =  bus irqsteer lcdif pai pvi trng hdmi-tx hdmi-tx-phy hdcp hrv            %              i      interrupt-controller@32fc2000         %   2fsl,imx8mp-irqsteer fsl,imx-irqsteer             2             w       +            $        9           _           k   @               c        ipg         9   i               j      display-bridge@32fc4000          2fsl,imx8mp-hdmi-pvi          2@                 j        w           9   i         	  pdisabled                  ports                                port@0                  endpoint            R   k           n         port@1                 endpoint            R   l           o               display-controller@32fc6000          2fsl,imx8mp-lcdif             2`                 j        w               m      c             pix axi disp_axi            9   i         	  pdisabled                  port       endpoint            R   n           k            hdmi@32fd8000            2fsl,imx8mp-hdmi-tx           2   ~             j        w                   c               m        iahb isfr cec pix                               6        9   i           x         	  pdisabled                  ports                                port@0                  endpoint            R   o           l         port@1                          phy@32fdff00             2fsl,imx8mp-hdmi-phy          2                   c              apb ref                                     9   i           "            )          	  pdisabled               m         pcie@33800000            2fsl,imx8mp-pcie          3   @               =dbi config                     7              pcie pcie_bus pcie_aux                x                       9                                  pci                      0  b                                                                     w                  Nmsi         9                                                           ~                            }                            |                            {                                  9   b              a      a           apps turnoff               p      	  pcie-phy            pokay            |default            q           r              	   <                 pcie-ep@33800000             2fsl,imx8mp-pcie-ep           3   @                =dbi addr_space                     7              pcie pcie_bus pcie_aux                x                       9                   w                  Ndma                    9   b              a      a           apps turnoff               p      	  pcie-phy            	           	!         	  pdisabled                     gpu@38000000             2vivante,gc           8              w                               4           f        core shader bus reg              3     4              8      8        / /         9   s                 gpu@38008000             2vivante,gc           8             w                                    f        core bus reg                 5              8        /         9   t                 video-codec@38300000             2nxp,imx8mm-vpu-g1            80             w                                      r              +        #F         9   u                     video-codec@38310000             2nxp,imx8mq-vpu-g2            81             w                        
              s              A        e         9   u                    blk-ctrl@38330000            2fsl,imx8mp-vpu-blk-ctrl syscon           83             %           9   (   v   w   x        bus g1 g2 vc8000e                      
     	        g1 g2 vc8000e                 `                    +        #F #F       0     ^   %   ^   $   ^   &   ^   $   ^   '   ^   $        
g1 g2 vc8000e              u      npu@38500000             2vivante,gc           8P              w                                    i      j        core shader bus reg         9   y                 interrupt-controller@38800000            2arm,gic-v3           8     8             9            $        w      	                                 memory-controller@3d400000           2snps,ddrc-3.80a          =@   @          w                           ddr-pmu@3d800000          %   2fsl,imx8mp-ddr-pmu fsl,imx8m-ddr-pmu             =   @          w       b         usb-phy@381f0040             2fsl,imx8mp-usb-phy           8 @   @                       phy                                     9   b           )            pokay            	0   z           {      usb@32f10100             2fsl,imx8mp-dwc3          2    8                         @        hsio suspend            w                  9   b                                     	<@   @               b        pokay                  usb@38100000          
   2snps,dwc3            8                               @        bus_early ref suspend           w       (              {   {        usb2-phy usb3-phy            	G         	h        	host            pokay                        usb-phy@382f0040             2fsl,imx8mp-usb-phy           8/ @   @                       phy                                     9   b           )            pokay            	0   |           }      usb@32f10108             2fsl,imx8mp-dwc3          2   8/                         @        hsio suspend            w                  9   b                                     	<@   @               b        pokay             	         	              usb@38200000          
   2snps,dwc3            8                                @        bus_early ref suspend           w       )              }   }        usb2-phy usb3-phy            	G         	h        	host            pokay                        dsp@3b6e8000             2fsl,imx8mp-dsp           ;n           	txdb0 txdb1 rxdb0 rxdb1       0  	   ~          ~         ~          ~              	         	  pdisabled                        memory@40000000          memory               @                regulator-vdd-io             2regulator-fixed                            2Z         2Z        ,VDD_IO             8      chosen        6  	/soc@0/bus@30800000/spba-bus@30800000/serial@30860000         backlight            2pwm-backlight           |default                     	                    @              
           
   A              
+           
B           
O         P                     panel-lvds           2edt,etml1010g3dra           
T           
B   <              port       endpoint            R              `            regulator-vcc-5v-sw          2regulator-fixed                            LK@         LK@      
  ,VCC_5V_SW              |      regulator-can1-stby          2regulator-fixed         |default                    	                   2Z         2Z      
  ,can1-stby              1      regulator-can2-stby          2regulator-fixed         |default                    	                   2Z         2Z      
  ,can2-stby              3      regulator-lvds1          2regulator-fixed          
^        	    r   	             O         O        ,lvds1_reg_en                     regulator-usb1-vbus          2regulator-fixed         |default                    	    r               LK@         LK@        ,usb1_host_vbus             z      regulator-usdhc2             2regulator-fixed         |default                    ,VSD_3V3          2Z         2Z        	    A                
^        
q   d        
  .           B      regulator-vcc-3v3-sw             2regulator-fixed         ,VCC_3V3_SW           2Z         2Z           <      __symbols__         
/cpus/cpu@0         
/cpus/cpu@1         
/cpus/cpu@2         
/cpus/cpu@3         
/cpus/l2-cache0         
/opp-table          
/clock-osc-32k          
/clock-osc-24m          
/clock-ext1         
/clock-ext2         
/clock-ext3         
/clock-ext4       !  
/funnel/in-ports/port@0/endpoint          !  /funnel/in-ports/port@1/endpoint          !  /funnel/in-ports/port@2/endpoint          !  ,/funnel/in-ports/port@3/endpoint             ?/funnel/out-ports/port/endpoint         S/reserved-memory/dsp@92400000         '  `/thermal-zones/cpu-thermal/trips/trip0        '  k/thermal-zones/cpu-thermal/trips/trip1        '  u/thermal-zones/soc-thermal/trips/trip0        '  /thermal-zones/soc-thermal/trips/trip1          /soc@0          /soc@0/etm@28440000       ,  /soc@0/etm@28440000/out-ports/port/endpoint         /soc@0/etm@28540000       ,  /soc@0/etm@28540000/out-ports/port/endpoint         /soc@0/etm@28640000       ,  /soc@0/etm@28640000/out-ports/port/endpoint         /soc@0/etm@28740000       ,  /soc@0/etm@28740000/out-ports/port/endpoint       0  /soc@0/funnel@28c03000/in-ports/port@0/endpoint       0  /soc@0/funnel@28c03000/in-ports/port@1/endpoint       0  /soc@0/funnel@28c03000/in-ports/port@2/endpoint       /  /soc@0/funnel@28c03000/out-ports/port/endpoint        +  //soc@0/etf@28c04000/in-ports/port/endpoint        ,  ;/soc@0/etf@28c04000/out-ports/port/endpoint       +  H/soc@0/etr@28c06000/in-ports/port/endpoint          T/soc@0/bus@30000000       "   W/soc@0/bus@30000000/gpio@30200000         "   ]/soc@0/bus@30000000/gpio@30210000         "   c/soc@0/bus@30000000/gpio@30220000         "   i/soc@0/bus@30000000/gpio@30230000         "  Z/soc@0/bus@30000000/gpio@30240000         !  `/soc@0/bus@30000000/tmu@30260000          &  d/soc@0/bus@30000000/watchdog@30280000         &  j/soc@0/bus@30000000/watchdog@30290000         &  p/soc@0/bus@30000000/watchdog@302a0000         #  v/soc@0/bus@30000000/timer@302d0000        #  {/soc@0/bus@30000000/timer@302e0000        #  /soc@0/bus@30000000/timer@302f0000        %  /soc@0/bus@30000000/pinctrl@30330000          ,  /soc@0/bus@30000000/pinctrl@30330000/fecgrp       1  /soc@0/bus@30000000/pinctrl@30330000/flexspi0grp          -  /soc@0/bus@30000000/pinctrl@30330000/i2c1grp          1  /soc@0/bus@30000000/pinctrl@30330000/i2c1gpiogrp          0  /soc@0/bus@30000000/pinctrl@30330000/pmicirqgrp       /  /soc@0/bus@30000000/pinctrl@30330000/usdhc3grp        6  /soc@0/bus@30000000/pinctrl@30330000/usdhc3-100mhzgrp         6  /soc@0/bus@30000000/pinctrl@30330000/usdhc3-200mhzgrp         -  /soc@0/bus@30000000/pinctrl@30330000/wdoggrp          /  /soc@0/bus@30000000/pinctrl@30330000/ecspi1grp        -  ,/soc@0/bus@30000000/pinctrl@30330000/eqosgrp          1  9/soc@0/bus@30000000/pinctrl@30330000/flexcan1grp          1  J/soc@0/bus@30000000/pinctrl@30330000/flexcan2grp          4  [/soc@0/bus@30000000/pinctrl@30330000/flexcan1reggrp       4  p/soc@0/bus@30000000/pinctrl@30330000/flexcan2reggrp       -  /soc@0/bus@30000000/pinctrl@30330000/i2c2grp          1  /soc@0/bus@30000000/pinctrl@30330000/i2c2gpiogrp          .  /soc@0/bus@30000000/pinctrl@30330000/lvds1grp         .  /soc@0/bus@30000000/pinctrl@30330000/pcie0grp         -  /soc@0/bus@30000000/pinctrl@30330000/pwm3grp          6  /soc@0/bus@30000000/pinctrl@30330000/regusdhc2vmmcgrp         ,  /soc@0/bus@30000000/pinctrl@30330000/rtcgrp       .  /soc@0/bus@30000000/pinctrl@30330000/uart1grp         1  /soc@0/bus@30000000/pinctrl@30330000/usb1vbusgrp          .  /soc@0/bus@30000000/pinctrl@30330000/uart2grp         4  /soc@0/bus@30000000/pinctrl@30330000/usdhc2-gpiogrp       /  3/soc@0/bus@30000000/pinctrl@30330000/usdhc2grp        6  B/soc@0/bus@30000000/pinctrl@30330000/usdhc2-100mhzgrp         6  X/soc@0/bus@30000000/pinctrl@30330000/usdhc2-200mhzgrp         $  n/soc@0/bus@30000000/syscon@30340000       #  r/soc@0/bus@30000000/efuse@30350000        /  x/soc@0/bus@30000000/efuse@30350000/unique-id@8        2  /soc@0/bus@30000000/efuse@30350000/speed-grade@10         2  /soc@0/bus@30000000/efuse@30350000/mac-address@90         2  /soc@0/bus@30000000/efuse@30350000/mac-address@96         -  /soc@0/bus@30000000/efuse@30350000/calib@264          .  /soc@0/bus@30000000/clock-controller@30360000         "  /soc@0/bus@30000000/snvs@30370000         .  /soc@0/bus@30000000/snvs@30370000/snvs-rtc-lp         0  /soc@0/bus@30000000/snvs@30370000/snvs-powerkey       -  /soc@0/bus@30000000/snvs@30370000/snvs-lpgpr          .  /soc@0/bus@30000000/clock-controller@30380000         .  /soc@0/bus@30000000/reset-controller@30390000         !  /soc@0/bus@30000000/gpc@303a0000          4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@0       4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@1       4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@2       4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@3       4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@4       4  &/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@5       4  0/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@6       4  :/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@7       4  E/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@8       4  P/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@9       5  Z/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@10          5  g/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@11          5  r/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@12          5  }/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@13          5  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@14          5  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@15          5  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@16          5  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@17          5  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@18            /soc@0/bus@30400000       !  /soc@0/bus@30400000/pwm@30660000          !  /soc@0/bus@30400000/pwm@30670000          !  /soc@0/bus@30400000/pwm@30680000          !  /soc@0/bus@30400000/pwm@30690000          #  /soc@0/bus@30400000/timer@306a0000        #  /soc@0/bus@30400000/timer@306e0000        #  /soc@0/bus@30400000/timer@306f0000        #  /soc@0/bus@30400000/timer@30700000          /soc@0/bus@30800000       3  %/soc@0/bus@30800000/spba-bus@30800000/spi@30820000        9  /soc@0/bus@30800000/spba-bus@30800000/spi@30820000/tpm@0          3  /soc@0/bus@30800000/spba-bus@30800000/spi@30830000        3  /soc@0/bus@30800000/spba-bus@30800000/spi@30840000        6  /soc@0/bus@30800000/spba-bus@30800000/serial@30860000         6  /soc@0/bus@30800000/spba-bus@30800000/serial@30880000         6  /soc@0/bus@30800000/spba-bus@30800000/serial@30890000         3  A/soc@0/bus@30800000/spba-bus@30800000/can@308c0000        3  R/soc@0/bus@30800000/spba-bus@30800000/can@308d0000        $  /soc@0/bus@30800000/crypto@30900000       ,  #/soc@0/bus@30800000/crypto@30900000/jr@1000       ,  +/soc@0/bus@30800000/crypto@30900000/jr@2000       ,  3/soc@0/bus@30800000/crypto@30900000/jr@3000       !   t/soc@0/bus@30800000/i2c@30a20000          )  /soc@0/bus@30800000/i2c@30a20000/pmic@25          :  ;/soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators/BUCK1         :  A/soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators/BUCK2         :  G/soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators/BUCK4         :  M/soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators/BUCK5         :  S/soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators/BUCK6         9  Y/soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators/LDO1          9  ^/soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators/LDO3          9  c/soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators/LDO5          (  h/soc@0/bus@30800000/i2c@30a20000/rtc@52       !   y/soc@0/bus@30800000/i2c@30a30000          !   ~/soc@0/bus@30800000/i2c@30a40000          !   /soc@0/bus@30800000/i2c@30a50000          $  o/soc@0/bus@30800000/serial@30a60000       %  a/soc@0/bus@30800000/mailbox@30aa0000          %  u/soc@0/bus@30800000/mailbox@30e60000          !   /soc@0/bus@30800000/i2c@30ad0000          !  y/soc@0/bus@30800000/i2c@30ae0000          !  ~/soc@0/bus@30800000/mmc@30b40000          !  ;/soc@0/bus@30800000/mmc@30b50000          !  /soc@0/bus@30800000/mmc@30b60000          !  /soc@0/bus@30800000/spi@30bb0000          )  /soc@0/bus@30800000/spi@30bb0000/flash@0          ,  /soc@0/bus@30800000/dma-controller@30bd0000       &  /soc@0/bus@30800000/ethernet@30be0000         :  /soc@0/bus@30800000/ethernet@30be0000/mdio/ethernet-phy@0         &  4/soc@0/bus@30800000/ethernet@30bf0000         :  /soc@0/bus@30800000/ethernet@30bf0000/mdio/ethernet-phy@1           /soc@0/bus@30c00000       3  /soc@0/bus@30c00000/spba-bus@30c00000/sai@30c10000        3  /soc@0/bus@30c00000/spba-bus@30c00000/sai@30c20000        3  /soc@0/bus@30c00000/spba-bus@30c00000/sai@30c30000        3  /soc@0/bus@30c00000/spba-bus@30c00000/sai@30c50000        3  /soc@0/bus@30c00000/spba-bus@30c00000/sai@30c60000        3  /soc@0/bus@30c00000/spba-bus@30c00000/sai@30c80000        5  /soc@0/bus@30c00000/spba-bus@30c00000/easrc@30c90000          @  /soc@0/bus@30c00000/spba-bus@30c00000/audio-controller@30ca0000       7  /soc@0/bus@30c00000/spba-bus@30c00000/aud2htx@30cb0000        4  /soc@0/bus@30c00000/spba-bus@30c00000/xcvr@30cc0000       ,  /soc@0/bus@30c00000/dma-controller@30e00000       ,  /soc@0/bus@30c00000/dma-controller@30e10000       .  /soc@0/bus@30c00000/clock-controller@30e20000           /soc@0/interconnect@32700000          '  
/soc@0/interconnect@32700000/opp-table          /soc@0/bus@32c00000       !  /soc@0/bus@32c00000/isi@32e00000          7  $/soc@0/bus@32c00000/isi@32e00000/ports/port@0/endpoint        7  -/soc@0/bus@32c00000/isi@32e00000/ports/port@1/endpoint        !  6/soc@0/bus@32c00000/isp@32e10000          !  </soc@0/bus@32c00000/isp@32e20000          !  B/soc@0/bus@32c00000/dwe@32e30000          !  I/soc@0/bus@32c00000/csi@32e40000          7  T/soc@0/bus@32c00000/csi@32e40000/ports/port@1/endpoint        !  c/soc@0/bus@32c00000/csi@32e50000          7  n/soc@0/bus@32c00000/csi@32e50000/ports/port@1/endpoint        !  }/soc@0/bus@32c00000/dsi@32e60000          7  /soc@0/bus@32c00000/dsi@32e60000/ports/port@0/endpoint        7  /soc@0/bus@32c00000/dsi@32e60000/ports/port@1/endpoint        0  /soc@0/bus@32c00000/display-controller@32e80000       >  /soc@0/bus@32c00000/display-controller@32e80000/port/endpoint         0  /soc@0/bus@32c00000/display-controller@32e90000       >  /soc@0/bus@32c00000/display-controller@32e90000/port/endpoint         &  /soc@0/bus@32c00000/blk-ctrl@32ec0000         0  /soc@0/bus@32c00000/blk-ctrl@32ec0000/bridge@5c       F  /soc@0/bus@32c00000/blk-ctrl@32ec0000/bridge@5c/ports/port@0/endpoint         F  /soc@0/bus@32c00000/blk-ctrl@32ec0000/bridge@5c/ports/port@1/endpoint         F   /soc@0/bus@32c00000/blk-ctrl@32ec0000/bridge@5c/ports/port@2/endpoint         &  /soc@0/bus@32c00000/pcie-phy@32f00000         &  /soc@0/bus@32c00000/blk-ctrl@32f10000         &  /soc@0/bus@32c00000/blk-ctrl@32fc0000         2  )/soc@0/bus@32c00000/interrupt-controller@32fc2000         ,  7/soc@0/bus@32c00000/display-bridge@32fc4000       B  @/soc@0/bus@32c00000/display-bridge@32fc4000/ports/port@0/endpoint         B  P/soc@0/bus@32c00000/display-bridge@32fc4000/ports/port@1/endpoint         0  I/soc@0/bus@32c00000/display-controller@32fc6000       >  _/soc@0/bus@32c00000/display-controller@32fc6000/port/endpoint         "  W/soc@0/bus@32c00000/hdmi@32fd8000         8  m/soc@0/bus@32c00000/hdmi@32fd8000/ports/port@0/endpoint       !  ~/soc@0/bus@32c00000/phy@32fdff00            /soc@0/pcie@33800000            /soc@0/pcie-ep@33800000         T/soc@0/gpu@38000000         4/soc@0/gpu@38008000         k/soc@0/video-codec@38300000         v/soc@0/video-codec@38310000         /soc@0/blk-ctrl@38330000            /soc@0/npu@38500000       %  /soc@0/interrupt-controller@38800000          "  /soc@0/memory-controller@3d400000           /soc@0/usb-phy@381f0040         /soc@0/usb@32f10100       !  /soc@0/usb@32f10100/usb@38100000            /soc@0/usb-phy@382f0040         /soc@0/usb@32f10108       !  /soc@0/usb@32f10108/usb@38200000            /soc@0/dsp@3b6e8000         /regulator-vdd-io           /backlight          /panel-lvds         /panel-lvds/port/endpoint           "/regulator-vcc-5v-sw            0/regulator-can1-stby            >/regulator-can2-stby            L/regulator-lvds1            ]/regulator-usb1-vbus            /regulator-usdhc2           k/regulator-vcc-3v3-sw            	interrupt-parent #address-cells #size-cells model compatible ethernet0 ethernet1 gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 mmc0 mmc1 mmc2 serial0 serial1 serial2 serial3 spi0 rtc0 rtc1 device_type reg clock-latency clocks enable-method i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache nvmem-cells nvmem-cell-names operating-points-v2 #cooling-cells cpu-supply phandle cache-unified cache-level opp-shared opp-hz opp-microvolt opp-supported-hw clock-latency-ns opp-suspend #clock-cells clock-frequency clock-output-names remote-endpoint ranges no-map status interrupts polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device arm,no-tick-in-suspend cpu clock-names gpio-controller #gpio-cells interrupt-controller #interrupt-cells gpio-ranges gpio-line-names #thermal-sensor-cells pinctrl-names pinctrl-0 fsl,ext-reset-output fsl,pins regmap offset linux,keycode wakeup-source assigned-clocks assigned-clock-parents assigned-clock-rates #reset-cells #power-domain-cells power-domains #pwm-cells dmas dma-names cs-gpios spi-max-frequency uart-has-rtscts fsl,clk-source fsl,stop-mode xceiver-supply pinctrl-1 scl-gpios sda-gpios regulator-always-on regulator-boot-on regulator-max-microvolt regulator-min-microvolt regulator-name regulator-ramp-delay nxp,dvs-run-voltage nxp,dvs-standby-voltage pagesize vcc-supply aux-voltage-chargeable trickle-resistor-ohms #mbox-cells fsl,tuning-start-tap fsl,tuning-step bus-width pinctrl-2 cd-gpios disable-wp vmmc-supply vqmmc-supply non-removable reg-names spi-rx-bus-width spi-tx-bus-width #dma-cells fsl,sdma-ram-script-name fsl,num-tx-queues fsl,num-rx-queues phy-handle phy-mode fsl,magic-packet enet-phy-lane-no-swap ti,clk-output-sel ti,fifo-depth ti,min-output-impedance ti,rx-internal-delay ti,tx-internal-delay interrupt-names intf_mode #sound-dai-cells firmware-name fsl,asrc-rate fsl,asrc-format resets #interconnect-cells fsl,blk-ctrl samsung,pll-clock-frequency power-domain-names interconnects interconnect-names reset-names #phy-cells fsl,refclk-pad-mode fsl,clkreq-unsupported fsl,channel fsl,num-irqs reg-io-width bus-range num-lanes num-viewport interrupt-map-mask interrupt-map fsl,max-link-speed linux,pci-domain phys phy-names reset-gpio vpcie-supply num-ib-windows num-ob-windows vbus-supply dma-ranges snps,gfladj-refclk-lpm-sel-quirk snps,parkmode-disable-ss-quirk dr_mode fsl,permanently-attached fsl,disable-port-power-control mbox-names mboxes memory-region stdout-path brightness-levels default-brightness-level enable-gpios num-interpolated-steps power-supply pwms backlight enable-active-high startup-delay-us off-on-delay-us A53_0 A53_1 A53_2 A53_3 A53_L2 a53_opp_table osc_32k osc_24m clk_ext1 clk_ext2 clk_ext3 clk_ext4 ca_funnel_in_port0 ca_funnel_in_port1 ca_funnel_in_port2 ca_funnel_in_port3 ca_funnel_out_port0 dsp_reserved cpu_alert0 cpu_crit0 soc_alert0 soc_crit0 soc etm0 etm0_out_port etm1 etm1_out_port etm2 etm2_out_port etm3 etm3_out_port hugo_funnel_in_port0 hugo_funnel_in_port1 hugo_funnel_in_port2 hugo_funnel_out_port0 etf_in_port etf_out_port etr_in_port aips1 gpio5 tmu wdog1 wdog2 wdog3 gpt1 gpt2 gpt3 iomuxc pinctrl_fec pinctrl_flexspi0 pinctrl_i2c1 pinctrl_i2c1_gpio pinctrl_pmic pinctrl_usdhc3 pinctrl_usdhc3_100mhz pinctrl_usdhc3_200mhz pinctrl_wdog pinctrl_ecspi1 pinctrl_eqos pinctrl_flexcan1 pinctrl_flexcan2 pinctrl_flexcan1_reg pinctrl_flexcan2_reg pinctrl_i2c2 pinctrl_i2c2_gpio pinctrl_lvds1 pinctrl_pcie0 pinctrl_pwm3 pinctrl_reg_usdhc2_vmmc pinctrl_rtc pinctrl_uart1 pinctrl_usb1_vbus pinctrl_uart2 pinctrl_usdhc2_pins pinctrl_usdhc2 pinctrl_usdhc2_100mhz pinctrl_usdhc2_200mhz gpr ocotp imx8mp_uid cpu_speed_grade eth_mac1 eth_mac2 tmu_calib anatop snvs snvs_rtc snvs_pwrkey snvs_lpgpr clk src gpc pgc_mipi_phy1 pgc_pcie_phy pgc_usb1_phy pgc_usb2_phy pgc_mlmix pgc_audio pgc_gpu2d pgc_gpumix pgc_vpumix pgc_gpu3d pgc_mediamix pgc_vpu_g1 pgc_vpu_g2 pgc_vpu_vc8000e pgc_hdmimix pgc_hdmi_phy pgc_mipi_phy2 pgc_hsiomix pgc_ispdwp aips2 pwm1 pwm2 pwm4 system_counter gpt6 gpt5 gpt4 aips3 tpm ecspi2 ecspi3 uart3 crypto sec_jr0 sec_jr1 sec_jr2 buck1 buck2 buck4 buck5 buck6 ldo1 ldo3 ldo5 rv3028 uart4 mu2 i2c6 usdhc1 flexspi som_flash sdma1 ethphy1 ethphy0 aips5 sai1 sai2 sai3 sai5 sai6 sai7 easrc micfil aud2htx xcvr sdma3 sdma2 audio_blk_ctrl noc noc_opp_table aips4 isi_0 isi_in_0 isi_in_1 isp_0 isp_1 dewarp mipi_csi_0 mipi_csi_0_out mipi_csi_1 mipi_csi_1_out mipi_dsi dsim_from_lcdif1 mipi_dsi_out lcdif1_to_dsim lcdif2 lcdif2_to_ldb media_blk_ctrl lvds_bridge ldb_from_lcdif2 ldb_lvds_ch0 ldb_lvds_ch1 hsio_blk_ctrl hdmi_blk_ctrl irqsteer_hdmi hdmi_pvi pvi_from_lcdif3 pvi_to_hdmi_tx lcdif3_to_pvi hdmi_tx_from_pvi hdmi_tx_phy pcie pcie_ep vpumix_blk_ctrl npu gic edacmc usb3_phy0 usb3_0 usb_dwc3_0 usb3_phy1 usb3_1 usb_dwc3_1 dsp reg_vdd_io backlight_lvds panel1_lvds panel1_in reg_vcc_5v_sw reg_can1_stby reg_can2_stby reg_lvds1_reg_en reg_usb1_vbus reg_vcc_3v3_sw 