  :   8     (            F                                                                        ,Einfochips i.MX8MQ Thor96         $   2einfochips,imx8mq-thor96 fsl,imx8mq    aliases       &   =/soc@0/bus@30800000/ethernet@30be0000         "   G/soc@0/bus@30000000/gpio@30200000         "   M/soc@0/bus@30000000/gpio@30210000         "   S/soc@0/bus@30000000/gpio@30220000         "   Y/soc@0/bus@30000000/gpio@30230000         "   _/soc@0/bus@30000000/gpio@30240000         !   e/soc@0/bus@30800000/i2c@30a20000          !   j/soc@0/bus@30800000/i2c@30a30000          !   o/soc@0/bus@30800000/i2c@30a40000          !   t/soc@0/bus@30800000/i2c@30a50000          !   y/soc@0/bus@30800000/mmc@30b40000          !   ~/soc@0/bus@30800000/mmc@30b50000          $   /soc@0/bus@30800000/serial@30860000       $   /soc@0/bus@30800000/serial@30890000       $   /soc@0/bus@30800000/serial@30880000       $   /soc@0/bus@30800000/serial@30a60000       !   /soc@0/bus@30800000/spi@30820000          !   /soc@0/bus@30800000/spi@30830000          !   /soc@0/bus@30800000/spi@30840000          clock-ckil           2fixed-clock                                   ckil                $      clock-osc-25m            2fixed-clock                       }x@         osc_25m             %      clock-osc-27m            2fixed-clock                                osc_27m             &      clock-hdmi-phy-27m           2fixed-clock                                hdmi_phy_27m          clock-ext1           2fixed-clock                       k@      	   clk_ext1                '      clock-ext2           2fixed-clock                       k@      	   clk_ext2                (      clock-ext3           2fixed-clock                       k@      	   clk_ext3                )      clock-ext4           2fixed-clock                       k@      	   clk_ext4                *      cpus                                 cpu@0            cpu          2arm,cortex-a53                          l                     psci                       *   @        <           I           V   @        h           u                                            speed_grade                   cpu@1            cpu          2arm,cortex-a53                         l                     psci                       *   @        <           I           V   @        h           u                                           cpu@2            cpu          2arm,cortex-a53                         l                     psci                       *   @        <           I           V   @        h           u                                           cpu@3            cpu          2arm,cortex-a53                         l                     psci                       *   @        <           I           V   @        h           u                                           l2-cache0            2cache                                          ,   @        >                        opp-table            2operating-points-v2                         opp-800000000               /                                  I         "      opp-1000000000              ;                                  I         "      opp-1300000000              M|m          B@                        I         "      opp-1500000000              Yh/          B@                        I         "         funnel           2arm,coresight-static-funnel    in-ports                                 port@0                  endpoint            .                        port@1                 endpoint            .                        port@2                 endpoint            .                        port@3                 endpoint            .   	                        out-ports      port       endpoint            .   
                           pmu          2arm,cortex-a53-pmu          >                            psci             2arm,psci-1.0            smc       thermal-zones      cpu-thermal         I           _          m          trips      cpu-alert           } 8                   passive                   cpu-crit            } _                	   critical             cooling-maps       map0                     0                          gpu-thermal         I           _          m         trips      gpu-alert           } 8                   passive                   gpu-crit            } _                	   critical             cooling-maps       map0                                      vpu-thermal         I           _          m         trips      vpu-crit            } _                	   critical                   timer            2arm,armv8-timer       0  >                                 
                               soc@0            2fsl,imx8mq-soc simple-bus                                                >           @       @                         soc_unique_id      etm@28440000          "   2arm,coresight-etm4x arm,primecell            (D                              g      	  apb_pclk       out-ports      port       endpoint            .                              etm@28540000          "   2arm,coresight-etm4x arm,primecell            (T                              g      	  apb_pclk       out-ports      port       endpoint            .                              etm@28640000          "   2arm,coresight-etm4x arm,primecell            (d                              g      	  apb_pclk       out-ports      port       endpoint            .                              etm@28740000          "   2arm,coresight-etm4x arm,primecell            (t                              g      	  apb_pclk       out-ports      port       endpoint            .               	               funnel@28c03000       +   2arm,coresight-dynamic-funnel arm,primecell           (0                  g      	  apb_pclk       in-ports                                 port@0                  endpoint            .               
         port@1                 endpoint                out-ports      port       endpoint            .                              etf@28c04000              2arm,coresight-tmc arm,primecell          (@                  g      	  apb_pclk       in-ports       port       endpoint            .                           out-ports      port       endpoint            .                              etr@28c06000              2arm,coresight-tmc arm,primecell          (`                  g      	  apb_pclk       in-ports       port       endpoint            .                              bus@30000000             2fsl,aips-bus simple-bus          0    @                                   0   0    @     sai@30010000                         2fsl,imx8mq-sai           0             >       _                                              bus mclk1 mclk2 mclk3                               	               rx tx         	  disabled          sai@30030000                         2fsl,imx8mq-sai           0             >       Z                                              bus mclk1 mclk2 mclk3                                              rx tx         	  disabled          sai@30040000                         2fsl,imx8mq-sai           0             >       Z                                              bus mclk1 mclk2 mclk3                                              rx tx         	  disabled          sai@30050000                         2fsl,imx8mq-sai           0             >       d                                              bus mclk1 mclk2 mclk3                                               rx tx         	  disabled          gpio@30200000            2fsl,imx8mq-gpio fsl,imx35-gpio           0              >       @          A                                             $        9           J           
               V      gpio@30210000            2fsl,imx8mq-gpio fsl,imx35-gpio           0!             >       B          C                                             $        9           J           (               Q      gpio@30220000            2fsl,imx8mq-gpio fsl,imx35-gpio           0"             >       D          E                                             $        9           J           =               2      gpio@30230000            2fsl,imx8mq-gpio fsl,imx35-gpio           0#             >       F          G                                             $        9           J           W                b      gpio@30240000            2fsl,imx8mq-gpio fsl,imx35-gpio           0$             >       H          I                                             $        9           J           w         tmu@30260000             2fsl,imx8mq-tmu           0&             >       1                          V        d    
 &  H  a     @  r       #      )      /      5      =      C      K      Q      W   	   _   
   g      o           #     +     3     ;     C     K     U     ]  	   g  
   p           #     -     7     A     K     W     c     o           !     -     9     E     S     _     q                             watchdog@30280000            2fsl,imx8mq-wdt fsl,imx21-wdt             0(             >       N                         okay            default            !               watchdog@30290000            2fsl,imx8mq-wdt fsl,imx21-wdt             0)             >       O                       	  disabled          watchdog@302a0000            2fsl,imx8mq-wdt fsl,imx21-wdt             0*             >       
                       	  disabled          dma-controller@302c0000          2fsl,imx8mq-sdma fsl,imx7d-sdma           0,             >       g                               ipg ahb                    imx/sdma/sdma-imx7d.bin                   lcd-controller@30320000       "   2fsl,imx8mq-lcdif fsl,imx6sx-lcdif            02             >                                            pix axi disp_axi                   !      $            #                    #      %                    #g      	  disabled       port       endpoint            .   "            8            pinctrl@30330000             2fsl,imx8mq-iomuxc            03                     btgpiosgrp        H  )  L                  ,                    p                          3      ecspi2grp         `  )    l                   p                   t                   x                           .      fec1grp      h  )   h                    l              $   p                    t                    x                    |                                                                                                                                                                                     L                             T      i2c1grp       0  )    |            @                  @              9      i2c2grp       0  )                @                   @              :      i2c3grp       0  )  $              @    (              @              ;      i2c4grp       0  )  ,              @    0              @              <      ledsgrp         )                                        4                  8                `                  \                            a      qspi0grp            )     \                   `                  t                  x                  |                                            R      regusdhc2grp            )     T              A            c      uart1grp          0  )  4               I  8                 I            /      uart2grp          `  )  <               I  @                 I  L                I  P             I            1      uart3grp          0  )  H                 I  D              I            0      usdhc1grp           )                                                                                                                           (                            E      usdhc1-100mhzgrp            )                                                                                                                           (                            F      usdhc1-200mhzgrp            )                                                                                                                           (                            G      usdhc2gpiogrp           )     8              A            L      usdhc2grp           )     <                    @                    D                    H                    L                    P                  8                            K      usdhc2-100mhzgrp            )     <                    @                    D                    H                    L                    P                  8                            M      usdhc2-200mhzgrp            )     <                    @                    D                    H                    L                    P                  8                            N      wdoggrp         )   0                            !      wifiregongrp            )     h            pY            d         syscon@30340000       (   2fsl,imx8mq-iomuxc-gpr syscon simple-mfd          04                 >   mux-controller        	   2mmio-mux            2           E   4               4         efuse@30350000           2fsl,imx8mq-ocotp syscon          05                                               soc-uid@4                                    speed-grade@10                                   mac-address@90                             S         clock-controller@30360000            2fsl,imx8mq-anatop            06             >       1                     snvs@30370000         #   2fsl,sec-v4.0-mon syscon simple-mfd           07                 #   snvs-rtc-lp          2fsl,sec-v4.0-mon-rtc-lp         S   #        Z   4        >                                       	  snvs-rtc          snvs-powerkey            2fsl,sec-v4.0-pwrkey         S   #        >                               snvs-pwrkey         a   t         o      	  disabled             clock-controller@30380000            2fsl,imx8mq-ccm           08             >       U          V                          $   %   &   '   (   )   *      9  ckil osc_25m osc_27m clk_ext1 clk_ext2 clk_ext3 clk_ext4          @        X     !      q      u                                         /             .  +        ,        N                V                              reset-controller@30390000            2fsl,imx8mq-src syscon            09             >       Y           }               7      gpc@303a0000             2fsl,imx8mq-gpc           0:             >       W                         $        9                  pgc                              power-domain@0                                       5      power-domain@1                                     +            `      power-domain@2                                      [      power-domain@3                                      ]      power-domain@4                                power-domain@5                                               f      o      p           ,            Y      power-domain@6                                                                   x      y      j                                 N              #F  /                -            _      power-domain@7                                power-domain@8                                      =      power-domain@9                          	            B      power-domain@a                          
            +               bus@30400000             2fsl,aips-bus simple-bus          0@   @                                   0@  0@   @     pwm@30660000             2fsl,imx8mq-pwm fsl,imx27-pwm             0f             >       Q                               ipg per                  	  disabled          pwm@30670000             2fsl,imx8mq-pwm fsl,imx27-pwm             0g             >       R                               ipg per                  	  disabled          pwm@30680000             2fsl,imx8mq-pwm fsl,imx27-pwm             0h             >       S                               ipg per                  	  disabled          pwm@30690000             2fsl,imx8mq-pwm fsl,imx27-pwm             0i             >       T                               ipg per                  	  disabled          timer@306a0000           2nxp,sysctr-timer             0j             >       /              %        per          bus@30800000             2fsl,aips-bus simple-bus          0   @                                   0  0   @              spdif@30810000           2fsl,imx35-spdif          0             >                P                                                                          :  core rxtx0 rxtx1 rxtx2 rxtx3 rxtx4 rxtx5 rxtx6 rxtx7 spba                               	               rx tx         	  disabled          spi@30820000                                    !   2fsl,imx8mq-ecspi fsl,imx51-ecspi             0             >                                      ipg per                                           rx tx         	  disabled          spi@30830000                                    !   2fsl,imx8mq-ecspi fsl,imx51-ecspi             0             >                                       ipg per                                          rx tx           okay            default            .      spi@30840000                                    !   2fsl,imx8mq-ecspi fsl,imx51-ecspi             0             >       !                               ipg per                                          rx tx         	  disabled          serial@30860000          2fsl,imx8mq-uart fsl,imx6q-uart           0             >                                      ipg per                                            rx tx           okay            default            /                                  serial@30880000          2fsl,imx8mq-uart fsl,imx6q-uart           0             >                                      ipg per                                            rx tx           okay            default            0                            G      serial@30890000          2fsl,imx8mq-uart fsl,imx6q-uart           0             >                                      ipg per                                            rx tx           okay            default            1                            G            bluetooth            2brcm,bcm43438-bt               2                  2                  2               default            3         spdif@308a0000           2fsl,imx35-spdif          0             >                P                                                                          :  core rxtx0 rxtx1 rxtx2 rxtx3 rxtx4 rxtx5 rxtx6 rxtx7 spba                                              rx tx         	  disabled          sai@308b0000                         2fsl,imx8mq-sai           0             >       `                                              bus mclk1 mclk2 mclk3                  
                            rx tx         	  disabled          sai@308c0000                         2fsl,imx8mq-sai           0             >       2                                              bus mclk1 mclk2 mclk3                                              rx tx         	  disabled          crypto@30900000          2fsl,sec-v4.0                                      0                 0             >       [                 t            	  aclk ipg       jr@1000          2fsl,sec-v4.0-job-ring                          >       i         	  disabled          jr@2000          2fsl,sec-v4.0-job-ring                           >       j         jr@3000          2fsl,sec-v4.0-job-ring              0            >       r            dsi@30a00000             2fsl,imx8mq-nwl-dsi           0                                     (                                      !  core rx_esc tx_esc phy_ref lcdif                                            G      L        Ĵ ր1-         >       "           	   4               5           6        dphy             %   7      7      7      7           ,byte dpi esc pclk         	  disabled       ports                                port@0                                            endpoint@0                       .   8            "         port@1                 endpoint                   dphy@30a00300            2fsl,imx8mq-mipi-dphy             0                          phy_ref                !      $            #                    #      %                n6 #g        8               5      	  disabled                6      i2c@30a20000             2fsl,imx8mq-i2c fsl,imx21-i2c             0             >       #                                                   okay                      default            9   pmic@8           2fsl,pfuze100                   regulators     sw1ab           C         [ 8            ,      sw1c            C         [ 8            -      sw2         C 5         [ 2Z         s      sw3ab           C         [ "         s      sw4         C 5         [ 2Z         s      swbst           C LK@        [ N0      vsnvs           C B@        [ -         s      vrefddr          s      vgen1           C 5         [       vgen2           C 5         [          s      vgen3           C w@        [ 2Z         s      vgen4           C w@        [ 2Z         s      vgen5           C w@        [ 2Z         s      vgen6           C w@        [ 2Z               i2c@30a30000             2fsl,imx8mq-i2c fsl,imx21-i2c             0             >       $                                                   okay                      default            :   eeprom@50            2atmel,24c256                P         i2c@30a40000             2fsl,imx8mq-i2c fsl,imx21-i2c             0             >       %                                                   okay                      default            ;      i2c@30a50000             2fsl,imx8mq-i2c fsl,imx21-i2c             0             >       &                                                   okay                      default            <      serial@30a60000          2fsl,imx8mq-uart fsl,imx6q-uart           0             >                                      ipg per                                            rx tx         	  disabled          csi@30a70000             2fsl,imx8mq-mipi-csi2             0                                       core esc ui                                   ր-@              L      W      N           =        %   7   &   7   '   7   (           >              ?      ?           dram          	  disabled       ports                                port@1                 endpoint            .   @            A               csi@30a90000             2fsl,imx8mq-csi           0             >       *                         mclk          	  disabled       port       endpoint            .   A            @            csi@30b60000             2fsl,imx8mq-mipi-csi2             0                                       core esc ui                                   ր-@              L      W      N           B        %   7   )   7   *   7   +           >              ?      ?           dram          	  disabled       ports                                port@1                 endpoint            .   C            D               csi@30b80000             2fsl,imx8mq-csi           0             >       +                         mclk          	  disabled       port       endpoint            .   D            C            mailbox@30aa0000             2fsl,imx8mq-mu fsl,imx6sx-mu          0             >       X                                  mmc@30b40000          !   2fsl,imx8mq-usdhc fsl,imx7d-usdhc             0             >                              i              ipg ahb per                                          okay                                    "  default state_100mhz state_200mhz              E           F           G           H           I        !   J         ,         :         @   wifi@1                       2brcm,bcm4329-fmac            mmc@30b50000          !   2fsl,imx8mq-usdhc fsl,imx7d-usdhc             0             >                              i              ipg ahb per                                          okay          "  default state_100mhz state_200mhz              K   L           M   L           N   L           O           P        G   Q               P         @         X      spi@30bb0000                                       2fsl,imx8mq-qspi fsl,imx7d-qspi           0                   cQuadSPI QuadSPI-memory          >       k                               qspi_en qspi            okay            default            R   flash@0          2jedec,spi-nor           m                       dma-controller@30bd0000          2fsl,imx8mq-sdma fsl,imx7d-sdma           0             >                              t        ipg ahb                    imx/sdma/sdma-imx7d.bin                   ethernet@30be0000            2fsl,imx8mq-fec fsl,imx6sx-fec            0           0  >       v          w          x          y         (                                      "  ipg ahb ptp enet_clk_ref enet_out                  h                                 L      P      Q      O             sY@                                     S        mac-address            >              okay            default            T      	  rgmii-id               U            mdio                                 ethernet-phy@3           2ethernet-phy-ieee802.3-c22                         V   	               U               interconnect@32700000            2fsl,imx8mq-noc fsl,imx8m-noc             2p                   q           W                      X            ?   opp-table            2operating-points-v2             X   opp-133000000               U      opp-400000000               ׄ       opp-800000000               /             bus@32c00000             2fsl,aips-bus simple-bus          2   @                                   2  2   @     interrupt-controller@32e2d000         $   2fsl,imx8m-irqsteer fsl,imx-irqsteer          2            >                                ipg                        @         $        9            gpu@38000000             2vivante,gc           8              >                               f      o      p        core shader bus reg                  (        a      d      o      p            (                                        / / / /                Y                  usb@38100000             2fsl,imx8mq-dwc3 snps,dwc3            8                                       bus_early ref suspend                 n                    V      H        e          >       (              Z   Z        usb2-phy usb3-phy              [               	  disabled          usb-phy@381f0040             2fsl,imx8mq-usb-phy           8 @   @                      phy                             H                 8          	  disabled                Z      usb@38200000             2fsl,imx8mq-dwc3 snps,dwc3            8                                        bus_early ref suspend                 n                    V      H        e          >       )              \   \        usb2-phy usb3-phy              ]                 okay            7host          usb-phy@382f0040             2fsl,imx8mq-usb-phy           8/ @   @                      phy                             H                 8            okay                \      video-codec@38300000             2nxp,imx8mq-vpu-g1            80             >                                   ^          video-codec@38310000             2nxp,imx8mq-vpu-g2            81             >                                   ^         blk-ctrl@38320000            2fsl,imx8mq-vpu-blk-ctrl          82                _   _   _      
  ?bus g1 g2                               g1 g2                          ^      pcie@33800000            2fsl,imx8mq-pcie          3   @               cdbi config                                    pci         R             0                                                 \           >       z           fmsi         9           v                                                }                            |                            {                            z                                               }      }      ~         pcie pcie_bus pcie_phy pcie_aux            `        %   7      7      7           ,pciephy apps turnoff                  |      }      ~              T      P      G        沀        	  disabled          pcie@33c00000            2fsl,imx8mq-pcie          3   @  '             cdbi config                                    pci         R             0             '                                      \           >       J           fmsi         9           v                                                M                            L                            K                            J                                                                   pcie pcie_bus pcie_phy pcie_aux            `        %   7   "   7   $   7   %        ,pciephy apps turnoff                                            T      P      G        沀        	  disabled          pcie-ep@33c00000             2fsl,imx8mq-pcie-ep           3   @                 cdbi addr_space          \           >       P           fdma                                                      pcie pcie_bus pcie_phy pcie_aux            `        %   7   "   7   $   7   %        ,pciephy apps turnoff                                            T      P      G        沀                              	  disabled          interrupt-controller@38800000            2arm,gic-v3        (   8     8     1       1      1              9            $        >      	                                  memory-controller@3d400000           2fsl,imx8mq-ddrc fsl,imx8m-ddrc           =@   @          core pll alt apb                               v      w      	  disabled                W      ddr-pmu@3d800000          %   2fsl,imx8mq-ddr-pmu fsl,imx8m-ddr-pmu             =   @                       >       b            chosen        $  /soc@0/bus@30800000/serial@30860000       memory@40000000          memory               @                leds          
   2gpio-leds           default            a   user-led1           green:user1            b             
  heartbeat         user-led2           green:user2            b               none          user-led3           green:user3            b               mmc1            off       user-led4           green:user4            b                        none          wlan-active-led         yellow:wlan            b               phy0tx          off       bt-active-led           blue:bt            b                hci0-power          off          reg-usdhc1-vmmc          2regulator-fixed         VDD_3V3         C 2Z        [ 2Z         s            H      reg-usdhc1-vqmmc             2regulator-fixed         VCC_1V8_EXT         C w@        [ w@         s            I      reg-usdhc2-vmmc          2regulator-fixed         VSD_3V3         C 2Z        [ 2Z         s        default            c        .   Q                3            O      reg-usdhc2-vqmmc             2regulator-fixed       	  NVCC_SD2            C 2Z        [ 2Z         s            P      sdio-pwrseq          2mmc-pwrseq-simple           default            d           2                   J         	interrupt-parent #address-cells #size-cells model compatible ethernet0 gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 mmc0 mmc1 serial0 serial1 serial2 serial3 spi0 spi1 spi2 #clock-cells clock-frequency clock-output-names phandle device_type reg clock-latency clocks enable-method i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache operating-points-v2 #cooling-cells nvmem-cells nvmem-cell-names cache-level cache-unified opp-shared opp-hz opp-microvolt opp-supported-hw clock-latency-ns opp-suspend remote-endpoint interrupts polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device arm,no-tick-in-suspend ranges dma-ranges cpu clock-names #sound-dai-cells dmas dma-names status gpio-controller #gpio-cells interrupt-controller #interrupt-cells gpio-ranges little-endian fsl,tmu-range fsl,tmu-calibration #thermal-sensor-cells pinctrl-names pinctrl-0 fsl,ext-reset-output #dma-cells fsl,sdma-ram-script-name assigned-clocks assigned-clock-parents assigned-clock-rates fsl,pins #mux-control-cells mux-reg-masks regmap offset linux,keycode wakeup-source #reset-cells #power-domain-cells power-domains power-supply #pwm-cells uart-has-rtscts device-wakeup-gpios host-wakeup-gpios shutdown-gpios mux-controls phys phy-names resets reset-names #phy-cells regulator-min-microvolt regulator-max-microvolt regulator-always-on fsl,mipi-phy-gpr interconnects interconnect-names #mbox-cells fsl,tuning-start-tap fsl,tuning-step bus-width pinctrl-1 pinctrl-2 vmmc-supply vqmmc-supply mmc-pwrseq non-removable no-sd no-mmc cd-gpios no-sdio disable-wp reg-names spi-max-frequency fsl,num-tx-queues fsl,num-rx-queues fsl,stop-mode phy-mode phy-handle fsl,magic-packet reset-gpios fsl,ddrc #interconnect-cells fsl,channel fsl,num-irqs snps,parkmode-disable-ss-quirk dr_mode power-domain-names bus-range num-lanes interrupt-names interrupt-map-mask interrupt-map fsl,max-link-speed linux,pci-domain num-ib-windows num-ob-windows stdout-path label linux,default-trigger default-state panic-indicator regulator-name gpio enable-active-high 