  y   8  ؜   (              d                                                                   7   ,Toradex Colibri iMX8QXP on Colibri Evaluation Board V3        @   2toradex,colibri-imx8x-eval-v3 toradex,colibri-imx8x fsl,imx8qxp    aliases           =/bus@5b000000/ethernet@5b040000           G/bus@5b000000/ethernet@5b050000          Q/bus@5d000000/gpio@5d080000          W/bus@5d000000/gpio@5d090000          ]/bus@5d000000/gpio@5d0a0000          c/bus@5d000000/gpio@5d0b0000          i/bus@5d000000/gpio@5d0c0000          o/bus@5d000000/gpio@5d0d0000          u/bus@5d000000/gpio@5d0e0000          {/bus@5d000000/gpio@5d0f0000          /bus@5a000000/i2c@5a800000           /bus@5a000000/i2c@5a810000           /bus@5a000000/i2c@5a820000           /bus@5a000000/i2c@5a830000           /bus@5b000000/mmc@5b010000           /bus@5b000000/mmc@5b020000           /bus@5b000000/mmc@5b030000           /bus@5d000000/mailbox@5d1b0000           /bus@5d000000/mailbox@5d1c0000           /bus@5d000000/mailbox@5d1d0000           /bus@5d000000/mailbox@5d1e0000           /bus@5d000000/mailbox@5d1f0000           /bus@5a000000/serial@5a060000            /bus@5a000000/serial@5a070000            /bus@5a000000/serial@5a080000            /bus@5a000000/serial@5a090000             /vpu@2c000000/vpu-core@2d080000           /vpu@2c000000/vpu-core@2d090000       "   /bus@5a000000/i2c@5a810000/rtc@68            /system-controller/rtc        cpus                                 cpu@0            cpu          2arm,cortex-a35                          psci                       !   @        3           @           M   @        _           l           }                                               cpu@1            cpu          2arm,cortex-a35                         psci                       !   @        3           @           M   @        _           l           }                                               cpu@2            cpu          2arm,cortex-a35                         psci                       !   @        3           @           M   @        _           l           }                                               cpu@3            cpu          2arm,cortex-a35                         psci                       !   @        3           @           M   @        _           l           }                                               l2-cache0            2cache                                          #   @        5                       opp-table            2operating-points-v2                        opp-900000000               5          B@         I      opp-1200000000              G                   I                  interrupt-controller@51a00000            2arm,gic-v3               Q             Q                                     ,      	                    reserved-memory                                   7   decoder-boot@84000000                                  >                 encoder-boot@86000000                                   >                 decoder-rpc@92000000                                   >                 dsp@92400000                @                  >      	  Edisabled          encoder-rpc@94400000                @       p           >                    pmu          2arm,cortex-a35-pmu          ,               psci             2arm,psci-1.0            smc       system-controller            2fsl,imx-scu         Ltx0 rx0 gip3          $  W                                 power-controller             2fsl,imx8qxp-scu-pd fsl,scu-pd           ^                    clock-controller             2fsl,imx8qxp-clk fsl,scu-clk         r                    pinctrl          2fsl,imx8qxp-iomuxc          default                     	              ad7879intgrp                     !           c      adc0grp       0     d       `   c       `   h       `   g       `           i      atmeladaptergrp            N      !   M     !      atmelconnectorgrp                   !         !      canintgrp                    @           L      csictlgrp                                     csimclkgrp                   A      extio0grp              1     @                 fec1grp       x     5          4          &       a   %     a   '       a   (       a   -       a   .       a   /       a   0      a           }      fec1slpgrp        x     5     A   4     A   &      A   %      A   '      A   (      A   -      A   .      A   /      A   0      A           ~      flexcan0grp            j       !   i       !      flexcan1grp            l       !   k       !      flexcan2grp            n       !   m       !      gpioblongrp                  `      gpiohpdgrp             z             gpiokeysgrp               p A                 hog0grp                  a             S                 a   ,                a             T                 a             U                 a   R                 a                                                               X                                            hog1grp                                    hog2grp                         hogscfwgrp                          i2c0grp                 !        !           [      i2c0mipilvds0grp               t          u             i2c0mipilvds1grp               x          y             i2c1grp            v     !   w     !           e      lcdifgrp         ,     L      `   H      `   K      `   J      @         @   7      `         `   8      `   9      `   :      `   ;      `   <      `   =      `   >      `   ?      `   @      `   A      `   B      `   C      `   E      `   F      `   G      `   I      `   )      `   P      `      lpspi2grp         0     Y      !   Z      @   [      @   \      @           I      lpspi2cs2grp               *      !           	      lpuart0grp        0     o          p          i         j                 P      lpuart2grp             r          q                  S      lpuart3grp             m         n                 U      lpuart3ctrlgrp        H     {          V          W                                                V      pciebgrp          $          a        a          `      pwmagrp                   a   `      `           X      pwmbgrp            M      `                 pwmcgrp            N      `                 pwmdgrp                   a   O      `                 sai0grp       0     ^     @   a     @   ]     @   _     @           )      sgtl5000grp                  A      sgtl5000usbclkgrp              e      !           \      usb3503agrp                  a           ^      usbcdetgrp             3     @                 usbh1reggrp                 @                 usdhc1grp              	      A   
       !          !          !          !          !          !          !          !          !          A          !           q      usdhc1-100mhzgrp               	      A   
       !          !          !          !          !          !          !          !          !          A          !           r      usdhc1-200mhzgrp               	      A   
       !          !          !          !          !          !          !          !          !          A          !           s      usdhc2gpiogrp                   !           v      usdhc2gpioslpgrp                     `           z      usdhc2grp         T           A          !           !   !       !   "       !   #       !          !           u      usdhc2-100mhzgrp          T           A          !           !   !       !   "       !   #       !          !           w      usdhc2-200mhzgrp          T           A          !           !   !       !   "       !   #       !          !           x      usdhc2slpgrp          T           `         `          `   !      `   "      `   #      `          !           y      wifigrp                            ocotp            2fsl,imx8qxp-scu-ocotp                                  keys          "   2fsl,imx8qxp-sc-key fsl,imx-sc-key              t      	  Edisabled          rtc          2fsl,imx8qxp-sc-rtc        watchdog          "   2fsl,imx8qxp-sc-wdt fsl,imx-sc-wdt              <      thermal-sensor        *   2fsl,imx8qxp-sc-thermal fsl,imx-sc-thermal                         
         timer            2arm,armv8-timer       0  ,                                 
         clock-dummy          2fixed-clock         r                      
  clk_dummy              #      clock-xtal32k            2fixed-clock         r                       xtal_32KHz        clock-xtal24m            2fixed-clock         r            n6         xtal_24MHz        thermal-zones      cpu0-thermal                       
             
  c   trips      trip0           ( _        4           passive                  trip1           ( (        4        	   critical             cooling-maps       map0            ?         0  D                        pmic-thermal                       
             
     trips      trip0           (         4           passive                  trip1           ( H        4        	   critical             cooling-maps       map0            ?         0  D                           clock-img-ipg            2fixed-clock         r                     img_ipg_clk                  bus@58000000             2simple-bus                                   7X       X         jpegdec@58400000            X@             ,      5           }                     S                     c          x                   2nxp,imx8qxp-jpgdec          Eokay          jpegenc@58450000            XE             ,      1           }                     S                     c          x                   2nxp,imx8qxp-jpgenc          Eokay          clock-controller@585d0000            2fsl,imx8qxp-lpcg            X]             r           }                           0  img_jpeg_dec_lpcg_clk img_jpeg_dec_lpcg_ipg_clk         x                      clock-controller@585f0000            2fsl,imx8qxp-lpcg            X_             r           }                           0  img_jpeg_enc_lpcg_clk img_jpeg_enc_lpcg_ipg_clk         x                         vpu@2c000000                                     7,       ,                  ,                  x             Eokay             2nxp,imx8qxp-vpu    mailbox@2d000000             2fsl,imx6sx-mu           -              ,                            x             Eokay                     mailbox@2d020000             2fsl,imx6sx-mu           -             ,                            x             Eokay                     vpu-core@2d080000           -              2nxp,imx8q-vpu-decoder           x             Ltx0 tx1 rx        $  W                                       Eokay                        vpu-core@2d090000           -              2nxp,imx8q-vpu-encoder           x             Ltx0 tx1 rx        $  W                                       Eokay                           clock-cm40-ipg           2fixed-clock         r            )         cm40_ipg_clk                     bus@34000000             2simple-bus                                   74       4                      serial@37220000          2fsl,imx8qxp-lpuart          7"             ,              }                   	  ipg baud            S                cn6         x           	  Edisabled          i2c@37230000          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c         7#             ,   	           }                     per ipg         S                 cn6         x            	  Edisabled          intmux@37400000          2fsl,imx-intmux          7@                        `  ,                                                                                                            }           ipg         x     !      	  Edisabled                     clock-controller@37620000            2fsl,imx8qxp-lpcg            7b             r           }                                *  cm40_lpcg_uart_clk cm40_lpcg_uart_ipg_clk           x                      clock-controller@37630000            2fsl,imx8qxp-lpcg            7c             r           }                                 (  cm40_lpcg_i2c_clk cm40_lpcg_i2c_ipg_clk         x                          bus@53000000             2simple-bus                                   7S       S         gpu@53100000             2vivante,gc          S             ,       @           }                          core shader         S                          c)' 2        x               clock-audio-ipg          2fixed-clock         r            '         audio_ipg_clk              '      clock-ext-aud-mclk0          2fixed-clock         r                        ext_aud_mclk0              7      clock-ext-aud-mclk1          2fixed-clock         r                        ext_aud_mclk1              8      clock-esai0-rx           2fixed-clock         r                        esai0_rx_clk               9      clock-esai0-rx-hf            2fixed-clock         r                        esai0_rx_hf_clk            :      clock-esai0-tx           2fixed-clock         r                        esai0_tx_clk               ;      clock-esai0-tx-hf            2fixed-clock         r                        esai0_tx_hf_clk            <      clock-spdif0-rx          2fixed-clock         r                      
  spdif0_rx              =      clock-sai0-rx-bclk           2fixed-clock         r                        sai0_rx_bclk               >      clock-sai0-tx-bclk           2fixed-clock         r                        sai0_tx_bclk               ?      clock-sai1-rx-bclk           2fixed-clock         r                        sai1_rx_bclk               @      clock-sai1-tx-bclk           2fixed-clock         r                        sai1_tx_bclk               A      clock-sai2-rx-bclk           2fixed-clock         r                        sai2_rx_bclk               B      clock-sai3-rx-bclk           2fixed-clock         r                        sai3_rx_bclk               C      clock-sai4-rx-bclk           2fixed-clock         r                        sai4_rx_bclk               D      bus@59000000             2simple-bus                                   7Y       Y         asrc@59000000            2fsl,imx8qm-asrc         Y              ,      t         d  }                        !      "       "      #   #   #   #   #   #   #   #   #   #   #   #   #        mem ipg asrck_0 asrck_1 asrck_2 asrck_3 asrck_4 asrck_5 asrck_6 asrck_7 asrck_8 asrck_9 asrck_a asrck_b asrck_c asrck_d asrck_e asrck_f spba          `     $               $              $              $             $             $                  rxa rxb rxc txa txb txc           @                               x           	  Edisabled          esai@59010000            2fsl,imx8qm-esai         Y             ,                 }   %      %       %      #        core extal fsys spba                $             $                   rx tx           x           	  Edisabled          spdif@59020000           2fsl,imx8qm-spdif            Y             ,                        0  }   &      #   &       #   #   #   '   #   #   #      :  core rxtx0 rxtx1 rxtx2 rxtx3 rxtx4 rxtx5 rxtx6 rxtx7 spba               $             $   	               rx tx           x           	  Edisabled          sai@59040000             2fsl,imx8qm-sai          Y             ,      :           }   (      #   (       #   #        bus mclk0 mclk1 mclk2 mclk3         rx tx               $             $                   x     >        Eokay                        default            )                 sai@59050000             2fsl,imx8qm-sai          Y             ,      <           }   *      #   *       #   #        bus mclk0 mclk1 mclk2 mclk3         rx tx               $             $                   x     ?      	  Edisabled          sai@59060000             2fsl,imx8qm-sai          Y             ,      >           }   +      #   +       #   #        bus mclk0 mclk1 mclk2 mclk3         rx             $                  x     @      	  Edisabled          sai@59070000             2fsl,imx8qm-sai          Y             ,      C           }   ,      #   ,       #   #        bus mclk0 mclk1 mclk2 mclk3         rx             $                  x           	  Edisabled          dma-controller@591f0000          2fsl,imx8qm-edma         Y                                     \         ,      v         w         x         y         z         {                                                                   ;         ;         =         =         ?         D                                                                         x      @      A      B      C      D      E      F      G      H      I      J      K      L      M      N      O      P      Q      R      S      T      U      V      W           $      clock-controller@59400000            2fsl,imx8qxp-lpcg            Y@             r           }   '                   asrc0_lpcg_ipg_clk          x                      clock-controller@59410000            2fsl,imx8qxp-lpcg            YA             r           }   "      '                     (  esai0_lpcg_extal_clk esai0_lpcg_ipg_clk         x                %      clock-controller@59420000            2fsl,imx8qxp-lpcg            YB             r           }   "      '                     %  spdif0_lpcg_tx_clk spdif0_lpcg_gclkw            x                &      clock-controller@59440000            2fsl,imx8qxp-lpcg            YD             r           }   "      '                     !  sai0_lpcg_mclk sai0_lpcg_ipg_clk            x     >           (      clock-controller@59450000            2fsl,imx8qxp-lpcg            YE             r           }   "      '                     !  sai1_lpcg_mclk sai1_lpcg_ipg_clk            x     ?           *      clock-controller@59460000            2fsl,imx8qxp-lpcg            YF             r           }   "      '                     !  sai2_lpcg_mclk sai2_lpcg_ipg_clk            x     @           +      clock-controller@59470000            2fsl,imx8qxp-lpcg            YG             r           }   "      '                     !  sai3_lpcg_mclk sai3_lpcg_ipg_clk            x                ,      clock-controller@59590000            2fsl,imx8qxp-lpcg            YY             r           }   '                   dsp_ram_lpcg_ipg_clk            x           asrc@59800000            2fsl,imx8qm-asrc         Y             ,      |         d  }   -      -              !       "       "      #   #   #   #   #   #   #   #   #   #   #   #   #        mem ipg asrck_0 asrck_1 asrck_2 asrck_3 asrck_4 asrck_5 asrck_6 asrck_7 asrck_8 asrck_9 asrck_a asrck_b asrck_c asrck_d asrck_e asrck_f spba          `     .               .              .              .             .             .                  rxa rxb rxc txa txb txc           @                              x           	  Edisabled          sai@59820000             2fsl,imx8qm-sai          Y             ,      I           }   /      #   /       #   #        bus mclk0 mclk1 mclk2 mclk3             .             .   	                rx tx           x           	  Edisabled               2      sai@59830000             2fsl,imx8qm-sai          Y             ,      K           }   0      #   0       #   #        bus mclk0 mclk1 mclk2 mclk3            .   
                tx          x           	  Edisabled               3      amix@59840000            2fsl,imx8qm-audmix           Y             }   1            ipg         x             1   2   3      	  Edisabled          mqs@59850000             2fsl,imx8qm-mqs          Y             }   4      4          
  mclk core           x           	  Edisabled          dma-controller@599f0000          2fsl,imx8qm-edma         Y                                               ,      ~                                                                            J         J         L         X  x      l      m      n      o      p      q      r      s      t      u      v           .      clock-controller@59d00000            2fsl,imx8qxp-lpcg            Y             r           }     E                       aud_rec_clk0_lpcg_clk           x     E           5      clock-controller@59d10000            2fsl,imx8qxp-lpcg            Y             r           }                            aud_rec_clk1_lpcg_clk           x                6      clock-controller@59d20000            2fsl,imx8qxp-lpcg            Y             r           }     E                        aud_pll_div_clk0_lpcg_clk           x     E                  clock-controller@59d30000            2fsl,imx8qxp-lpcg            Y             r           }                             aud_pll_div_clk1_lpcg_clk           x                !      clock-controller@59d50000            2fsl,imx8qxp-lpcg            Y             r           }   "                       mclkout0_lpcg_clk           x                ]      clock-controller@59d60000            2fsl,imx8qxp-lpcg            Y             r           }   "                       mclkout1_lpcg_clk           x           acm@59e00000             2fsl,imx8qxp-acm         Y             r           x                         E                         >     ?     @                               X  }   5       6               !       7   8   9   :   ;   <   =   >   ?   @   A   B   C   D       aud_rec_clk0_lpcg_clk aud_rec_clk1_lpcg_clk aud_pll_div_clk0_lpcg_clk aud_pll_div_clk1_lpcg_clk ext_aud_mclk0 ext_aud_mclk1 esai0_rx_clk esai0_rx_hf_clk esai0_tx_clk esai0_tx_hf_clk spdif0_rx sai0_rx_bclk sai0_tx_bclk sai1_rx_bclk sai1_tx_bclk sai2_rx_bclk sai3_rx_bclk sai4_rx_bclk             "      clock-controller@59c00000            2fsl,imx8qxp-lpcg            Y             r           }   '                   asrc1_lpcg_ipg_clk          x                -      clock-controller@59c20000            2fsl,imx8qxp-lpcg            Y             r           }   "      '                     !  sai4_lpcg_mclk sai4_lpcg_ipg_clk            x                /      clock-controller@59c30000            2fsl,imx8qxp-lpcg            Y             r           }   "      '                     !  sai5_lpcg_mclk sai5_lpcg_ipg_clk            x                0      clock-controller@59c40000            2fsl,imx8qxp-lpcg            Y             r           }   '                    amix_lpcg_ipg_clk           x                1      clock-controller@59c50000            2fsl,imx8qxp-lpcg            Y             r           }   "      '                     !  mqs0_lpcg_mclk mqs0_lpcg_ipg_clk            x                4         clock-dma-ipg            2fixed-clock         r            '         dma_ipg_clk            Y      bus@5a000000             2simple-bus                                   7Z       Z         spi@5a000000             2fsl,imx7ulp-spi         Z                                        ,      P                        }   E       E           per ipg         S      5           c         x      5            F              F                   tx rx         	  Edisabled          spi@5a010000             2fsl,imx7ulp-spi         Z                                       ,      Q                        }   G       G           per ipg         S      6           c         x      6            F              F                  tx rx         	  Edisabled          spi@5a020000             2fsl,imx7ulp-spi         Z                                       ,      R                        }   H       H           per ipg         S      7           c         x      7            F              F                  tx rx           Eokay            default            I        6   J          can@0            2microchip,mcp2515                            K        ,                 L        default         }   M        ?          spi@5a030000             2fsl,imx7ulp-spi         Z                                       ,      S                        }   N       N           per ipg         S      8           c         x      8            F              F                  tx rx         	  Edisabled          serial@5a060000         Z             ,      Y           }   O      O          	  ipg baud            S      9           cĴ         x      9        rx tx               F             F   	                Eokay             2fsl,imx8qxp-lpuart          default            P      serial@5a070000         Z             ,      Z           }   Q      Q          	  ipg baud            S      :           cĴ         x      :        rx tx               F   
          F                 	  Edisabled             2fsl,imx8qxp-lpuart        serial@5a080000         Z             ,      [           }   R      R          	  ipg baud            S      ;           cĴ         x      ;        rx tx               F             F                   Eokay             2fsl,imx8qxp-lpuart          default            S      serial@5a090000         Z	             ,      \           }   T      T          	  ipg baud            S      <           cĴ         x      <        rx tx               F             F                   Eokay             2fsl,imx8qxp-lpuart          default            U   V      pwm@5a190000             2fsl,imx8qxp-pwm fsl,imx27-pwm           Z             ,                  }   W      W            ipg per         S                 cn6         Q           x              default            X        Eokay          dma-controller@5a1f0000          2fsl,imx8qm-edma         Z                                   ,                                                                                                                                                        x                                                                                              F      clock-controller@5a400000            2fsl,imx8qxp-lpcg            Z@             r           }      5      Y                        spi0_lpcg_clk spi0_lpcg_ipg_clk         x      5           E      clock-controller@5a410000            2fsl,imx8qxp-lpcg            ZA             r           }      6      Y                        spi1_lpcg_clk spi1_lpcg_ipg_clk         x      6           G      clock-controller@5a420000            2fsl,imx8qxp-lpcg            ZB             r           }      7      Y                        spi2_lpcg_clk spi2_lpcg_ipg_clk         x      7           H      clock-controller@5a430000            2fsl,imx8qxp-lpcg            ZC             r           }      8      Y                        spi3_lpcg_clk spi3_lpcg_ipg_clk         x      8           N      clock-controller@5a460000            2fsl,imx8qxp-lpcg            ZF             r           }      9      Y                     '  uart0_lpcg_baud_clk uart0_lpcg_ipg_clk          x      9           O      clock-controller@5a470000            2fsl,imx8qxp-lpcg            ZG             r           }      :      Y                     '  uart1_lpcg_baud_clk uart1_lpcg_ipg_clk          x      :           Q      clock-controller@5a480000            2fsl,imx8qxp-lpcg            ZH             r           }      ;      Y                     '  uart2_lpcg_baud_clk uart2_lpcg_ipg_clk          x      ;           R      clock-controller@5a490000            2fsl,imx8qxp-lpcg            ZI             r           }      <      Y                     '  uart3_lpcg_baud_clk uart3_lpcg_ipg_clk          x      <           T      clock-controller@5a590000            2fsl,imx8qxp-lpcg            ZY             r           }            Y                     (  adma_pwm_lpcg_clk adma_pwm_lpcg_ipg_clk         x                 W      i2c@5a800000            Z    @                                   ,                  }   Z       Z           per ipg         S      `           cn6         x      `        Eokay          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c                  default            [   \   usb-hub@8            2smsc,usb3803                     ,  S     E        E         E      ]            c.                default            ^        \   _              }   ]            refclk          i           x              K                 _            audio-codec@a            2fsl,sgtl5000               
                  ,  S     E        E         E      ]            c.                }   ]               `           a           b                 touchscreen@2c           2adi,ad7879-1            default            c           ,             K        ,                            x                              !           8           F         	  Edisabled          gpio@43          2fcs,fxl6408            C         ^        n         u  zWi-Fi_W_DISABLE Wi-Fi_WKUP_WLAN PWR_EN_+V3.3_WiFi_N PCIe_REF_CLK_EN USB_RESET_N USB_BYPASS_N Wi-Fi_PDn Wi-Fi_WKUP_BT               _         i2c@5a810000            Z    @                                   ,                  }   d       d           per ipg         S      a           cn6         x      a        Eokay          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c                  default            e   rtc@68        	   2st,m41t0               h         i2c@5a820000            Z    @                                   ,                  }   f       f           per ipg         S      b           cn6         x      b      	  Edisabled          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c       i2c@5a830000            Z    @                                   ,                  }   g       g           per ipg         S      c           cn6         x      c      	  Edisabled          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c       adc@5a880000             2nxp,imx8qxp-adc                    Z             ,                               }   h       h           per ipg         S      e           cn6         x      e        Eokay            default            i           a      can@5a8d0000             2fsl,imx8qm-flexcan          Z             ,                               }   j      j            ipg per         S      i           cbZ         x      i                              	  Edisabled          can@5a8e0000             2fsl,imx8qm-flexcan          Z             ,                               }   j      j            ipg per         S      i           cbZ         x      j                             	  Edisabled          can@5a8f0000             2fsl,imx8qm-flexcan          Z             ,                               }   j      j            ipg per         S      i           cbZ         x      k                             	  Edisabled          dma-controller@5a9f0000          2fsl,imx8qm-edma         Z   	                              `  ,                                                                              @  x                                              clock-controller@5ac00000            2fsl,imx8qxp-lpcg            Z             r           }      `      Y                        i2c0_lpcg_clk i2c0_lpcg_ipg_clk         x      `           Z      clock-controller@5ac10000            2fsl,imx8qxp-lpcg            Z             r           }      a      Y                        i2c1_lpcg_clk i2c1_lpcg_ipg_clk         x      a           d      clock-controller@5ac20000            2fsl,imx8qxp-lpcg            Z             r           }      b      Y                        i2c2_lpcg_clk i2c2_lpcg_ipg_clk         x      b           f      clock-controller@5ac30000            2fsl,imx8qxp-lpcg            Z             r           }      c      Y                        i2c3_lpcg_clk i2c3_lpcg_ipg_clk         x      c           g      clock-controller@5ac80000            2fsl,imx8qxp-lpcg            Z             r           }      e      Y                        adc0_lpcg_clk adc0_lpcg_ipg_clk         x      e           h      clock-controller@5acd0000            2fsl,imx8qxp-lpcg            Z             r           }      i      Y   Y                        5  can0_lpcg_pe_clk can0_lpcg_ipg_clk can0_lpcg_chi_clk            x      i           j         clock-conn-axi           2fixed-clock         r            CU        conn_axi_clk                     clock-conn-ahb           2fixed-clock         r            	!        conn_ahb_clk                     clock-conn-ipg           2fixed-clock         r                    conn_ipg_clk                     clock-conn-bch           2fixed-clock         r            ׄ         conn_bch_clk          bus@5b000000             2simple-bus                                   7[       [         usb@5b0d0000          -   2fsl,imx7ulp-usb fsl,imx6ul-usb fsl,imx27-usb            [                          ,                    k           l            }   m                                             x             Eokay                      !        6   n   n         =         I         [        g   o      usbmisc@5b0d0200            s         8   2fsl,imx7ulp-usbmisc fsl,imx7d-usbmisc fsl,imx6q-usbmisc         [               l      usbphy@5b100000          2fsl,imx7ulp-usbphy          [             }   m           x             Eokay               k      mmc@5b010000            ,                  [             }   p      p      p            ipg ahb per         x              Eokay          "   2fsl,imx8qxp-usdhc fsl,imx7d-usdhc                                               "  default state_100mhz state_200mhz              q           r           s      mmc@5b020000            ,                  [             }   t      t      t            ipg ahb per         x                                    Eokay          "   2fsl,imx8qxp-usdhc fsl,imx7d-usdhc                         K   	              b      (  default state_100mhz state_200mhz sleep            u   v           w   v           x   v           y   z                  	      mmc@5b030000            ,                  [             }   {      {      {            ipg ahb per         x            	  Edisabled          "   2fsl,imx8qxp-usdhc fsl,imx7d-usdhc         ethernet@5b040000           [           0  ,                                              }   |      |      |      |            ipg ahb enet_clk_ref ptp            S                          c沀sY@                   $           x              Eokay          .   2fsl,imx8qxp-fec fsl,imx8qm-fec fsl,imx6sx-fec           default sleep              }           ~        6rmii            ?            J   mdio                                 ethernet-phy@2           2ethernet-phy-ieee802.3-c22          [   d                                  ethernet@5b050000           [           0  ,                                             }                                 ipg ahb enet_clk_ref ptp            S                          c沀sY@                   $           x            	  Edisabled          .   2fsl,imx8qxp-fec fsl,imx8qm-fec fsl,imx6sx-fec         usb@5b110000             2fsl,imx8qm-usb3         [                                       7      (  }                                       lpm bus aclk ipg core           S                c沀        x             Eokay       usb@5b120000          
   2cdns,usb3           [     [     [             eotg xhci dev                       0  ,                                            ohost peripheral otg wakeup                     cdns3,usb3-phy                     Eokay            host             usb-phy@5b160000             2nxp,salvo-phy           [             }              salvo_phy_clk           x                         Eokay                     clock-controller@5b200000            2fsl,imx8qxp-lpcg            [              r           }                                       9  sdhc0_lpcg_per_clk sdhc0_lpcg_ipg_clk sdhc0_lpcg_ahb_clk            x                 p      clock-controller@5b210000            2fsl,imx8qxp-lpcg            [!             r           }                                       9  sdhc1_lpcg_per_clk sdhc1_lpcg_ipg_clk sdhc1_lpcg_ahb_clk            x                 t      clock-controller@5b220000            2fsl,imx8qxp-lpcg            ["             r           }                                       9  sdhc2_lpcg_per_clk sdhc2_lpcg_ipg_clk sdhc2_lpcg_ahb_clk            x                 {      clock-controller@5b230000            2fsl,imx8qxp-lpcg            [#             r         0  }                                                                       enet0_lpcg_timer_clk enet0_lpcg_txc_sampling_clk enet0_lpcg_ahb_clk enet0_lpcg_ref_50mhz_clk enet0_lpcg_ipg_clk enet0_lpcg_ipg_s_clk            x                 |      clock-controller@5b240000            2fsl,imx8qxp-lpcg            [$             r         0  }                                                                       enet1_lpcg_timer_clk enet1_lpcg_txc_sampling_clk enet1_lpcg_ahb_clk enet1_lpcg_rgmii_txc_clk enet1_lpcg_ipg_clk enet1_lpcg_ipg_s_clk            x                       clock-controller@5b270000            2fsl,imx8qxp-lpcg            ['             r           }                          "  usboh3_ahb_clk usboh3_phy_ipg_clk           x                m      clock-controller@5b280000            2fsl,imx8qxp-lpcg            [(             r                                    0  }                                       M  usb3_app_clk usb3_lpm_clk usb3_ipg_clk usb3_core_pclk usb3_phy_clk usb3_aclk            x                      clock-controller@5b290000            2fsl,imx8qxp-lpcg            [)             r            }     	        	                                    '  gpmi_bch gpmi_io gpmi_apb gpmi_bch_apb          x     	                 clock-controller@5b290004            2fsl,imx8qxp-lpcg            [)            r           }                      apbhdma_hclk            x     	                 dma-controller@5b810000       (   2fsl,imx8qxp-dma-apbh fsl,imx28-dma-apbh         [            0  ,                                                                  }               x     	                 nand-controller@5b812000             2fsl,imx8qxp-gpmi-nand           [      [@             egpmi-nand bch                                     ,                 obch          }                               '  gpmi_io gpmi_apb gpmi_bch gpmi_bch_apb                         rx-tx           x     	        S     	           c      	  Edisabled             bus@5c000000             2simple-bus                                   7\       \         ddr-pmu@5c020000             2fsl,imx8-ddr-pmu            \             ,                   clock-lsio-bus           2fixed-clock         r                     lsio_bus_clk                     bus@5d000000             2simple-bus                                    7]       ]                      pwm@5d000000             2fsl,imx27-pwm           ]              ipg per         }                    S                 cn6         Q           ,       ^           Eokay                       default       pwm@5d010000             2fsl,imx27-pwm           ]             ipg per         }                    S                 cn6         Q           ,       _           Eokay                       default       pwm@5d020000             2fsl,imx27-pwm           ]             ipg per         }                    S                 cn6         Q           ,       `           Eokay                       default       pwm@5d030000             2fsl,imx27-pwm           ]             ipg per         }                    S                 cn6         Q           ,       a         	  Edisabled          gpio@5d080000           ]             ,                   ^        n                               x                2fsl,imx8qxp-gpio fsl,imx35-gpio       P           8            E            K            P            R          z SODIMM_70 SODIMM_60 SODIMM_58 SODIMM_78 SODIMM_72 SODIMM_80 SODIMM_46 SODIMM_62 SODIMM_48 SODIMM_74 SODIMM_50 SODIMM_52 SODIMM_54 SODIMM_66 SODIMM_64 SODIMM_68   SODIMM_82 SODIMM_56 SODIMM_28 SODIMM_30  SODIMM_61 SODIMM_103    SODIMM_25 SODIMM_27 SODIMM_100        gpio@5d090000           ]	             ,                   ^        n                               x                2fsl,imx8qxp-gpio fsl,imx35-gpio       0            Y   	      	   c            t          zSODIMM_86 SODIMM_92 SODIMM_90 SODIMM_88    SODIMM_59  SODIMM_6 SODIMM_8   SODIMM_2 SODIMM_4 SODIMM_34 SODIMM_32 SODIMM_63 SODIMM_55 SODIMM_33 SODIMM_35 SODIMM_36 SODIMM_38 SODIMM_21 SODIMM_19 SODIMM_140 SODIMM_142 SODIMM_196 SODIMM_194 SODIMM_186 SODIMM_188 SODIMM_138               J      gpio@5d0a0000           ]
             ,                   ^        n                               x                2fsl,imx8qxp-gpio fsl,imx35-gpio       0            {            ~                       zSODIMM_23   SODIMM_144        gpio@5d0b0000           ]             ,                   ^        n                               x                2fsl,imx8qxp-gpio fsl,imx35-gpio       0                                               zSODIMM_96 SODIMM_75 SODIMM_37 SODIMM_29      SODIMM_43 SODIMM_45 SODIMM_69 SODIMM_71 SODIMM_73 SODIMM_77 SODIMM_89 SODIMM_93 SODIMM_95 SODIMM_99 SODIMM_105 SODIMM_107 SODIMM_98 SODIMM_102 SODIMM_104 SODIMM_106              K      gpio@5d0c0000           ]             ,                   ^        n                               x                2fsl,imx8qxp-gpio fsl,imx35-gpio                                            	                                                            %           z   SODIMM_129 SODIMM_133 SODIMM_127 SODIMM_131             SODIMM_44  SODIMM_76 SODIMM_31 SODIMM_47 SODIMM_190 SODIMM_192 SODIMM_49 SODIMM_51 SODIMM_53                  gpio@5d0d0000           ]             ,                   ^        n                               x                2fsl,imx8qxp-gpio fsl,imx35-gpio       0            (            ,         	   3         a  z SODIMM_57 SODIMM_65 SODIMM_85     SODIMM_135 SODIMM_137 UNUSABLE_SODIMM_180 UNUSABLE_SODIMM_184                     gpio@5d0e0000           ]             ,                   ^        n                               x                2fsl,imx8qxp-gpio fsl,imx35-gpio       gpio@5d0f0000           ]             ,                   ^        n                               x                2fsl,imx8qxp-gpio fsl,imx35-gpio       spi@5d120000                                       2nxp,imx8qxp-fspi            ]                   efspi_base fspi_mmap         ,       \           }                          fspi_en fspi            x            	  Edisabled          mailbox@5d1b0000            ]             ,                           	  Edisabled             2fsl,imx8qxp-mu fsl,imx6sx-mu          mailbox@5d1c0000            ]             ,                           -   2fsl,imx8-mu-scu fsl,imx8qxp-mu fsl,imx6sx-mu                     mailbox@5d1d0000            ]             ,                           	  Edisabled          -   2fsl,imx8-mu-scu fsl,imx8qxp-mu fsl,imx6sx-mu          mailbox@5d1e0000            ]             ,                           	  Edisabled          -   2fsl,imx8-mu-scu fsl,imx8qxp-mu fsl,imx6sx-mu          mailbox@5d1f0000            ]             ,                           	  Edisabled          -   2fsl,imx8-mu-scu fsl,imx8qxp-mu fsl,imx6sx-mu          mailbox@5d200000            ]              ,                             x            	  Edisabled             2fsl,imx8qxp-mu fsl,imx6sx-mu          mailbox@5d210000            ]!             ,                             x            	  Edisabled             2fsl,imx8qxp-mu fsl,imx6sx-mu          mailbox@5d280000            ](             ,                             x               2fsl,imx8qxp-mu fsl,imx6sx-mu          clock-controller@5d400000            2fsl,imx8qxp-lpcg            ]@             r         4  }                                                                     h  pwm0_lpcg_ipg_clk pwm0_lpcg_ipg_hf_clk pwm0_lpcg_ipg_s_clk pwm0_lpcg_ipg_slv_clk pwm0_lpcg_ipg_mstr_clk         x                       clock-controller@5d410000            2fsl,imx8qxp-lpcg            ]A             r         4  }                                                                     h  pwm1_lpcg_ipg_clk pwm1_lpcg_ipg_hf_clk pwm1_lpcg_ipg_s_clk pwm1_lpcg_ipg_slv_clk pwm1_lpcg_ipg_mstr_clk         x                       clock-controller@5d420000            2fsl,imx8qxp-lpcg            ]B             r         4  }                                                                     h  pwm2_lpcg_ipg_clk pwm2_lpcg_ipg_hf_clk pwm2_lpcg_ipg_s_clk pwm2_lpcg_ipg_slv_clk pwm2_lpcg_ipg_mstr_clk         x                       clock-controller@5d430000            2fsl,imx8qxp-lpcg            ]C             r         4  }                                                                     h  pwm3_lpcg_ipg_clk pwm3_lpcg_ipg_hf_clk pwm3_lpcg_ipg_s_clk pwm3_lpcg_ipg_slv_clk pwm3_lpcg_ipg_mstr_clk         x                       clock-controller@5d440000            2fsl,imx8qxp-lpcg            ]D             r         4  }                                                                     h  pwm4_lpcg_ipg_clk pwm4_lpcg_ipg_hf_clk pwm4_lpcg_ipg_s_clk pwm4_lpcg_ipg_slv_clk pwm4_lpcg_ipg_mstr_clk         x            clock-controller@5d450000            2fsl,imx8qxp-lpcg            ]E             r         4  }                                                                     h  pwm5_lpcg_ipg_clk pwm5_lpcg_ipg_hf_clk pwm5_lpcg_ipg_s_clk pwm5_lpcg_ipg_slv_clk pwm5_lpcg_ipg_mstr_clk         x            clock-controller@5d460000            2fsl,imx8qxp-lpcg            ]F             r         4  }                                                                     h  pwm6_lpcg_ipg_clk pwm6_lpcg_ipg_hf_clk pwm6_lpcg_ipg_s_clk pwm6_lpcg_ipg_slv_clk pwm6_lpcg_ipg_mstr_clk         x            clock-controller@5d470000            2fsl,imx8qxp-lpcg            ]G             r         4  }                                                                     h  pwm7_lpcg_ipg_clk pwm7_lpcg_ipg_hf_clk pwm7_lpcg_ipg_s_clk pwm7_lpcg_ipg_slv_clk pwm7_lpcg_ipg_mstr_clk         x               chosen          /bus@5a000000/serial@5a090000         gpio-keys         
   2gpio-keys           default                    Eokay       key-wakeup             
        9   K   
            Wake-Up                              usbc-det             2linux,extcon-usb-gpio           default                          	            Eokay               n      regulator-module-3v3             2regulator-fixed         
+V3.3            2Z        1 2Z           b      regulator-module-3v3-avdd            2regulator-fixed         1 2Z         2Z        
+V3.3_AVDD_AUDIO               `      regulator-module-vref-1v8            2regulator-fixed         1 w@         w@      	  
vref-1v8               a      regulator-usbh-vbus          2regulator-fixed         default                    I                  N        1 LK@         LK@      
  
usbh_vbus              o      sound-card           2simple-audio-card           b           i2s                    colibri-imx8x      simple-audio-card,codec         }   ]                                simple-audio-card,cpu                       clock-16mhz          2fixed-clock         r             $            M         	interrupt-parent #address-cells #size-cells model compatible ethernet0 ethernet1 gpio0 gpio1 gpio2 gpio3 gpio4 gpio5 gpio6 gpio7 i2c0 i2c1 i2c2 i2c3 mmc0 mmc1 mmc2 mu0 mu1 mu2 mu3 mu4 serial0 serial1 serial2 serial3 vpu-core0 vpu-core1 rtc0 rtc1 device_type reg enable-method i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache clocks operating-points-v2 #cooling-cells phandle cache-level cache-unified opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend #interrupt-cells interrupt-controller interrupts ranges no-map status mbox-names mboxes #power-domain-cells #clock-cells pinctrl-names pinctrl-0 fsl,pins linux,keycodes timeout-sec #thermal-sensor-cells clock-frequency clock-output-names polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device assigned-clocks assigned-clock-rates power-domains clock-indices #mbox-cells memory-region clock-names dmas dma-names fsl,asrc-rate fsl,asrc-width fsl,asrc-clk-map #sound-dai-cells #dma-cells dma-channels dma-channel-mask dais cs-gpios spi-max-frequency #pwm-cells bypass-gpios disabled-ports initial-mode intn-gpios reset-gpios VDDA-supply VDDD-supply VDDIO-supply touchscreen-max-pressure adi,resistance-plate-x adi,first-conversion-delay adi,acquisition-time adi,median-filter-size adi,averaging adi,conversion-interval gpio-controller #gpio-cells gpio-line-names #io-channel-cells vref-supply fsl,clk-source fsl,scu-index fsl,usbphy fsl,usbmisc ahb-burst-config tx-burst-size-dword rx-burst-size-dword adp-disable disable-over-current extcon hnp-disable power-active-high srp-disable vbus-supply #index-cells bus-width non-removable no-sd no-sdio pinctrl-1 pinctrl-2 fsl,tuning-start-tap fsl,tuning-step cd-gpios vmmc-supply pinctrl-3 disable-wp no-1-8-v fsl,num-tx-queues fsl,num-rx-queues phy-mode phy-handle fsl,magic-packet max-speed reg-names interrupt-names phys phy-names cdns,on-chip-buff-size dr_mode #phy-cells gpio-ranges stdout-path debounce-interval label linux,code wakeup-source id-gpios regulator-name regulator-min-microvolt regulator-max-microvolt gpio regulator-always-on simple-audio-card,bitclock-master simple-audio-card,format simple-audio-card,frame-master simple-audio-card,name sound-dai 