  :   8  5   (              5                             3    hisilicon,hi3798cv200-poplar hisilicon,hi3798cv200                                   +         #   7HiSilicon Poplar Development Board     psci              arm,psci-0.2             =smc       cpus                         +       cpu@0             arm,cortex-a53           Dcpu          P                 Tpsci             b            o   @                                    @                              cpu@1             arm,cortex-a53           Dcpu          P                Tpsci             b            o   @                                    @                              cpu@2             arm,cortex-a53           Dcpu          P                Tpsci             b            o   @                                    @                              cpu@3             arm,cortex-a53           Dcpu          P                Tpsci             b            o   @                                    @                                 l2-cache              cache                      d            q   @                                          interrupt-controller@f1001000             arm,gic-400       @   P                                 @              `                        	                                    	                  timer             arm,armv8-timer       0                                 
        soc@f0000000              simple-bus                       +                            clock-reset-controller@8a22000        ,    hisilicon,hi3798cv200-crg syscon simple-mfd          P             %           2                  reset-controller              ti,syscon-reset         2         8  ?                                                                   system-controller@8000000         %    hisilicon,hi3798cv200-sysctrl syscon             P              %           2                     peripheral-controller@8a20000         1    hisilicon,hi3798cv200-perictrl syscon simple-mfd             P                          +                       usb2_phy@120              hisilicon,hi3798cv200-usb2-phy           P              M      (        T                              +       phy@0            P            [            T                           phy@1            P           [            T         	         usb2_phy@124              hisilicon,hi3798cv200-usb2-phy           P  $           M      )        T                              +       phy@0            P            [            T         
         phy@850           hisilicon,hi3798cv200-combphy            P  P           [           M      *        T                f      *        v                  phy@858           hisilicon,hi3798cv200-combphy            P  X           [           M      !        T                f      !        v                                       pinconf@8a21000           pinconf-single           P                                                                 	                                                                                                   V            W                         "             %            &            )             .            6            @            G             H            N             O            P            F            X                      gpio-range                               emmc-pins-1       H  1                                                    $           E                        b                      }                                      emmc-pins-2         1   (           E                        b                      }                                      emmc-pins-3         1   ,           E                        b                      }                 0   0            	      emmc-pins-4         1   0           E                        b                      }                 0   0            
         serial@8b00000            arm,pl011 arm,primecell          P                     1           M                    uartclk apb_pclk            okay          serial@8b02000            arm,pl011 arm,primecell          P                     3           M                    uartclk apb_pclk            okay          	  LS-UART0          i2c@8b10000           hisilicon,hix5hd2-i2c            P                          +                    &                    M              okay            LS-I2C0       i2c@8b11000           hisilicon,hix5hd2-i2c            P                         +                    '                    M            	  disabled          i2c@8b12000           hisilicon,hix5hd2-i2c            P                          +                    (                    M              okay            LS-I2C1       i2c@8b13000           hisilicon,hix5hd2-i2c            P0                         +                    )                    M      	      	  disabled          i2c@8b14000           hisilicon,hix5hd2-i2c            P@                         +                    *                    M      
      	  disabled          spi@8b1a000           arm,pl022 arm,primecell          P                    -                                        M                    sspclk apb_pclk                      +            okay            LS-SPI0       mmc@9820000           snps,dw-mshc             P	                     "           M                    biu ciu         T                 reset           okay                              mmc@9830000           hisilicon,hi3798cv200-dw-mshc            P	                     #            M                                ciu biu ciu-sample ciu-drive            T                 reset           okay            default         "         	   
        ,                     7         I         V         e                 gpio@8b20000              arm,pl061 arm,primecell          P                     l            s                    	                                          M            	  apb_pclk          	  disabled          gpio@8b21000              arm,pl061 arm,primecell          P                    m            s                    	                  P                        	                                               M            	  apb_pclk            okay            GPIO-E     GPIO-F  GPIO-J         gpio@8b22000              arm,pl061 arm,primecell          P                     n            s                    	                                                      M            	  apb_pclk            okay          &  GPIO-H GPIO-I GPIO-L GPIO-G GPIO-K            gpio@8b23000              arm,pl061 arm,primecell          P0                    o            s                    	                  @                                    V            W           M            	  apb_pclk            okay                GPIO-C   GPIO-B       gpio@8b24000              arm,pl061 arm,primecell          P@                    p            s                    	                  0                        "            %           M            	  apb_pclk            okay                 GPIO-D                       gpio@8004000              arm,pl061 arm,primecell          P @                    q            s                    	                    M            	  apb_pclk            okay          "   USER-LED-1 USER-LED-2   GPIO-A                       gpio@8b26000              arm,pl061 arm,primecell          P`                    r            s                    	                               &             )           M            	  apb_pclk            okay               USER-LED-0                         gpio@8b27000              arm,pl061 arm,primecell          Pp                    s            s                    	                              .           M            	  apb_pclk          	  disabled                      gpio@8b28000              arm,pl061 arm,primecell          P                    t            s                    	                              6           M            	  apb_pclk          	  disabled          gpio@8b29000              arm,pl061 arm,primecell          P                    u            s                    	                              @         G           M            	  apb_pclk          	  disabled          gpio@8b2a000              arm,pl061 arm,primecell          P                    v            s                    	                  0            H            N            O           M            	  apb_pclk            okay                  USER-LED-3                      gpio@8b2b000              arm,pl061 arm,primecell          P                    w            s                    	                               P            F           M            	  apb_pclk          	  disabled          gpio@8b2c000              arm,pl061 arm,primecell          P                    x            s                    	                              X           M            	  apb_pclk          	  disabled          ethernet@9840000          2    hisilicon,hi3798cv200-gmac hisilicon,hisi-gmac-v2            P	     	0                   G           M                    mac_core mac_ifc             T                  
               mac_core mac_ifc phy          	  disabled          ethernet@9841000          2    hisilicon,hi3798cv200-gmac hisilicon,hisi-gmac-v2            P	    	0                   H           M                     mac_core mac_ifc             T         	                       mac_core mac_ifc phy            okay                         +                       rgmii             '  '  u0   phy@3            P                        ir@8001000            hisilicon,hix5hd2-ir             P                     /           M              okay            rc-hisi-poplar        pcie@9860000              hisilicon,hi3798cv200-pcie           P	                           control rc-dbi config                        +            Dpci                                 0                                                                    msi                                              0                                      M                                aux pipe sys bus          $  T                                soft sys bus            >              Cphy         okay            M                  Y         usb@9880000           generic-ohci             P	                     C           M      "      %      &        bus clk12 clk48         T                 bus         >           Cusb         okay          usb@9890000           generic-ehci             P	                     B           M      "      #      $        bus phy utmi          $  T                                   bus phy utmi            >           Cusb         okay             aliases         f/soc@f0000000/serial@8b00000            n/soc@f0000000/serial@8b02000          chosen          vserial0:115200n8          memory@0             Dmemory           P                     leds          
    gpio-leds      user-led0           green:user1                        
  heartbeat           off       user-led1           green:user2                          mmc0            off       user-led2           green:user3                          mmc1            off       user-led3           green:user4                          none                     off          regulator-pcie            regulator-fixed       
  3V3_PCIE0            2Z         2Z                                                	compatible interrupt-parent #address-cells #size-cells model method device_type reg enable-method d-cache-size d-cache-line-size d-cache-sets i-cache-size i-cache-line-size i-cache-sets next-level-cache cache-unified cache-level phandle interrupts #interrupt-cells interrupt-controller ranges #clock-cells #reset-cells ti,reset-bits clocks resets #phy-cells assigned-clocks assigned-clock-rates hisilicon,fixed-mode hisilicon,mode-select-bits pinctrl-single,register-width pinctrl-single,function-mask pinctrl-single,gpio-range #pinctrl-single,gpio-range-cells pinctrl-single,pins pinctrl-single,bias-pulldown pinctrl-single,bias-pullup pinctrl-single,slew-rate pinctrl-single,drive-strength clock-names status label clock-frequency num-cs cs-gpios reset-names bus-width cap-sd-highspeed pinctrl-names pinctrl-0 fifo-depth cap-mmc-highspeed mmc-ddr-1_8v mmc-hs200-1_8v non-removable gpio-controller #gpio-cells gpio-ranges gpio-line-names phy-handle phy-mode hisilicon,phy-reset-delays-us linux,rc-map-name reg-names bus-range num-lanes interrupt-names interrupt-map-mask interrupt-map phys phy-names reset-gpios vpcie-supply serial0 serial2 stdout-path linux,default-trigger default-state panic-indicator regulator-name regulator-min-microvolt regulator-max-microvolt gpio enable-active-high 