     8     (            i  P                             (    hisilicon,hi6220-hikey hisilicon,hi6220                                  +            7HiKey Development Board    psci              arm,psci-0.2             =smc       cpus                         +       cpu-map    cluster0       core0            D         core1            D         core2            D         core3            D            cluster1       core0            D         core1            D         core2            D         core3            D   	            idle-states          Hpsci       cpu-sleep             arm,idle-state            U         f            }                                           cluster-sleep             arm,idle-state            U         f           }                        
                                cpu@0             arm,cortex-a53           cpu                           psci                
                                                  #           2  7                  cpu@1             arm,cortex-a53           cpu                          psci                
                                                  #           2  7                  cpu@2             arm,cortex-a53           cpu                          psci                
                                                  #           2  7                  cpu@3             arm,cortex-a53           cpu                          psci                
                                                  #           2  7                  cpu@100           arm,cortex-a53           cpu                          psci                                                                  #           2  7                  cpu@101           arm,cortex-a53           cpu                         psci                                                                  #           2  7                  cpu@102           arm,cortex-a53           cpu                         psci                                                                  #           2  7                  cpu@103           arm,cortex-a53           cpu                         psci                                                                  #           2  7            	      l2-cache0             cache           L            X            
      l2-cache1             cache           L            X                     opp-table-0           operating-points-v2          f               opp00           q    e         x ހ                opp01           q             x ހ                opp02           q    +s@        x                 opp03           q    98p         x `                opp04           q    G         x KP                   interrupt-controller@f6801000             arm,gic-400       @                                 @             `                                                        	                    timer             arm,armv8-timer                   0                                
        soc           simple-bus                       +               sram@fff80000         !    hisilicon,hi6220-sramctrl syscon                                            ao_ctrl@f7800000              hisilicon,hi6220-aoctrl syscon                                                                 sys_ctrl@f7030000              hisilicon,hi6220-sysctrl syscon                                                                media_ctrl@f4410000       "    hisilicon,hi6220-mediactrl syscon                A                                           T      pm_ctrl@f7032000              hisilicon,hi6220-pmctrl syscon                                         acpu_sctrl@f6504000       #    hisilicon,hi6220-acpu-sctrl syscon               P@                               X      medianoc_ade@f4520000             syscon               R        @             S      stub_clock            hisilicon,hi6220-stub-clk                                 mbox-tx                                        serial@f8015000           arm,pl011 arm,primecell              P                       $                  $      $        uartclk apb_pclk          serial@f7111000           arm,pl011 arm,primecell                                     %                                uartclk apb_pclk            !default         /                 9            	        >rx tx           Hokay            O      )        _р   bluetooth             ti,wl1835-st            t                            
  ext_clock            serial@f7112000           arm,pl011 arm,primecell                                      &                                uartclk apb_pclk            !default         /              Hokay          	  LS-UART0          serial@f7113000           arm,pl011 arm,primecell              0                       '                                uartclk apb_pclk            !default         /              Hokay          	  LS-UART1          serial@f7114000           arm,pl011 arm,primecell              @                       (                                uartclk apb_pclk            !default         /            	  Hdisabled          dma@f7370000              hisilicon,k3-dma-1.0                 7                                                          T                                   hi6220_dma          Hokay                      timer@f8008000            arm,sp804 arm,primecell                                                                                      timer1 timer2 apb_pclk        rtc@f8003000              arm,pl031 arm,primecell               0                                         %      	  apb_pclk          rtc@f8004000              arm,pl031 arm,primecell               @                                         &      	  apb_pclk          pinmux@f7010000           pinctrl-single                       |                     +                                                      p         P              X              `              h              p              x                                                                                             !             +             0             8             J             z             ~                                                                  !default         /   !   "   #   $   %            ,   gpio-range          6                      boot-sel-pins           W                    !      emmc-pins         P  W                                                          $                ;      sd-pins       0  W                                                       @      sd-idle-pins          0  W                                                 C      sdio-pins         0  W  (      ,      0      4      8      <                H      sdio-idle-pins        0  W  (     ,     0     4     8     <               K      isp-pins            W   $       (       ,       0      4      8      <       @       D       H       L      P      T       X       \       `          hkadc-ssi-pins          W   h                "      codec-clk-pins          W   l                #      codec-pins           W   p      t       x       |          fm-pins          W                              bt-pins          W                                  pwm-in-pins         W                  $      bl-pwm-pins         W                  %      uart0-pins          W                    uart1-pins           W                                              uart2-pins           W                                              uart3-pins           W                                      uart4-pins           W                                      uart5-pins          W                i2c0-pins           W                          0      i2c1-pins           W                          2      i2c2-pins           W                          4      spi0-pins            W                                -         pinmux@f7010800           pinconf-single                                           +                                   !default         /   &   '   (   )   *   boot-sel-cfg-pins           W                k                                                  p            &      hkadc-ssi-cfg-pins          W   l            k                                                   p            '      emmc-clk-cfg-pins           W              k                                                   p            <      emmc-cfg-pins         H  W                                             $      (            k                                                 p            =      emmc-rst-cfg-pins           W  ,            k                                                  p            >      sd-clk-cfg-pins         W               k                                               0   p            A      sd-clk-cfg-idle-pins            W               k                                                  p            D      sd-cfg-pins       (  W                                            k                                                   p            B      sd-cfg-idle-pins          (  W                                            k                                                  p            E      sdio-clk-cfg-pins           W  4            k                                                   p            I      sdio-clk-cfg-idle-pins          W  4            k                                                  p            L      sdio-cfg-pins         (  W  8      <      @      D      H            k                                                 p            J      sdio-cfg-idle-pins        (  W  8      <      @      D      H            k                                                  p            M      isp-cfg-func1-pins        x  W   (       ,       0       4       8       <       @       D       H       L       P       X       \       `       d            k                                                   p      isp-cfg-idle1-pins          W   4       8            k                                                  p      isp-cfg-func2-pins          W   T            k                                                  p      codec-clk-cfg-pins          W   p            k                                                  p            (      codec-clk-cfg-idle-pins         W   p            k                                                   p      codec-cfg-func1-pins            W   t            k                                                  p      codec-cfg-func2-pins            W   x       |                   k                                                  p      codec-cfg-idle2-pins            W   x       |                   k                                                   p      fm-cfg-pins          W                                    k                                                  p      bt-cfg-pins          W                                    k                                                   p      bt-cfg-idle-pins             W                                    k                                                  p      pwm-in-cfg-pins         W               k                                                  p            )      bl-pwm-cfg-pins         W               k                                                  p            *      uart0-cfg-func1-pins            W               k                                                  p      uart0-cfg-func2-pins            W               k                                                  p      uart1-cfg-func1-pins            W                      k                                                  p                  uart1-cfg-func2-pins            W                      k                                                   p                  uart2-cfg-pins           W                                    k                                                   p                  uart3-cfg-pins           W                                k                                                  p                  uart4-cfg-pins           W                                k                                                  p                  uart5-cfg-pins          W                    k                                                  p      i2c0-cfg-pins           W                      k                                                   p            1      i2c1-cfg-pins           W                      k                                                   p            3      i2c2-cfg-pins           W                      k                                                   p            5      spi0-cfg-pins            W                                k                                                   p            .         pinmux@f8001800           pinconf-single                        x                     +                                   !default         /   +   rstout-n-cfg-pins           W                k                                                   p            +      pmu-peri-en-cfg-pins            W               k                                                   p      sysclk0-en-cfg-pins         W               k                                                   p      jtag-tdo-cfg-pins           W               k                                                   p      rf-reset-cfg-pins           W   p       t            k                                                   p         gpio@f8011000             arm,pl061 arm,primecell                                     4                                                                	  apb_pclk          O  PWR_HOLD DSI_SEL USB_HUB_RESET_N USB_SEL HDMI_PD WL_REG_ON PWRON_DET 5V_HUB_EN              6      gpio@f8012000             arm,pl061 arm,primecell                                      5                                                                	  apb_pclk          :  SD_DET HDMI_INT PMU_IRQ_N WL_HOST_WAKE NC NC NC BT_REG_ON                     gpio@f8013000             arm,pl061 arm,primecell              0                       6                                                                	  apb_pclk          B  GPIO-A GPIO-B GPIO-C GPIO-D GPIO-E USB_ID_DET USB_VBUS_DET GPIO-H         gpio@f8014000             arm,pl061 arm,primecell              @                       7                                  ,       P                                            	  apb_pclk          %  GPIO3_0 NC NC  NC  WLAN_ACTIVE NC NC                }      gpio@f7020000             arm,pl061 arm,primecell                                      8                                  ,       X                                            	  apb_pclk          ?  USER_LED1 USER_LED2 USER_LED3 USER_LED4 SD_SEL NC NC BT_ACTIVE              |      gpio@f7021000             arm,pl061 arm,primecell                                     9                                  ,       `                                            	  apb_pclk          ?  NC NC [UART1_RxD] [UART1_TxD] [AUX_SSI1] NC [PCM_CLK] [PCM_FS]        gpio@f7022000             arm,pl061 arm,primecell                                      :                                  ,       h                                            	  apb_pclk          =  [SPI0_DIN] [SPI0_DOUT] [SPI0_CS] [SPI0_SCLK] NC NC NC GPIO-G                /      gpio@f7023000             arm,pl061 arm,primecell              0                       ;                                  ,       p                                            	  apb_pclk          $  NC NC NC NC [PCM_DI] [PCM_DO] NC NC       gpio@f7024000             arm,pl061 arm,primecell              @                       <                                   ,       x      ,                                                  	  apb_pclk            NC [CEC_CLK_19_2MHZ] NC               gpio@f7025000             arm,pl061 arm,primecell              P                       =                                  ,                                                   	  apb_pclk          '   GPIO-J GPIO-L NC NC NC NC [ISP_CCLK0]        gpio@f7026000             arm,pl061 arm,primecell              `                       >                                   ,              ,                                                  	  apb_pclk          ?  BOOT_SEL [ISP_CCLK1] GPIO-I GPIO-K NC NC [I2C2_SDA] [I2C2_SCL]        gpio@f7027000             arm,pl061 arm,primecell              p                       ?                                   ,             ,                                                  	  apb_pclk          "  [I2C3_SDA] [I2C3_SCL]  NC NC NC           gpio@f7028000             arm,pl061 arm,primecell                                     @                                   ,       !      ,      +                                            	  apb_pclk          8  [BT_PCM_XFS] [BT_PCM_DI] [BT_PCM_DO] NC NC NC NC GPIO-F       gpio@f7029000             arm,pl061 arm,primecell                                     A                                  ,       0                                            	  apb_pclk          h  [UART0_RX] [UART0_TX] [BT_UART1_CTS] [BT_UART1_RTS] [BT_UART1_RX] [BT_UART1_TX] [UART0_CTS] [UART0_RTS]       gpio@f702a000             arm,pl061 arm,primecell                                     B                                  ,       8                                            	  apb_pclk          Z  [UART0_RxD] [UART0_TxD] [I2C0_SCL] [I2C0_SDA] [I2C1_SCL] [I2C1_SDA] [I2C2_SCL] [I2C2_SDA]         gpio@f702b000             arm,pl061 arm,primecell                                     C                             0     ,       J      ,      z      ,      ~                                            	  apb_pclk          
        NC          gpio@f702c000             arm,pl061 arm,primecell                                     D                                  ,                                                   	  apb_pclk          gpio@f702d000             arm,pl061 arm,primecell                                     E                                  ,                                                   	  apb_pclk          gpio@f702e000             arm,pl061 arm,primecell                                     F                                  ,                                                   	  apb_pclk          gpio@f702f000             arm,pl061 arm,primecell                                     G                                  ,                                                   	  apb_pclk          spi@f7106000              arm,pl022 arm,primecell              `                       2                                                         sspclk apb_pclk         !default         /   -   .                      /               Hokay          i2c@f7100000              snps,designware-i2c                                      ,                            ,        !default         /   0   1        Hokay          i2c@f7101000              snps,designware-i2c                                                    -             ,        !default         /   2   3        Hokay          i2c@f7102000              snps,designware-i2c                                                     .             ,        !default         /   4   5        Hokay                         +       adv7533@39            adi,adv7533             9                                  0   6               9           G       ports                        +       port@0                  endpoint            X   7            W         port@2                 endpoint            X   8            P                  usbphy            hisilicon,hi6220-usb-phy            h            s   9        ~               :      usb@f72c0000              hisilicon,hi6220-usb                 ,                    :      	  usb2-phy                           otg         otg                             <                                                              M         mailbox@f7510000              hisilicon,hi6220-mbox                 Q                                    ^                                dwmmc0@f723d000           hisilicon,hi6220-dw-mshc                 #                       H                                ciu biu                        reset           !default         /   ;   <   =   >                                       *   ?      dwmmc1@f723e000           hisilicon,hi6220-dw-mshc            ~                #                       I                        +                                 ciu biu                       reset           !default idle            /   @   A   B        6   C   D   E        @            R         c         p         }           F        *   G                                             dwmmc2@f723f000           hisilicon,hi6220-dw-mshc                 #                       J                                ciu biu                       reset           !default idle            /   H   I   J        6   K   L   M                                      *   N           O                     +       wlcore@2          
    ti,wl1835                                                  watchdog@f8005000             arm,sp805 arm,primecell               P                                                       wdog_clk apb_pclk         tsensor@f7030700              hisilicon,tsensor                                                                 thermal_clk                        Q      i2s@f7118000              hisilicon,hi6210-i2s                                        {                  
      8        dacodec i2s-base            9                    >rx tx                      G      ports      port@0              ~   endpoint            X   P        i2s             8               thermal-zones      cls0-thermal                         d        '          9   Q      trips      trip-point0         I          U             passive       trip-point1         I $        U             passive             R         cooling-maps       map0            `   R      `  e                        	               ade@f4100000              hisilicon,hi6220-ade                         x       	  tade_base            ~   S           T                  s               T      T      T         (  clk_ade_core clk_codec_jpeg clk_ade_pix         O   T      T           _u* *                  Hokay       port       endpoint            X   U            V            dsi@f4107800              hisilicon,hi6220-dsi                 x                    T           pclk            Hokay       ports                        +       port@0                  endpoint            X   V            U         port@1                 endpoint@0          X   W            7               debug@f6590000        &    arm,coresight-cpu-debug arm,primecell                Y                        ;      	  apb_pclk             D         debug@f6592000        &    arm,coresight-cpu-debug arm,primecell                Y                        ;      	  apb_pclk             D         debug@f6594000        &    arm,coresight-cpu-debug arm,primecell                Y@                       ;      	  apb_pclk             D         debug@f6596000        &    arm,coresight-cpu-debug arm,primecell                Y`                       ;      	  apb_pclk             D         debug@f65d0000        &    arm,coresight-cpu-debug arm,primecell                ]                        ;      	  apb_pclk             D         debug@f65d2000        &    arm,coresight-cpu-debug arm,primecell                ]                        ;      	  apb_pclk             D         debug@f65d4000        &    arm,coresight-cpu-debug arm,primecell                ]@                       ;      	  apb_pclk             D         debug@f65d6000        &    arm,coresight-cpu-debug arm,primecell                ]`                       ;      	  apb_pclk             D   	      gpu@f4080000          #    hisilicon,hi6220-mali arm,mali-450                                                  ~         ~         ~         ~         ~         ~         ~         ~         ~         ~         ~         8  gp gpmmu pp pp0 ppmmu0 pp1 ppmmu1 pp2 ppmmu2 pp3 ppmmu3             T      T         	  bus core            O   T      T           _e D         ao_g3d media_g3d                     T          funnel@f6401000       +    arm,coresight-dynamic-funnel arm,primecell               @                    X          	  apb_pclk       out-ports      port       endpoint            X   Y            [            in-ports       port       endpoint            X   Z            b               etf@f6402000               arm,coresight-tmc arm,primecell              @                     X          	  apb_pclk       in-ports       port       endpoint            X   [            Y            out-ports      port       endpoint            X   \            ]               replicator             arm,coresight-static-replicator             X          	  apb_pclk       in-ports       port       endpoint            X   ]            \            out-ports                        +       port@0                  endpoint            X   ^            `         port@1                 endpoint            X   _            a               etr@f6404000               arm,coresight-tmc arm,primecell              @@                    X          	  apb_pclk       in-ports       port       endpoint            X   `            ^               tpiu@f6405000         !    arm,coresight-tpiu arm,primecell                 @P                    X          	  apb_pclk       in-ports       port       endpoint            X   a            _               funnel@f6501000       +    arm,coresight-dynamic-funnel arm,primecell               P                    X          	  apb_pclk       out-ports      port       endpoint            X   b            Z            in-ports                         +       port@0                  endpoint            X   c            k         port@1                 endpoint            X   d            l         port@2                 endpoint            X   e            m         port@3                 endpoint            X   f            n         port@4                 endpoint            X   g            o         port@5                 endpoint            X   h            p         port@6                 endpoint            X   i            q         port@7                 endpoint            X   j            r               etm@f659c000          "    arm,coresight-etm4x arm,primecell                Y                    X          	  apb_pclk             D               s   out-ports      port       endpoint            X   k            c               etm@f659d000          "    arm,coresight-etm4x arm,primecell                Y                    X          	  apb_pclk             D               t   out-ports      port       endpoint            X   l            d               etm@f659e000          "    arm,coresight-etm4x arm,primecell                Y                    X          	  apb_pclk             D               u   out-ports      port       endpoint            X   m            e               etm@f659f000          "    arm,coresight-etm4x arm,primecell                Y                    X          	  apb_pclk             D               v   out-ports      port       endpoint            X   n            f               etm@f65dc000          "    arm,coresight-etm4x arm,primecell                ]                    X          	  apb_pclk             D               w   out-ports      port       endpoint            X   o            g               etm@f65dd000          "    arm,coresight-etm4x arm,primecell                ]                    X          	  apb_pclk             D               x   out-ports      port       endpoint            X   p            h               etm@f65de000          "    arm,coresight-etm4x arm,primecell                ]                    X          	  apb_pclk             D               y   out-ports      port       endpoint            X   q            i               etm@f65df000          "    arm,coresight-etm4x arm,primecell                ]                    X          	  apb_pclk             D   	            z   out-ports      port       endpoint            X   r            j               cti@f6403000               arm,coresight-cti arm,primecell              @0                    X          	  apb_pclk          cti@f6598000          :    arm,coresight-cti-v8-arch arm,coresight-cti arm,primecell                Y                    X          	  apb_pclk             D              s      cti@f6599000          :    arm,coresight-cti-v8-arch arm,coresight-cti arm,primecell                Y                    X          	  apb_pclk             D              t      cti@f659a000          :    arm,coresight-cti-v8-arch arm,coresight-cti arm,primecell                Y                    X          	  apb_pclk             D              u      cti@f659b000          :    arm,coresight-cti-v8-arch arm,coresight-cti arm,primecell                Y                    X          	  apb_pclk             D              v      cti@f65d8000          :    arm,coresight-cti-v8-arch arm,coresight-cti arm,primecell                ]                    X          	  apb_pclk             D              w      cti@f65d9000          :    arm,coresight-cti-v8-arch arm,coresight-cti arm,primecell                ]                    X          	  apb_pclk             D              x      cti@f65da000          :    arm,coresight-cti-v8-arch arm,coresight-cti arm,primecell                ]                    X          	  apb_pclk             D              y      cti@f65db000          :    arm,coresight-cti-v8-arch arm,coresight-cti arm,primecell                ]                    X          	  apb_pclk             D   	           z         aliases         /soc/serial@f8015000            /soc/serial@f7111000            /soc/serial@f7112000            /soc/serial@f7113000          chosen          serial3:115200n8          memory@0             memory        `                                                     `     A            "                reserved-memory                      +               ramoops@21f00000              ramoops              !                                                linux,cma             shared-dma-pool                                           reboot-mode-syscon@5f01000            syscon simple-mfd                           reboot-mode           syscon-reboot-mode          -            4wfU        @wfU         PwfU         regulator-0           regulator-fixed         ^SYS_5V          m LK@         LK@                              {      regulator-1           regulator-fixed         ^VDD_3V3         m 2Z         2Z                             {            N      regulator-2           regulator-fixed         ^5V_HUB          m LK@         LK@                    6                           {            9      wl1835-pwrseq             mmc-pwrseq-simple              6                        
  ext_clock              
           
            O      leds          
    gpio-leds      led-user-1          green:user1         {   |              
  	heartbeat         led-user-2          green:user2         {   |               	mmc0          led-user-3          green:user3         {   |               	mmc1          led-user-4          green:user4         {   |                        	none          led-wlan            yellow:wlan         {   }               	phy0tx          /off       led-bt          blue:bt         {   |               	hci0-power          /off          pmic@f8000000             hisilicon,hi655x-pmic                                                                  =                         regulators     LDO2          	  ^LDO2_2V8            m &%         0         H   x      LDO7          
  ^LDO7_SDIO           m w@         2Z        H   x            F      LDO10           ^LDO10_2V85          m w@         -        H  h            G      LDO13         
  ^LDO13_1V8           m j          0        H   x      LDO14         
  ^LDO14_2V8           m &%         0         H   x      LDO15         
  ^LDO15_1V8           m j          0                          H   x      LDO17         
  ^LDO17_2V5           m &%         0         H   x      LDO19         
  ^LDO19_3V0           m w@         -        H  h            ?      LDO21         
  ^LDO21_1V8           m -P                          H   x      LDO22         
  ^LDO22_1V2           m          O                          H   x            firmware       optee             linaro,optee-tz          =smc          sound_card            audio-graph-card            d   ~         	compatible interrupt-parent #address-cells #size-cells model method cpu entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us phandle wakeup-latency-us device_type reg enable-method next-level-cache clocks operating-points-v2 cpu-idle-states #cooling-cells dynamic-power-coefficient cache-level cache-unified opp-shared opp-hz opp-microvolt clock-latency-ns #interrupt-cells interrupt-controller interrupts ranges #clock-cells #reset-cells hisilicon,hi6220-clk-sram mbox-names mboxes clock-names pinctrl-names pinctrl-0 dmas dma-names status assigned-clocks assigned-clock-rates enable-gpios label #dma-cells dma-channels dma-requests dma-no-cci dma-type #pinctrl-cells #gpio-range-cells pinctrl-single,register-width pinctrl-single,function-mask pinctrl-single,gpio-range #pinctrl-single,gpio-range-cells pinctrl-single,pins pinctrl-single,bias-pulldown pinctrl-single,bias-pullup pinctrl-single,drive-strength gpio-controller #gpio-cells gpio-line-names gpio-ranges bus-id enable-dma num-cs cs-gpios i2c-sda-hold-time-ns pd-gpios adi,dsi-lanes #sound-dai-cells remote-endpoint #phy-cells phy-supply hisilicon,peripheral-syscon phys phy-names dr_mode g-rx-fifo-size g-np-tx-fifo-size g-tx-fifo-size #mbox-cells resets reset-names cap-mmc-highspeed non-removable bus-width vmmc-supply pinctrl-1 card-detect-delay cap-sd-highspeed sd-uhs-sdr12 sd-uhs-sdr25 sd-uhs-sdr50 vqmmc-supply disable-wp cd-gpios cap-power-off-card mmc-pwrseq #thermal-sensor-cells hisilicon,sysctrl-syscon dai-format polling-delay polling-delay-passive sustainable-power thermal-sensors temperature hysteresis trip cooling-device reg-names hisilicon,noc-syscon dma-coherent interrupt-names arm,cs-dev-assoc serial0 serial1 serial2 serial3 stdout-path record-size console-size ftrace-size reusable linux,cma-default offset mode-normal mode-bootloader mode-recovery regulator-name regulator-min-microvolt regulator-max-microvolt regulator-boot-on regulator-always-on vin-supply gpio reset-gpios post-power-on-delay-ms power-off-delay-us linux,default-trigger panic-indicator default-state pmic-gpios regulator-enable-ramp-delay dais 