Ðþí  	ƒ   8  œ   (             ç  d                             $    mediatek,mt6755-evb mediatek,mt6755                                  +            7MediaTek MT6755 EVB       	   =embedded       psci              arm,psci-0.2             Jsmc       cpus                         +       cpu@0            Qcpu           arm,cortex-a53           ]psci             k          cpu@1            Qcpu           arm,cortex-a53           ]psci             k         cpu@2            Qcpu           arm,cortex-a53           ]psci             k         cpu@3            Qcpu           arm,cortex-a53           ]psci             k         cpu@100          Qcpu           arm,cortex-a53           ]psci             k         cpu@101          Qcpu           arm,cortex-a53           ]psci             k        cpu@102          Qcpu           arm,cortex-a53           ]psci             k        cpu@103          Qcpu           arm,cortex-a53           ]psci             k           dummy26m              fixed-clock          oŒº€                      Œ         timer             arm,armv8-timer                   0   ”        ÿ        ÿ        ÿ      
  ÿ      intpol-controller@10200620        .    mediatek,mt6755-sysirq mediatek,mt6577-sysirq             Ÿ         ´                        k                       Œ         interrupt-controller@10231000             arm,gic-400          ´                         Ÿ      @   k    #            #              #@             #`                  Œ         serial@11002000       *    mediatek,mt6755-uart mediatek,mt6577-uart            k                       ”       [            Å            Ìokay          serial@11003000       *    mediatek,mt6755-uart mediatek,mt6577-uart            k     0                 ”       \            Å         	   Ìdisabled          aliases          Ó/serial@11002000          memory@40000000          Qmemory           k    @       €        chosen           Ûserial0:921600n8             	compatible interrupt-parent #address-cells #size-cells model chassis-type method device_type enable-method reg clock-frequency #clock-cells phandle interrupts interrupt-controller #interrupt-cells clocks status serial0 stdout-path 