  4   8  1(   (              0                             $    acelink,ew-7886cax mediatek,mt7986a                                  +            7Acelink EW-7886CAX     cpus                         +       cpu@0             arm,cortex-a53           =             Acpu          Mpsci             [         cpu@1             arm,cortex-a53           =            Acpu          Mpsci             [         cpu@2             arm,cortex-a53           =            Acpu          Mpsci             [         cpu@3             arm,cortex-a53           =            Acpu          Mpsci             [            oscillator-40m            fixed-clock          jbZ          z             clkxtal                   psci              arm,psci-0.2             Tsmc       reserved-memory                      +                secmon@43000000          =    C                          wmcpu-reserved@4fc00000                    =    O                     !      wo-emi@4fd00000          =    O                                     wo-emi@4fd40000          =    O                                     wo-ilm@151e0000          =                                         wo-ilm@151f0000          =                                         wo-data@4fd80000             =    O       $                              wo-dlm@151e8000          =                                         wo-dlm@151f8000          =                                         wo-boot@15194000             =    @                                       soc           simple-bus                                 +      interrupt-controller@c000000              arm,gic-v3        P   =                               @              A             B                                     	                                           infracfg@10001000              mediatek,mt7986-infracfg syscon          =                      z                                 wed-pcie@10003000              mediatek,mt7986-wed-pcie syscon          =     0                          topckgen@1001b000              mediatek,mt7986-topckgen syscon          =                     z                     watchdog@1001c000             mediatek,mt7986-wdt          =                            n                        okay                       apmixedsys@1001e000           mediatek,mt7986-apmixedsys           =                     z                     pinctrl@1001f000              mediatek,mt7986a-pinctrl             =                                                                                                             @   gpio iocfg_rt iocfg_rb iocfg_lt iocfg_lb iocfg_tr iocfg_tl eint                                            d                                                                       pwm@10048000              mediatek,mt7986-pwm          =                    '                               2                                9top main pwm1 pwm2        	   disabled          syscon@10060000       "    mediatek,mt7986-sgmiisys_0 syscon            =                      z                     syscon@10070000       "    mediatek,mt7986-sgmiisys_1 syscon            =                      z                     rng@1020f000          (    mediatek,mt7986-rng mediatek,mt7623-rng          =                     2      7        9rng          okay          crypto@10320000           inside-secure,safexcel-eip97             =    2               0          t          u          v          w           Ering0 ring1 ring2 ring3         2              U      3        e               okay          serial@11002000       *    mediatek,mt7986-uart mediatek,mt6577-uart            =                              {           2                  	  9baud bus            U                    e                      okay          serial@11003000       *    mediatek,mt7986-uart mediatek,mt6577-uart            =     0                        |           2                  	  9baud bus            U              e      6      	   disabled          serial@11004000       *    mediatek,mt7986-uart mediatek,mt6577-uart            =     @                        }           2                  	  9baud bus            U              e      6      	   disabled          i2c@11008000              mediatek,mt7986-i2c           =                 !p                                  |           2                  	  9main dma                         +          	   disabled          spi@1100a000          )    mediatek,mt7986-spi-ipm mediatek,spi-ipm             =                                  +                                2                  #      %         9parent-clk sel-clk spi-clk hclk          okay       flash@0       	    spi-nand             =                         +           u                          partitions            fixed-partitions                         +      partition@0          =               bootloader                 partition@100000             =              u-boot-env        partition@180000              nvmem-cells          =               factory             nvmem-layout              fixed-layout                         +      eeprom@0             =                   "      macaddr@4            =                              partition@380000             = 8              fip       partition@580000             = X             ubi                spi@1100b000          )    mediatek,mt7986-spi-ipm mediatek,spi-ipm             =                                  +                                2                  $      &         9parent-clk sel-clk spi-clk hclk       	   disabled          thermal@1100c800              mediatek,mt7986-thermal          =                                        2            ,        9therm auxadc                       calibration-data                                                 #      adc@1100d000              mediatek,mt7986-auxadc           =                     2      ,        9main            !         	   disabled                      usb@11200000          '    mediatek,mt7986-xhci mediatek,mtk-xhci            =             .      >              	   mac ippc                             (  2      1      2      /      0      ;      $  9sys_ck ref_ck mcu_ck dma_ck xhci_ck         3         	      
         	   disabled          mmc@11230000              mediatek,mt7986-mmc           =    #                                                 U      #      "        e                  (  2      #      )      (      *      +      %  9source hclk source_cg bus_clk sys_cg          	   disabled          pcie@11280000         *    mediatek,mt7986-pcie mediatek,mt8192-pcie            =    (        @       	   pcie-mac                                                Apci                      +                              8                2      4      3      5      6      !  9pl_250m tl_26m peri_26m top_133m            3            	  Bpcie-phy                        L                     `  _                                                                                           	   disabled       interrupt-controller                                                            t-phy         .    mediatek,mt7986-tphy mediatek,generic-tphy-v2                                  +            okay       pcie-phy@11c00000            =                     2           9ref         m                        efuse@11d00000        %    mediatek,mt7986-efuse mediatek,efuse             =                                  +      calib@274            =  t                        t-phy@11e10000        .    mediatek,mt7986-tphy mediatek,generic-tphy-v2                                              +         	   disabled       usb-phy@0            =               2      <      =        9ref da_ref          m                     usb-phy@700          =     	         2      5        9ref         m               	      usb-phy@1000             =              2      <      =        9ref da_ref          m               
         syscon@15000000           mediatek,mt7986-ethsys syscon            =                       z                                 wed@15010000              mediatek,mt7986-wed syscon           =                                                    x                     %  wo-emi wo-ilm wo-dlm wo-data wo-boot                                 wed@15011000              mediatek,mt7986-wed syscon           =                                                   x                     %  wo-emi wo-ilm wo-dlm wo-data wo-boot                                 ethernet@15100000             mediatek,mt7986-eth          =                   0                                                 x  2                                                                                       +      ,        9fe gp2 gp1 wocpu1 wocpu0 sgmii_tx250m sgmii_rx250m sgmii_cdr_ref sgmii_cdr_fb sgmii2_tx250m sgmii2_rx250m sgmii2_cdr_ref sgmii2_cdr_fb netsys0 netsys1          U      .      /        e                                 +                                                               okay       mac@1             mediatek,eth-mac             =           2500base-x                                mac-address       mdio-bus                                P          N                      +       phy@6             ethernet-phy-ieee802.3-c45           =                           syscon@151a5000           mediatek,mt7986-wo-ccif syscon           =    P                                                         syscon@151ad000           mediatek,mt7986-wo-ccif syscon           =                                                             wifi@18000000             mediatek,mt7986-wmac          0   =                   0                             /               6consys          2      2      >        9mcu ap2conn       0                                                   x   !           "        eeprom           okay             thermal-zones      cpu-thermal         B          X          f   #       trips      crit            v H                	   Hcritical          hot         v                    Hhot       active-high         v 8                   Hactive        active-med          v L                   Hactive        active-low          v  `                   Hactive                 timer             arm,armv8-timer                   0                                    
         aliases         /soc/serial@11002000          chosen          serial0:115200n8          memory@40000000          =    @                    Amemory        keys          
    gpio-keys      key-restart         Reset                                       leds          
    gpio-leds      led-0           status                                     led-1           status                                     led-2           status                                           	compatible interrupt-parent #address-cells #size-cells model reg device_type enable-method #cooling-cells clock-frequency #clock-cells clock-output-names phandle ranges no-map interrupts interrupt-controller #interrupt-cells #reset-cells status reg-names gpio-controller #gpio-cells gpio-ranges #pwm-cells clocks clock-names interrupt-names assigned-clocks assigned-clock-parents clock-div spi-max-frequency spi-rx-bus-width spi-tx-bus-width label read-only nvmem-cells nvmem-cell-names #thermal-sensor-cells mediatek,auxadc mediatek,apmixedsys #io-channel-cells phys bus-range phy-names interrupt-map-mask interrupt-map #phy-cells memory-region memory-region-names mediatek,wo-ccif mediatek,ethsys mediatek,sgmiisys mediatek,wed-pcie mediatek,wed phy-mode phy-handle reset-gpios reset-delay-us reset-post-delay-us resets reset-names polling-delay-passive polling-delay thermal-sensors temperature hysteresis serial0 stdout-path linux,code function color 