  Y   8  Q`   (            -  Q(                             !    bananapi,bpi-r3 mediatek,mt7986a                                     +            7Bananapi BPI-R3       	   =embedded       cpus                         +       cpu@0             arm,cortex-a53           J             Ncpu          Zpsci             h            w   :      cpu@1             arm,cortex-a53           J            Ncpu          Zpsci             h            w   ;      cpu@2             arm,cortex-a53           J            Ncpu          Zpsci             h            w   <      cpu@3             arm,cortex-a53           J            Ncpu          Zpsci             h            w   =         oscillator-40m            fixed-clock          bZ                       clkxtal          w         psci              arm,psci-0.2             asmc       reserved-memory                      +                secmon@43000000          J    C                             w   >      wmcpu-reserved@4fc00000                    J    O                  w   -      wo-emi@4fd00000          J    O                            w         wo-emi@4fd40000          J    O                            w         wo-ilm@151e0000          J                                w         wo-ilm@151f0000          J                                w          wo-data@4fd80000             J    O       $                     w         wo-dlm@151e8000          J                                w         wo-dlm@151f8000          J                                w   !      wo-boot@15194000             J    @                           w            soc           simple-bus                                 +      interrupt-controller@c000000              arm,gic-v3        P   J                               @              A             B                                     	                                  w         infracfg@10001000              mediatek,mt7986-infracfg syscon          J                                              w         wed-pcie@10003000              mediatek,mt7986-wed-pcie syscon          J     0                 w   &      topckgen@1001b000              mediatek,mt7986-topckgen syscon          J                                 w         watchdog@1001c000             mediatek,mt7986-wdt          J                            n                        okay             w   ,      apmixedsys@1001e000           mediatek,mt7986-apmixedsys           J                                 w         pinctrl@1001f000              mediatek,mt7986a-pinctrl             J                                                                                                             @  gpio iocfg_rt iocfg_rb iocfg_lt iocfg_lb iocfg_tr iocfg_tl eint                             (              d                                                              w      i2c-pins             w   	   mux         4i2c         =i2c          mmc0-pins            w      mux         4emmc            =emmc_51       conf-cmd-dat          i  DEMMC_DATA_0 EMMC_DATA_1 EMMC_DATA_2 EMMC_DATA_3 EMMC_DATA_4 EMMC_DATA_5 EMMC_DATA_6 EMMC_DATA_7 EMMC_CMD             I        V           e   e      conf-clk            DEMMC_CK         V           r   f      conf-ds       	  DEMMC_DSL            r   f      conf-rst          
  DEMMC_RSTB           V           e   e         mmc0-uhs-pins            w      mux         4emmc            =emmc_51       conf-cmd-dat          i  DEMMC_DATA_0 EMMC_DATA_1 EMMC_DATA_2 EMMC_DATA_3 EMMC_DATA_4 EMMC_DATA_5 EMMC_DATA_6 EMMC_DATA_7 EMMC_CMD             I        V           e   e      conf-clk            DEMMC_CK         V           r   f      conf-ds       	  DEMMC_DSL            r   f      conf-rst          
  DEMMC_RSTB           V           e   e         pcie-pins            w      mux         4pcie            =pcie_clk pcie_pereset            pwm-pins             w      mux         4pwm         =pwm0 pwm1_0          spi-flash-pins           w   
   mux         4spi         =spi0 spi0_wp_hold            spic-pins            w      mux         4spi         =spi1_0           uart1-pins           w      mux         4uart            =uart1_rx_tx          uart2-pins           w      mux         4uart            =uart2_0_rx_tx            wf-2g-5g-pins            w   .   mux         4wifi            =wf_2g wf_5g       conf            DWF0_HB1 WF0_HB2 WF0_HB3 WF0_HB4 WF0_HB0 WF0_HB0_B WF0_HB5 WF0_HB6 WF0_HB7 WF0_HB8 WF0_HB9 WF0_HB10 WF0_TOP_CLK WF0_TOP_DATA WF1_HB1 WF1_HB2 WF1_HB3 WF1_HB4 WF1_HB0 WF1_HB5 WF1_HB6 WF1_HB7 WF1_HB8 WF1_TOP_CLK WF1_TOP_DATA            V            wf-dbdc-pins             w   0   mux         4wifi            =wf_dbdc       conf            DWF0_HB1 WF0_HB2 WF0_HB3 WF0_HB4 WF0_HB0 WF0_HB0_B WF0_HB5 WF0_HB6 WF0_HB7 WF0_HB8 WF0_HB9 WF0_HB10 WF0_TOP_CLK WF0_TOP_DATA WF1_HB1 WF1_HB2 WF1_HB3 WF1_HB4 WF1_HB0 WF1_HB5 WF1_HB6 WF1_HB7 WF1_HB8 WF1_TOP_CLK WF1_TOP_DATA            V            wf-led-pins          w   /   mux         4led       	  =wifi_led                pwm@10048000              mediatek,mt7986-pwm          J                                                                                   top main pwm1 pwm2           okay            default                     w   6      syscon@10060000       "    mediatek,mt7986-sgmiisys_0 syscon            J                                  w   $      syscon@10070000       "    mediatek,mt7986-sgmiisys_1 syscon            J                                  w   %      rng@1020f000          (    mediatek,mt7986-rng mediatek,mt7623-rng          J                           7        rng          okay             w   ?      crypto@10320000           inside-secure,safexcel-eip97             J    2               0          t          u          v          w           ring0 ring1 ring2 ring3                             3                       okay             w   @      serial@11002000       *    mediatek,mt7986-uart mediatek,mt6577-uart            J                              {                             	  baud bus                                                      okay             w   A      serial@11003000       *    mediatek,mt7986-uart mediatek,mt6577-uart            J     0                        |                             	  baud bus                                6         okay            default                     w   B      serial@11004000       *    mediatek,mt7986-uart mediatek,mt6577-uart            J     @                        }                             	  baud bus                                6         okay            default                     w   C      i2c@11008000              mediatek,mt7986-i2c           J                 !p                                                               	  main dma                         +             okay            default            	         w   D      spi@1100a000          )    mediatek,mt7986-spi-ipm mediatek,spi-ipm             J                                  +                                                  #      %         parent-clk sel-clk spi-clk hclk          okay            default            
         w   E      spi@1100b000          )    mediatek,mt7986-spi-ipm mediatek,spi-ipm             J                                  +                                                  $      &         parent-clk sel-clk spi-clk hclk          okay            default                     w   F      thermal@1100c800              mediatek,mt7986-thermal          J                                                    ,        therm auxadc                       calibration-data                       +           ;            w   1      adc@1100d000              mediatek,mt7986-auxadc           J                           ,        main            O         	   disabled             w         usb@11200000          '    mediatek,mt7986-xhci mediatek,mtk-xhci            J             .      >              	  mac ippc                             (        1      2      /      0      ;      $  sys_ck ref_ck mcu_ck dma_ck xhci_ck         a                           okay             w   G      mmc@11230000              mediatek,mt7986-mmc           J    #                                                       #      "                          (        #      )      (      *      +      %  source hclk source_cg bus_clk sys_cg          	   disabled            default state_uhs                      f           p           |            w   H      pcie@11280000         *    mediatek,mt7986-pcie mediatek,mt8192-pcie            J    (        @       	  pcie-mac                                                Npci                      +                                                    4      3      5      6      !  pl_250m tl_26m peri_26m top_133m            a            	  pcie-phy                                             `                                                                                                okay            default                     w   I   interrupt-controller                                                w            t-phy         .    mediatek,mt7986-tphy mediatek,generic-tphy-v2                                  +            okay             w   J   pcie-phy@11c00000            J                                ref                     w            efuse@11d00000        %    mediatek,mt7986-efuse mediatek,efuse             J                                  +            w   K   calib@274            J  t            w            t-phy@11e10000        .    mediatek,mt7986-tphy mediatek,generic-tphy-v2                                              +            okay             w   L   usb-phy@0            J                     <      =        ref da_ref                      w         usb-phy@700          J     	               5        ref                     w         usb-phy@1000             J                    <      =        ref da_ref                      w            syscon@15000000           mediatek,mt7986-ethsys syscon            J                                               w   #      wed@15010000              mediatek,mt7986-wed syscon           J                                                                         %  wo-emi wo-ilm wo-dlm wo-data wo-boot                        w   '      wed@15011000              mediatek,mt7986-wed syscon           J                                                             !            %  wo-emi wo-ilm wo-dlm wo-data wo-boot               "         w   (      ethernet@15100000             mediatek,mt7986-eth          J                   0                                                 x     #       #      #      #      #      $       $      $      $      %       %      %      %         +      ,        fe gp2 gp1 wocpu1 wocpu0 sgmii_tx250m sgmii_rx250m sgmii_cdr_ref sgmii_cdr_fb sgmii2_tx250m sgmii2_rx250m sgmii2_cdr_ref sgmii2_cdr_fb netsys0 netsys1                .      /                                         +               #           $   %           &        0   '   (         okay             w   M   mac@0             mediatek,eth-mac             J            =2500base-x           w   +   fixed-link          F  	         L         X         mac@1             mediatek,eth-mac             J           =2500base-x          ^   )        bin-band-status           w   N      mdio-bus                         +             w   O   switch@31             mediatek,mt7531          J                                 j      B           ~                   w   P   ports                        +       port@0           J            wan       port@1           J           lan0          port@2           J           lan1          port@3           J           lan2          port@4           J           lan3          port@5           J           lan4            =2500base-x          ^   *        bin-band-status           w   Q      port@6           J           cpu            +        =2500base-x     fixed-link          F  	         L         X                     syscon@151a5000           mediatek,mt7986-wo-ccif syscon           J    P                                                w         syscon@151ad000           mediatek,mt7986-wo-ccif syscon           J                                                    w   "      wifi@18000000             mediatek,mt7986-wmac          0   J                   0                                ,           consys                2      >        mcu ap2conn       0                                                      -         okay            default dbdc               .   /        f   0   /         w   R   led                      thermal-zones      cpu-thermal                                1             w   S   trips      crit             H                	   Ecritical             w   T      hot                             Ehot          w   U      active-high          8                   Eactive           w   3      active-med           L                   Eactive           w   4      active-low            `                   Eactive           w   5         cooling-maps       map-cpu-active-high            2                 3      map-cpu-active-med             2                 4      map-cpu-active-low             2                   5               timer             arm,armv8-timer                   0                                    
         aliases         /soc/serial@11002000            "/soc/ethernet@15100000/mac@0            ,/soc/ethernet@15100000/mac@1          chosen          6serial0:115200n8          regulator-12vd            regulator-fixed         B12vd            Q          i                             w   7      pwm-fan           pwm-fan          h                 `               6      '         okay             w   2      gpio-keys         
    gpio-keys      reset-key           reset                           	         wps-key         wps                         
            i2c-gpio-0        	    i2c-gpio                                                                      +             w   8      i2c-gpio-1        	    i2c-gpio                                                                      +             w   9      leds          
    gpio-leds      led-0                      4power                 E            on           w   V      led-1                      4status                V            off          w   W         regulator-1p8v            regulator-fixed         B1.8vd           Q w@        i w@                              7         w         regulator-3p3v            regulator-fixed         B3.3vd           Q 2Z        i 2Z                              7         w         sfp-1             sff,sfp            8              .                      5      1           D                  U                   w   )      sfp-2             sff,sfp            9                          5      /                     D                  U      0             w   *      __symbols__         d/cpus/cpu@0         i/cpus/cpu@1         n/cpus/cpu@2         s/cpus/cpu@3         x/oscillator-40m       !  /reserved-memory/secmon@43000000          )  /reserved-memory/wmcpu-reserved@4fc00000          !  /reserved-memory/wo-emi@4fd00000          !  /reserved-memory/wo-emi@4fd40000          !  /reserved-memory/wo-ilm@151e0000          !  /reserved-memory/wo-ilm@151f0000          "  /reserved-memory/wo-data@4fd80000         !  /reserved-memory/wo-dlm@151e8000          !  /reserved-memory/wo-dlm@151f8000          "  /reserved-memory/wo-boot@15194000         "  /soc/interrupt-controller@c000000           /soc/infracfg@10001000          /soc/wed-pcie@10003000          /soc/topckgen@1001b000          /soc/watchdog@1001c000          D/soc/apmixedsys@1001e000            /soc/pinctrl@1001f000           /soc/pinctrl@1001f000/i2c-pins           /soc/pinctrl@1001f000/mmc0-pins       $   /soc/pinctrl@1001f000/mmc0-uhs-pins          ./soc/pinctrl@1001f000/pcie-pins         8/soc/pinctrl@1001f000/pwm-pins        %  A/soc/pinctrl@1001f000/spi-flash-pins             P/soc/pinctrl@1001f000/spic-pins       !  Z/soc/pinctrl@1001f000/uart1-pins          !  e/soc/pinctrl@1001f000/uart2-pins          $  p/soc/pinctrl@1001f000/wf-2g-5g-pins       #  ~/soc/pinctrl@1001f000/wf-dbdc-pins        "  /soc/pinctrl@1001f000/wf-led-pins           /soc/pwm@10048000           /soc/syscon@10060000            /soc/syscon@10070000            /soc/rng@1020f000           /soc/crypto@10320000            /soc/serial@11002000            /soc/serial@11003000            /soc/serial@11004000            /soc/i2c@11008000           /soc/spi@1100a000           /soc/spi@1100b000           /soc/thermal@1100c800           4/soc/adc@1100d000           /soc/usb@11200000           /soc/mmc@11230000           +/soc/pcie@11280000        (  /soc/pcie@11280000/interrupt-controller         /soc/t-phy          /soc/t-phy/pcie-phy@11c00000            /soc/efuse@11d00000         /soc/efuse@11d00000/calib@274           &/soc/t-phy@11e10000         ./soc/t-phy@11e10000/usb-phy@0            6/soc/t-phy@11e10000/usb-phy@700       !  >/soc/t-phy@11e10000/usb-phy@1000            /soc/syscon@15000000            F/soc/wed@15010000           K/soc/wed@15011000           P/soc/ethernet@15100000          T/soc/ethernet@15100000/mac@0            Z/soc/ethernet@15100000/mac@1             `/soc/ethernet@15100000/mdio-bus       *  e/soc/ethernet@15100000/mdio-bus/switch@31         7  l/soc/ethernet@15100000/mdio-bus/switch@31/ports/port@5          r/soc/syscon@151a5000            {/soc/syscon@151ad000            /soc/wifi@18000000          /thermal-zones/cpu-thermal        &  /thermal-zones/cpu-thermal/trips/crit         %  /thermal-zones/cpu-thermal/trips/hot          -  /thermal-zones/cpu-thermal/trips/active-high          ,  /thermal-zones/cpu-thermal/trips/active-med       ,  /thermal-zones/cpu-thermal/trips/active-low         /regulator-12vd       	  /pwm-fan            /i2c-gpio-0         /i2c-gpio-1         /leds/led-0         /leds/led-1         /regulator-1p8v         $/regulator-3p3v         /sfp-1          /sfp-2           	compatible interrupt-parent #address-cells #size-cells model chassis-type reg device_type enable-method #cooling-cells phandle clock-frequency #clock-cells clock-output-names ranges no-map interrupts interrupt-controller #interrupt-cells #reset-cells status reg-names gpio-controller #gpio-cells gpio-ranges function groups pins input-enable drive-strength bias-pull-up bias-pull-down #pwm-cells clocks clock-names pinctrl-names pinctrl-0 interrupt-names assigned-clocks assigned-clock-parents clock-div nvmem-cells nvmem-cell-names #thermal-sensor-cells mediatek,auxadc mediatek,apmixedsys #io-channel-cells phys pinctrl-1 vmmc-supply vqmmc-supply bus-range phy-names interrupt-map-mask interrupt-map #phy-cells memory-region memory-region-names mediatek,wo-ccif mediatek,ethsys mediatek,sgmiisys mediatek,wed-pcie mediatek,wed phy-mode speed full-duplex pause sfp managed interrupts-extended reset-gpios label ethernet resets reset-names led-active-low polling-delay-passive polling-delay thermal-sensors temperature hysteresis cooling-device trip serial0 ethernet0 ethernet1 stdout-path regulator-name regulator-min-microvolt regulator-max-microvolt regulator-boot-on regulator-always-on cooling-levels pwms linux,code sda-gpios scl-gpios i2c-gpio,delay-us color default-state vin-supply i2c-bus los-gpios maximum-power-milliwatt mod-def0-gpios tx-disable-gpios tx-fault-gpios cpu0 cpu1 cpu2 cpu3 clk40m secmon_reserved wmcpu_emi wo_emi0 wo_emi1 wo_ilm0 wo_ilm1 wo_data wo_dlm0 wo_dlm1 wo_boot gic infracfg wed_pcie topckgen watchdog pio i2c_pins mmc0_pins_default mmc0_pins_uhs pcie_pins pwm_pins spi_flash_pins spic_pins uart1_pins uart2_pins wf_2g_5g_pins wf_dbdc_pins wf_led_pins pwm sgmiisys0 sgmiisys1 trng crypto uart0 uart1 uart2 i2c0 spi0 spi1 thermal ssusb mmc0 pcie_intc pcie_phy pcie_port efuse thermal_calibration usb_phy u2port0 u3port0 u2port1 wed0 wed1 eth gmac0 gmac1 mdio switch port5 wo_ccif0 wo_ccif1 wifi cpu_thermal cpu_trip_crit cpu_trip_hot cpu_trip_active_high cpu_trip_active_med cpu_trip_active_low dcin fan i2c_sfp1 i2c_sfp2 green_led blue_led reg_1p8v reg_3p3v 