  ?   8  :   (              :                             &    mediatek,mt7986a-rfb mediatek,mt7986a                                    +            7MediaTek MT7986a RFB          	   =embedded       cpus                         +       cpu@0             arm,cortex-a53           J             Ncpu          Zpsci             h         cpu@1             arm,cortex-a53           J            Ncpu          Zpsci             h         cpu@2             arm,cortex-a53           J            Ncpu          Zpsci             h         cpu@3             arm,cortex-a53           J            Ncpu          Zpsci             h            oscillator-40m            fixed-clock          wbZ                       clkxtal                   psci              arm,psci-0.2             asmc       reserved-memory                      +                secmon@43000000          J    C                          wmcpu-reserved@4fc00000                    J    O                     *      wo-emi@4fd00000          J    O                                     wo-emi@4fd40000          J    O                                     wo-ilm@151e0000          J                                         wo-ilm@151f0000          J                                         wo-data@4fd80000             J    O       $                              wo-dlm@151e8000          J                                         wo-dlm@151f8000          J                                         wo-boot@15194000             J    @                                       soc           simple-bus                                 +      interrupt-controller@c000000              arm,gic-v3        P   J                               @              A             B                                     	                                           infracfg@10001000              mediatek,mt7986-infracfg syscon          J                                                       wed-pcie@10003000              mediatek,mt7986-wed-pcie syscon          J     0                    $      topckgen@1001b000              mediatek,mt7986-topckgen syscon          J                                          watchdog@1001c000             mediatek,mt7986-wdt          J                            n                     	   disabled                )      apmixedsys@1001e000           mediatek,mt7986-apmixedsys           J                                          pinctrl@1001f000              mediatek,mt7986a-pinctrl             J                                                                                                             @  gpio iocfg_rt iocfg_rb iocfg_lt iocfg_lb iocfg_tr iocfg_tl eint                             (              d                                                                    mmc0-pins                  mux         4emmc            =emmc_51       conf-cmd-dat          i  DEMMC_DATA_0 EMMC_DATA_1 EMMC_DATA_2 EMMC_DATA_3 EMMC_DATA_4 EMMC_DATA_5 EMMC_DATA_6 EMMC_DATA_7 EMMC_CMD             I        V           e   e      conf-clk            DEMMC_CK         V           r   f      conf-ds       	  DEMMC_DSL            r   f      conf-rst          
  DEMMC_RSTB           V           e   e         mmc0-uhs-pins                  mux         4emmc            =emmc_51       conf-cmd-dat          i  DEMMC_DATA_0 EMMC_DATA_1 EMMC_DATA_2 EMMC_DATA_3 EMMC_DATA_4 EMMC_DATA_5 EMMC_DATA_6 EMMC_DATA_7 EMMC_CMD             I        V           e   e      conf-clk            DEMMC_CK         V           r   f      conf-ds       	  DEMMC_DSL            r   f      conf-rst          
  DEMMC_RSTB           V           e   e         pcie-pins                  mux         4pcie             =pcie_clk pcie_wake pcie_pereset          spi-flash-pins                 mux         4spi         =spi0 spi0_wp_hold            spic-pins               	   mux         4spi         =spi1_2           uart1-pins                 mux         4uart            =uart1            uart2-pins                 mux         4uart            =uart2            wf-2g-5g-pins               +   mux         4wifi            =wf_2g wf_5g       conf            DWF0_HB1 WF0_HB2 WF0_HB3 WF0_HB4 WF0_HB0 WF0_HB0_B WF0_HB5 WF0_HB6 WF0_HB7 WF0_HB8 WF0_HB9 WF0_HB10 WF0_TOP_CLK WF0_TOP_DATA WF1_HB1 WF1_HB2 WF1_HB3 WF1_HB4 WF1_HB0 WF1_HB5 WF1_HB6 WF1_HB7 WF1_HB8 WF1_TOP_CLK WF1_TOP_DATA            V            wf-dbdc-pins                ,   mux         4wifi            =wf_dbdc       conf          |  DWF0_HB1 WF0_HB2 WF0_HB3 WF0_HB4 WF0_HB0 WF0_HB0_B WF0_HB5 WF0_HB6 WF0_HB7 WF0_HB8 WF0_HB9 WF0_HB10 WF0_TOP_CLK WF0_TOP_DATA         V               pwm@10048000              mediatek,mt7986-pwm          J                                                                                   top main pwm1 pwm2        	   disabled          syscon@10060000       "    mediatek,mt7986-sgmiisys_0 syscon            J                                     "      syscon@10070000       "    mediatek,mt7986-sgmiisys_1 syscon            J                                     #      rng@1020f000          (    mediatek,mt7986-rng mediatek,mt7623-rng          J                           7        rng       	   disabled          crypto@10320000           inside-secure,safexcel-eip97             J    2               0          t          u          v          w           ring0 ring1 ring2 ring3                             3                       okay          serial@11002000       *    mediatek,mt7986-uart mediatek,mt6577-uart            J                              {                             	  baud bus                                                      okay          serial@11003000       *    mediatek,mt7986-uart mediatek,mt6577-uart            J     0                        |                             	  baud bus                                6         okay            default                  serial@11004000       *    mediatek,mt7986-uart mediatek,mt6577-uart            J     @                        }                             	  baud bus                                6         okay            default                  i2c@11008000              mediatek,mt7986-i2c           J                 !p                                                               	  main dma                         +          	   disabled          spi@1100a000          )    mediatek,mt7986-spi-ipm mediatek,spi-ipm             J                                  +                                                  #      %         parent-clk sel-clk spi-clk hclk          okay            default                               flash@0       	    spi-nand             J                                $            spi@1100b000          )    mediatek,mt7986-spi-ipm mediatek,spi-ipm             J                                  +                                                  $      &         parent-clk sel-clk spi-clk hclk          okay            default            	                      thermal@1100c800              mediatek,mt7986-thermal          J                                                    ,        therm auxadc            5   
        Acalibration-data            R           h           x               -      adc@1100d000              mediatek,mt7986-auxadc           J                           ,        main                     	   disabled                      usb@11200000          '    mediatek,mt7986-xhci mediatek,mtk-xhci            J             .      >              	  mac ippc                             (        1      2      /      0      ;      $  sys_ck ref_ck mcu_ck dma_ck xhci_ck                                    okay          mmc@11230000              mediatek,mt7986-mmc           J    #                                                       #      "                          (        #      )      (      *      +      %  source hclk source_cg bus_clk sys_cg          	   disabled            default state_uhs                                                                                 @                                                       pcie@11280000         *    mediatek,mt7986-pcie mediatek,mt8192-pcie            J    (        @       	  pcie-mac                                                Npci                      +                              !                      4      3      5      6      !  pl_250m tl_26m peri_26m top_133m                        	  +pcie-phy                        5                     `  H                                                                                              okay            default               interrupt-controller                                                            t-phy         .    mediatek,mt7986-tphy mediatek,generic-tphy-v2                                  +            okay       pcie-phy@11c00000            J                                ref         V                        efuse@11d00000        %    mediatek,mt7986-efuse mediatek,efuse             J                                  +      calib@274            J  t               
         t-phy@11e10000        .    mediatek,mt7986-tphy mediatek,generic-tphy-v2                                              +            okay       usb-phy@0            J                     <      =        ref da_ref          V                     usb-phy@700          J     	               5        ref         V                     usb-phy@1000             J                    <      =        ref da_ref          V                        syscon@15000000           mediatek,mt7986-ethsys syscon            J                                                  !      wed@15010000              mediatek,mt7986-wed syscon           J                                                    a                     %  owo-emi wo-ilm wo-dlm wo-data wo-boot                           %      wed@15011000              mediatek,mt7986-wed syscon           J                                                   a                     %  owo-emi wo-ilm wo-dlm wo-data wo-boot                            &      ethernet@15100000             mediatek,mt7986-eth          J                   0                                                 x     !       !      !      !      !      "       "      "      "      #       #      #      #         +      ,        fe gp2 gp1 wocpu1 wocpu0 sgmii_tx250m sgmii_rx250m sgmii_cdr_ref sgmii_cdr_fb sgmii2_tx250m sgmii2_rx250m sgmii2_cdr_ref sgmii2_cdr_fb netsys0 netsys1                .      /                                         +               !           "   #           $           %   &         okay       mac@0             mediatek,eth-mac             J            2500base-x              (   fixed-link            	                           mac@1             mediatek,eth-mac             J           rgmii               '   fixed-link                                       mdio-bus                         +       switch@0              mediatek,mt7531          J                        ports                        +       port@0           J            lan0          port@1           J           lan1          port@2           J           lan2          port@3           J           lan3          port@4           J           lan4          port@5           J              '        rgmii      fixed-link                                       port@6           J           cpu            (        2500base-x     fixed-link            	                                       syscon@151a5000           mediatek,mt7986-wo-ccif syscon           J    P                                                         syscon@151ad000           mediatek,mt7986-wo-ccif syscon           J                                                              wifi@18000000             mediatek,mt7986-wmac          0   J                   0                                )           consys                2      >        mcu ap2conn       0                                                   a   *         okay            default dbdc               +           ,         thermal-zones      cpu-thermal                   4          B   -       trips      crit            R H        ^        	   Ecritical          hot         R         ^           Ehot       active-high         R 8        ^           Eactive        active-med          R L        ^           Eactive        active-low          R  `        ^           Eactive                 timer             arm,armv8-timer                   0                                    
         aliases         i/soc/serial@11002000          chosen          qserial0:115200n8          memory@40000000          Nmemory           J    @       @         regulator-1p8v            regulator-fixed         }fixed-1.8V           w@         w@                                    regulator-3p3v            regulator-fixed         }fixed-3.3V           2Z         2Z                                       	compatible interrupt-parent #address-cells #size-cells model chassis-type reg device_type enable-method #cooling-cells clock-frequency #clock-cells clock-output-names phandle ranges no-map interrupts interrupt-controller #interrupt-cells #reset-cells status reg-names gpio-controller #gpio-cells gpio-ranges function groups pins input-enable drive-strength bias-pull-up bias-pull-down #pwm-cells clocks clock-names interrupt-names assigned-clocks assigned-clock-parents pinctrl-names pinctrl-0 clock-div cs-gpios spi-max-frequency spi-tx-bus-width spi-rx-bus-width nvmem-cells nvmem-cell-names #thermal-sensor-cells mediatek,auxadc mediatek,apmixedsys #io-channel-cells phys pinctrl-1 cap-mmc-highspeed mmc-hs200-1_8v mmc-hs400-1_8v hs400-ds-delay vmmc-supply vqmmc-supply non-removable no-sd no-sdio bus-range phy-names interrupt-map-mask interrupt-map #phy-cells memory-region memory-region-names mediatek,wo-ccif mediatek,ethsys mediatek,sgmiisys mediatek,wed-pcie mediatek,wed phy-mode full-duplex pause reset-gpios label ethernet resets reset-names polling-delay-passive polling-delay thermal-sensors temperature hysteresis serial0 stdout-path regulator-name regulator-min-microvolt regulator-max-microvolt regulator-boot-on regulator-always-on 