  7z   8  3   (              3\                             &    mediatek,mt7986b-rfb mediatek,mt7986b                                    +            7MediaTek MT7986b RFB          	   =embedded       cpus                         +       cpu@0             arm,cortex-a53           J             Ncpu          Zpsci             h         cpu@1             arm,cortex-a53           J            Ncpu          Zpsci             h         cpu@2             arm,cortex-a53           J            Ncpu          Zpsci             h         cpu@3             arm,cortex-a53           J            Ncpu          Zpsci             h            oscillator-40m            fixed-clock          wbZ                       clkxtal                   psci              arm,psci-0.2             asmc       reserved-memory                      +                secmon@43000000          J    C                          wmcpu-reserved@4fc00000                    J    O                     #      wo-emi@4fd00000          J    O                                     wo-emi@4fd40000          J    O                                     wo-ilm@151e0000          J                                         wo-ilm@151f0000          J                                         wo-data@4fd80000             J    O       $                              wo-dlm@151e8000          J                                         wo-dlm@151f8000          J                                         wo-boot@15194000             J    @                                       soc           simple-bus                                 +      interrupt-controller@c000000              arm,gic-v3        P   J                               @              A             B                                     	                                           infracfg@10001000              mediatek,mt7986-infracfg syscon          J                                                       wed-pcie@10003000              mediatek,mt7986-wed-pcie syscon          J     0                          topckgen@1001b000              mediatek,mt7986-topckgen syscon          J                                          watchdog@1001c000             mediatek,mt7986-wdt          J                            n                     	   disabled                "      apmixedsys@1001e000           mediatek,mt7986-apmixedsys           J                                          pinctrl@1001f000              mediatek,mt7986b-pinctrl             J                                                                                                             @  gpio iocfg_rt iocfg_rb iocfg_lt iocfg_lb iocfg_tr iocfg_tl eint                              (              )      B   B   #                                                                    spi-flash-pins                 mux         4spi         =spi0 spi0_wp_hold            spic-pins                  mux         4spi         =spi1_2           wf-2g-5g-pins               $   mux         4wifi            =wf_2g wf_5g       conf            DWF0_HB1 WF0_HB2 WF0_HB3 WF0_HB4 WF0_HB0 WF0_HB0_B WF0_HB5 WF0_HB6 WF0_HB7 WF0_HB8 WF0_HB9 WF0_HB10 WF0_TOP_CLK WF0_TOP_DATA WF1_HB1 WF1_HB2 WF1_HB3 WF1_HB4 WF1_HB0 WF1_HB5 WF1_HB6 WF1_HB7 WF1_HB8 WF1_TOP_CLK WF1_TOP_DATA            I            wf-dbdc-pins                %   mux         4wifi            =wf_dbdc       conf          |  DWF0_HB1 WF0_HB2 WF0_HB3 WF0_HB4 WF0_HB0 WF0_HB0_B WF0_HB5 WF0_HB6 WF0_HB7 WF0_HB8 WF0_HB9 WF0_HB10 WF0_TOP_CLK WF0_TOP_DATA         I               pwm@10048000              mediatek,mt7986-pwm          J                    X                               c                                jtop main pwm1 pwm2        	   disabled          syscon@10060000       "    mediatek,mt7986-sgmiisys_0 syscon            J                                           syscon@10070000       "    mediatek,mt7986-sgmiisys_1 syscon            J                                           rng@1020f000          (    mediatek,mt7986-rng mediatek,mt7623-rng          J                     c      7        jrng       	   disabled          crypto@10320000           inside-secure,safexcel-eip97             J    2               0          t          u          v          w           vring0 ring1 ring2 ring3         c                    3                       okay          serial@11002000       *    mediatek,mt7986-uart mediatek,mt6577-uart            J                              {           c                  	  jbaud bus                                                      okay          serial@11003000       *    mediatek,mt7986-uart mediatek,mt6577-uart            J     0                        |           c                  	  jbaud bus                                6      	   disabled          serial@11004000       *    mediatek,mt7986-uart mediatek,mt6577-uart            J     @                        }           c                  	  jbaud bus                                6      	   disabled          i2c@11008000              mediatek,mt7986-i2c           J                 !p                                             c                  	  jmain dma                         +          	   disabled          spi@1100a000          )    mediatek,mt7986-spi-ipm mediatek,spi-ipm             J                                  +                                c                  #      %         jparent-clk sel-clk spi-clk hclk          okay            default                               flash@0       	    spi-nand             J                                            spi@1100b000          )    mediatek,mt7986-spi-ipm mediatek,spi-ipm             J                                  +                                c                  $      &         jparent-clk sel-clk spi-clk hclk          okay            default                                  thermal@1100c800              mediatek,mt7986-thermal          J                                        c            ,        jtherm auxadc                       calibration-data            )           ?   	        O               &      adc@1100d000              mediatek,mt7986-auxadc           J                     c      ,        jmain            c         	   disabled                	      usb@11200000          '    mediatek,mt7986-xhci mediatek,mtk-xhci            J             .      >              	  mac ippc                             (  c      1      2      /      0      ;      $  jsys_ck ref_ck mcu_ck dma_ck xhci_ck         u   
                        okay          mmc@11230000              mediatek,mt7986-mmc           J    #                                                       #      "                          (  c      #      )      (      *      +      %  jsource hclk source_cg bus_clk sys_cg          	   disabled          pcie@11280000         *    mediatek,mt7986-pcie mediatek,mt8192-pcie            J    (        @       	  pcie-mac                                                Npci                      +                              z                c      4      3      5      6      !  jpl_250m tl_26m peri_26m top_133m            u            	  pcie-phy                                             `                                                                                             	   disabled       interrupt-controller                                                            t-phy         .    mediatek,mt7986-tphy mediatek,generic-tphy-v2                                  +         	   disabled       pcie-phy@11c00000            J                     c           jref                                 efuse@11d00000        %    mediatek,mt7986-efuse mediatek,efuse             J                                  +      calib@274            J  t                        t-phy@11e10000        .    mediatek,mt7986-tphy mediatek,generic-tphy-v2                                              +            okay       usb-phy@0            J               c      <      =        jref da_ref                         
      usb-phy@700          J     	         c      5        jref                              usb-phy@1000             J              c      <      =        jref da_ref                                  syscon@15000000           mediatek,mt7986-ethsys syscon            J                                                        wed@15010000              mediatek,mt7986-wed syscon           J                                                                         %  wo-emi wo-ilm wo-dlm wo-data wo-boot                                 wed@15011000              mediatek,mt7986-wed syscon           J                                                                        %  wo-emi wo-ilm wo-dlm wo-data wo-boot                                 ethernet@15100000             mediatek,mt7986-eth          J                   0                                                 x  c                                                                                       +      ,        jfe gp2 gp1 wocpu1 wocpu0 sgmii_tx250m sgmii_rx250m sgmii_cdr_ref sgmii_cdr_fb sgmii2_tx250m sgmii2_rx250m sgmii2_cdr_ref sgmii2_cdr_fb netsys0 netsys1                .      /                                         +                                                !               okay       mac@0             mediatek,eth-mac             J            .2500base-x              !   fixed-link          7  	         =         I         mac@1             mediatek,eth-mac             J           .rgmii                   fixed-link          7           =         I         mdio-bus                         +       switch@0              mediatek,mt7531          J           O             ports                        +       port@0           J            [lan0          port@1           J           [lan1          port@2           J           [lan2          port@3           J           [lan3          port@4           J           [lan4          port@5           J           a            .rgmii      fixed-link          7           =         I         port@6           J           [cpu         a   !        .2500base-x     fixed-link          7  	         =         I                     syscon@151a5000           mediatek,mt7986-wo-ccif syscon           J    P                                                         syscon@151ad000           mediatek,mt7986-wo-ccif syscon           J                                                             wifi@18000000             mediatek,mt7986-wmac          0   J                   0                             j   "           qconsys          c      2      >        jmcu ap2conn       0                                                      #         okay            default dbdc               $        }   %         thermal-zones      cpu-thermal                                &       trips      crit             H                	   Ecritical          hot                             Ehot       active-high          8                   Eactive        active-med           L                   Eactive        active-low            `                   Eactive                 timer             arm,armv8-timer                   0                                    
         aliases         /soc/serial@11002000          chosen          serial0:115200n8          memory@40000000          Nmemory           J    @       @            	compatible interrupt-parent #address-cells #size-cells model chassis-type reg device_type enable-method #cooling-cells clock-frequency #clock-cells clock-output-names phandle ranges no-map interrupts interrupt-controller #interrupt-cells #reset-cells status reg-names gpio-controller #gpio-cells gpio-ranges function groups pins drive-strength #pwm-cells clocks clock-names interrupt-names assigned-clocks assigned-clock-parents clock-div pinctrl-names pinctrl-0 cs-gpios spi-max-frequency spi-tx-bus-width spi-rx-bus-width nvmem-cells nvmem-cell-names #thermal-sensor-cells mediatek,auxadc mediatek,apmixedsys #io-channel-cells phys bus-range phy-names interrupt-map-mask interrupt-map #phy-cells memory-region memory-region-names mediatek,wo-ccif mediatek,ethsys mediatek,sgmiisys mediatek,wed-pcie mediatek,wed phy-mode speed full-duplex pause reset-gpios label ethernet resets reset-names pinctrl-1 polling-delay-passive polling-delay thermal-sensors temperature hysteresis serial0 stdout-path 