  :   8  6   (              6                             (    mediatek,mt8167-pumpkin mediatek,mt8167                                  +            7Pumpkin MT8167        	   =embedded       opp-table-0           operating-points-v2           J         U      opp-598000000            ]    #         d 0      opp-747500000            ]    ,         d 0      opp-1040000000           ]    =$          d O      opp-1196000000           ]    GI          d       opp-1300000000           ]    M|m          d           cpus                         +       cpu@0            rcpu           arm,cortex-a35           ~             psci                                                           cpu intermediate                         U         cpu@1            rcpu           arm,cortex-a35           ~            psci                                                           cpu intermediate                         U   	      cpu@2            rcpu           arm,cortex-a35           ~            psci                                                           cpu intermediate                         U   
      cpu@3            rcpu           arm,cortex-a35           ~            psci                                                           cpu intermediate armpll                      U         idle-states          psci       cpu-sleep-0-0             arm,idle-state             X           X                               U         cluster-sleep-0           arm,idle-state                                                       U               psci              arm,psci-1.0             smc       clk26m            fixed-clock                     *        :clk26m        clk32k            fixed-clock                     *  }         :clk32k        reserved-memory                      +            M   secmon@43000000          T         ~    C                   timer             arm,armv8-timer                   0  [                              
        pmu           arm,cortex-a35-pmu        0  [                                                f      	   
         soc                      +             simple-bus           M   topckgen@10000000              mediatek,mt8167-topckgen syscon          ~                                  U         infracfg@10001000              mediatek,mt8167-infracfg syscon          ~                                 U         pericfg@10003050              mediatek,mt8516-pericfg syscon           ~     0P                U         apmixedsys@10018000       "    mediatek,mt8167-apmixedsys syscon            ~                            watchdog@10007000         (    mediatek,mt8516-wdt mediatek,mt6589-wdt          ~     p                [                  y         timer@10008000        ,    mediatek,mt8516-timer mediatek,mt6577-timer          ~                     [                         *      E         clk13m bus        syscfg-pctl@10005000              syscon           ~     P                 U         pinctrl@1000b000              mediatek,mt8167-pinctrl          ~                                                                        [                   U      gpiodefault          U      pins_cmd_dat              *   +                            i2c0             U      pins1             :  ;                  i2c2             U      pins1             <  =                  pinmux_tca6416_pins          U      gpio_mux_rst_n_pin            A                gpio_mux_int_n_pin            @                            ethernet             U      pins_ethernet         (                 	    &  '            efuse@10009000        %    mediatek,mt8516-efuse mediatek,efuse             ~                                  +         pwrap@1000f000            mediatek,mt8516-pwrap            ~                     pwrap           [                         I      A      	   spi wrap          interrupt-controller@10200620         .    mediatek,mt8516-sysirq mediatek,mt6577-sysirq                                            ~                       U         interrupt-controller@10310000             arm,gic-400                                       @   ~    1             2             4              6                  [      	           U         dma-controller@11000480       2    mediatek,mt8516-uart-dma mediatek,mt6577-uart-dma         `   ~                                                       	            
              H  [       `          a          b          c          d          e           !                  /         apdma           .            U         serial@11005000       *    mediatek,mt8516-uart mediatek,mt6577-uart            ~     P                [       T                        7      	   baud bus            9                     >tx rx           Hokay          serial@11006000       *    mediatek,mt8516-uart mediatek,mt6577-uart            ~     `                [       U                        8      	   baud bus            9                    >tx rx         	  Hdisabled          serial@11007000       *    mediatek,mt8516-uart mediatek,mt6577-uart            ~     p                [                               a      	   baud bus            9                    >tx rx         	  Hdisabled          i2c@11009000          (    mediatek,mt8516-i2c mediatek,mt2712-i2c           ~                                 [       P           O                  0      /      	   main dma                         +            Hokay            Ydefault         g      gpio@20           ti,tca6416           ~            q      A           Ydefault         g                          eint20-mux-sel0-hog          }        w                         eint20_mux_sel0       expcon-mux-sel1-hog          }        w                        expcon_mux_sel1       mrg-di-mux-sel2-hog          }        w                        mrg_di_mux_sel2       sd-sdio-mux-sel3-hog             }        w                        sd_sdio_mux_sel3          sd-sdio-mux-ctrl7-hog            }        w                        sd_sdio_mux_ctrl7         hw-id0-hog           }        w                        hw_id0        hw-id1-hog           }        w   	                     hw_id1        hw-id2-hog           }        w   
                     hw_id2        fg-int-n-hog             }        w                      	  fg_int_n          usba-pwr-en-hog          }        w                        usba_pwr_en       wifi-3v3-pg-hog          }        w                        wifi_3v3_pg       cam-rst-hog          }        w                        cam_rst       cam-pwdn-hog             }        w                      	  cam_pwdn                i2c@1100a000          (    mediatek,mt8516-i2c mediatek,mt2712-i2c           ~                                  [       Q           O                  1      /      	   main dma                         +          	  Hdisabled          i2c@1100b000          (    mediatek,mt8516-i2c mediatek,mt2712-i2c           ~                                 [       R           O                  =      /      	   main dma                         +            Hokay            Ydefault         g         spi@1100c000          (    mediatek,mt8516-spi mediatek,mt2712-spi                      +             ~                     [       h                              D         parent-clk sel-clk spi-clk        	  Hdisabled          mmc@11120000              mediatek,mt8516-mmc          ~                     [       N                  >                     source hclk source_cg         	  Hdisabled          mmc@11130000              mediatek,mt8516-mmc          ~                     [       O                  ?                     source hclk source_cg         	  Hdisabled          mmc@11170000              mediatek,mt8516-mmc          ~                     [       m                  L      d               source hclk source_cg         	  Hdisabled          ethernet@11180000             mediatek,mt8516-eth          ~                                [       o                  e      [      \         core reg trans          Hokay            Ydefault         g                      rmii                       mdio                         +       ethernet-phy@0           ~             U               rng@1020c000          (    mediatek,mt8516-rng mediatek,mt7623-rng          ~                            P         rng       pwm@11008000              mediatek,mt8516-pwm          ~                                [       L         8         6      S      T      U      V      W      X      "   top main pwm1 pwm2 pwm3 pwm4 pwm5         usb@11100000          '    mediatek,mt8516-musb mediatek,mtk-musb           ~                     [       H           mc                               :      `      Y         main mcu univpll            Hokay            peripheral              connector             usb-c-connector         
USB-C            usb@11190000          '    mediatek,mt8516-musb mediatek,mtk-musb           ~                     [                  mc                               :      `      Y         main mcu univpll            host          	  Hdisabled          t-phy@11110000        .    mediatek,mt8516-tphy mediatek,generic-tphy-v1            ~                                  +            M        Hokay       usb-phy@11110800             ~                                     ref                     U         usb-phy@11110900             ~    	                                 ref                     U            adc@11003000          .    mediatek,mt8516-auxadc mediatek,mt8173-auxadc            ~     0                       J         main                     	  Hdisabled          syscon@10006000       )    mediatek,mt8167-scpsys syscon simple-mfd             ~     `           power-controller          !    mediatek,mt8167-power-controller                         +            -            U      power-domain@0           ~                            mm          -            A         power-domain@1           ~                                 mm vdec         -          power-domain@2           ~                           mm          -          power-domain@4           ~                                 axi_mfg mfg                      +            -           A      power-domain@5           ~                        +            -      power-domain@6           ~           -            A               power-domain@3           ~           -            A               syscon@15000000           mediatek,mt8167-imgsys syscon            ~                                  U         syscon@16000000           mediatek,mt8167-vdecsys syscon           ~                                  U         syscon@14000000           mediatek,mt8167-mmsys syscon             ~                                  U         smi@14017000              mediatek,mt8167-smi-common           ~    p                                        apb smi         S                U         larb@14016000             mediatek,mt8167-smi-larb             ~    `                a                                 apb smi         S                U         larb@15001000             mediatek,mt8167-smi-larb             ~                     a                                   apb smi         S               U         larb@16010000             mediatek,mt8167-smi-larb             ~                     a                                  apb smi         S               U         m4u@10203000              mediatek,mt8167-m4u          ~     0                n                 [       y           }            aliases         /soc/serial@11005000            /soc/ethernet@11180000        chosen          serial0:921600n8          firmware       optee             linaro,optee-tz          smc          gpio-keys         
    gpio-keys           Ydefault         g      key-volume-up           w      *         
  
volume_up              s                          key-volume-down         w      +           
volume_down            r                             memory@40000000          rmemory           ~    @                   	compatible interrupt-parent #address-cells #size-cells model chassis-type opp-shared phandle opp-hz opp-microvolt device_type reg enable-method cpu-idle-states clocks clock-names operating-points-v2 entry-method entry-latency-us exit-latency-us min-residency-us arm,psci-suspend-param #clock-cells clock-frequency clock-output-names ranges no-map interrupts interrupt-affinity #reset-cells mediatek,pctl-regmap gpio-controller #gpio-cells interrupt-controller #interrupt-cells pinmux bias-pull-up input-enable bias-disable output-high reg-names dma-requests #dma-cells dmas dma-names status clock-div pinctrl-names pinctrl-0 reset-gpios gpio-hog input line-name output-low mediatek,pericfg phy-handle phy-mode mac-address #pwm-cells interrupt-names phys dr_mode usb-role-switch label #phy-cells #io-channel-cells #power-domain-cells mediatek,infracfg power-domains mediatek,smi mediatek,larbs #iommu-cells serial0 ethernet0 stdout-path linux,code wakeup-source debounce-interval 