  a1   8  ZT   (              Z                             $    mediatek,mt8365-evk mediatek,mt8365                                  +         "   7MediaTek MT8365 Open Platform EVK      cpus                         +       opp-table-0           operating-points-v2           =         H      opp-850000000            P    2         W 	      opp-918000000            P    6         W 
4N      opp-987000000            P    :l         W 
}      opp-1056000000           P    >H          W 
      opp-1125000000           P    C#@         W       opp-1216000000           P    Hz          W q      opp-1308000000           P    M          W X      opp-1400000000           P    SrN          W 5       opp-1466000000           P    Wab         W       opp-1533000000           P    [_@         W P      opp-1633000000           P    aU@         W       opp-1700000000           P    eS          W t      opp-1767000000           P    iRG         W N      opp-1834000000           P    mP         W       opp-1917000000           P    rC@         W )      opp-2001000000           P    wD@         W          cpu-map    cluster0       core0            e         core1            e         core2            e         core3            e               cpu@0            icpu           arm,cortex-a53           u             y            psci                                              @                                    @                        	           
                  cpu intermediate            "           6           B            H         cpu@1            icpu           arm,cortex-a53           u            y            psci                                              @                                    @                        	           
                  cpu intermediate armpll         "           6           B            H         cpu@2            icpu           arm,cortex-a53           u            y            psci                                              @                                    @                        	           
                  cpu intermediate armpll         "           6           B            H         cpu@3            icpu           arm,cortex-a53           u            y            psci                                              @                                    @                        	           
                  cpu intermediate armpll         "           6           B            H         idle-states         Npsci       cpu-mcdi              arm,idle-state           [        l            ,                              H         cluster-mcdi              arm,idle-state           [        l           ^                              H         cluster-dpidle            arm,idle-state           [        l           ,                              H            l2-cache              cache                                      @                              H   	         oscillator            fixed-clock                             clk26m           H         psci              arm,psci-1.0             smc       soc                      +             simple-bus              interrupt-controller@c000000              arm,gic-v3                                        P   u                               @              A             B                  ,      	            H         syscon@10000000            mediatek,mt8365-topckgen syscon          u                                  H         syscon@10001000            mediatek,mt8365-infracfg syscon          u                                 H         syscon@10003000           mediatek,mt8365-pericfg syscon           u     0                         syscfg-pctl@10005000              mediatek,mt8365-syscfg syscon            u     P                 H         syscon@10006000       )    mediatek,mt8365-scpsys syscon simple-mfd             u     `           power-controller          !    mediatek,mt8365-power-controller                         +            7            H   3   power-domain@0           u          (        ?                                mm mm-0 mm-1 mm-2 mm-3          7            K           ]                        +       power-domain@4           u         0                                             $  cam-0 cam-1 cam-2 cam-3 cam-4 cam-5         7            K           s         power-domain@6           u           7            s         power-domain@7           u           7            s         power-domain@8           u         8        :                                           (  apu apu-0 apu-1 apu-2 apu-3 apu-4 apu-5         7            K           s            power-domain@1           u                               conn conn1          7            K         power-domain@2           u                 A        mfg         7            K         power-domain@3           u                 M      !      $        audio audio1 audio2         7            K         power-domain@5           u                 _            	  dsp dsp1            7            K               watchdog@10007000         (    mediatek,mt8365-wdt mediatek,mt6589-wdt          u     p                         pinctrl@1000b000              mediatek,mt8365-pinctrl          u                                                                        ,       s            H      audiodefault-pins            H   8   clk-dat-pins              H  I  J  K         audiodmic-pins           H   9   clk-dat-pins              u  v  w         misooff-pins             H   :   clk-dat-pins              5   6   7   8                                       misoon-pins          H   ;   clk-dat-pins              5  6  7  8                    mosioff-pins             H   <   clk-dat-pins              1   2   3   4                                       mosion-pins          H   =   clk-dat-pins              1  2  3  4                    ethernet-pins            H   1   phy_reset_pins                   rmii_pins         @                       	  
                   gpio-keys-pins           H   7   pins                                         i2c0-pins            H   #   pins              9  :                  mmc0-default-pins            H   )   clk-pins              c               cmd-dat-pins          $    g  f  e  d  `  _  ^  ]  b                        rst-pins              a                  mmc0-uhs-pins            H   *   clk-pins              c           
           f      cmd-dat-pins          $    g  f  e  d  `  _  ^  ]  b                    
           e      ds-pins           h           
           f      rst-pins              a           
                  mmc1-default-pins            H   -   cd-pins           L                clk-pins              X           f      cmd-dat-pins              Y  Z  [  \  W                    e         mmc1-uhs-pins            H   .   clk-pins              X                      f      cmd-dat-pins              Y  Z  [  \  W                               e         uart0-pins           H      pins              #  $         uart1-pins           H       pins              %  &         uart2-pins           H   !   pins              '  (         usb-pins             H   &   id-pins                                    usb0-vbus-pins                           usb1-vbus-pins                               pwm-pins             H   "   pins                t            syscon@1000c000       "    mediatek,mt8365-apmixedsys syscon            u                                 H         pwrap@1000d000            mediatek,mt8365-pwrap            u                     	pwrap           ,       {                  /            0      .        spi wrap sys tmr       pmic              mediatek,mt6357                                              '         C    adc           mediatek,mt6357-auxadc          _         regulators     buck-vproc          qvproc            ^                   j                             H         buck-vcore          qvcore            ^                   j                          buck-vmodem         qvmodem                     7          j                 buck-vs1            qvs1          O         !          0                          buck-vpa            qvpa                    7          P                 ldo-vfe28           qvfe28            *         *                ldo-vxo22           qvxo22            !         $            n      ldo-vrf18           qvrf18            w@         w@           n      ldo-vrf12           qvrf12            O         O           n      ldo-vefuse          qvefuse           O         2Z                ldo-vcn33-bt          	  qvcn33-bt             2Z         5g                ldo-vcn33-wifi          qvcn33-wifi           2Z         5g                ldo-vcn28           qvcn28            *         *                ldo-vcn18           qvcn18            w@         w@                ldo-vcama           qvcama            &%         *                ldo-vcamd           qvcamd            B@         w@                ldo-vcamio18            qvcamio           w@         w@                ldo-vldo28          qvldo28           *         -                ldo-vsram-others            qvsram-others             ^                   j           n               ldo-vsram-proc          qvsram-proc           ^                   j           n                  H         ldo-vaux18          qvaux18           w@         w@                ldo-vaud28          qvaud28           *         *                ldo-vio28           qvio28            *         *                ldo-vio18           qvio18            w@         w@                            H   ,      ldo-vdram           qvdram                     O                ldo-vmc         qvmc          w@         2Z           ,         H   0      ldo-vmch            qvmch             ,@          2Z           ,         H   /      ldo-vemc            qvemc             ,@          2Z           ,                  H   +      ldo-vsim1           qvsim1                     /M`                ldo-vsim2           qvsim2                     /M`                ldo-vibr            qvibr             O         2Z           ,      ldo-vusb33          qvusb33           -         /M`                   H   '         rtc           mediatek,mt6357-rtc       keys              mediatek,mt6357-keys       key-power              t               key-home               f                        keypad@10010000       .    mediatek,mt8365-keypad mediatek,mt6779-keypad            u                              ,       |                      kpd       	  disabled          syscon@10200000           mediatek,mt8365-mcucfg syscon            u                                   H   
      interrupt-controller@10200a80         .    mediatek,mt8365-sysirq mediatek,mt6577-sysirq                                            u     
                 H         iommu@10205000            mediatek,mt8365-m4u          u     P                ,       f                               (         infracfg@1020e000              mediatek,mt8365-infracfg syscon          u                                 H         rng@1020f000          (    mediatek,mt8365-rng mediatek,mt7623-rng          u                                   rng       dma-controller@11000280       2    mediatek,mt8365-uart-dma mediatek,mt6577-uart-dma         `   u                                                                                 H  ,       -          .          /          0          3          4           5                         apdma           B            H         serial@11002000       *    mediatek,mt8365-uart mediatek,mt6577-uart            u                      ,       #                          	  baud bus            M                     Rtx rx           okay            \           fdefault       serial@11003000       *    mediatek,mt8365-uart mediatek,mt6577-uart            u     0                ,       $                          	  baud bus            M                    Rtx rx           okay            \            fdefault       serial@11004000       *    mediatek,mt8365-uart mediatek,mt6577-uart            u     @                ,       %                          	  baud bus            M                    Rtx rx           okay            \   !        fdefault       pwm@11006000              mediatek,mt8365-pwm          u     `                t           ,       L         (                          	      
        top main pwm1 pwm2 pwm3         \   "        fdefault         okay          i2c@11007000          (    mediatek,mt8365-i2c mediatek,mt8168-i2c           u     p                             ,                                   4            	  main dma                         +            okay                     \   #        fdefault       i2c@11008000          (    mediatek,mt8365-i2c mediatek,mt8168-i2c           u                                  ,                                   5            	  main dma                         +          	  disabled          i2c@11009000          (    mediatek,mt8365-i2c mediatek,mt8168-i2c           u                                 ,                                   6            	  main dma                         +          	  disabled          spi@1100a000          (    mediatek,mt8365-spi mediatek,mt7622-spi          u                                  +            ,       >                       F              parent-clk sel-clk spi-clk        	  disabled          i2c@1100f000          (    mediatek,mt8365-i2c mediatek,mt8168-i2c           u                                  ,                                   7            	  main dma                         +          	  disabled          usb@11201000          #    mediatek,mt8365-mtu3 mediatek,mtu3            u            .      >              	  	mac ippc            ,                     $      %                        E      D              sys_ck ref_ck mcu_ck dma_ck                      +                    okay            otg         high-speed          \   &        fdefault                     '   usb@11200000          '    mediatek,mt8365-xhci mediatek,mtk-xhci           u                      	mac         ,       C         (              E      D            F      $  sys_ck ref_ck mcu_ck dma_ck xhci_ck         okay               '      connector         %    gpio-usb-b-connector usb-b-connector                               pmicro              (         mmc@11230000          (    mediatek,mt8365-mmc mediatek,mt8183-mmc           u    #                              ,                        I            +        source hclk source_cg           okay                  5              I                                     +          :          H         W         f         l         t        \   )           *        fdefault state_uhs              +           ,      mmc@11240000          (    mediatek,mt8365-mmc mediatek,mt8183-mmc           u    $                              ,                        K            ,        source hclk source_cg           okay                                      L           :         \   -           .        fdefault state_uhs                                /           0      mmc@11250000          (    mediatek,mt8365-mmc mediatek,mt8183-mmc           u    %                              ,       D         (        J            -      A      )      %  source hclk source_cg bus_clk sys_cg          	  disabled          ethernet@112a0000             mediatek,mt8365-eth          u    *                            ,                        c      8      9        core reg trans        	  disabled            \   1        fdefault            2        rmii       mdio                         +       ethernet-phy@0           u             H   2            t-phy@11cc0000        .    mediatek,mt8365-tphy mediatek,generic-tphy-v2                        +                           usb-phy@0            u                                   ref da_ref                      H   $      usb-phy@1000             u                                  ref da_ref                      H   %         syscon@14000000           mediatek,mt8365-mmsys syscon             u                                  H         smi@14002000              mediatek,mt8365-smi-common           u                                                       apb smi gals0 gals1         
   3             H         larb@14003000         2    mediatek,mt8365-smi-larb mediatek,mt8186-smi-larb            u     0                s                               apb smi         
   3                         H         syscon@15000000           mediatek,mt8365-imgsys syscon            u                                  H         larb@15001000         2    mediatek,mt8365-smi-larb mediatek,mt8186-smi-larb            u                     s                                apb smi         
   3                       H         syscon@16000000           mediatek,mt8365-vdecsys syscon           u                                  H   4      larb@16010000         2    mediatek,mt8365-smi-larb mediatek,mt8186-smi-larb            u                     s              4      4           apb smi         
   3                       H         syscon@17000000           mediatek,mt8365-vencsys syscon           u                                  H   5      larb@17010000         2    mediatek,mt8365-smi-larb mediatek,mt8186-smi-larb            u                     s              5       5            apb smi         
   3                       H         syscon@19020000           mediatek,mt8365-apu syscon           u                                 H         audio-controller@11220000             mediatek,mt8365-afe-pcm          u    "                 )          l           L      y      z      {      |      P      Q      N      O      i      j      k      l        top_clk26m_clk top_audio_sel audio_i2s0_m audio_i2s1_m audio_i2s2_m audio_i2s3_m engen1 engen2 aud1 aud2 i2s0_m_sel i2s1_m_sel i2s2_m_sel i2s3_m_sel            ,       a           
   3           okay            :            H   >         timer             arm,armv8-timer                   0  ,                                 
         dummy13m              fixed-clock          ]@                     H   6      timer@10017000        /    mediatek,mt8365-systimer mediatek,mt6765-timer           u    p                ,                     6        clk13m        aliases         M/soc/serial@11002000          chosen          Userial0:921600n8          firmware       optee             linaro,optee-tz          smc          gpio-keys         
    gpio-keys           fdefault         \   7   key-volume-up                          
  avolume_up           g   s                 r            memory@40000000          imemory           u    @                regulator-0           regulator-fixed       	  qotg_vbus             LK@         LK@                                    H   (      reserved-memory                      +               secmon@43000000                   u    C                optee@43200000                    u    C                   sound             mediatek,mt8365-mt6357        /  fdefault dmic miso_off miso_on mosi_off mosi_on          \   8           9           :           ;           <           =           >         	compatible interrupt-parent #address-cells #size-cells model opp-shared phandle opp-hz opp-microvolt cpu device_type reg #cooling-cells enable-method cpu-idle-states i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache clocks clock-names operating-points-v2 proc-supply sram-supply entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us cache-level cache-unified #clock-cells clock-frequency clock-output-names ranges #interrupt-cells interrupt-controller interrupts #power-domain-cells mediatek,infracfg mediatek,infracfg-nao mediatek,smi #reset-cells mediatek,pctl-regmap gpio-controller #gpio-cells pinmux input-enable bias-pull-down drive-strength bias-pull-up output-high reg-names interrupts-extended mediatek,micbias0-microvolt mediatek,micbias1-microvolt #io-channel-cells regulator-name regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-enable-ramp-delay regulator-always-on linux,keycodes wakeup-source status mediatek,larbs #iommu-cells dma-requests #dma-cells dmas dma-names pinctrl-0 pinctrl-names #pwm-cells clock-div phys dr_mode maximum-speed usb-role-switch vusb33-supply id-gpios vbus-supply assigned-clock-parents assigned-clocks bus-width cap-mmc-highspeed cap-mmc-hw-reset hs400-ds-delay max-frequency mmc-hs200-1_8v mmc-hs400-1_8v no-sd no-sdio non-removable pinctrl-1 vmmc-supply vqmmc-supply cap-sd-highspeed cd-gpios sd-uhs-sdr104 sd-uhs-sdr50 mediatek,pericfg phy-handle phy-mode #phy-cells power-domains mediatek,larb-id #sound-dai-cells mediatek,dmic-mode serial0 stdout-path label linux,code debounce-interval gpio enable-active-high no-map pinctrl-2 pinctrl-3 pinctrl-4 pinctrl-5 mediatek,platform 