  Y   8     (            y                               4    mediatek,mt8390-evk mediatek,mt8390 mediatek,mt8188                                  +            7MediaTek Genio-700 EVK     cpus                         +       cpu@0            =cpu           arm,cortex-a55           I             Mpsci             [w5          k           ~                              @                                    @                                                     cpu@100          =cpu           arm,cortex-a55           I            Mpsci             [w5          k           ~                              @                                    @                                               	      cpu@200          =cpu           arm,cortex-a55           I            Mpsci             [w5          k           ~                              @                                    @                                               
      cpu@300          =cpu           arm,cortex-a55           I            Mpsci             [w5          k           ~                              @                                    @                                                     cpu@400          =cpu           arm,cortex-a55           I            Mpsci             [w5          k           ~                              @                                    @                                                     cpu@500          =cpu           arm,cortex-a55           I            Mpsci             [w5          k           ~                              @                                    @                                                     cpu@600          =cpu           arm,cortex-a78           I            Mpsci             [          k            ~                              @                                    @                                                     cpu@700          =cpu           arm,cortex-a78           I            Mpsci             [          k            ~                              @                                    @                                                     cpu-map    cluster0       core0                    core1              	      core2              
      core3                    core4                    core5                    core6                    core7                          idle-states         psci       cpu-off-l             arm,idle-state                      6        G   2        X   _        h  D                 cpu-off-b             arm,idle-state                      6        G   -        X           h                   cluster-off-l             arm,idle-state                    6        G   7        X           h  H                 cluster-off-b             arm,idle-state                    6        G   2        X           h                      l2-cache0             cache           y                           @                                                  l2-cache1             cache           y                           @                                                  l3-cache              cache           y                            @                                         oscillator-13m            fixed-clock                      [ ]@        clk13m             1      oscillator-26m            fixed-clock                      [        clk26m             3      oscillator-32k            fixed-clock                      [           clk32k        opp-table-gpu             operating-points-v2                     W   opp-390000000               >                          opp-431000000                                         opp-473000000               1h@         	'                 opp-515000000               F         	X                 opp-556000000               !#          	h                 opp-598000000               #         	<                 opp-640000000               &%          	                 opp-670000000               'c         
                 opp-700000000               )'          
L                 opp-730000000               +         
}                 opp-760000000               -L          
`                 opp-790000000               /q         
4                 opp-835000000               1         (r                 opp-880000000               4s          q                 opp-915000000               6         X                 opp-915000000-5             6                    0      opp-915000000-6             6         q           p      opp-950000000               8ـ         5                  opp-950000000-5             8ـ         X           0      opp-950000000-6             8ـ         q           p         pmu-a55           arm,cortex-a55-pmu                                        pmu-a78           arm,cortex-a78-pmu                                        psci              arm,psci-1.0             Tsmc       thermal-zones      cpu-little0-thermal                                        trips      trip-alert0         # L        /           Dpassive                  trip-alert1         # s        /           Dhot       trip-crit           #         /          	   Dcritical             cooling-maps       map0            :         H  ?      	   
                     cpu-little1-thermal                                       trips      trip-alert0         # L        /           Dpassive                  trip-alert1         # s        /           Dhot       trip-crit           #         /          	   Dcritical             cooling-maps       map0            :         H  ?      	   
                     cpu-little2-thermal                                       trips      trip-alert0         # L        /           Dpassive                  trip-alert1         # s        /           Dhot       trip-crit           #         /          	   Dcritical             cooling-maps       map0            :         H  ?      	   
                     cpu-little3-thermal                                       trips      trip-alert0         # L        /           Dpassive                  trip-alert1         # s        /           Dhot       trip-crit           #         /          	   Dcritical             cooling-maps       map0            :         H  ?      	   
                     cpu-big0-thermal                         d                 trips      trip-alert0         # L        /           Dpassive                  trip-alert1         # s        /           Dhot       trip-crit           #         /          	   Dcritical             cooling-maps       map0            :           ?                  cpu-big1-thermal                         d                 trips      trip-alert0         # L        /           Dpassive                  trip-alert1         # s        /           Dhot       trip-crit           #         /          	   Dcritical             cooling-maps       map0            :           ?                  apu-thermal                                        trips      trip-alert0         # L        /           Dpassive       trip-alert1         # s        /           Dhot       trip-crit           #         /          	   Dcritical                gpu-thermal                                       trips      trip-alert0         # L        /           Dpassive                  trip-alert1         # s        /           Dhot       trip-crit           #         /          	   Dcritical             cooling-maps       map0            :           ?               gpu1-thermal                                          trips      trip-alert0         # L        /           Dpassive                  trip-alert1         # s        /           Dhot       trip-crit           #         /          	   Dcritical             cooling-maps       map0            :           ?               adsp-thermal                                          trips      trip-alert0         # L        /           Dpassive       trip-alert1         # s        /           Dhot       trip-crit           #         /          	   Dcritical                vdo-thermal                                       trips      trip-alert0         # L        /           Dpassive       trip-alert1         # s        /           Dhot       trip-crit           #         /          	   Dcritical                infra-thermal                                         trips      trip-alert0         # L        /           Dpassive       trip-alert1         # s        /           Dhot       trip-crit           #         /          	   Dcritical                cam1-thermal                                          trips      trip-alert0         # L        /           Dpassive       trip-alert1         # s        /           Dhot       trip-crit           #         /          	   Dcritical                cam2-thermal                                          trips      trip-alert0         # L        /           Dpassive       trip-alert1         # s        /           Dhot       trip-crit           #         /          	   Dcritical                   timer             arm,armv8-timer                   @                                               
                [ ]@      soc                      +             simple-bus           N   interrupt-controller@c000000              arm,gic-v3          U           f                        }          I                                          	                     ppi-partitions     interrupt-partition-0                 	   
                          interrupt-partition-1                                        syscon@10000000            mediatek,mt8188-topckgen syscon          I                                           syscon@10001000       #    mediatek,mt8188-infracfg-ao syscon           I                                              !      syscon@10003000           mediatek,mt8188-pericfg syscon           I     0                              ;      pinctrl@10005000              mediatek,mt8188-pinctrl       `   I     P                                                                               0  iocfg0 iocfg_rm iocfg_lt iocfg_lm iocfg_rt eint                                                    }                              U                 audio-default-pins     pins-cmd-dat          X    e  f  g  h  i  j  k  l  m  n  r  s  t  u  v  y  z  |  }  ~             dptx-pins      pins-cmd-dat              .                  edp-panel-3v3-en-pins              Z   pins1                                eth-default-pins       pins-cc                                  pins-mdio                                   	      pins-power                               pins-rxd                                     pins-txd                                        eth-sleep-pins     pins-cc                           pins-mdio                                   $      pins-rxd                              pins-txd                                 i2c0-pins              G   pins              8  7                   1           i2c1-pins              P   pins              :  9                   1           i2c2-pins              K   pins              <  ;                   1           i2c3-pins              L   pins              >  =                   1           i2c4-pins              Q   pins              @  ?                   1           i2c5-pins              T   pins              B  A                   1           i2c6-pins              U   pins              D  C                   1           gpio-key-pins      pins              *  +  ,         mmc0-default-pins              >   pins-clk                                 I   f      pins-cmd-dat          $                             	                      e      pins-rst                                    e         mmc0-uhs-pins              ?   pins-clk                                 I   f      pins-cmd-dat          $                             	                      e      pins-ds                              I   f      pins-rst                                    e         mmc1-default-pins              B   pins-clk                                 I   f      pins-cmd-dat                               	                      e      pins-insert                              mmc1-uhs-pins              C   pins-clk                                 I   f      pins-cmd-dat                               	                      e         mmc2-default-pins      pins-clk                                 I   f      pins-cmd-dat                               	                      e      pins-pcm              {         mmc2-uhs-pins      pins-clk                                 I   f      pins-cmd-dat                               	                      e         mmc2-eint-pins     pins-dat1                       	           e         mmc2-dat1-pins     pins-dat1                      	                      e         panel-default-pins     pins-dcdc             -          X      pins-en           o          X      pins-rst                                 rt1715-int-pins            R   pins_cmd0_dat                                	         spi0-pins      pins-spi              E  F  G  H         $         spi1-pins      pins-spi              K  L  M  N         $         spi2-pins              8   pins-spi              O  P  Q  R         $         touch-pins             J   pins-irq                        	         $      pins-reset                               uart0-pins             4   pins                                   uart1-pins             5   pins              !  "                  uart2-pins             6   pins              #  $                  usb-default-pins       pins-iddig            S          	               pins-valid            U         	      pins-vbus             T                  usb1-default-pins      pins-valid            X         	      pins-usb-hub-3v3-en           p                   wifi-pwrseq-pins       pins-wifi-enable                        X            syscon@10006000       )    mediatek,mt8188-scpsys syscon simple-mfd             I     `           power-controller          !    mediatek,mt8188-power-controller                         +            c              X   power-domain@0           I                         +            c      power-domain@1           I           w                     ~mfg alt            !                     +            c      power-domain@2           I           c          power-domain@3           I           c          power-domain@4           I           c                power-domain@15          I           w                            
       3       4       =                 "      "      "      "      "      "      "      "      "      "      "      "      "      "      "      "      "      "      "            ~top cam ccu img venc vdec wpe cfgck cfgxo ss-sram-cmn ss-sram-v0l0 ss-sram-v0l1 ss-sram-ve0 ss-sram-ve1 ss-sram-ifa ss-sram-cam ss-sram-v1l5 ss-sram-v1l6 ss-sram-rdr ss-iommu ss-imgcam ss-emi ss-subcmn-rdr ss-rsi ss-cmn-l4 ss-vdec1 ss-wpe ss-cvdo-ve1             !                     +            c      power-domain@16          I         H  w                 #      #      #      #      #      #      #         A  ~cfgck cfgxo ss-gals ss-cmn ss-emi ss-iommu ss-larb ss-rsi ss-bus               !                     +            c      power-domain@20          I         0  w                 $      $      $      $         8  ~cfgck cfgxo ss-vpp1-g5 ss-vpp1-g6 ss-vpp1-l5 ss-vpp1-l6            !        c          power-domain@23          I           w   %            ~ss-vdec            !        c          power-domain@22          I           w   &            ~ss-vdec            !        c          power-domain@29          I            w                     	               ~cam ccu bus cfgck              !                     +            c      power-domain@30          I         (  w   '       '      '      '      '         6  ~ss-cam-l13 ss-cam-l14 ss-cam-mm0 ss-cam-mm1 ss-camsys              !                     +            c      power-domain@32          I            w   '      (       )          $  ~ss-camb-sub ss-camb-raw ss-camb-yuv         c          power-domain@31          I           w   '      *       +          $  ~ss-cama-sub ss-cama-raw ss-cama-yuv         c                power-domain@17          I         (  w                 ,       ,      ,         &  ~cfgck cfgxo ss-larb2 ss-larb3 ss-gals              !                     +            c      power-domain@9           I   	        w       @       ?      	  ~bus hdcp               !        c          power-domain@18          I              !        c          power-domain@19          I              !        c             power-domain@24          I            w   -       -      -      -         0  ~ss-ve1-larb ss-ve1-core ss-ve1-gals ss-ve1-sram            !        c          power-domain@21          I           w   .      .           ~ss-wpe-l7 ss-wpe-l7pce             !        c                power-domain@5           I              !        w   /           ~ss-pextp-fmem           c          power-domain@7           I           w       0       1        ~seninf0 seninf1         c          power-domain@6           I           c          power-domain@10          I   
        w       E       D      	  ~bus main               !                     +            c      power-domain@11          I              !                     +            c      power-domain@14          I           w       F        ~asm            !        c          power-domain@13          I           w       S          0            ~a1sys intbus adspck            !        c          power-domain@12          I              !        c                power-domain@8           I           w   /         	  ~ethermac               !        c                watchdog@10007000             mediatek,mt8188-wdt          I     p                                  syscon@1000c000       "    mediatek,mt8188-apmixedsys syscon            I                                         timer@10017000        ,    mediatek,mt8188-timer mediatek,mt6765-timer          I    p                      	               w   1      pwrap@10024000        3    mediatek,mt8188-pwrap mediatek,mt8195-pwrap syscon           I    @                pwrap                                 w   !      !          	  ~spi wrap       pmic              mediatek,mt6359          }        U                                adc           mediatek,mt6359-auxadc                   mt6359codec                             regulators            mediatek,mt6359-regulator      buck_vs1            vs1          5          !        -             I      buck_vgpu11         vgpu11                    7        ]          -           r                   I      buck_vmodem         vmodem                            ]  *        -         buck_vpu            vpu                   7        ]          -           r                   I      buck_vcore          vcore                              ]          -           r                   I      buck_vs2            vs2          5          j         -             I      buck_vpa            vpa                    /M`        -  ,           D      buck_vproc2         vproc2                    7        ]  L        -           r                buck_vproc1         vproc1                    7        ]  L        -           r                buck_vcore_sshub            vcore_sshub                   7      buck_vgpu11_sshub           vgpu11_sshub                      7      ldo_vaud18          vaud18           w@         w@        -         ldo_vsim1           vsim1                     /M`        -             E      ldo_vibr            vibr             O         2Z      ldo_vrf12           vrf12                               I      ldo_vusb            vusb             -         -        -           I           <      ldo_vsram_proc2         vsram_proc2                            ]  L        -            I      ldo_vio18           vio18                             -           I           I      ldo_vcamio          vcamio                          ldo_vcn18           vcn18            w@         w@        -            I      ldo_vfe28           vfe28            *         *        -   x      ldo_vcn13           vcn13                            ldo_vcn33_1_bt          vcn33_1_bt           *         5g      ldo_vcn33_1_wifi            vcn33_1_wifi             *         5g      ldo_vaux18          vaux18           w@         w@        -            I      ldo_vsram_others            vsram_others                               ]          -         ldo_vefuse          vefuse                          ldo_vxo22           vxo22            w@         !         I      ldo_vrfck           vrfck            `               ldo_vrfck_1         vrfck                     j       ldo_vbif28          vbif28           *         *        -         ldo_vio28           vio28            *         2Z         I      ldo_vemc            vemc             ,@          2Z      ldo_vemc_1          vemc             &%         2Z           @      ldo_vcn33_2_bt          vcn33_2_bt           *         5g         I      ldo_vcn33_2_wifi            vcn33_2_wifi             *         5g      ldo_va12            va12             O                   I      ldo_va09            va09             5          O      ldo_vrf18           vrf18                     P      ldo_vsram_md          	  vsram_md                               ]  *        -         ldo_vufs            vufs                               I           A      ldo_vm18            vm18                               I      ldo_vbbck           vbbck                     O         I      ldo_vsram_proc1         vsram_proc1                            ]  L        -            I      ldo_vsim2           vsim2                     /M`      ldo_vsram_others_sshub          vsram_others_sshub                              rtc           mediatek,mt6358-rtc             mailbox@10320000              mediatek,mt8188-gce          I    2        @                                          w   !              Y      mailbox@10330000              mediatek,mt8188-gce          I    3        @                                          w   !         scp@10500000              mediatek,mt8188-scp           I    P             r               	  sram cfg                                    2        okay          clock-controller@10b91100             mediatek,mt8188-adsp-audio26m            I                                  0      serial@11001100       *    mediatek,mt8188-uart mediatek,mt6577-uart            I                                           w   3   !         	  ~baud bus            okay               4        default       serial@11001200       *    mediatek,mt8188-uart mediatek,mt6577-uart            I                                           w   3   !         	  ~baud bus            okay               5        default       serial@11001300       *    mediatek,mt8188-uart mediatek,mt6577-uart            I                                           w   3   !         	  ~baud bus            okay               6        default       serial@11001400       *    mediatek,mt8188-uart mediatek,mt6577-uart            I                                          w   3   !         	  ~baud bus          	  disabled          adc@11002000          .    mediatek,mt8188-auxadc mediatek,mt8173-auxadc            I                      w   !           ~main                     	  disabled          syscon@11003000       "    mediatek,mt8188-pericfg-ao syscon            I     0                              /      spi@1100a000          )    mediatek,mt8188-spi-ipm mediatek,spi-ipm                         +             I                                           w       y          !           ~parent-clk sel-clk spi-clk        	  disabled          thermal-sensor@1100b000           mediatek,mt8188-lvts-ap          I                                           w   !              !              7        lvts-calib-data-1                               spi@11010000          )    mediatek,mt8188-spi-ipm mediatek,spi-ipm                         +             I                                           w       y          !   2        ~parent-clk sel-clk spi-clk        	  disabled          spi@11012000          )    mediatek,mt8188-spi-ipm mediatek,spi-ipm                         +             I                                           w       y          !   3        ~parent-clk sel-clk spi-clk          okay               8        default                   spi@11013000          )    mediatek,mt8188-spi-ipm mediatek,spi-ipm                         +             I    0                                      w       y          !   4        ~parent-clk sel-clk spi-clk        	  disabled          spi@11018000          )    mediatek,mt8188-spi-ipm mediatek,spi-ipm                         +             I                                          w       y          !   8        ~parent-clk sel-clk spi-clk        	  disabled          spi@11019000          )    mediatek,mt8188-spi-ipm mediatek,spi-ipm                         +             I                                          w       y          !   9        ~parent-clk sel-clk spi-clk        	  disabled          usb@11200000          '    mediatek,mt8188-xhci mediatek,mtk-xhci            I                   >              	  mac ippc                                     9      :                  )       *        &       v       v        w   /   	          /   
        ~sys_ck ref_ck mcu_ck            =   ;  h            T        okay            b   <        p   =      mmc@11230000          (    mediatek,mt8188-mmc mediatek,mt8183-mmc           I    #                                                     w          !      !      !   M      !  ~source hclk source_cg crypto_clk            okay            default state_uhs              >        |   ?                                                                                            H        	   @           A         "      mmc@11240000          (    mediatek,mt8188-mmc mediatek,mt8183-mmc           I    $                                                    w          !      !   $        ~source hclk source_cg                          &               okay            default state_uhs              B        |   C                             0         A         N         \                 c                 	   D           E      thermal-sensor@11278000           mediatek,mt8188-lvts-mcu             I    '                                      w   !              !               7        lvts-calib-data-1                               i2c@11280000              mediatek,mt8188-i2c           I    (             "                                      l           w   F       !   7      	  ~main dma                         +            okay            default            G         [    touchscreen@5d            goodix,gt9271            I   ]                    v                                                        H           I        default            J         i2c@11281000              mediatek,mt8188-i2c           I    (            "                                     l           w   F      !   7      	  ~main dma                         +            okay            default            K         [       i2c@11282000              mediatek,mt8188-i2c           I    (             "                                     l           w   F      !   7      	  ~main dma                         +            okay            default            L         [       clock-controller@11283000             mediatek,mt8188-imp-iic-wrap-c           I    (0                              F      usb@112a0000          '    mediatek,mt8188-xhci mediatek,mtk-xhci            I    *             *>              	  mac ippc                                    M                  .       -        &       v       v        w   /             /           ~sys_ck ref_ck mcu_ck            okay            b   <      usb@112b0000          '    mediatek,mt8188-xhci mediatek,mtk-xhci            I    +             +>              	  mac ippc                                    N                  ,       +        &       v       v        w   /             /           ~sys_ck ref_ck mcu_ck            =   ;  `            T        okay            b   <      spi@1132c000          (    mediatek,mt8188-nor mediatek,mt8186-nor          I    2                w       X   /      /           ~spi sf axi                 X              9             	  disabled          i2c@11e00000              mediatek,mt8188-i2c           I                 "                                      l           w   O       !   7      	  ~main dma                         +            okay            default            P         [       i2c@11e01000              mediatek,mt8188-i2c           I                "                                     l           w   O      !   7      	  ~main dma                         +            okay            default            Q        |   R         [ B@      clock-controller@11e02000             mediatek,mt8188-imp-iic-wrap-w           I                                   O      t-phy@11e30000        .    mediatek,mt8188-tphy mediatek,generic-tphy-v3                        +           N                     okay       usb-phy@0            I               w                     ~ref da_ref                        N         t-phy@11e40000        .    mediatek,mt8188-tphy mediatek,generic-tphy-v3                        +           N                     okay       usb-phy@0            I               w                     ~ref da_ref                        9      usb-phy@700          I              w         3        ~ref da_ref                        :         t-phy@11e80000        .    mediatek,mt8188-tphy mediatek,generic-tphy-v3                        +           N                     okay       usb-phy@0            I               w                     ~ref da_ref                        M         i2c@11ec0000              mediatek,mt8188-i2c           I                 "                                     l           w   S       !   7      	  ~main dma                         +            okay            default            T         [       i2c@11ec1000              mediatek,mt8188-i2c           I                "                                      l           w   S      !   7      	  ~main dma                         +            okay            default            U         [       clock-controller@11ec2000              mediatek,mt8188-imp-iic-wrap-en          I                                   S      efuse@11f20000        %    mediatek,mt8188-efuse mediatek,efuse             I                                  +      lvts1-calib@1ac          I     @           7         gpu@13000000          )    mediatek,mt8188-mali arm,mali-valhall-jm             I             @         w   V          0                     ~             }               job mmu gpu            W           X      X      X           core0 core1 core2                     	  disabled                     clock-controller@13fbf000             mediatek,mt8188-mfgcfg           I                                  V      clock-controller@14000000             mediatek,mt8188-vppsys0          I                                    "      clock-controller@14e00000             mediatek,mt8188-wpesys           I                                   .      clock-controller@14e02000             mediatek,mt8188-wpesys-vpp0          I                              clock-controller@14f00000             mediatek,mt8188-vppsys1          I                                   $      clock-controller@15000000             mediatek,mt8188-imgsys           I                               clock-controller@15110000              mediatek,mt8188-imgsys1-dip-top          I                              clock-controller@15130000             mediatek,mt8188-imgsys1-dip-nr           I                              clock-controller@15220000             mediatek,mt8188-imgsys-wpe1          I    "                          clock-controller@15330000             mediatek,mt8188-ipesys           I    3                          clock-controller@15520000             mediatek,mt8188-imgsys-wpe2          I    R                          clock-controller@15620000             mediatek,mt8188-imgsys-wpe3          I    b                          clock-controller@16000000             mediatek,mt8188-camsys           I                                    '      clock-controller@1604f000             mediatek,mt8188-camsys-rawa          I                                  *      clock-controller@1606f000             mediatek,mt8188-camsys-yuva          I                                  +      clock-controller@1608f000             mediatek,mt8188-camsys-rawb          I                                  (      clock-controller@160af000             mediatek,mt8188-camsys-yuvb          I    
                              )      clock-controller@17200000             mediatek,mt8188-ccusys           I                               clock-controller@1800f000             mediatek,mt8188-vdecsys-soc          I                                   &      clock-controller@1802f000             mediatek,mt8188-vdecsys          I                                  %      clock-controller@1a000000             mediatek,mt8188-vencsys          I                                    -      syscon@1c01d000           mediatek,mt8188-vdosys0 syscon           I                                  Y                  Y                    #      syscon@1c100000           mediatek,mt8188-vdosys1 syscon           I                                              Y                 Y                     ,         aliases         */soc/serial@11001100          chosen          2serial0:921600n8          firmware       optee             linaro,optee-tz          Tsmc          memory@40000000          =memory           I    @                reserved-memory                      +            N   optee@43200000           >         I    C                memory@50000000           shared-dma-pool          I    P                  >           2      memory@54600000          >         I    T`                memory@55000000           shared-dma-pool          I    U       @        memory@57000000           shared-dma-pool          I    W       @           regulator-0           regulator-fixed         5v_en            LK@         LK@        E      
             J         I      regulator-1           regulator-fixed         edp_panel_3v3            2Z         2Z         J        E                  default            Z      regulator-2           regulator-fixed         gpio_3v3_en          2Z         2Z        E      	             J         I      regulator-3           regulator-fixed         sdio_io          w@         w@         J         I      regulator-4           regulator-fixed       
  sdio_card            2Z         2Z        E      J             J         I      regulator-5           regulator-fixed       
  touch_3v3            2Z         2Z        E      w             J           H      regulator-6           regulator-fixed         usb_hub_3v3          2Z         2Z        E      p            ]  '         J           [      regulator-7           regulator-fixed         usb_hub_reset            w@         w@        E                  n   [           =      regulator-8           regulator-fixed         usb_p0_vbus          LK@         LK@        E      T             J      regulator-9           regulator-fixed         usb_p1_vbus          LK@         LK@        E      W             J      regulator-10              regulator-fixed         usb_p2_vbus          LK@         LK@         J         	compatible interrupt-parent #address-cells #size-cells model device_type reg enable-method clock-frequency capacity-dmips-mhz cpu-idle-states i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache #cooling-cells phandle cpu entry-method arm,psci-suspend-param local-timer-stop entry-latency-us exit-latency-us min-residency-us cache-level cache-unified #clock-cells clock-output-names opp-shared opp-hz opp-microvolt opp-supported-hw interrupts polling-delay polling-delay-passive thermal-sensors temperature hysteresis trip cooling-device ranges #interrupt-cells #redistributor-regions interrupt-controller affinity #reset-cells reg-names gpio-controller #gpio-cells gpio-ranges pinmux bias-pull-up output-high drive-strength input-enable input-disable bias-disable drive-strength-microamp bias-pull-down output-low #power-domain-cells clocks clock-names mediatek,infracfg mediatek,disable-extrst #io-channel-cells mediatek,mic-type-0 mediatek,mic-type-1 regulator-name regulator-min-microvolt regulator-max-microvolt regulator-enable-ramp-delay regulator-always-on regulator-ramp-delay regulator-allowed-modes #mbox-cells memory-region status pinctrl-0 pinctrl-names resets nvmem-cells nvmem-cell-names #thermal-sensor-cells mediatek,pad-select phys assigned-clocks assigned-clock-parents mediatek,syscon-wakeup wakeup-source vusb33-supply vbus-supply pinctrl-1 bus-width max-frequency cap-mmc-highspeed mmc-hs200-1_8v mmc-hs400-1_8v supports-cqe cap-mmc-hw-reset no-sdio no-sd hs400-ds-delay vmmc-supply vqmmc-supply non-removable cap-sd-highspeed sd-uhs-sdr50 sd-uhs-sdr104 no-mmc cd-gpios clock-div interrupts-extended irq-gpios reset-gpios AVDD28-supply VDDIO-supply #phy-cells interrupt-names operating-points-v2 power-domains power-domain-names mboxes mediatek,gce-client-reg serial0 stdout-path no-map gpio enable-active-high startup-delay-us vin-supply 