     8     (            a  P                             .    nvidia,norrin nvidia,tegra132 nvidia,tegra124                                    +            7NVIDIA Tegra132 Norrin     opp-table-dvfs0           operating-points-v2          =      opp-12750000-800             E 5  5  0         S              Z         opp-12750000-950             E ~ ~ 0         S              Z         opp-12750000-1050            E   0         S              Z         opp-12750000-1110            E   0         S              Z         opp-20400000-800             E 5  5  0         S    7G         Z         opp-20400000-950             E ~ ~ 0         S    7G         Z         opp-20400000-1050            E   0         S    7G         Z         opp-20400000-1110            E   0         S    7G         Z         opp-40800000-800             E 5  5  0         S    n          Z         opp-40800000-950             E ~ ~ 0         S    n          Z         opp-40800000-1050            E   0         S    n          Z         opp-40800000-1110            E   0         S    n          Z         opp-68000000-800             E 5  5  0         S              Z         opp-68000000-950             E ~ ~ 0         S              Z         opp-68000000-1050            E   0         S              Z         opp-68000000-1110            E   0         S              Z         opp-102000000-800            E 5  5  0         S    e         Z         opp-102000000-950            E ~ ~ 0         S    e         Z         opp-102000000-1050           E   0         S    e         Z         opp-102000000-1110           E   0         S    e         Z         opp-204000000-800            E 5  5  0         S    (          Z             k      opp-204000000-950            E ~ ~ 0         S    (          Z             k      opp-204000000-1050           E   0         S    (          Z             k      opp-204000000-1110           E   0         S    (          Z             k      opp-264000000-800            E 5  5  0         S    R          Z         opp-264000000-950            E ~ ~ 0         S    R          Z         opp-264000000-1050           E   0         S    R          Z         opp-264000000-1110           E   0         S    R          Z         opp-300000000-850            E P P 0         S              Z         opp-300000000-950            E ~ ~ 0         S              Z         opp-300000000-1050           E   0         S              Z         opp-300000000-1110           E   0         S              Z         opp-348000000-850            E P P 0         S              Z         opp-348000000-950            E ~ ~ 0         S              Z         opp-348000000-1050           E   0         S              Z         opp-348000000-1110           E   0         S              Z         opp-396000000-950            E ~ ~ 0         S    {          Z         opp-396000000-1000           E B@ B@ 0         S    {          Z         opp-396000000-1050           E   0         S    {          Z         opp-396000000-1110           E   0         S    {          Z         opp-528000000-950            E ~ ~ 0         S    x          Z         opp-528000000-1000           E B@ B@ 0         S    x          Z         opp-528000000-1050           E   0         S    x          Z         opp-528000000-1110           E   0         S    x          Z         opp-600000000-950            E ~ ~ 0         S    #F          Z         opp-600000000-1000           E B@ B@ 0         S    #F          Z         opp-600000000-1050           E   0         S    #F          Z         opp-600000000-1110           E   0         S    #F          Z         opp-792000000-1000           E B@ B@ 0         S    /4          Z         opp-792000000-1050           E   0         S    /4          Z         opp-792000000-1110           E   0         S    /4          Z         opp-924000000-1100           E   0         S    7          Z         opp-1200000000-1100          E   0         S    G          Z            opp-table-dvfs1           operating-points-v2          =      opp-12750000             S              Z            w       opp-20400000             S    7G         Z            w        opp-40800000             S    n          Z            w 	       opp-68000000             S              Z            w        opp-102000000            S    e         Z            w        opp-204000000            S    (          Z            w 1           k      opp-264000000            S    R          Z            w @t       opp-300000000            S              Z            w I>       opp-348000000            S              Z            w T       opp-396000000            S    {          Z            w `       opp-528000000            S    x          Z            w        opp-600000000            S    #F          Z            w |       opp-792000000            S    /4          Z            w \       opp-924000000            S    7          Z            w        opp-1200000000           S    G          Z            w$          pcie@1003000              nvidia,tegra124-pcie             pci       0        0             8                               pads afi cs                 b          c         	   intr msi                                                                             b                                        +                                                                                                           B                                           F      H                   pex afi pll_e cml                 F      H      J        pex afi pcie_x        	  #disabled       pci@1,0          pci         *                                                                  	  #disabled                         +                     =         pci@2,0          pci         *                                                                 	  #disabled                         +                     =            host1x@50000000       .    nvidia,tegra132-host1x nvidia,tegra124-host1x                P        @                 A          C            syncpt host1x                          host1x                        host1x          N                           +                T       T             dc@54200000           nvidia,tegra124-dc               T                          I                          dc                        dc          N              U          dc@54240000           nvidia,tegra124-dc               T$                         J                          dc                        dc          N              U         hdmi@54280000             nvidia,tegra124-hdmi                 T(                         K                  3              hdmi parent               3        hdmi          	  #disabled            a           l           w                         	   o          sor@54540000              nvidia,tegra124-sor              TT                         L         (              7                         sor out parent dp safe                        sor         #okay                                     
                 dpaux@545c0000            nvidia,tegra124-dpaux                T\                                                        dpaux parent                          dpaux           #okay            a            =   
   i2c-bus                      +                interrupt-controller@50041000             arm,cortex-a15-gic                             @       P            P              P@             P`                        	                       =         gpu@57000000              nvidia,gk20a                  W              X                                                stall nonstall                              gpu pwr                       gpu         #okay            a         interrupt-controller@60004000         +    nvidia,tegra124-ictlr nvidia,tegra30-ictlr        P       ` @            ` A            ` B            ` C            ` D                                                  =         timer@60005000        +    nvidia,tegra124-timer nvidia,tegra30-timer               ` P              H                               )          *          y          z                          timer         clock@60006000            nvidia,tegra132-car              ` `                                                  =         flow-controller@60007000          2    nvidia,tegra132-flowctrl nvidia,tegra124-flowctrl                ` p              actmon@6000c800           nvidia,tegra124-actmon               `                         -                  w      9        actmon emc                w        actmon          ?           S      '         	  acpu-read            t         gpio@6000d000         )    nvidia,tegra124-gpio nvidia,tegra30-gpio                 `               `                     !          "          #          7          W          Y          }                                                     =   	      dma@60020000          .    nvidia,tegra124-apbdma nvidia,tegra148-apbdma                `                        h          i          j          k          l          m          n          o          p          q          r          s          t          u          v          w                                                                                                                                                                                  "        dma               "        dma                     =         apbmisc@70000800          /    nvidia,tegra124-apbmisc nvidia,tegra20-apbmisc                p         d    p d             pinmux@70000868           nvidia,tegra124-pinmux        0       p h      d    p 0       4    p                 default               pinmux           =      dap_mclk1_pw4           dap_mclk1_pw4           extperiph1                                            dap2_din_pa4            dap2_din_pa4            i2s1                                             dap2_dout_pa5         (  dap2_dout_pa5 dap2_fs_pa2 dap2_sclk_pa3         i2s1                                              dap3_dout_pp2           dap3_dout_pp2           i2s2                                             dvfs_pwm_px0            dvfs_pwm_px0 dvfs_clk_px2           cldvfs                                            ulpi_clk_py0          '  ulpi_clk_py0 ulpi_nxt_py2 ulpi_stp_py3          spi1                                              ulpi_dir_py1            ulpi_dir_py1            spi1                                             cam_i2c_scl_pbb1          "  cam_i2c_scl_pbb1 cam_i2c_sda_pbb2           i2c3                                                                    gen2_i2c_scl_pt5          "  gen2_i2c_scl_pt5 gen2_i2c_sda_pt6           i2c2                                                                    pj7         pj7         uartd                                             spdif_in_pk6            spdif_in_pk6            spdif                                            pk7         pk7         uartd                                             pg4         pg4 pg5 pg6 pi3         spi4                                              pg7         pg7         spi4                                             ph1         ph1         pwm1                                              pk0       !  pk0 kb_row15_ps7 clk_32k_out_pa0            soc                                         sdmmc1_clk_pz0          sdmmc1_clk_pz0          sdmmc1                                           sdmmc1_cmd_pz1        O  sdmmc1_cmd_pz1 sdmmc1_dat0_py7 sdmmc1_dat1_py6 sdmmc1_dat2_py5 sdmmc1_dat3_py4          sdmmc1                                          sdmmc3_clk_pa6          sdmmc3_clk_pa6          sdmmc3                                           sdmmc3_cmd_pa7          sdmmc3_cmd_pa7 sdmmc3_dat0_pb7 sdmmc3_dat1_pb6 sdmmc3_dat2_pb5 sdmmc3_dat3_pb4 kb_col4_pq4 sdmmc3_clk_lb_out_pee4 sdmmc3_clk_lb_in_pee5 sdmmc3_cd_n_pv2         sdmmc3                                          sdmmc4_clk_pcc4         sdmmc4_clk_pcc4         sdmmc4                                           sdmmc4_cmd_pt7          sdmmc4_cmd_pt7 sdmmc4_dat0_paa0 sdmmc4_dat1_paa1 sdmmc4_dat2_paa2 sdmmc4_dat3_paa3 sdmmc4_dat4_paa4 sdmmc4_dat5_paa5 sdmmc4_dat6_paa6 sdmmc4_dat7_paa7          sdmmc4                                          mic_det_l           kb_row7_pr7         rsvd2                                           kb_row10_ps2            kb_row10_ps2            uarta                                           kb_row9_ps1         kb_row9_ps1         uarta                                             pwr_i2c_scl_pz6          pwr_i2c_scl_pz6 pwr_i2c_sda_pz7         i2cpwr                                                                  jtag_rtck         
  jtag_rtck           rtck                                             clk_32k_in          clk_32k_in          clk                                          core_pwr_req            core_pwr_req            pwron                                             cpu_pwr_req         cpu_pwr_req         cpu                                           kb_col0_ap          kb_col0_pq0         rsvd4                                           en_vdd_sd           kb_row0_pr0         rsvd4                                             lid_open            kb_row4_pr4         rsvd3                                           pwr_int_n         
  pwr_int_n           pmi                                         reset_out_n         reset_out_n         reset_out_n                                           clk3_out_pee0           clk3_out_pee0           extperiph3                                            gen1_i2c_scl_pc4          "  gen1_i2c_scl_pc4 gen1_i2c_sda_pc5           i2c1                                                                    hdmi_cec_pee3           hdmi_cec_pee3           cec                                                                  hdmi_int_pn7            hdmi_int_pn7            rsvd1                                           ddc_scl_pv4         ddc_scl_pv4 ddc_sda_pv5         i2c4                                                          ,         usb_vbus_en0_pn4          4  usb_vbus_en0_pn4 usb_vbus_en1_pn5 usb_vbus_en2_pff1         usb                                                                drive_sdio1         drive_sdio1         ;           R            a   $        {                               drive_sdio3         drive_sdio3         ;           R            a           {   $                              drive_gma         
  drive_gma           ;           R            a           {                                            ac_ok           pj0         gmi                                        codec_irq_l         ph4         gmi                                          lcd_bl_en           ph2         gmi                                          touch_irq_l         gpio_w3_aud_pw3         spi6                                             tpm_davint_l            ph6         gmi                                          ts_irq_l            pk2         gmi                                          ts_reset_l          pk4         gmi                                          ts_shdn_l           pk1         gmi                                          ph7         ph7         gmi                                          sensor_irq_l            pi6         gmi                                          wifi_en         gpio_x7_aud_px7         rsvd4                                             chromeos_write_protect          kb_row1_pr1         rsvd4                                            hp_det_l            pi7         rsvd1                                            soc_warm_reset_l            pi5         gmi                                                serial@70006000       )    nvidia,tegra124-uart nvidia,tegra20-uart                 p `        @                           $                                        #okay          serial@70006040       )    nvidia,tegra124-uart nvidia,tegra20-uart                 p `@       @                           %                                              	      	        rx tx         	  #disabled          serial@70006200       )    nvidia,tegra124-uart nvidia,tegra20-uart                 p b        @                           .                  7              7              
      
        rx tx         	  #disabled          serial@70006300       )    nvidia,tegra124-uart nvidia,tegra20-uart                 p c        @                           Z                  A              A                            rx tx         	  #disabled          pwm@7000a000          '    nvidia,tegra124-pwm nvidia,tegra20-pwm               p                                                         pwm         #okay             =   0      i2c@7000c000              nvidia,tegra124-i2c              p                         &                        +                           div-clk                       i2c                             rx tx         	  #disabled          i2c@7000c400              nvidia,tegra124-i2c              p                         T                        +                   6        div-clk               6        i2c                             rx tx         	  #disabled          i2c@7000c500              nvidia,tegra124-i2c              p                         \                        +                   C        div-clk               C        i2c                             rx tx         	  #disabled          i2c@7000c700              nvidia,tegra124-i2c              p                         x                        +                   g        div-clk               g        i2c                             rx tx           #okay                      =         i2c@7000d000              nvidia,tegra124-i2c              p                         5                        +                   /        div-clk               /        i2c                             rx tx           #okay                pmic@40           ams,as3722              @                V            
                                                 default                     =   3   pinmux           =      gpio0           gpio0           gpio             &      gpio1           gpio1           gpio             5      gpio2_4_7           gpio2 gpio4 gpio7           gpio             5      gpio3           gpio3           gpio             B      gpio5           gpio5           clk32k-out           &      gpio6           gpio6           clk32k-out           &         regulators          V           f           v                                                                                   sd0         +VDD_CPU_AP          
`        ) p        A 5g         X         l        ~         sd1       
  +VDD_CORE            
`        ) p        A =	          X         l        ~         sd2         +1.35V_LP0(sd2)          p        ) p         X         l         =         sd3         +1.35V_LP0(sd3)          p        ) p         X         l      sd4         +1.05V_RUN                   )          =          sd5         +1.8V_VDDIO          w@        ) w@         X         l         =         sd6         +VDD_GPU_AP          5         ) O         5g        A 5g         X         l         =         ldo0            +1.05_RUN_AVDD                   )          X         l        ~            =   "      ldo1            +1.8V_RUN_CAM            w@        ) w@      ldo2            +1.2V_GEN_AVDD           O        ) O         X         l      ldo3            +1.00V_LP0_VDD_RTC           B@        ) B@         X         l               ldo4            +2.8V_RUN_CAM            *        ) *         =   $      ldo5            +1.2V_RUN_CAM_FRONT          O        ) O      ldo6            +VDDIO_SDMMC3            w@        ) 2Z         =   &      ldo7            +1.05V_RUN_CAM_REAR                  )       ldo9            +2.8V_RUN_TOUCH          *        ) *      ldo10           +2.8V_RUN_CAM_AF             *        ) *      ldo11           +1.8V_RUN_VPP_FUSE           w@        ) w@               i2c@7000d100              nvidia,tegra124-i2c              p                         ?                        +                           div-clk                       i2c                             rx tx         	  #disabled          spi@7000d400          (    nvidia,tegra124-spi nvidia,tegra114-spi              p                         ;                        +                   )        spi               )        spi                             rx tx           #okay       cros-ec@0             google,cros-ec-spi           -            	                                                  i2c-tunnel            google,cros-ec-i2c-tunnel                        +                   bq24735@9             ti,bq24735              	            	            H               	   H          smart-battery@b           sbs,sbs-battery                                /   
         keyboard-controller           google,cros-ec-keyb         D           T            g     ,    }  ;  0  D  1   
 d  > " A # (	 C     =  @   V 	 B ) <  ?   +  a    !  % $ '	 &
 +  , . / - 3 2 * 5	 4 9     	  	 

 8 l j       6 	  g i            spi@7000d600          (    nvidia,tegra124-spi nvidia,tegra114-spi              p                         R                        +                   ,        spi               ,        spi                             rx tx         	  #disabled          spi@7000d800          (    nvidia,tegra124-spi nvidia,tegra114-spi              p                         S                        +                   .        spi               .        spi                             rx tx         	  #disabled          spi@7000da00          (    nvidia,tegra124-spi nvidia,tegra114-spi              p                         ]                        +                   D        spi               D        spi                             rx tx         	  #disabled          spi@7000dc00          (    nvidia,tegra124-spi nvidia,tegra114-spi              p                         ^                        +                   h        spi               h        spi                             rx tx         	  #disabled          spi@7000de00          (    nvidia,tegra124-spi nvidia,tegra114-spi              p                         O                        +                   i        spi               i        spi                             rx tx         	  #disabled          rtc@7000e000          '    nvidia,tegra124-rtc nvidia,tegra20-rtc               p                                                   rtc       pmc@7000e400              nvidia,tegra124-pmc              p                                  pclk clk32k_in                                                      ,                      l                  @         =   (      fuse@7000f800             nvidia,tegra124-efuse                p                                fuse                  '        fuse          memory-controller@70019000            nvidia,tegra132-mc               p                                mc                  M           a                      n            =         external-memory-controller@7001b000       (    nvidia,tegra132-emc nvidia,tegra124-emc              p                       9        emc                    ?           n             =         sata@70020000             nvidia,tegra124-ahci                  pp             p        p                                   |      {        sata sata-oob                 |            {        sata sata-cold sata-oob       	  #disabled          hda@70030000          ;    nvidia,tegra132-hda nvidia,tegra124-hda nvidia,tegra30-hda               p                         Q                  }            o        hda hda2hdmi hda2codec_2x                 }            o        hda hda2hdmi hda2codec_2x         	  #disabled          usb@70090000          *    nvidia,tegra132-xusb nvidia,tegra124-xusb         0       p	             p	            p	                 hcd fpci ipfs                   '          (         X         Y                       8                                         x  xusb_host xusb_host_src xusb_falcon_src xusb_ss xusb_ss_div2 xusb_ss_src xusb_hs_src xusb_fs_src pll_u_480m clk_m pll_e               Y                    xusb_host xusb_ss xusb_src                     #okay                                 #  usb2-0 usb2-1 usb2-2 usb3-0 usb3-1                                     !           !      padctl@7009f000       8    nvidia,tegra132-xusb-padctl nvidia,tegra124-xusb-padctl              p	                              padctl                        "        0            D   !         =      pads       usb2            #okay       lanes      usb2-0          #okay            Z            xusb             =         usb2-1          #okay            Z            xusb             =         usb2-2          #okay            Z            xusb             =               ulpi          	  #disabled       lanes      ulpi-0        	  #disabled            Z                hsic          	  #disabled       lanes      hsic-0        	  #disabled            Z          hsic-1        	  #disabled            Z                pcie            #okay       lanes      pcie-0          #okay            Z            usb3-ss          =         pcie-1          #okay            Z            usb3-ss          =         pcie-2        	  #disabled            Z          pcie-3        	  #disabled            Z          pcie-4        	  #disabled            Z                sata          	  #disabled       lanes      sata-0        	  #disabled            Z                   ports      usb2-0          #okay            Motg         e   #      usb2-1          #okay            Mhost            e   $      usb2-2          #okay            Mhost            e   %      hsic-0        	  #disabled          hsic-1        	  #disabled          usb3-0          #okay            q          usb3-1          #okay            q               mmc@700b0000              nvidia,tegra124-sdhci                p                                                   sdhci                         sdhci         	  #disabled          mmc@700b0200              nvidia,tegra124-sdhci                p                                          	        sdhci                 	        sdhci         	  #disabled          mmc@700b0400              nvidia,tegra124-sdhci                p                                          E        sdhci                 E        sdhci           #okay               	                 	                  	                             &      mmc@700b0600              nvidia,tegra124-sdhci                p                                                  sdhci                         sdhci           #okay                              thermal-sensor@700e2000           nvidia,tegra132-soctherm                  p             p                  soctherm-reg ccroc-reg                  0          3            thermal edp                d      N        tsensor soctherm                  N      	  soctherm                        =   +   throttle-cfgs      heavy              d                   t            =   -            ahub@70300000             nvidia,tegra124-ahub          0       p0             p0            p0                        g                  j      k        d_audio apbif                 j      k                        e      f      l      m      n      
                                                                  l  d_audio apbif i2s0 i2s1 i2s2 i2s3 i2s4 dam0 dam1 dam2 spdif amx amx1 adx adx1 afc0 afc1 afc2 afc3 afc4 afc5                                                                                                                                       P  rx0 tx0 rx1 tx1 rx2 tx2 rx3 tx3 rx4 tx4 rx5 tx5 rx6 tx6 rx7 tx7 rx8 tx8 rx9 tx9                                +      i2s@70301000              nvidia,tegra124-i2s              p0                	                             i2s                       i2s       	  #disabled          i2s@70301100              nvidia,tegra124-i2s              p0                	                             i2s                       i2s       	  #disabled          i2s@70301200              nvidia,tegra124-i2s              p0                	                             i2s                       i2s       	  #disabled          i2s@70301300              nvidia,tegra124-i2s              p0                	                     e        i2s               e        i2s       	  #disabled          i2s@70301400              nvidia,tegra124-i2s              p0                	                     f        i2s               f        i2s       	  #disabled             usb@7d000000          )    nvidia,tegra124-ehci nvidia,tegra30-ehci                 }         @                            	utmi                           usb                       usb         	$   '      	  #disabled          usb-phy@7d000000          /    nvidia,tegra124-usb-phy nvidia,tegra30-usb-phy                }         @     }         @                            	utmi                                       reg pll_u utmi-pads                             usb utmi-pads           Z            	/            	I           	`           	u           	   	        	            	           	           	           	            
        
#   (          	  #disabled             =   '      usb@7d004000          )    nvidia,tegra124-ehci nvidia,tegra30-ehci                 } @       @                            	utmi                   :        usb               :        usb         	$   )      	  #disabled          usb-phy@7d004000          /    nvidia,tegra124-usb-phy nvidia,tegra30-usb-phy                } @       @     }         @                            	utmi                   :                    reg pll_u utmi-pads               :              usb utmi-pads           Z            	/            	I           	`           	u           	   	        	            	           	           	           	           
#   (         	  #disabled             =   )      usb@7d008000          )    nvidia,tegra124-ehci nvidia,tegra30-ehci                 }        @                 a           	utmi                   ;        usb               ;        usb         	$   *      	  #disabled          usb-phy@7d008000          /    nvidia,tegra124-usb-phy nvidia,tegra30-usb-phy                }        @     }         @                 a           	utmi                   ;                    reg pll_u utmi-pads               ;              usb utmi-pads           Z            	/            	I           	`           	u           	   	        	            	           	           	           	           
#   (         	  #disabled             =   *      cpus                         +       cpu@0            cpu           nvidia,tegra132-denver                     cpu@1            cpu           nvidia,tegra132-denver                       thermal-zones      cpu-thermal         
.          
D            
R   +       trips      cpu_shutdown_trip           
b (        
n        	   critical          throttle-trip           
b p        
n           hot          =   ,         cooling-maps       map0            
y   ,        
~   -                  mem-thermal         
.            
D            
R   +      trips      mem_shutdown_trip           
b         
n        	   critical          mem_throttle_trip           
b         
n           hot          cooling-maps             gpu-thermal         
.          
D            
R   +      trips      gpu_shutdown_trip           
b         
n        	   critical          throttle-trip           
b         
n           hot          =   .         cooling-maps       map0            
y   .        
~   -                  pllx-thermal            
.            
D            
R   +      trips      pllx_shutdown_trip          
b (        
n        	   critical          pllx_throttle_trip          
b         
n           hot          cooling-maps                timer             arm,armv7-timer       0                                 
                    aliases         
/i2c@7000d000/pmic@40           
/rtc@7000e000           
/serial@70006000          chosen          
serial0:115200n8          memory@80000000          memory                               backlight             pwm-backlight           
   	   :            
   /        
   0    B@         
                    @              
            =   1      clock-32k             fixed-clock                                 =         gpio-keys         
    gpio-keys      key-power           
Power              	              
   t           
               switch-lid          
Lid            	                         
                                 panel             innolux,n116bge         
           )   1           
         =         regulator-vdd-mux             regulator-fixed       	  +VDD_MUX            !        )!         X         l         =   2      regulator-vdd-5v0-sys             regulator-fixed         +5V_SYS          LK@        ) LK@         X         l        3   2         =         regulator-vdd-3v3-sys             regulator-fixed       
  +3.3V_SYS            2Z        ) 2Z         X         l        3   2         =         regulator-vdd-3v3-run             regulator-fixed       
  +3.3V_RUN            2Z        ) 2Z         X         l           3                >        3            =         regulator-vdd-3v3-hdmi            regulator-fixed         +3.3V_AVDD_HDMI_AP_GATED             2Z        ) 2Z        3            =         regulator-vdd-led             regulator-fixed       	  +VDD_LED             2Z        ) 2Z           	   z             >        3   2         =   /      regulator-vdd-usb1-vbus           regulator-fixed         +5V_USB_HS           LK@        ) LK@           	   l             >         Q        3            =   #      regulator-vdd-usb3-vbus           regulator-fixed         +5V_USB_SS           LK@        ) LK@           	   m             >         Q        3            =   %      regulator-vdd-3v3-panel           regulator-fixed         +3.3V_PANEL          2Z        ) 2Z           3                >        3            =         regulator-vdd-hdmi-pll            regulator-fixed       !  +1.05V_RUN_AVDD_HDMI_PLL_AP_GATE                     )            	   ?           3             =         regulator-vdd-5v0-hdmi            regulator-fixed         +5V_HDMI_CON             LK@        ) LK@           	   V             >        3            =         regulator-vdd-5v0-ts              regulator-fixed         +5V_VDD_TS           LK@        ) LK@         X         l           	   Q             >      regulator-vdd-3v3-lp0             regulator-fixed       
  +3.3V_LP0            2Z        ) 2Z         X           3                >        3            =   !         	compatible interrupt-parent #address-cells #size-cells model phandle opp-microvolt opp-hz opp-supported-hw opp-suspend opp-peak-kBps device_type reg reg-names interrupts interrupt-names #interrupt-cells interrupt-map-mask interrupt-map bus-range ranges clocks clock-names resets reset-names status assigned-addresses nvidia,num-lanes iommus nvidia,head vdd-supply pll-supply hdmi-supply nvidia,ddc-i2c-bus nvidia,hpd-gpio avdd-io-hdmi-dp-supply vdd-hdmi-dp-pll-supply nvidia,dpaux nvidia,panel interrupt-controller #clock-cells #reset-cells nvidia,external-memory-controller operating-points-v2 interconnects interconnect-names #cooling-cells #gpio-cells gpio-controller #dma-cells pinctrl-names pinctrl-0 nvidia,pins nvidia,function nvidia,pull nvidia,tristate nvidia,enable-input nvidia,lock nvidia,open-drain nvidia,rcv-sel nvidia,high-speed-mode nvidia,schmitt nvidia,pull-down-strength nvidia,pull-up-strength nvidia,slew-rate-rising nvidia,slew-rate-falling nvidia,drive-type reg-shift dmas dma-names #pwm-cells clock-frequency ams,system-power-controller bias-pull-down bias-pull-up bias-high-impedance vsup-sd2-supply vsup-sd3-supply vsup-sd4-supply vsup-sd5-supply vin-ldo0-supply vin-ldo1-6-supply vin-ldo2-5-7-supply vin-ldo3-4-supply vin-ldo9-10-supply vin-ldo11-supply regulator-name regulator-min-microvolt regulator-max-microvolt regulator-max-microamp regulator-always-on regulator-boot-on ams,ext-control regulator-min-microamp ams,enable-tracking spi-max-frequency wakeup-source google,cros-ec-spi-msg-delay google,remote-bus ti,ac-detect-gpios sbs,i2c-retry-count sbs,poll-retry-count keypad,num-rows keypad,num-columns google,needs-ghost-filter linux,keymap nvidia,invert-interrupt nvidia,suspend-mode nvidia,cpu-pwr-good-time nvidia,cpu-pwr-off-time nvidia,core-pwr-good-time nvidia,core-pwr-off-time nvidia,core-power-req-active-high nvidia,sys-clock-req-active-high #iommu-cells #interconnect-cells nvidia,memory-controller nvidia,xusb-padctl phys phy-names avddio-pex-supply dvddio-pex-supply avdd-usb-supply hvdd-usb-ss-supply avdd-pll-utmip-supply avdd-pll-erefe-supply avdd-pex-pll-supply hvdd-pex-pll-e-supply #phy-cells vbus-supply nvidia,usb2-companion cd-gpios power-gpios wp-gpios bus-width vqmmc-supply non-removable #thermal-sensor-cells nvidia,priority nvidia,cpu-throt-level nvidia,ahub-cif-ids phy_type nvidia,phy nvidia,hssync-start-delay nvidia,idle-wait-delay nvidia,elastic-limit nvidia,term-range-adj nvidia,xcvr-setup nvidia,xcvr-lsfslew nvidia,xcvr-lsrslew nvidia,hssquelch-level nvidia,hsdiscon-level nvidia,xcvr-hsslew nvidia,has-utmi-pad-registers nvidia,pmc polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device rtc0 rtc1 serial0 stdout-path enable-gpios power-supply pwms brightness-levels default-brightness-level label linux,code debounce-interval linux,input-type backlight vin-supply enable-active-high gpio-open-drain 