    8 x   (             7 @                             "    nvidia,p2371-2180 nvidia,tegra210                                    +             7NVIDIA Jetson TX1 Developer Kit    pcie@1003000              nvidia,tegra210-pcie             =pci       0   I     0             8                               Mpads afi cs          W       b          c         	   bintr msi             r                                                                b                                        +                                                                                                           B                                           F      H          ,         pex afi pll_e cml                  F      H      J         pex afi pcie_x           default idle                                     okay                                  (      pci@1,0          =pci         =                         I                                            okay                         +                     P           a      	   
           fpcie-0 pcie-1 pcie-2 pcie-3       pci@2,0          =pci         =                        I                                            okay                         +                     P           a           fpcie-0           host1x@50000000           nvidia,tegra210-host1x           I    P        @          W       A          C            bsyncpt host1x                           host1x                             
   host1x mc                        +                T       T                  p         dpaux@54040000            nvidia,tegra210-dpaux            I    T                  W                              /         dpaux parent                            dpaux           w            okay              9   pinmux-aux        	  dpaux-io            aux                  pinmux-i2c        	  dpaux-io            i2c                  pinmux-off        	  dpaux-io            off                  i2c-bus                      +             vi@54080000           nvidia,tegra210-vi           I    T                  W       E            okay                               4                       w                        +                    T                    csi@838           nvidia,tegra210-csi          I  8            okay                                    G                                  eee9       (         4                       G         csi cilab cilcd cile csi_tpg            w            tsec@54100000             nvidia,tegra210-tsec             I    T                  W       2                  S         tsec                   S         tsec          	   disabled          dc@54200000           nvidia,tegra210-dc           I    T                   W       I                           dc                          dc          p                                            dc@54240000           nvidia,tegra210-dc           I    T$                  W       J                           dc                          dc          p                                           dsi@54300000              nvidia,tegra210-dsi          I    T0                        0                     dsi lp parent                  0         dsi         w                          okay                         +                             panel@0           auo,b080uan01            I                              +           8            vic@54340000              nvidia,tegra210-vic          I    T4                  W       H                           vic                         vic         p              w         nvjpg@54380000            nvidia,tegra210-nvjpg            I    T8               	   disabled          dsi@54400000              nvidia,tegra210-dsi          I    T@                        R                     dsi lp parent                  R         dsi         w                       	   disabled                         +                     nvdec@54480000            nvidia,tegra210-nvdec            I    TH               	   disabled          nvenc@544c0000            nvidia,tegra210-nvenc            I    TL               	   disabled          tsec@54500000             nvidia,tegra210-tsec             I    TP                  W       P                           tsec                            tsec          	   disabled          sor@54540000              nvidia,tegra210-sor          I    TT                  W       L         (                         /               sor out parent dp safe                          sor                                 B            aux i2c off         w         	   disabled                     sor@54580000              nvidia,tegra210-sor1             I    TX                  W       K         (                         /               sor out parent dp safe                          sor                                 B            aux i2c off         w            okay            L            c           z   !           "                                  dpaux@545c0000            nvidia,tegra210-dpaux            I    T\                  W                              /         dpaux parent                            dpaux           w         	   disabled              :   pinmux-aux        	  dpaux-io            aux                  pinmux-i2c        	  dpaux-io            i2c                  pinmux-off        	  dpaux-io            off                  i2c-bus                      +             isp@54600000              nvidia,tegra210-isp          I    T`                  W       G                                          isp       	   disabled          isp@54680000              nvidia,tegra210-isp          I    Th                  W       F                                          isp       	   disabled          i2c@546c0000              nvidia,tegra210-i2c-vi           I    Tl                  W                               Q         div-clk slow                            i2c         w         	   disabled                         +             interrupt-controller@50041000             arm,gic-400          r                  @   I    P            P              P@             P`                  W      	                               gpu@57000000              nvidia,gm20b              I    W              X                   W                             bstall nonstall                      +               gpu pwr ref                         gpu         p            	   disabled               #      interrupt-controller@60004000             nvidia,tegra210-ictlr         `   I    ` @        @    ` A        @    ` B        @    ` C        @    ` D        @    ` E        @                  r                                timer@60005000            nvidia,tegra210-timer            I    ` P                 W                                      )          *          y                                                                                                           timer         clock@60006000            nvidia,tegra210-car          I    ` `                                               flow-controller@60007000              nvidia,tegra210-flowctrl             I    ` p              gpio@6000d000         )    nvidia,tegra210-gpio nvidia,tegra30-gpio             I    `               `   W                  !          "          #          7          W          Y          }                                r                             dma@60020000          .    nvidia,tegra210-apbdma nvidia,tegra148-apbdma            I    `                 W       h          i          j          k          l          m          n          o          p          q          r          s          t          u          v          w                                                                                                                                                                                  "         dma                "         dma                       %      apbmisc@70000800          /    nvidia,tegra210-apbmisc nvidia,tegra20-apbmisc            I    p         d    p               pinmux@700008d4           nvidia,tegra210-pinmux            I    p           p 0                boot                $          ;   pinmux-sdmmc1-1v8-drv              ?   sdmmc1          
drive_sdmmc1                       0            pinmux-sdmmc1-3v3-drv              >   sdmmc1          
drive_sdmmc1                       0            pinmux-sdmmc2-1v8-drv              B   sdmmc2          
drive_sdmmc2                       0            pinmux-sdmmc3-1v8-drv              F   sdmmc3          
drive_sdmmc3                       0            pinmux-sdmmc3-3v3-drv              E   sdmmc3          
drive_sdmmc3                       0            pinmux-sdmmc4-1v8-drv              G   sdmmc4          
drive_sdmmc4                       0            pinmux             $   pex_l0_rst_n_pa0            
pex_l0_rst_n_pa0            Hpe0         X            d            t                                 pex_l0_clkreq_n_pa1         
pex_l0_clkreq_n_pa1         Hpe0         X            d            t                                pex_wake_n_pa2          
pex_wake_n_pa2          Hpe          X            d            t                                pex_l1_rst_n_pa3            
pex_l1_rst_n_pa3            Hpe1         X            d            t                                 pex_l1_clkreq_n_pa4         
pex_l1_clkreq_n_pa4         Hpe1         X            d            t                                sata_led_active_pa5         
sata_led_active_pa5         X           d            t                     pa6         
pa6         Hsata            X            d            t                      dap1_fs_pb0         
dap1_fs_pb0         X           d            t                     dap1_din_pb1            
dap1_din_pb1            X           d            t                     dap1_dout_pb2           
dap1_dout_pb2           X           d            t                     dap1_sclk_pb3           
dap1_sclk_pb3           X           d            t                     spi2_mosi_pb4           
spi2_mosi_pb4           Hspi2            X            d            t                     spi2_miso_pb5           
spi2_miso_pb5           Hspi2            X            d            t                     spi2_sck_pb6            
spi2_sck_pb6            Hspi2            X            d            t                     spi2_cs0_pb7            
spi2_cs0_pb7            Hspi2            X           d            t                     spi1_mosi_pc0           
spi1_mosi_pc0           X           d            t                     spi1_miso_pc1           
spi1_miso_pc1           X           d            t                     spi1_sck_pc2            
spi1_sck_pc2            X           d            t                     spi1_cs0_pc3            
spi1_cs0_pc3            X           d            t                     spi1_cs1_pc4            
spi1_cs1_pc4            X           d            t                     spi4_sck_pc5            
spi4_sck_pc5            Hspi4            X           d            t                     spi4_cs0_pc6            
spi4_cs0_pc6            Hspi4            X           d            t                     spi4_mosi_pc7           
spi4_mosi_pc7           Hspi4            X           d            t                     spi4_miso_pd0           
spi4_miso_pd0           Hspi4            X           d            t                     uart3_tx_pd1            
uart3_tx_pd1            Huartc           X            d            t                      uart3_rx_pd2            
uart3_rx_pd2            Huartc           X           d            t                     uart3_rts_pd3           
uart3_rts_pd3           Huartc           X            d            t                      uart3_cts_pd4           
uart3_cts_pd4           Huartc           X           d            t                     dmic1_clk_pe0           
dmic1_clk_pe0           Hi2s3            X            d            t                     dmic1_dat_pe1           
dmic1_dat_pe1           Hi2s3            X            d            t                     dmic2_clk_pe2           
dmic2_clk_pe2           Hi2s3            X            d            t                     dmic2_dat_pe3           
dmic2_dat_pe3           Hi2s3            X            d            t                     dmic3_clk_pe4           
dmic3_clk_pe4           X           d            t                     dmic3_dat_pe5           
dmic3_dat_pe5           X           d            t                     pe6         
pe6         X           d            t                     pe7         
pe7         Hpwm3            X            d            t                      gen3_i2c_scl_pf0            
gen3_i2c_scl_pf0            Hi2c3            X            d            t                                 gen3_i2c_sda_pf1            
gen3_i2c_sda_pf1            Hi2c3            X            d            t                                 uart2_tx_pg0            
uart2_tx_pg0            Huartb           X            d            t                      uart2_rx_pg1            
uart2_rx_pg1            Huartb           X           d            t                     uart2_rts_pg2           
uart2_rts_pg2           Huartb           X            d            t                      uart2_cts_pg3           
uart2_cts_pg3           Huartb           X           d            t                     wifi_en_ph0         
wifi_en_ph0         X            d            t                      wifi_rst_ph1            
wifi_rst_ph1            X            d            t                      wifi_wake_ap_ph2            
wifi_wake_ap_ph2            X           d            t                     ap_wake_bt_ph3          
ap_wake_bt_ph3          X            d            t                      bt_rst_ph4          
bt_rst_ph4          X            d            t                      bt_wake_ap_ph5          
bt_wake_ap_ph5          X           d            t                     ph6         
ph6         X           d            t                     ap_wake_nfc_ph7         
ap_wake_nfc_ph7         X           d            t                     nfc_en_pi0          
nfc_en_pi0          X            d            t                      nfc_int_pi1         
nfc_int_pi1         X           d            t                     gps_en_pi2          
gps_en_pi2          X            d            t                      gps_rst_pi3         
gps_rst_pi3         Hrsvd0           X           d           t                      uart4_tx_pi4            
uart4_tx_pi4            Huartd           X            d            t                      uart4_rx_pi5            
uart4_rx_pi5            Huartd           X            d            t                     uart4_rts_pi6           
uart4_rts_pi6           Huartd           X            d            t                      uart4_cts_pi7           
uart4_cts_pi7           Huartd           X            d            t                     gen1_i2c_sda_pj0            
gen1_i2c_sda_pj0            Hi2c1            X            d            t                                 gen1_i2c_scl_pj1            
gen1_i2c_scl_pj1            Hi2c1            X            d            t                                 gen2_i2c_scl_pj2            
gen2_i2c_scl_pj2            Hi2c2            X            d            t                                gen2_i2c_sda_pj3            
gen2_i2c_sda_pj3            Hi2c2            X            d            t                                dap4_fs_pj4         
dap4_fs_pj4         Hi2s4b           X            d            t                     dap4_din_pj5            
dap4_din_pj5            Hi2s4b           X            d            t                     dap4_dout_pj6           
dap4_dout_pj6           Hi2s4b           X            d            t                     dap4_sclk_pj7           
dap4_sclk_pj7           Hi2s4b           X            d            t                     pk0         
pk0         Hi2s5b           X            d            t                     pk1         
pk1         Hi2s5b           X            d            t                     pk2         
pk2         Hi2s5b           X            d            t                     pk3         
pk3         Hi2s5b           X            d            t                     pk4         
pk4         X           d            t                     pk5         
pk5         X            d            t                      pk6         
pk6         X           d            t                     pk7         
pk7         X           d            t                     pl0         
pl0         Hrsvd0           X           d           t                      pl1         
pl1         X           d            t                     sdmmc1_clk_pm0          
sdmmc1_clk_pm0          Hsdmmc1          X            d            t                     sdmmc1_cmd_pm1          
sdmmc1_cmd_pm1          Hsdmmc1          X           d            t                     sdmmc1_dat3_pm2         
sdmmc1_dat3_pm2         Hsdmmc1          X           d            t                     sdmmc1_dat2_pm3         
sdmmc1_dat2_pm3         Hsdmmc1          X           d            t                     sdmmc1_dat1_pm4         
sdmmc1_dat1_pm4         Hsdmmc1          X           d            t                     sdmmc1_dat0_pm5         
sdmmc1_dat0_pm5         Hsdmmc1          X           d            t                     sdmmc3_clk_pp0          
sdmmc3_clk_pp0          Hsdmmc3          X            d            t                     sdmmc3_cmd_pp1          
sdmmc3_cmd_pp1          Hsdmmc3          X           d            t                     sdmmc3_dat3_pp2         
sdmmc3_dat3_pp2         Hsdmmc3          X           d            t                     sdmmc3_dat2_pp3         
sdmmc3_dat2_pp3         Hsdmmc3          X           d            t                     sdmmc3_dat1_pp4         
sdmmc3_dat1_pp4         Hsdmmc3          X           d            t                     sdmmc3_dat0_pp5         
sdmmc3_dat0_pp5         Hsdmmc3          X           d            t                     cam1_mclk_ps0           
cam1_mclk_ps0           Hextperiph3          X            d            t                      cam2_mclk_ps1           
cam2_mclk_ps1           Hextperiph3          X            d            t                      cam_i2c_scl_ps2         
cam_i2c_scl_ps2         Hi2cvi           X            d            t                                 cam_i2c_sda_ps3         
cam_i2c_sda_ps3         Hi2cvi           X            d            t                                 cam_rst_ps4         
cam_rst_ps4         X            d            t                      cam_af_en_ps5           
cam_af_en_ps5           X            d            t                      cam_flash_en_ps6            
cam_flash_en_ps6            X            d            t                      cam1_pwdn_ps7           
cam1_pwdn_ps7           X            d            t                      cam2_pwdn_pt0           
cam2_pwdn_pt0           X            d            t                      cam1_strobe_pt1         
cam1_strobe_pt1         X            d            t                      uart1_tx_pu0            
uart1_tx_pu0            Huarta           X            d            t                      uart1_rx_pu1            
uart1_rx_pu1            Huarta           X           d            t                     uart1_rts_pu2           
uart1_rts_pu2           X           d            t                     uart1_cts_pu3           
uart1_cts_pu3           X           d            t                     lcd_bl_pwm_pv0          
lcd_bl_pwm_pv0          Hpwm0            X            d            t                      lcd_bl_en_pv1           
lcd_bl_en_pv1           X            d            t                      lcd_rst_pv2         
lcd_rst_pv2         X            d            t                      lcd_gpio1_pv3           
lcd_gpio1_pv3           X            d            t                     lcd_gpio2_pv4           
lcd_gpio2_pv4           Hpwm1            X            d            t                      ap_ready_pv5            
ap_ready_pv5            X            d            t                      touch_rst_pv6           
touch_rst_pv6           X            d            t                      touch_clk_pv7           
touch_clk_pv7           Htouch           X            d            t                      modem_wake_ap_px0           
modem_wake_ap_px0           X           d            t                     touch_int_px1           
touch_int_px1           X           d            t                     motion_int_px2          
motion_int_px2          X           d            t                     als_prox_int_px3            
als_prox_int_px3            X           d            t                     temp_alert_px4          
temp_alert_px4          X           d            t                     button_power_on_px5         
button_power_on_px5         X           d            t                     button_vol_up_px6           
button_vol_up_px6           X           d            t                     button_vol_down_px7         
button_vol_down_px7         X           d            t                     button_slide_sw_py0         
button_slide_sw_py0         X           d            t                     button_home_py1         
button_home_py1         X           d            t                     lcd_te_py2          
lcd_te_py2        	  Hdisplaya            X           d            t                     pwr_i2c_scl_py3         
pwr_i2c_scl_py3         Hi2cpmu          X            d            t                                 pwr_i2c_sda_py4         
pwr_i2c_sda_py4         Hi2cpmu          X            d            t                                 clk_32k_out_py5         
clk_32k_out_py5         Hsoc         X           d            t                     pz0         
pz0         X           d            t                     pz1         
pz1         Hsdmmc1          X           d            t                     pz2         
pz2         X           d            t                     pz3         
pz3         X            d            t                      pz4         
pz4         Hsdmmc1          X           d            t                     pz5         
pz5         Hsoc         X           d            t                     dap2_fs_paa0            
dap2_fs_paa0            Hi2s2            X            d            t                     dap2_sclk_paa1          
dap2_sclk_paa1          Hi2s2            X            d            t                     dap2_din_paa2           
dap2_din_paa2           Hi2s2            X            d            t                     dap2_dout_paa3          
dap2_dout_paa3          Hi2s2            X            d            t                     aud_mclk_pbb0           
aud_mclk_pbb0           X           d            t                     dvfs_pwm_pbb1           
dvfs_pwm_pbb1           Hcldvfs          X            d           t                      dvfs_clk_pbb2           
dvfs_clk_pbb2           X            d            t                      gpio_x1_aud_pbb3            
gpio_x1_aud_pbb3            X           d            t                     gpio_x3_aud_pbb4            
gpio_x3_aud_pbb4            Hrsvd0           X           d           t                      hdmi_cec_pcc0           
hdmi_cec_pcc0           Hcec         X            d            t                                hdmi_int_dp_hpd_pcc1            
hdmi_int_dp_hpd_pcc1            X           d            t                                 spdif_out_pcc2          
spdif_out_pcc2          Hrsvd1           X           d           t                      spdif_in_pcc3           
spdif_in_pcc3           Hrsvd1           X           d           t                      usb_vbus_en0_pcc4           
usb_vbus_en0_pcc4           Husb         X            d            t                                usb_vbus_en1_pcc5           
usb_vbus_en1_pcc5           Husb         X            d            t                                dp_hpd0_pcc6            
dp_hpd0_pcc6            Hdp          X           d            t                     pcc7            
pcc7            Hrsvd0           X           d           t                                  spi2_cs1_pdd0           
spi2_cs1_pdd0           Hspi2            X           d            t                     qspi_sck_pee0           
qspi_sck_pee0           Hrsvd1           X           d           t                      qspi_cs_n_pee1          
qspi_cs_n_pee1          Hrsvd1           X           d           t                      qspi_io0_pee2           
qspi_io0_pee2           Hrsvd1           X           d           t                      qspi_io1_pee3           
qspi_io1_pee3           Hrsvd1           X           d           t                      qspi_io2_pee4           
qspi_io2_pee4           Hrsvd1           X           d           t                      qspi_io3_pee5           
qspi_io3_pee5           Hrsvd1           X           d           t                      core_pwr_req            
core_pwr_req            Hcore            X            d            t                      cpu_pwr_req         
cpu_pwr_req         Hcpu         X            d            t                      pwr_int_n         
  
pwr_int_n           Hpmi         X           d            t                     clk_32k_in          
clk_32k_in          Hclk         X            d            t                     jtag_rtck         
  
jtag_rtck           Hjtag            X            d            t                      clk_req         
clk_req         Hrsvd1           X           d           t                      shutdown          	  
shutdown          	  Hshutdown            X            d            t                         pinmux-dvfs-pwm-active             I   dvfs_pwm_pbb1           
dvfs_pwm_pbb1           d             pinmux-dvfs-pwm-inactive               J   dvfs_pwm_pbb1           
dvfs_pwm_pbb1           d               serial@70006000       )    nvidia,tegra210-uart nvidia,tegra20-uart             I    p `        @                    W       $                                          okay              <      serial@70006040       )    nvidia,tegra210-uart nvidia,tegra20-uart             I    p `@       @                    W       %                                            %   	   %   	        rx tx         	   disabled              =      serial@70006200       )    nvidia,tegra210-uart nvidia,tegra20-uart             I    p b        @                    W       .                  7               7           %   
   %   
        rx tx         	   disabled              >      serial@70006300           nvidia,tegra30-hsuart            I    p c        @         W       Z                  A               A           %      %           rx tx            okay             serial            ?   bluetooth             brcm,bcm43540-bt                  ;                  <                         W   =            bhost-wakeup          pwm@7000a000          '    nvidia,tegra210-pwm nvidia,tegra20-pwm           I    p                                                           pwm          okay               '      i2c@7000c000          (    nvidia,tegra210-i2c nvidia,tegra124-i2c          I    p                  W       &                        +                            div-clk                         i2c            %      %           rx tx         	   disabled          i2c@7000c400          (    nvidia,tegra210-i2c nvidia,tegra124-i2c          I    p                  W       T                        +                   6         div-clk                6         i2c            %      %           rx tx            okay                power-sensor@40           ti,ina3221           I   @                     +       input@0          I            VDD_IN            N       input@1          I           VDD_GPU           '      input@2          I           VDD_CPU           '         power-sensor@42           ti,ina3221           I   B                     +       input@0          I            VDD_MUX           N       input@1          I           VDD_5V_IO_SYS                   input@2          I           VDD_3V3_SYS           '         power-sensor@43           ti,ina3221           I   C                     +       input@0          I            VDD_3V3_IO            '      input@1          I           VDD_1V8_IO            '      input@2          I         
  VDD_M2_IN             '         gpio@74           ti,tca9539           I   t                              7      gpio@77           ti,tca9539           I   w                              8      backlight@2c          
    ti,lp8557            I   ,        +   &                   '           0   '      r        5lp8557                rom-13h         ?           H         rom-14h         ?           H               i2c@7000c500          (    nvidia,tegra210-i2c nvidia,tegra124-i2c          I    p                  W       \                        +                   C         div-clk                C         i2c            %      %           rx tx            okay       eeprom@50             atmel,24c02          I   P        module          P           [           i           m            r      eeprom@57             atmel,24c02          I   W        system          P           [           i           m            r         i2c@7000c700          (    nvidia,tegra210-i2c nvidia,tegra124-i2c          I    p                  W       x                        +                   g         div-clk                g         i2c            %      %           rx tx                                    default idle             okay                        "      i2c@7000d000          (    nvidia,tegra210-i2c nvidia,tegra124-i2c          I    p                  W       5                        +                   /         div-clk                /         i2c            %      %           rx tx            okay                pmic@3c           maxim,max77620           I   <            (         W   3            r                                         default             )           9   fps    fps0            |                     fps1            |                    fps2            |             pinmux             )   gpio0           gpio0           gpio          gpio1           gpio1           fps-out                                                     gpio2_3         gpio2 gpio3         fps-out                              gpio4           gpio4         	  32k-out1          gpio5_6_7           gpio5 gpio6 gpio7           gpio                        regulators          -   *        >   *        O   +   sd0         ]VDD_SOC         l 	'         \                                       kl                     @      sd1         ]VDD_DDR_1V1_PMIC                                           kl                      A      sd2         ]VDD_PRE_REG_1V35            l p         p                     kl                      *      sd3         ]VDD_1V8         l w@         w@                                       kl                             ldo0            ]AVDD_SYS_1V2            l O         O                                                           6      ldo1            ]VDD_PEX_1V05            l                                                          ldo2            ]VDDIO_SDMMC         l w@         2Z                             >                               @      ldo3            ]VDD_CAM_HV          l *         *           2                              B      ldo4            ]VDD_RTC         l P         P                                                            C      ldo5          
  ]VDD_TS_HV           l 2Z         2Z           >                              D      ldo6            ]VDD_TS_1V8          l w@         w@           $                                                      E      ldo7            ]AVDD_1V05_PLL           l                                                                      7      ldo8            ]AVDD_SATA_HDMI_DP_1V05          l                                                                    i2c@7000d100          (    nvidia,tegra210-i2c nvidia,tegra124-i2c          I    p                  W       ?                        +                            div-clk                         i2c            %      %           rx tx                                    default idle          	   disabled          spi@7000d400          (    nvidia,tegra210-spi nvidia,tegra114-spi          I    p                  W       ;                        +                   )         spi                )         spi            %      %           rx tx         	   disabled          spi@7000d600          (    nvidia,tegra210-spi nvidia,tegra114-spi          I    p                  W       R                        +                   ,         spi                ,         spi            %      %           rx tx         	   disabled          spi@7000d800          (    nvidia,tegra210-spi nvidia,tegra114-spi          I    p                  W       S                        +                   .         spi                .         spi            %      %           rx tx         	   disabled          spi@7000da00          (    nvidia,tegra210-spi nvidia,tegra114-spi          I    p                  W       ]                        +                   D         spi                D         spi            %      %           rx tx         	   disabled          rtc@7000e000          '    nvidia,tegra210-rtc nvidia,tegra20-rtc           I    p                  W                  (                        rtc       pmc@7000e400              nvidia,tegra210-pmc          I    p                       %   ,         pclk clk32k_in                      r                                                     8            P    $        j                               (   pinmux     pex-dpd-disable         pex-bias pex-clk1 pex-clk2                            pex-dpd-enable          pex-bias pex-clk1 pex-clk2                            sdmmc1-1v8          sdmmc1                         =      sdmmc1-3v3          sdmmc1                        <      sdmmc3-1v8          sdmmc3                         D      sdmmc3-3v3          sdmmc3                        C         powergates     aud                      k                                      K      sor       P                                       0      R                  8      8                     0      R                  8                             venc                         4                           4                             vic                                                            xusba                                                        /      xusbb                 !               _                       H      xusbc                  Y               Y                       .            fuse@7000f800             nvidia,tegra210-efuse            I    p                                 fuse                   '         fuse          memory-controller@70019000            nvidia,tegra210-mc           I    p                                 mc           W       M           
                               external-memory-controller@7001b000           nvidia,tegra210-emc       0   I    p            p            p                       9         emc          W       N                      0             1      sata@70020000             nvidia,tegra210-ahci          0   I    pp             p        p     p                  W                         |      {         sata sata-oob                  |            {         sata sata-cold sata-oob          okay            a   -      hda@70030000          '    nvidia,tegra210-hda nvidia,tegra30-hda           I    p                  W       Q                  }            o         hda hda2hdmi hda2codec_2x                  }            o         hda hda2hdmi hda2codec_2x           w            okay            ?NVIDIA Jetson TX1 HDA         usb@70090000              nvidia,tegra210-xusb          0   I    p	             p	            p	                 Mhcd fpci ipfs            W       '          (         X         Y                     j          "                            x   xusb_host xusb_host_src xusb_falcon_src xusb_ss xusb_ss_div2 xusb_ss_src xusb_hs_src xusb_fs_src pll_u_480m clk_m pll_e                Y                     xusb_host xusb_ss xusb_src          w   .   /        Lxusb_host xusb_ss           _   0         okay            a   1   2   3   4   5   6      *  fusb2-0 usb2-1 usb2-2 usb2-3 usb3-0 usb3-1                                 r   &                     +       ethernet@1            usb955,9ff           I            padctl@7009f000           nvidia,tegra210-xusb-padctl          I    p	                 W       1                           padctl             (         okay                          7                                 0   pads       usb2                            trk          okay       lanes      usb2-0           okay                        Hxusb               1      usb2-1           okay                        Hxusb               2      usb2-2           okay                        Hxusb               3      usb2-3           okay                        Hxusb               4            hsic                            trk       	   disabled       lanes      hsic-0        	   disabled                      hsic-1        	   disabled                            pcie                           pll                         phy          okay       lanes      pcie-0           okay                        Hpcie-x1                  pcie-1           okay                        Hpcie-x4            	      pcie-2           okay                        Hpcie-x4            
      pcie-3           okay                        Hpcie-x4                  pcie-4           okay                        Hpcie-x4                  pcie-5           okay                        Husb3-ss            6      pcie-6           okay                        Husb3-ss            5            sata                           pll                         phy          okay       lanes      sata-0           okay                        Hsata               -               ports      usb2-0           okay               8                 otg    connector         %    gpio-usb-b-connector usb-b-connector          
  micro-USB            Dmicro                               9                 usb2-1           okay               :        host          usb2-2           okay               ;        host          usb2-3           okay            host          hsic-0        	   disabled          usb3-0           okay                     usb3-1           okay                     usb3-2        	   disabled          usb3-3        	   disabled                mmc@700b0000              nvidia,tegra210-sdhci            I    p                  W                                        sdhci tmclk                         sdhci         0   sdmmc-3v3 sdmmc-1v8 sdmmc-3v3-drv sdmmc-1v8-drv             <            =        B   >        5   ?        ?            e   }           {           {                                         4     .             4         ; ;          okay            	           	                 	                  	   @        	+   A      mmc@700b0200              nvidia,tegra210-sdhci            I    p                 W                         	               sdhci tmclk                	         sdhci            sdmmc-1v8-drv               B                                                      okay            	            	7        	E      8            	           	+   &                     +       wifi@1        $    brcm,bcm4354-fmac brcm,bcm4329-fmac          I                        W   :         
   bhost-wake            mmc@700b0400              nvidia,tegra210-sdhci            I    p                 W                         E               sdhci tmclk                E         sdhci         0   sdmmc-3v3 sdmmc-1v8 sdmmc-3v3-drv sdmmc-1v8-drv             C            D        B   E        5   F        ?            e   }           {           {                            	   disabled          mmc@700b0600              nvidia,tegra210-sdhci            I    p                 W                                        sdhci tmclk                         sdhci            sdmmc-3v3-drv sdmmc-1v8-drv             G            G                                                                4             4        	Q   (         	a         okay            	            	7        	         usb@700d0000              nvidia,tegra210-xudc          0   I    p             p            p                 Mbase fpci ipfs           W       ,         (        !           >          "         dev ss ss_src fs_src hs_src         w   H   /        Ldev ss          _   0         okay            a   1        fusb2-0          	p   &        	         thermal-sensor@700e2000           nvidia,tegra210-soctherm              I    p             ` `                 Msoctherm-reg car-reg             W       0          3            bthermal edp                d      N         tsensor soctherm                   N      	   soctherm            	             .   throttle-cfgs      heavy           	   d        	   U        	           0             0            mipi@700e3000             nvidia,tegra210-mipi             I    p0                       8      	   mipi-cal            w           	                    clock@70110000            nvidia,tegra210-dfll          @   I    p             p             p            p                 W       >                 )     (      /         soc ref i2c                            
   dvco dfll                       
dfllCPU_out          okay            
           
"            
,           
6           
H           
Z  a        
m 
͠        
  	         
        
 B@        
  K       !   dvfs_pwm_enable dvfs_pwm_disable                I            J                 aconnect@702c0000             nvidia,tegra210-aconnect                         k         ape apb2ape         w   K                     +            p,      p,              okay       ahub@702d0800             nvidia,tegra210-ahub             Ip-                   j         ahub                  j                                            +            p-  p-              okay              F   admaif@702d0000           nvidia,tegra210-admaif           Ip-                L      L      L      L      L      L      L      L      L      L      L      L      L      L      L      L      L   	   L   	   L   
   L   
      R  rx1 tx1 rx2 tx2 rx3 tx3 rx4 tx4 rx5 tx5 rx6 tx6 rx7 tx7 rx8 tx8 rx9 tx9 rx10 tx10            okay              G   ports                        +       port@0           I                  endpoint            
   M                    port@1           I                 endpoint            
   N                    port@2           I                 endpoint            
   O                    port@3           I                 endpoint            
   P                    port@4           I                 endpoint            
   Q                    port@5           I                 endpoint            
   R                    port@6           I                 endpoint            
   S                    port@7           I                 endpoint            
   T                    port@8           I                 endpoint            
   U                    port@9           I   	              endpoint            
   V                          i2s@702d1000              nvidia,tegra210-i2s          Ip-                        	         i2s sync_input                                       p         
I2S1             okay              H   ports                        +       port@0           I       endpoint            
   W                    port@1           I             &   endpoint            i2s           I               i2s@702d1100              nvidia,tegra210-i2s          Ip-                        
         i2s sync_input                                       p         
I2S2             okay              J   ports                        +       port@0           I       endpoint            
   X                    port@1           I             '   endpoint            i2s           K               i2s@702d1200              nvidia,tegra210-i2s          Ip-                                 i2s sync_input                                       p         
I2S3             okay              L   ports                        +       port@0           I       endpoint            
   Y                    port@1           I             (   endpoint            i2s           M               i2s@702d1300              nvidia,tegra210-i2s          Ip-                   e              i2s sync_input                e                       p         
I2S4             okay              N   ports                        +       port@0           I       endpoint            
   Z                    port@1           I             )   endpoint            i2s           O               i2s@702d1400              nvidia,tegra210-i2s          Ip-                   f              i2s sync_input                f                       p         
I2S5             okay              P   ports                        +       port@0           I       endpoint            
   [                    port@1           I             *   endpoint            i2s           Q               sfc@702d2000              nvidia,tegra210-sfc          Ip-             
SFC1             okay              R   ports                        +       port@0           I       endpoint            
   \                    port@1           I                endpoint            
   ]                          sfc@702d2200              nvidia,tegra210-sfc          Ip-"            
SFC2             okay              S   ports                        +       port@0           I       endpoint            
   ^                    port@1           I                endpoint            
   _                          sfc@702d2400              nvidia,tegra210-sfc          Ip-$            
SFC3             okay              T   ports                        +       port@0           I       endpoint            
   `                    port@1           I                endpoint            
   a                          sfc@702d2600              nvidia,tegra210-sfc          Ip-&            
SFC4             okay              U   ports                        +       port@0           I       endpoint            
   b                    port@1           I                endpoint            
   c                          amx@702d3000              nvidia,tegra210-amx          Ip-0            
AMX1             okay              V   ports                        +       port@0           I       endpoint            
   d                    port@1           I      endpoint            
   e                    port@2           I      endpoint            
   f                    port@3           I      endpoint            
   g                    port@4           I                endpoint            
   h                          amx@702d3100              nvidia,tegra210-amx          Ip-1            
AMX2             okay              W   ports                        +       port@0           I       endpoint            
   i                    port@1           I      endpoint            
   j                    port@2           I             X   endpoint            
   k                    port@3           I             Y   endpoint            
   l                    port@4           I                endpoint            
   m                          adx@702d3800              nvidia,tegra210-adx          Ip-8            
ADX1             okay              Z   ports                        +       port@0           I       endpoint            
   n                    port@1           I                endpoint            
   o                    port@2           I                endpoint            
   p                    port@3           I                endpoint            
   q                    port@4           I                endpoint            
   r                          adx@702d3900              nvidia,tegra210-adx          Ip-9            
ADX2             okay              [   ports                        +       port@0           I       endpoint            
   s                    port@1           I                endpoint            
   t                    port@2           I                endpoint            
   u                    port@3           I                endpoint            
   v                    port@4           I                endpoint            
   w                          dmic@702d4000             nvidia,tegra210-dmic             Ip-@                            dmic                                         .         
DMIC1            okay              \   ports                        +       port@0           I       endpoint            
   x                    port@1           I             +   endpoint              ]               dmic@702d4100             nvidia,tegra210-dmic             Ip-A                            dmic                                         .         
DMIC2            okay              ^   ports                        +       port@0           I       endpoint            
   y                    port@1           I             ,   endpoint              _               dmic@702d4200             nvidia,tegra210-dmic             Ip-B                            dmic                                         .         
DMIC3            okay              `   ports                        +       port@0           I       endpoint            
   z                    port@1           I             -   endpoint              a               processing-engine@702d8000            nvidia,tegra210-ope          Ip-                         +                     
OPE1             okay              b   equalizer@702d8100            nvidia,tegra210-peq          Ip-          dynamic-range-compressor@702d8200             nvidia,tegra210-mbdrc            Ip-          ports                        +       port@0           I       endpoint            
   {                    port@1           I             $   endpoint            
   |                          processing-engine@702d8400            nvidia,tegra210-ope          Ip-                         +                     
OPE2             okay              c   equalizer@702d8500            nvidia,tegra210-peq          Ip-          dynamic-range-compressor@702d8600             nvidia,tegra210-mbdrc            Ip-          ports                        +       port@0           I       endpoint            
   }                    port@1           I             %   endpoint            
   ~                          mvc@702da000              nvidia,tegra210-mvc          Ip-            
MVC1             okay              d   ports                        +       port@0           I       endpoint            
                       port@1           I                endpoint            
                             mvc@702da200              nvidia,tegra210-mvc          Ip-            
MVC2             okay              e   ports                        +       port@0           I       endpoint            
                       port@1           I                endpoint            
                             amixer@702dbb00           nvidia,tegra210-amixer           Ip-            
MIXER1           okay              f   ports                        +       port@0           I       endpoint            
                       port@1           I      endpoint            
                       port@2           I      endpoint            
                       port@3           I      endpoint            
                       port@4           I      endpoint            
                       port@5           I      endpoint            
                       port@6           I      endpoint            
                       port@7           I      endpoint            
                       port@8           I      endpoint            
                       port@9           I   	   endpoint            
                       port@a           I   
             endpoint            
                       port@b           I                 endpoint            
                       port@c           I             !   endpoint            
                       port@d           I             "   endpoint            
                       port@e           I             #   endpoint            
                             ports                        +       port@0           I       endpoint            
              M         port@1           I      endpoint            
              N         port@2           I      endpoint            
              O         port@3           I      endpoint            
              P         port@4           I      endpoint            
              Q         port@5           I      endpoint            
              R         port@6           I      endpoint            
              S         port@7           I      endpoint            
              T         port@8           I      endpoint            
              U         port@9           I   	   endpoint            
              V         port@a           I   
              endpoint            
              W         port@b           I                 endpoint            
              X         port@c           I                 endpoint            
              Y         port@d           I                 endpoint            
              Z         port@e           I                 endpoint            
              [         port@f           I                 endpoint            
              x         port@10          I                 endpoint            
              y         port@11          I                 endpoint            
              z         port@12          I                 endpoint            
              \         port@13          I      endpoint            
              ]         port@14          I                 endpoint            
              ^         port@15          I      endpoint            
              _         port@16          I                 endpoint            
              `         port@17          I      endpoint            
              a         port@18          I                 endpoint            
              b         port@19          I      endpoint            
              c         port@1a          I                 endpoint            
                       port@1b          I      endpoint            
                       port@1c          I                 endpoint            
                       port@1d          I      endpoint            
                       port@1e          I                 endpoint            
              d         port@1f          I                 endpoint            
              e         port@20          I                  endpoint            
              f         port@21          I   !              endpoint            
              g         port@22          I   "   endpoint            
              h         port@23          I   #              endpoint            
              i         port@24          I   $              endpoint            
              j         port@25          I   %              endpoint            
              k         port@26          I   &              endpoint            
              l         port@27          I   '   endpoint            
              m         port@28          I   (             endpoint            
              n         port@29          I   )   endpoint            
              o         port@2a          I   *   endpoint            
              p         port@2b          I   +   endpoint            
              q         port@2c          I   ,   endpoint            
              r         port@2d          I   -             endpoint            
              s         port@2e          I   .   endpoint            
              t         port@2f          I   /   endpoint            
              u         port@30          I   0   endpoint            
              v         port@31          I   1   endpoint            
              w         port@32          I   2             endpoint            
                       port@33          I   3             endpoint            
                       port@34          I   4             endpoint            
                       port@35          I   5             endpoint            
                       port@36          I   6             endpoint            
                       port@37          I   7             endpoint            
                       port@38          I   8          	   endpoint            
                       port@39          I   9          
   endpoint            
                       port@3a          I   :             endpoint            
                       port@3b          I   ;             endpoint            
                       port@3c          I   <   endpoint            
                       port@3d          I   =   endpoint            
                       port@3e          I   >   endpoint            
                       port@3f          I   ?   endpoint            
                       port@40          I   @   endpoint            
                       port@41          I   A             endpoint            
              {         port@42          I   B   endpoint            
              |         port@43          I   C             endpoint            
              }         port@44          I   D   endpoint            
              ~               dma-controller@702e2000           nvidia,tegra210-adma             Ip.                          W                                                                                                  !          "          #          $          %          &          '          (          )          *          +          ,          -                             j         d_audio          okay               L      interrupt-controller@702f9000             nvidia,tegra210-agic             r                     Ip/    p/              W       f                          clk          okay                        spi@70410000              nvidia,tegra210-qspi             I    pA                  W       
                        +                                 qspi qspi_out                             %      %           rx tx         	   disabled          usb@7d000000          )    nvidia,tegra210-ehci nvidia,tegra30-ehci             I    }         @          W                  'utmi                            usb                         usb         0         	   disabled          usb-phy@7d000000          /    nvidia,tegra210-usb-phy nvidia,tegra30-usb-phy            I    }         @     }         @         'utmi                                        reg pll_u utmi-pads                               usb utmi-pads           ;            U           l                         	                                                                       	   disabled                     usb@7d004000          )    nvidia,tegra210-ehci nvidia,tegra30-ehci             I    } @       @          W                  'utmi                   :         usb                :         usb         0         	   disabled          usb-phy@7d004000          /    nvidia,tegra210-usb-phy nvidia,tegra30-usb-phy            I    } @       @     }         @         'utmi                   :                     reg pll_u utmi-pads                :               usb utmi-pads           ;            U           l                         	                                                              	   disabled                     cpus                         +       cpu@0            =cpu           arm,cortex-a57           I                  &                       cpu_g pll_x pll_p dfll          /         =           M           ^psci                     cpu@1            =cpu           arm,cortex-a57           I           =           M           ^psci                     cpu@2            =cpu           arm,cortex-a57           I           =           M           ^psci                     cpu@3            =cpu           arm,cortex-a57           I           =           M           ^psci                     idle-states         lpsci       cpu-sleep             arm,idle-state          y@             d                                      
  cpu-sleep            okay                        l2-cache              cache                                           pmu           arm,cortex-a57-pmu        0   W                                                                  sound            okay                                  pll_a plla_out0                           x                                          !    nvidia,tegra210-audio-graph-card         4                                                                                                                    	  
                                               !  "  #  $  %  &  '  (  )  *  +  ,  -        NVIDIA Jetson TX1 APE         thermal-zones      cpu-thermal                   ,            :  .       trips      cpu-shutdown-trip           J d        V          	   Dcritical          throttle-trip           J         V           Dhot           /         cooling-maps       map0            a  /        f  0                  mem-thermal                     ,            :  .      trips      mem-nominal-trip            J  P        V           Dpassive           2      mem-throttle-trip           J p        V           Dactive            3      mem-hot-trip            J         V           Dhot       mem-shutdown-trip           J X        V          	   Dcritical             cooling-maps       dram-passive            f  1                a  2      dram-active         f  1              a  3            gpu-thermal                   ,            :  .      trips      gpu-shutdown-trip           J X        V          	   Dcritical          throttle-trip           J         V           Dhot           4         cooling-maps       map0            a  4        f  0                  pllx-thermal                        ,            :  .      trips      pllx-shutdown-trip          J X        V          	   Dcritical          pllx-throttle-trip          J         V           Dhot          cooling-maps                timer             arm,armv8-timer       0   W                              
                       u      aliases         /i2c@7000d000/pmic@3c           /rtc@7000e000           /serial@70006000            /serial@70006300            /usb@70090000/ethernet@1          chosen          serial0:115200n8          memory@80000000          =memory           I                    clock-32k             fixed-clock                                   ,      psci              arm,psci-0.2            esmc       regulator-vdd-gpu             pwm-regulator           0   '     @        ]VDD_GPU         l 
p         $@           9                  P                                #      gpio-keys         
    gpio-keys         
  gpio-keys      key-power           Power           %                    t               key-volume-down         Volume Down         %                    r      key-volume-up         
  Volume Up           %                    s         regulator-vdd-sys-mux             regulator-fixed         ]VDD_SYS_MUX         l LK@         LK@                            5      regulator-vdd-5v0-sys             regulator-fixed         ]VDD_5V0_SYS         l LK@         LK@                             9                          5           +      regulator-vdd-3v3-sys             regulator-fixed         ]VDD_3V3_SYS         l 2Z         2Z                             9                          5                      &      regulator-vdd-5v0-io              regulator-fixed         ]VDD_5V0_IO_SYS          l LK@         LK@                                   regulator-vdd-3v3-sd              regulator-fixed         ]VDD_3V3_SD          l 2Z         2Z                                      &                     A      regulator-vdd-dsi-csi             regulator-fixed         ]AVDD_DSI_CSI_1V2            l O         O          6                 regulator-vdd-3v3-dis             regulator-fixed         ]VDD_DIS_3V3_LCD         l 2Z         2Z                   7                           &          g      regulator-vdd-1v8-dis             regulator-fixed         ]VDD_LCD_1V8_DIS         l w@         w@                   7   	                                  h      regulator-vdd-5v0-rtl             regulator-fixed         ]RTL_5V          l LK@         LK@              9                        +           :      regulator-vdd-usb-vbus            regulator-fixed         ]USB_VBUS_EN1            l LK@         LK@                                      +           ;      regulator-vdd-hdmi            regulator-fixed         ]VDD_HDMI_5V0            l LK@         LK@          7                           +           !      regulator-vdd-cam-1v2             regulator-fixed         ]vdd-cam-1v2         l O         O          8   
                        &          i      regulator-vdd-cam-2v8             regulator-fixed         ]vdd-cam-2v8         l *         *          7                           &          j      regulator-vdd-cam-1v8             regulator-fixed         ]vdd-cam-1v8         l w@         w@          8   	                        &          k      regulator-vdd-usb-vbus-otg            regulator-fixed         ]USB_VBUS_EN0            l LK@         LK@                                      +           8      __symbols__          /host1x@50000000/dpaux@54040000       +  /host1x@50000000/dpaux@54040000/pinmux-aux        +  %/host1x@50000000/dpaux@54040000/pinmux-i2c        +  6/host1x@50000000/dpaux@54040000/pinmux-off          G/host1x@50000000/dsi@54300000           L/host1x@50000000/dsi@54400000           Q/host1x@50000000/sor@54540000           V/host1x@50000000/sor@54580000            [/host1x@50000000/dpaux@545c0000       +  a/host1x@50000000/dpaux@545c0000/pinmux-aux        +  q/host1x@50000000/dpaux@545c0000/pinmux-i2c        +  /host1x@50000000/dpaux@545c0000/pinmux-off          /interrupt-controller@50041000          /interrupt-controller@60004000          /clock@60006000         /gpio@6000d000          /dma@60020000           /pinmux@700008d4          '  /pinmux@700008d4/pinmux-sdmmc1-1v8-drv        '  /pinmux@700008d4/pinmux-sdmmc1-3v3-drv        '  /pinmux@700008d4/pinmux-sdmmc2-1v8-drv        '  /pinmux@700008d4/pinmux-sdmmc3-1v8-drv        '  /pinmux@700008d4/pinmux-sdmmc3-3v3-drv        '  /pinmux@700008d4/pinmux-sdmmc4-1v8-drv          /pinmux@700008d4/pinmux       (  /pinmux@700008d4/pinmux-dvfs-pwm-active       *  ,/pinmux@700008d4/pinmux-dvfs-pwm-inactive           D/serial@70006000            J/serial@70006040            P/serial@70006200            V/serial@70006300            \/pwm@7000a000           `/i2c@7000c400/gpio@74           e/i2c@7000c400/gpio@77           8/i2c@7000c400/backlight@2c          j/i2c@7000c700           
/i2c@7000d000/pmic@3c           s/i2c@7000d000/pmic@3c/pinmux          %  /i2c@7000d000/pmic@3c/regulators/sd0          %  /i2c@7000d000/pmic@3c/regulators/sd1          %  /i2c@7000d000/pmic@3c/regulators/sd2          %  /i2c@7000d000/pmic@3c/regulators/sd3          &  /i2c@7000d000/pmic@3c/regulators/ldo0         &  /i2c@7000d000/pmic@3c/regulators/ldo1         &  /i2c@7000d000/pmic@3c/regulators/ldo2         &  /i2c@7000d000/pmic@3c/regulators/ldo3         &  /i2c@7000d000/pmic@3c/regulators/ldo4         &  /i2c@7000d000/pmic@3c/regulators/ldo5         &  /i2c@7000d000/pmic@3c/regulators/ldo6         &  /i2c@7000d000/pmic@3c/regulators/ldo7         &  /i2c@7000d000/pmic@3c/regulators/ldo8           /pmc@7000e400         %  /pmc@7000e400/pinmux/pex-dpd-disable          $  /pmc@7000e400/pinmux/pex-dpd-enable          ./pmc@7000e400/pinmux/sdmmc1-1v8          9/pmc@7000e400/pinmux/sdmmc1-3v3          D/pmc@7000e400/pinmux/sdmmc3-1v8          O/pmc@7000e400/pinmux/sdmmc3-3v3         Z/pmc@7000e400/powergates/aud            c/pmc@7000e400/powergates/sor            j/pmc@7000e400/powergates/venc           r/pmc@7000e400/powergates/vic            y/pmc@7000e400/powergates/xusba          /pmc@7000e400/powergates/xusbb          /pmc@7000e400/powergates/xusbc          /memory-controller@70019000       %  /external-memory-controller@7001b000            k/padctl@7009f000          (  /padctl@7009f000/pads/usb2/lanes/usb2-0         /thermal-sensor@700e2000          -  /thermal-sensor@700e2000/throttle-cfgs/heavy            /mipi@700e3000          /clock@70110000       !  /aconnect@702c0000/ahub@702d0800          1  /aconnect@702c0000/ahub@702d0800/admaif@702d0000          >  /aconnect@702c0000/ahub@702d0800/admaif@702d0000/ports/port@0         G  /aconnect@702c0000/ahub@702d0800/admaif@702d0000/ports/port@0/endpoint        >  /aconnect@702c0000/ahub@702d0800/admaif@702d0000/ports/port@1         G  /aconnect@702c0000/ahub@702d0800/admaif@702d0000/ports/port@1/endpoint        >  /aconnect@702c0000/ahub@702d0800/admaif@702d0000/ports/port@2         G  /aconnect@702c0000/ahub@702d0800/admaif@702d0000/ports/port@2/endpoint        >  (/aconnect@702c0000/ahub@702d0800/admaif@702d0000/ports/port@3         G  5/aconnect@702c0000/ahub@702d0800/admaif@702d0000/ports/port@3/endpoint        >  @/aconnect@702c0000/ahub@702d0800/admaif@702d0000/ports/port@4         G  M/aconnect@702c0000/ahub@702d0800/admaif@702d0000/ports/port@4/endpoint        >  X/aconnect@702c0000/ahub@702d0800/admaif@702d0000/ports/port@5         G  e/aconnect@702c0000/ahub@702d0800/admaif@702d0000/ports/port@5/endpoint        >  p/aconnect@702c0000/ahub@702d0800/admaif@702d0000/ports/port@6         G  }/aconnect@702c0000/ahub@702d0800/admaif@702d0000/ports/port@6/endpoint        >  /aconnect@702c0000/ahub@702d0800/admaif@702d0000/ports/port@7         G  /aconnect@702c0000/ahub@702d0800/admaif@702d0000/ports/port@7/endpoint        >  /aconnect@702c0000/ahub@702d0800/admaif@702d0000/ports/port@8         G  /aconnect@702c0000/ahub@702d0800/admaif@702d0000/ports/port@8/endpoint        >  /aconnect@702c0000/ahub@702d0800/admaif@702d0000/ports/port@9         G  /aconnect@702c0000/ahub@702d0800/admaif@702d0000/ports/port@9/endpoint        .  /aconnect@702c0000/ahub@702d0800/i2s@702d1000         D  /aconnect@702c0000/ahub@702d0800/i2s@702d1000/ports/port@0/endpoint       ;  /aconnect@702c0000/ahub@702d0800/i2s@702d1000/ports/port@1        D  /aconnect@702c0000/ahub@702d0800/i2s@702d1000/ports/port@1/endpoint       .  /aconnect@702c0000/ahub@702d0800/i2s@702d1100         D  
/aconnect@702c0000/ahub@702d0800/i2s@702d1100/ports/port@0/endpoint       ;  /aconnect@702c0000/ahub@702d0800/i2s@702d1100/ports/port@1        D   /aconnect@702c0000/ahub@702d0800/i2s@702d1100/ports/port@1/endpoint       .  ,/aconnect@702c0000/ahub@702d0800/i2s@702d1200         D  7/aconnect@702c0000/ahub@702d0800/i2s@702d1200/ports/port@0/endpoint       ;  C/aconnect@702c0000/ahub@702d0800/i2s@702d1200/ports/port@1        D  M/aconnect@702c0000/ahub@702d0800/i2s@702d1200/ports/port@1/endpoint       .  Y/aconnect@702c0000/ahub@702d0800/i2s@702d1300         D  d/aconnect@702c0000/ahub@702d0800/i2s@702d1300/ports/port@0/endpoint       ;  p/aconnect@702c0000/ahub@702d0800/i2s@702d1300/ports/port@1        D  z/aconnect@702c0000/ahub@702d0800/i2s@702d1300/ports/port@1/endpoint       .  /aconnect@702c0000/ahub@702d0800/i2s@702d1400         D  /aconnect@702c0000/ahub@702d0800/i2s@702d1400/ports/port@0/endpoint       ;  /aconnect@702c0000/ahub@702d0800/i2s@702d1400/ports/port@1        D  /aconnect@702c0000/ahub@702d0800/i2s@702d1400/ports/port@1/endpoint       .  /aconnect@702c0000/ahub@702d0800/sfc@702d2000         D  /aconnect@702c0000/ahub@702d0800/sfc@702d2000/ports/port@0/endpoint       ;  /aconnect@702c0000/ahub@702d0800/sfc@702d2000/ports/port@1        D  /aconnect@702c0000/ahub@702d0800/sfc@702d2000/ports/port@1/endpoint       .  /aconnect@702c0000/ahub@702d0800/sfc@702d2200         D  /aconnect@702c0000/ahub@702d0800/sfc@702d2200/ports/port@0/endpoint       ;  /aconnect@702c0000/ahub@702d0800/sfc@702d2200/ports/port@1        D  /aconnect@702c0000/ahub@702d0800/sfc@702d2200/ports/port@1/endpoint       .  #/aconnect@702c0000/ahub@702d0800/sfc@702d2400         D  ./aconnect@702c0000/ahub@702d0800/sfc@702d2400/ports/port@0/endpoint       ;  =/aconnect@702c0000/ahub@702d0800/sfc@702d2400/ports/port@1        D  K/aconnect@702c0000/ahub@702d0800/sfc@702d2400/ports/port@1/endpoint       .  [/aconnect@702c0000/ahub@702d0800/sfc@702d2600         D  f/aconnect@702c0000/ahub@702d0800/sfc@702d2600/ports/port@0/endpoint       ;  u/aconnect@702c0000/ahub@702d0800/sfc@702d2600/ports/port@1        D  /aconnect@702c0000/ahub@702d0800/sfc@702d2600/ports/port@1/endpoint       .  /aconnect@702c0000/ahub@702d0800/amx@702d3000         D  /aconnect@702c0000/ahub@702d0800/amx@702d3000/ports/port@0/endpoint       D  /aconnect@702c0000/ahub@702d0800/amx@702d3000/ports/port@1/endpoint       D  /aconnect@702c0000/ahub@702d0800/amx@702d3000/ports/port@2/endpoint       D  /aconnect@702c0000/ahub@702d0800/amx@702d3000/ports/port@3/endpoint       ;  /aconnect@702c0000/ahub@702d0800/amx@702d3000/ports/port@4        D  /aconnect@702c0000/ahub@702d0800/amx@702d3000/ports/port@4/endpoint       .  /aconnect@702c0000/ahub@702d0800/amx@702d3100         D  /aconnect@702c0000/ahub@702d0800/amx@702d3100/ports/port@0/endpoint       D  /aconnect@702c0000/ahub@702d0800/amx@702d3100/ports/port@1/endpoint       ;  /aconnect@702c0000/ahub@702d0800/amx@702d3100/ports/port@2        D  /aconnect@702c0000/ahub@702d0800/amx@702d3100/ports/port@2/endpoint       ;  %/aconnect@702c0000/ahub@702d0800/amx@702d3100/ports/port@3        D  3/aconnect@702c0000/ahub@702d0800/amx@702d3100/ports/port@3/endpoint       ;  ?/aconnect@702c0000/ahub@702d0800/amx@702d3100/ports/port@4        D  M/aconnect@702c0000/ahub@702d0800/amx@702d3100/ports/port@4/endpoint       .  Y/aconnect@702c0000/ahub@702d0800/adx@702d3800         D  d/aconnect@702c0000/ahub@702d0800/adx@702d3800/ports/port@0/endpoint       ;  o/aconnect@702c0000/ahub@702d0800/adx@702d3800/ports/port@1        D  ~/aconnect@702c0000/ahub@702d0800/adx@702d3800/ports/port@1/endpoint       ;  /aconnect@702c0000/ahub@702d0800/adx@702d3800/ports/port@2        D  /aconnect@702c0000/ahub@702d0800/adx@702d3800/ports/port@2/endpoint       ;  /aconnect@702c0000/ahub@702d0800/adx@702d3800/ports/port@3        D  /aconnect@702c0000/ahub@702d0800/adx@702d3800/ports/port@3/endpoint       ;  /aconnect@702c0000/ahub@702d0800/adx@702d3800/ports/port@4        D  /aconnect@702c0000/ahub@702d0800/adx@702d3800/ports/port@4/endpoint       .  /aconnect@702c0000/ahub@702d0800/adx@702d3900         D  /aconnect@702c0000/ahub@702d0800/adx@702d3900/ports/port@0/endpoint       ;  /aconnect@702c0000/ahub@702d0800/adx@702d3900/ports/port@1        D  /aconnect@702c0000/ahub@702d0800/adx@702d3900/ports/port@1/endpoint       ;  /aconnect@702c0000/ahub@702d0800/adx@702d3900/ports/port@2        D   /aconnect@702c0000/ahub@702d0800/adx@702d3900/ports/port@2/endpoint       ;  -/aconnect@702c0000/ahub@702d0800/adx@702d3900/ports/port@3        D  </aconnect@702c0000/ahub@702d0800/adx@702d3900/ports/port@3/endpoint       ;  I/aconnect@702c0000/ahub@702d0800/adx@702d3900/ports/port@4        D  X/aconnect@702c0000/ahub@702d0800/adx@702d3900/ports/port@4/endpoint       /  e/aconnect@702c0000/ahub@702d0800/dmic@702d4000        E  q/aconnect@702c0000/ahub@702d0800/dmic@702d4000/ports/port@0/endpoint          <  ~/aconnect@702c0000/ahub@702d0800/dmic@702d4000/ports/port@1       E  /aconnect@702c0000/ahub@702d0800/dmic@702d4000/ports/port@1/endpoint          /  /aconnect@702c0000/ahub@702d0800/dmic@702d4100        E  /aconnect@702c0000/ahub@702d0800/dmic@702d4100/ports/port@0/endpoint          <  /aconnect@702c0000/ahub@702d0800/dmic@702d4100/ports/port@1       E  /aconnect@702c0000/ahub@702d0800/dmic@702d4100/ports/port@1/endpoint          /  /aconnect@702c0000/ahub@702d0800/dmic@702d4200        E  /aconnect@702c0000/ahub@702d0800/dmic@702d4200/ports/port@0/endpoint          <  /aconnect@702c0000/ahub@702d0800/dmic@702d4200/ports/port@1       E  /aconnect@702c0000/ahub@702d0800/dmic@702d4200/ports/port@1/endpoint          <  /aconnect@702c0000/ahub@702d0800/processing-engine@702d8000       R  /aconnect@702c0000/ahub@702d0800/processing-engine@702d8000/ports/port@0/endpoint         I  /aconnect@702c0000/ahub@702d0800/processing-engine@702d8000/ports/port@1          R   /aconnect@702c0000/ahub@702d0800/processing-engine@702d8000/ports/port@1/endpoint         <  0/aconnect@702c0000/ahub@702d0800/processing-engine@702d8400       R  ;/aconnect@702c0000/ahub@702d0800/processing-engine@702d8400/ports/port@0/endpoint         I  J/aconnect@702c0000/ahub@702d0800/processing-engine@702d8400/ports/port@1          R  X/aconnect@702c0000/ahub@702d0800/processing-engine@702d8400/ports/port@1/endpoint         .  h/aconnect@702c0000/ahub@702d0800/mvc@702da000         D  s/aconnect@702c0000/ahub@702d0800/mvc@702da000/ports/port@0/endpoint       ;  /aconnect@702c0000/ahub@702d0800/mvc@702da000/ports/port@1        D  /aconnect@702c0000/ahub@702d0800/mvc@702da000/ports/port@1/endpoint       .  /aconnect@702c0000/ahub@702d0800/mvc@702da200         D  /aconnect@702c0000/ahub@702d0800/mvc@702da200/ports/port@0/endpoint       ;  /aconnect@702c0000/ahub@702d0800/mvc@702da200/ports/port@1        D  /aconnect@702c0000/ahub@702d0800/mvc@702da200/ports/port@1/endpoint       1  /aconnect@702c0000/ahub@702d0800/amixer@702dbb00          G  /aconnect@702c0000/ahub@702d0800/amixer@702dbb00/ports/port@0/endpoint        G  /aconnect@702c0000/ahub@702d0800/amixer@702dbb00/ports/port@1/endpoint        G  /aconnect@702c0000/ahub@702d0800/amixer@702dbb00/ports/port@2/endpoint        G  /aconnect@702c0000/ahub@702d0800/amixer@702dbb00/ports/port@3/endpoint        G  /aconnect@702c0000/ahub@702d0800/amixer@702dbb00/ports/port@4/endpoint        G  &/aconnect@702c0000/ahub@702d0800/amixer@702dbb00/ports/port@5/endpoint        G  3/aconnect@702c0000/ahub@702d0800/amixer@702dbb00/ports/port@6/endpoint        G  @/aconnect@702c0000/ahub@702d0800/amixer@702dbb00/ports/port@7/endpoint        G  M/aconnect@702c0000/ahub@702d0800/amixer@702dbb00/ports/port@8/endpoint        G  Z/aconnect@702c0000/ahub@702d0800/amixer@702dbb00/ports/port@9/endpoint        >  h/aconnect@702c0000/ahub@702d0800/amixer@702dbb00/ports/port@a         G  x/aconnect@702c0000/ahub@702d0800/amixer@702dbb00/ports/port@a/endpoint        >  /aconnect@702c0000/ahub@702d0800/amixer@702dbb00/ports/port@b         G  /aconnect@702c0000/ahub@702d0800/amixer@702dbb00/ports/port@b/endpoint        >  /aconnect@702c0000/ahub@702d0800/amixer@702dbb00/ports/port@c         G  /aconnect@702c0000/ahub@702d0800/amixer@702dbb00/ports/port@c/endpoint        >  /aconnect@702c0000/ahub@702d0800/amixer@702dbb00/ports/port@d         G  /aconnect@702c0000/ahub@702d0800/amixer@702dbb00/ports/port@d/endpoint        >  /aconnect@702c0000/ahub@702d0800/amixer@702dbb00/ports/port@e         G  /aconnect@702c0000/ahub@702d0800/amixer@702dbb00/ports/port@e/endpoint        7  /aconnect@702c0000/ahub@702d0800/ports/port@0/endpoint        7  /aconnect@702c0000/ahub@702d0800/ports/port@1/endpoint        7  /aconnect@702c0000/ahub@702d0800/ports/port@2/endpoint        7  ./aconnect@702c0000/ahub@702d0800/ports/port@3/endpoint        7  >/aconnect@702c0000/ahub@702d0800/ports/port@4/endpoint        7  N/aconnect@702c0000/ahub@702d0800/ports/port@5/endpoint        7  ^/aconnect@702c0000/ahub@702d0800/ports/port@6/endpoint        7  n/aconnect@702c0000/ahub@702d0800/ports/port@7/endpoint        7  ~/aconnect@702c0000/ahub@702d0800/ports/port@8/endpoint        7  /aconnect@702c0000/ahub@702d0800/ports/port@9/endpoint        .  /aconnect@702c0000/ahub@702d0800/ports/port@a         7  /aconnect@702c0000/ahub@702d0800/ports/port@a/endpoint        .  /aconnect@702c0000/ahub@702d0800/ports/port@b         7  /aconnect@702c0000/ahub@702d0800/ports/port@b/endpoint        .  /aconnect@702c0000/ahub@702d0800/ports/port@c         7  /aconnect@702c0000/ahub@702d0800/ports/port@c/endpoint        .  /aconnect@702c0000/ahub@702d0800/ports/port@d         7  /aconnect@702c0000/ahub@702d0800/ports/port@d/endpoint        .  /aconnect@702c0000/ahub@702d0800/ports/port@e         7  /aconnect@702c0000/ahub@702d0800/ports/port@e/endpoint        .  +/aconnect@702c0000/ahub@702d0800/ports/port@f         7  ;/aconnect@702c0000/ahub@702d0800/ports/port@f/endpoint        /  I/aconnect@702c0000/ahub@702d0800/ports/port@10        8  Y/aconnect@702c0000/ahub@702d0800/ports/port@10/endpoint       /  g/aconnect@702c0000/ahub@702d0800/ports/port@11        8  w/aconnect@702c0000/ahub@702d0800/ports/port@11/endpoint       /  /aconnect@702c0000/ahub@702d0800/ports/port@12        8  /aconnect@702c0000/ahub@702d0800/ports/port@12/endpoint       8  /aconnect@702c0000/ahub@702d0800/ports/port@13/endpoint       /  /aconnect@702c0000/ahub@702d0800/ports/port@14        8  /aconnect@702c0000/ahub@702d0800/ports/port@14/endpoint       8  /aconnect@702c0000/ahub@702d0800/ports/port@15/endpoint       /  /aconnect@702c0000/ahub@702d0800/ports/port@16        8  /aconnect@702c0000/ahub@702d0800/ports/port@16/endpoint       8  /aconnect@702c0000/ahub@702d0800/ports/port@17/endpoint       /  /aconnect@702c0000/ahub@702d0800/ports/port@18        8  0/aconnect@702c0000/ahub@702d0800/ports/port@18/endpoint       8  @/aconnect@702c0000/ahub@702d0800/ports/port@19/endpoint       /  Q/aconnect@702c0000/ahub@702d0800/ports/port@1a        8  c/aconnect@702c0000/ahub@702d0800/ports/port@1a/endpoint       8  s/aconnect@702c0000/ahub@702d0800/ports/port@1b/endpoint       /  /aconnect@702c0000/ahub@702d0800/ports/port@1c        8  /aconnect@702c0000/ahub@702d0800/ports/port@1c/endpoint       8  /aconnect@702c0000/ahub@702d0800/ports/port@1d/endpoint       /  /aconnect@702c0000/ahub@702d0800/ports/port@1e        8  /aconnect@702c0000/ahub@702d0800/ports/port@1e/endpoint       /  /aconnect@702c0000/ahub@702d0800/ports/port@1f        8  /aconnect@702c0000/ahub@702d0800/ports/port@1f/endpoint       /  /aconnect@702c0000/ahub@702d0800/ports/port@20        8  /aconnect@702c0000/ahub@702d0800/ports/port@20/endpoint       /  #/aconnect@702c0000/ahub@702d0800/ports/port@21        8  6/aconnect@702c0000/ahub@702d0800/ports/port@21/endpoint       8  G/aconnect@702c0000/ahub@702d0800/ports/port@22/endpoint       /  X/aconnect@702c0000/ahub@702d0800/ports/port@23        8  k/aconnect@702c0000/ahub@702d0800/ports/port@23/endpoint       /  |/aconnect@702c0000/ahub@702d0800/ports/port@24        8  /aconnect@702c0000/ahub@702d0800/ports/port@24/endpoint       /  /aconnect@702c0000/ahub@702d0800/ports/port@25        8  /aconnect@702c0000/ahub@702d0800/ports/port@25/endpoint       /  /aconnect@702c0000/ahub@702d0800/ports/port@26        8  /aconnect@702c0000/ahub@702d0800/ports/port@26/endpoint       8  /aconnect@702c0000/ahub@702d0800/ports/port@27/endpoint       /  /aconnect@702c0000/ahub@702d0800/ports/port@28        8  /aconnect@702c0000/ahub@702d0800/ports/port@28/endpoint       8  /aconnect@702c0000/ahub@702d0800/ports/port@29/endpoint       8  -/aconnect@702c0000/ahub@702d0800/ports/port@2a/endpoint       8  ?/aconnect@702c0000/ahub@702d0800/ports/port@2b/endpoint       8  Q/aconnect@702c0000/ahub@702d0800/ports/port@2c/endpoint       /  c/aconnect@702c0000/ahub@702d0800/ports/port@2d        8  u/aconnect@702c0000/ahub@702d0800/ports/port@2d/endpoint       8  /aconnect@702c0000/ahub@702d0800/ports/port@2e/endpoint       8  /aconnect@702c0000/ahub@702d0800/ports/port@2f/endpoint       8  /aconnect@702c0000/ahub@702d0800/ports/port@30/endpoint       8  /aconnect@702c0000/ahub@702d0800/ports/port@31/endpoint       /  /aconnect@702c0000/ahub@702d0800/ports/port@32        8  /aconnect@702c0000/ahub@702d0800/ports/port@32/endpoint       /  /aconnect@702c0000/ahub@702d0800/ports/port@33        8  /aconnect@702c0000/ahub@702d0800/ports/port@33/endpoint       /  /aconnect@702c0000/ahub@702d0800/ports/port@34        8  -/aconnect@702c0000/ahub@702d0800/ports/port@34/endpoint       /  ?/aconnect@702c0000/ahub@702d0800/ports/port@35        8  S/aconnect@702c0000/ahub@702d0800/ports/port@35/endpoint       /  e/aconnect@702c0000/ahub@702d0800/ports/port@36        8  y/aconnect@702c0000/ahub@702d0800/ports/port@36/endpoint       /  /aconnect@702c0000/ahub@702d0800/ports/port@37        8  /aconnect@702c0000/ahub@702d0800/ports/port@37/endpoint       /  /aconnect@702c0000/ahub@702d0800/ports/port@38        8  /aconnect@702c0000/ahub@702d0800/ports/port@38/endpoint       /  /aconnect@702c0000/ahub@702d0800/ports/port@39        8  /aconnect@702c0000/ahub@702d0800/ports/port@39/endpoint       /  /aconnect@702c0000/ahub@702d0800/ports/port@3a        8  /aconnect@702c0000/ahub@702d0800/ports/port@3a/endpoint       /  #/aconnect@702c0000/ahub@702d0800/ports/port@3b        8  8/aconnect@702c0000/ahub@702d0800/ports/port@3b/endpoint       8  K/aconnect@702c0000/ahub@702d0800/ports/port@3c/endpoint       8  ^/aconnect@702c0000/ahub@702d0800/ports/port@3d/endpoint       8  q/aconnect@702c0000/ahub@702d0800/ports/port@3e/endpoint       8  /aconnect@702c0000/ahub@702d0800/ports/port@3f/endpoint       8  /aconnect@702c0000/ahub@702d0800/ports/port@40/endpoint       /  /aconnect@702c0000/ahub@702d0800/ports/port@41        8  /aconnect@702c0000/ahub@702d0800/ports/port@41/endpoint       8  /aconnect@702c0000/ahub@702d0800/ports/port@42/endpoint       /  /aconnect@702c0000/ahub@702d0800/ports/port@43        8  /aconnect@702c0000/ahub@702d0800/ports/port@43/endpoint       8  /aconnect@702c0000/ahub@702d0800/ports/port@44/endpoint       +  /aconnect@702c0000/dma-controller@702e2000        1  /aconnect@702c0000/interrupt-controller@702f9000            /usb-phy@7d000000           /usb-phy@7d004000           $/cpus/idle-states/cpu-sleep         ./cpus/l2-cache        /  1/thermal-zones/cpu-thermal/trips/throttle-trip        2  C/thermal-zones/mem-thermal/trips/mem-nominal-trip         3  P/thermal-zones/mem-thermal/trips/mem-throttle-trip        /  ^/thermal-zones/gpu-thermal/trips/throttle-trip          p/clock-32k          z/regulator-vdd-gpu          /regulator-vdd-sys-mux          /regulator-vdd-5v0-sys          /regulator-vdd-3v3-sys          /regulator-vdd-5v0-io           /regulator-vdd-3v3-sd           /regulator-vdd-dsi-csi          /regulator-vdd-3v3-dis          /regulator-vdd-1v8-dis          /regulator-vdd-5v0-rtl          /regulator-vdd-usb-vbus         /regulator-vdd-hdmi          /regulator-vdd-cam-1v2           /regulator-vdd-cam-2v8           /regulator-vdd-cam-1v8           &/regulator-vdd-usb-vbus-otg          	compatible interrupt-parent #address-cells #size-cells model device_type reg reg-names interrupts interrupt-names #interrupt-cells interrupt-map-mask interrupt-map bus-range ranges clocks clock-names resets reset-names pinctrl-names pinctrl-0 pinctrl-1 status hvddio-pex-supply dvddio-pex-supply vddio-pex-ctl-supply assigned-addresses nvidia,num-lanes phys phy-names iommus power-domains phandle groups function assigned-clocks assigned-clock-parents avdd-dsi-csi-supply assigned-clock-rates nvidia,outputs nvidia,head nvidia,mipi-calibrate enable-gpios power-supply backlight pinctrl-2 avdd-io-hdmi-dp-supply vdd-hdmi-dp-pll-supply hdmi-supply nvidia,ddc-i2c-bus nvidia,hpd-gpio interrupt-controller vdd-supply #clock-cells #reset-cells #gpio-cells gpio-controller #dma-cells nvidia,pins nvidia,pull-down-strength nvidia,pull-up-strength nvidia,function nvidia,pull nvidia,tristate nvidia,enable-input nvidia,open-drain nvidia,io-hv reg-shift dmas dma-names device-wakeup-gpios shutdown-gpios #pwm-cells clock-frequency label shunt-resistor-micro-ohms dev-ctrl init-brt pwms pwm-names rom-addr rom-val vcc-supply address-width pagesize read-only maxim,fps-event-source maxim,suspend-fps-time-period-us drive-push-pull maxim,active-fps-source maxim,active-fps-power-up-slot maxim,active-fps-power-down-slot drive-open-drain in-ldo0-1-supply in-ldo7-8-supply in-sd3-supply regulator-name regulator-min-microvolt regulator-max-microvolt regulator-always-on regulator-boot-on regulator-enable-ramp-delay regulator-ramp-delay nvidia,invert-interrupt nvidia,suspend-mode nvidia,cpu-pwr-good-time nvidia,cpu-pwr-off-time nvidia,core-pwr-good-time nvidia,core-pwr-off-time nvidia,core-power-req-active-high nvidia,sys-clock-req-active-high low-power-disable low-power-enable power-source #power-domain-cells #iommu-cells nvidia,memory-controller #cooling-cells nvidia,model power-domain-names nvidia,xusb-padctl avdd-usb-supply nvidia,pmc avdd-pll-utmip-supply avdd-pll-uerefe-supply dvdd-pex-pll-supply hvdd-pex-pll-e-supply #phy-cells vbus-supply usb-role-switch vbus-gpios id-gpios nvidia,usb2-companion pinctrl-3 nvidia,pad-autocal-pull-up-offset-3v3 nvidia,pad-autocal-pull-down-offset-3v3 nvidia,pad-autocal-pull-up-offset-1v8 nvidia,pad-autocal-pull-down-offset-1v8 nvidia,default-tap nvidia,default-trim bus-width cd-gpios wp-gpios vqmmc-supply vmmc-supply non-removable power-gpios nvidia,dqs-trim mmc-hs400-1_8v avddio-usb-supply hvdd-usb-supply #thermal-sensor-cells nvidia,priority nvidia,cpu-throt-percent nvidia,gpu-throt-level #nvidia,mipi-calibrate-cells clock-output-names nvidia,cf nvidia,ci nvidia,cg nvidia,droop-ctrl nvidia,force-mode nvidia,sample-rate nvidia,pwm-min-microvolts nvidia,pwm-period-nanoseconds nvidia,pwm-to-pmic nvidia,pwm-tristate-microvolts nvidia,pwm-voltage-step-microvolts remote-endpoint sound-name-prefix dai-format phy_type nvidia,phy nvidia,hssync-start-delay nvidia,idle-wait-delay nvidia,elastic-limit nvidia,term-range-adj nvidia,xcvr-setup nvidia,xcvr-lsfslew nvidia,xcvr-lsrslew nvidia,hssquelch-level nvidia,hsdiscon-level nvidia,xcvr-hsslew nvidia,has-utmi-pad-registers clock-latency cpu-idle-states next-level-cache enable-method entry-method arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us wakeup-latency-us idle-state-name cache-level cache-unified interrupt-affinity dais polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device arm,no-tick-in-suspend rtc0 rtc1 serial0 serial3 ethernet stdout-path regulator-settling-time-us linux,code wakeup-source enable-active-high vin-supply dpaux1 state_dpaux1_aux state_dpaux1_i2c state_dpaux1_off dsia dsib sor0 sor1 dpaux state_dpaux_aux state_dpaux_i2c state_dpaux_off gic lic tegra_car apbdma pinmux sdmmc1_1v8_drv sdmmc1_3v3_drv sdmmc2_1v8_drv sdmmc3_1v8_drv sdmmc3_3v3_drv sdmmc4_1v8_drv state_boot dvfs_pwm_active_state dvfs_pwm_inactive_state uarta uartb uartc uartd pwm exp1 exp2 hdmi_ddc max77620_default vdd_soc vdd_ddr vdd_pre vdd_1v8 vdd_sys_1v2 vdd_pex_1v05 vddio_sdmmc vdd_cam_hv vdd_rtc vdd_ts_hv vdd_ts avdd_1v05_pll avdd_1v05 tegra_pmc pex_dpd_disable pex_dpd_enable sdmmc1_1v8 sdmmc1_3v3 sdmmc3_1v8 sdmmc3_3v3 pd_audio pd_sor pd_venc pd_vic pd_xusbss pd_xusbdev pd_xusbhost emc micro_b soctherm throttle_heavy mipi dfll tegra_ahub tegra_admaif admaif1_port admaif1_ep admaif2_port admaif2_ep admaif3_port admaif3_ep admaif4_port admaif4_ep admaif5_port admaif5_ep admaif6_port admaif6_ep admaif7_port admaif7_ep admaif8_port admaif8_ep admaif9_port admaif9_ep admaif10_port admaif10_ep tegra_i2s1 i2s1_cif_ep i2s1_port i2s1_dap_ep tegra_i2s2 i2s2_cif_ep i2s2_port i2s2_dap_ep tegra_i2s3 i2s3_cif_ep i2s3_port i2s3_dap_ep tegra_i2s4 i2s4_cif_ep i2s4_port i2s4_dap_ep tegra_i2s5 i2s5_cif_ep i2s5_port i2s5_dap_ep tegra_sfc1 sfc1_cif_in_ep sfc1_out_port sfc1_cif_out_ep tegra_sfc2 sfc2_cif_in_ep sfc2_out_port sfc2_cif_out_ep tegra_sfc3 sfc3_cif_in_ep sfc3_out_port sfc3_cif_out_ep tegra_sfc4 sfc4_cif_in_ep sfc4_out_port sfc4_cif_out_ep tegra_amx1 amx1_in1_ep amx1_in2_ep amx1_in3_ep amx1_in4_ep amx1_out_port amx1_out_ep tegra_amx2 amx2_in1_ep amx2_in2_ep amx2_in3_port amx2_in3_ep amx2_in4_port amx2_in4_ep amx2_out_port amx2_out_ep tegra_adx1 adx1_in_ep adx1_out1_port adx1_out1_ep adx1_out2_port adx1_out2_ep adx1_out3_port adx1_out3_ep adx1_out4_port adx1_out4_ep tegra_adx2 adx2_in_ep adx2_out1_port adx2_out1_ep adx2_out2_port adx2_out2_ep adx2_out3_port adx2_out3_ep adx2_out4_port adx2_out4_ep tegra_dmic1 dmic1_cif_ep dmic1_port dmic1_dap_ep tegra_dmic2 dmic2_cif_ep dmic2_port dmic2_dap_ep tegra_dmic3 dmic3_cif_ep dmic3_port dmic3_dap_ep tegra_ope1 ope1_cif_in_ep ope1_out_port ope1_cif_out_ep tegra_ope2 ope2_cif_in_ep ope2_out_port ope2_cif_out_ep tegra_mvc1 mvc1_cif_in_ep mvc1_out_port mvc1_cif_out_ep tegra_mvc2 mvc2_cif_in_ep mvc2_out_port mvc2_cif_out_ep tegra_amixer mixer_in1_ep mixer_in2_ep mixer_in3_ep mixer_in4_ep mixer_in5_ep mixer_in6_ep mixer_in7_ep mixer_in8_ep mixer_in9_ep mixer_in10_ep mixer_out1_port mixer_out1_ep mixer_out2_port mixer_out2_ep mixer_out3_port mixer_out3_ep mixer_out4_port mixer_out4_ep mixer_out5_port mixer_out5_ep xbar_admaif1_ep xbar_admaif2_ep xbar_admaif3_ep xbar_admaif4_ep xbar_admaif5_ep xbar_admaif6_ep xbar_admaif7_ep xbar_admaif8_ep xbar_admaif9_ep xbar_admaif10_ep xbar_i2s1_port xbar_i2s1_ep xbar_i2s2_port xbar_i2s2_ep xbar_i2s3_port xbar_i2s3_ep xbar_i2s4_port xbar_i2s4_ep xbar_i2s5_port xbar_i2s5_ep xbar_dmic1_port xbar_dmic1_ep xbar_dmic2_port xbar_dmic2_ep xbar_dmic3_port xbar_dmic3_ep xbar_sfc1_in_port xbar_sfc1_in_ep xbar_sfc1_out_ep xbar_sfc2_in_port xbar_sfc2_in_ep xbar_sfc2_out_ep xbar_sfc3_in_port xbar_sfc3_in_ep xbar_sfc3_out_ep xbar_sfc4_in_port xbar_sfc4_in_ep xbar_sfc4_out_ep xbar_mvc1_in_port xbar_mvc1_in_ep xbar_mvc1_out_ep xbar_mvc2_in_port xbar_mvc2_in_ep xbar_mvc2_out_ep xbar_amx1_in1_port xbar_amx1_in1_ep xbar_amx1_in2_port xbar_amx1_in2_ep xbar_amx1_in3_port xbar_amx1_in3_ep xbar_amx1_in4_port xbar_amx1_in4_ep xbar_amx1_out_ep xbar_amx2_in1_port xbar_amx2_in1_ep xbar_amx2_in2_port xbar_amx2_in2_ep xbar_amx2_in3_port xbar_amx2_in3_ep xbar_amx2_in4_port xbar_amx2_in4_ep xbar_amx2_out_ep xbar_adx1_in_port xbar_adx1_in_ep xbar_adx1_out1_ep xbar_adx1_out2_ep xbar_adx1_out3_ep xbar_adx1_out4_ep xbar_adx2_in_port xbar_adx2_in_ep xbar_adx2_out1_ep xbar_adx2_out2_ep xbar_adx2_out3_ep xbar_adx2_out4_ep xbar_mixer_in1_port xbar_mixer_in1_ep xbar_mixer_in2_port xbar_mixer_in2_ep xbar_mixer_in3_port xbar_mixer_in3_ep xbar_mixer_in4_port xbar_mixer_in4_ep xbar_mixer_in5_port xbar_mixer_in5_ep xbar_mixer_in6_port xbar_mixer_in6_ep xbar_mixer_in7_port xbar_mixer_in7_ep xbar_mixer_in8_port xbar_mixer_in8_ep xbar_mixer_in9_port xbar_mixer_in9_ep xbar_mixer_in10_port xbar_mixer_in10_ep xbar_mixer_out1_ep xbar_mixer_out2_ep xbar_mixer_out3_ep xbar_mixer_out4_ep xbar_mixer_out5_ep xbar_ope1_in_port xbar_ope1_in_ep xbar_ope1_out_ep xbar_ope2_in_port xbar_ope2_in_ep xbar_ope2_out_ep adma agic phy1 phy2 CPU_SLEEP L2 cpu_throttle_trip dram_nominal dram_throttle gpu_throttle_trip clk32k_in vdd_gpu vdd_sys_mux vdd_5v0_sys vdd_3v3_sys vdd_5v0_io vdd_3v3_sd vdd_dsi_csi vdd_3v3_dis vdd_1v8_dis vdd_5v0_rtl vdd_usb_vbus vdd_hdmi vdd_cam_1v2 vdd_cam_2v8 vdd_cam_1v8 vdd_usb_vbus_otg 