  I   8  E(   (              D                                                                      ,Huawei Nexus 6P          2huawei,angler qcom,msm8994           =handset          J               V  	  
                 c  Z       aliases          q/soc@0/mmc@f9824900          v/soc@0/mmc@f98a4900          {/soc@0/serial@f991e000        chosen           serial0:115200n8          clocks     xo-board             2fixed-clock                       $       	   xo_board                      sleep-clk            2fixed-clock                               
   sleep_clk                        cpus                                 cpu@0            cpu          2arm,cortex-a53                            psci                               l2-cache             2cache                                             cpu@1            cpu          2arm,cortex-a53                           psci                                  cpu@2            cpu          2arm,cortex-a53                           psci                                  cpu@3            cpu          2arm,cortex-a53                           psci                                  cpu@100          cpu          2arm,cortex-a57                           psci                               l2-cache             2cache                                             cpu@101          cpu          2arm,cortex-a57                          psci                            	      cpu@102          cpu          2arm,cortex-a57                          psci                            
      cpu@103          cpu          2arm,cortex-a57                          psci                                  cpu-map    cluster0       core0                    core1                    core2                    core3                       cluster1       core0                    core1              	      core2              
      core3                             firmware       scm          2qcom,scm-msm8994 qcom,scm            memory@80000000          memory                                pmu          2arm,cortex-a53-pmu                        psci             2arm,psci-0.2             hvc       remoteproc        $   2qcom,msm8994-rpm-proc qcom,rpm-proc    smd-edge                                             &           4      rpm-requests             2qcom,rpm-msm8994 qcom,smd-rpm           Drpm_requests       clock-controller             2qcom,rpmcc-msm8994 qcom,rpmcc                           ;      power-controller             2qcom,msm8994-rpmpd          V           j      opp-table            2operating-points-v2                opp1            ~         opp2            ~         opp3            ~         opp4            ~         opp5            ~         opp6            ~                        reserved-memory                                      dfps-data@3400000                @                        memory@3401000               @                       smem@6a00000                                                      memory@7000000                                       memory@ca00000                                      memory@c6400000          2qcom,rmtfs-mem               @                                   memory@c6700000              p                        memory@c7000000                                       memory@c9400000              @                       reserved@6c00000                        @                 tzapp@4800000                                       reserved@6300000                 0       p                    smem          
   2qcom,smem                                             smp2p-lpass          2qcom,smp2p                                              
                    4      master-kernel           master-kernel                    slave-kernel            slave-kernel                     !            smp2p-modem          2qcom,smp2p                                                                               4      master-kernel           master-kernel                    slave-kernel            slave-kernel                     !            soc@0                                                         2simple-bus     interrupt-controller@f9000000            2qcom,msm-qgic2                   !                                          mailbox@f900d000          %   2qcom,msm8994-apcs-kpss-global syscon                           2                     watchdog@f9017000         $   2qcom,apss-wdt-msm8994 qcom,kpss-wdt          p                                        >           E   
      timer@f9020000                                             2arm,armv7-timer-mem                  frame@f9021000          Q                   	                                     frame@f9023000          Q                  
            0          	  ^disabled          frame@f9024000          Q                              @          	  ^disabled          frame@f9025000          Q                              P          	  ^disabled          frame@f9026000          Q                              `          	  ^disabled          frame@f9027000          Q                              p          	  ^disabled          frame@f9028000          Q                                        	  ^disabled             usb@f92f8800             2qcom,msm8994-dwc3 qcom,dwc3          /                                            0                  7                   6         *  epwr_event qusb2_phy hs_phy_irq ss_phy_irq            >      r      m            s        ucore iface sleep mock_utmi                s      r        $ '                           usb@f9200000          
   2snps,dwc3                                                              high-speed          peripheral           mmc@f9824900          %   2qcom,msm8994-sdhci qcom,sdhci-msm-v4             I   @            hc core                {                     ehc_irq pwr_irq          >      v      h           uiface core xo           "default sleep           0                    :                    D            N        ^okay             \      mmc@f98a4900          %   2qcom,msm8994-sdhci qcom,sdhci-msm-v4             I   @            hc core                }                     ehc_irq pwr_irq          >            i           uiface core xo           "default sleep           0                 :          !        k   "   d            D         	  ^disabled          dma-controller@f9904000          2qcom,bam-v1.7.0          @                             >      :        ubam_clk         t                                                          %      serial@f991e000       %   2qcom,msm-uartdm-v1.4 qcom,msm-uartdm                                l           ucore iface          >      H      :        "default sleep           0   #        :   $        ^okay          i2c@f9923000             2qcom,i2c-qup-v2.2.1          0                   _           >      ;      :        ucore iface                       %      %           tx rx           "default sleep           0   &        :   '                                	  ^disabled          spi@f9923000             2qcom,spi-qup-v2.2.1          0                   _           >      <      :        ucore iface             %      %           tx rx           "default sleep           0   (        :   )                                	  ^disabled          i2c@f9924000             2qcom,i2c-qup-v2.2.1          @                   `           >      =      :        ucore iface                       %      %           tx rx           "default sleep           0   *        :   +                                	  ^disabled          i2c@f9926000             2qcom,i2c-qup-v2.2.1          `                   b           >      A      :        ucore iface                       %      %           tx rx           "default sleep           0   ,        :   -                                	  ^disabled          i2c@f9927000             2qcom,i2c-qup-v2.2.1          p                   c           >      C      :        ucore iface                       .      .           tx rx           "default sleep           0   /        :   0                                	  ^disabled          i2c@f9928000             2qcom,i2c-qup-v2.2.1                             d           >      E      :        ucore iface                       %      %           tx rx           "default sleep           0   1        :   2                                	  ^disabled          dma-controller@f9944000          2qcom,bam-v1.7.0          @                             >      M        ubam_clk         t                                                          .      serial@f995e000       %   2qcom,msm-uartdm-v1.4 qcom,msm-uartdm                                r           ucore iface          >      [      M           .      .           tx rx           "default sleep           0   3        :   4      	  ^disabled          i2c@f9963000             2qcom,i2c-qup-v2.2.1          0                   e           >      N      M        ucore iface                       .      .           tx rx           "default sleep           0   5        :   6                                	  ^disabled          spi@f9966000             2qcom,spi-qup-v2.2.1          `                   h           >      U      M        ucore iface             .      .           tx rx           "default sleep           0   7        :   8                                	  ^disabled          i2c@f9967000             2qcom,i2c-qup-v2.2.1          p                   i           >      V      M        ucore iface            j           .      .           tx rx           "default sleep           0   9        :   :                                	  ^disabled          clock-controller@fc400000            2qcom,gcc-msm8994                                   V            @            	  uxo sleep            >                        sram@fc428000            2qcom,rpm-msg-ram             B   @                   restart@fc4ab000             2qcom,pshold          J          spmi@fc4cf000            2qcom,spmi-pmic-arb           L    L    L            core intr cnfg          eperiph_irq                                                                                       !         hwlock@fd484000       (   2qcom,msm8994-tcsr-mutex qcom,tcsr-mutex          H@                                 pinctrl@fd510000             2qcom,msm8994-pinctrl             Q    @                                       "                                       !              U               "   blsp1-uart2-default-state           .gpio4 gpio5         3blsp_uart2          <            K            #      blsp1-uart2-sleep-state         .gpio4 gpio5         3gpio            <            X            $      blsp2-uart2-default-state           .gpio45 gpio46 gpio47 gpio48         3blsp_uart8          <            K            3      blsp2-uart2-sleep-state         .gpio45 gpio46 gpio47 gpio48         3gpio            <            K            4      i2c1-default-state          .gpio2 gpio3       
  3blsp_i2c1           <            K            &      i2c1-sleep-state            .gpio2 gpio3         3gpio            <            K            '      i2c2-default-state          .gpio6 gpio7       
  3blsp_i2c2           <            K            *      i2c2-sleep-state            .gpio6 gpio7         3gpio            <            K            +      i2c4-default-state          .gpio19 gpio20         
  3blsp_i2c4           <            K            ,      i2c4-sleep-state            .gpio19 gpio20           3gpio            <            X            -      i2c5-default-state          .gpio23 gpio24         
  3blsp_i2c5           <            K            /      i2c5-sleep-state            .gpio23 gpio24           3gpio            <            K            0      i2c6-default-state          .gpio28 gpio27         
  3blsp_i2c6           <            K            1      i2c6-sleep-state            .gpio28 gpio27           3gpio            <            K            2      i2c7-default-state          .gpio44 gpio43         
  3blsp_i2c7           <            K            5      i2c7-sleep-state            .gpio44 gpio43           3gpio            <            K            6      blsp2-spi10-default-state               7   default-pins            .gpio53 gpio54 gpio55            3blsp_spi10          <   
         X      cs-pins         .gpio67          3gpio            <            K         blsp2-spi10-sleep-state         .gpio53 gpio54 gpio55            3gpio            <            K            8      i2c11-default-state         .gpio83 gpio84           3blsp_i2c11          <            K            9      i2c11-sleep-state           .gpio83 gpio84           3gpio            <            K            :      blsp1-spi1-default-state                (   default-pins            .gpio0 gpio1 gpio3         
  3blsp_spi1           <   
         X      cs-pins         .gpio8           3gpio            <            K         blsp1-spi1-sleep-state          .gpio0 gpio1 gpio3           3gpio            <            K            )      clk-on-state          	  .sdc1_clk             K        <                     clk-off-state         	  .sdc1_clk             K        <                     cmd-on-state          	  .sdc1_cmd             g        <                     cmd-off-state         	  .sdc1_cmd             g        <                     data-on-state         
  .sdc1_data            g        <                     data-off-state        
  .sdc1_data            g        <                     rclk-on-state         
  .sdc1_rclk            X                  rclk-off-state        
  .sdc1_rclk            X                  sdc2-clk-on-state         	  .sdc2_clk             K        <   
                  sdc2-clk-off-state        	  .sdc2_clk             K        <                     sdc2-cmd-on-state         	  .sdc2_cmd             g        <   
                  sdc2-cmd-off-state        	  .sdc2_cmd             g        <                      sdc2-data-on-state        
  .sdc2_data            g        <   
                  sdc2-data-off-state       
  .sdc2_data            g        <               !         clock-controller@fd8c0000            2qcom,mmcc-msm8994                R                                V         Y  uxo gpll0 mmssnoc_ahb oxili_gfx3d_clk_src dsi0pll dsi0pllbyte dsi1pll dsi1pllbyte hdmipll          0  >            ;      ;                              (     <      <      <      <      <   	        / E< 98p #F             <      sram@fdd00000            2qcom,msm8974-ocmem                             	  ctrl mem                              >   ;   "   <   r        ucore iface                              gmu-sram@0                              timer            2arm,armv8-timer       0                                        vph-pwr-regulator            2regulator-fixed         tvph_pwr          6         6                  	interrupt-parent #address-cells #size-cells model compatible chassis-type qcom,msm-id qcom,pmic-id qcom,board-id mmc1 mmc2 serial0 stdout-path #clock-cells clock-frequency clock-output-names phandle device_type reg enable-method next-level-cache cache-level cache-unified cpu interrupts mboxes qcom,smd-edge qcom,remote-pid qcom,smd-channels #power-domain-cells operating-points-v2 opp-level ranges no-map qcom,client-id memory-region qcom,rpm-msg-ram hwlocks qcom,smem qcom,local-pid qcom,entry-name #qcom,smem-state-cells interrupt-controller #interrupt-cells #mbox-cells clocks timeout-sec frame-number status interrupt-names clock-names assigned-clocks assigned-clock-rates power-domains qcom,select-utmi-as-pipe-clk snps,dis_u2_susphy_quirk snps,dis_enblslpm_quirk maximum-speed dr_mode reg-names pinctrl-names pinctrl-0 pinctrl-1 bus-width non-removable mmc-hs400-1_8v cd-gpios #dma-cells qcom,ee qcom,controlled-remotely num-channels qcom,num-ees dmas dma-names #reset-cells qcom,channel #hwlock-cells gpio-controller gpio-ranges #gpio-cells gpio-reserved-ranges pins function drive-strength bias-disable bias-pull-down bias-pull-up regulator-name regulator-min-microvolt regulator-max-microvolt regulator-always-on 