     8  ~   (              ~                                                                   (   ,Qualcomm Technologies, Inc. QRU1000 IDP          2qcom,qru1000-idp qcom,qru1000         	   =embedded       chosen           Jserial0:115200n8          cpus                                 cpu@0            Vcpu          2arm,cortex-a55           b                 f                mpsci             {            psci                                               l2-cache             2cache                                                    l3-cache             2cache                                                 cpu@100          Vcpu          2arm,cortex-a55           b                f                mpsci             {            psci                                               l2-cache             2cache                                                          cpu@200          Vcpu          2arm,cortex-a55           b                f                mpsci             {            psci                                	               l2-cache             2cache                                                 	         cpu@300          Vcpu          2arm,cortex-a55           b                f                mpsci             {   
         psci                                               l2-cache             2cache                                                          cpu-map    cluster0       core0                     core1                     core2                     core3                              idle-states          psci       cpu-sleep-0          2arm,idle-state                                 ^        $@           ;                     domain-idle-states     cluster-sleep-0          2domain-idle-state              H          	                  $A  D                  cluster-sleep-1          2domain-idle-state              M                    '        $A 3D                     firmware       scm          2qcom,scm-qdu1000 qcom,scm            interconnect-0           2qcom,qdu1000-mc-virt            L           \               H      interconnect-1           2qcom,qdu1000-clk-virt           L           \                     memory@80000000          Vmemory           b                     pmu          2arm,cortex-a55-pmu          p               psci             2arm,psci-1.0             tsmc    power-domain-cpu0           {             {                                power-domain-cpu1           {             {                                power-domain-cpu2           {             {                                power-domain-cpu3           {             {                          
      power-domain-cluster            {                                       reserved-memory                                      hyp@80000000             b            `                 xbl-dt-log@80600000          b    `                        xbl-ramdump@80640000             b    d                        aop-image@80800000           b                            aop-cmd-db@80860000          2qcom,cmd-db          b                            aop-config@80880000          b                            tme-crash-dump@808a0000          b                            tme-log@808e0000             b            @                uefi-log@808e4000            b    @                       smem@80900000         
   2qcom,smem            b                                           cpucp-fw@80b00000            b                            memory@80c00000          b                            tz-stat@81d00000             b                            tags@81e00000            b           P                 qtee@82300000            b    0       P                 ta@82800000          b                            fs1@83200000             b            @                 fs2@83600000             b    `       @                 fs3@83a00000             b           @                 ipa-fw@8be00000          b                            ipa-gsi@8be10000             b           @                mpss@8c000000            b                            q6-mpss-dtb@9ec00000             b                            ipa-buffer@c3200000          b                            oem-tenx@a0000000            b           @                 mpss-diag-buffer@aea00000            b          @                 tenx-q6-buffer@b4e00000          b                            ecc-meta-data@f0000000           b                             tenx-sp-buffer@800000000             b                                soc@0            2simple-bus                                                                                            clock-controller@80000           2qcom,qdu1000-gcc             b            B          f                                                    {                     clock-controller@280000          2qcom,qdu1000-ecpricc             b     (              8   f                                                                       dma-controller@900000         )   2qcom,qdu1000-gpi-dma qcom,sm6350-gpi-dma             b                      p                                                                                                                                              ?                                   geniqup@9c0000           2qcom,geni-se-qup             b                        f      Z      [        m-ahb s-ahb                                                      	  'qup-core                                              :okay       serial@980000            2qcom,geni-uart           b             @          f      8        se          A           Kdefault         p      Y         	  :disabled          i2c@984000           2qcom,geni-i2c            b     @       @          f      :        se          p      Z           A           Kdefault                                 	  :disabled          spi@984000           2qcom,geni-spi            b     @       @                                   p      Z            f      :        se          A              Kdefault       	  :disabled          i2c@988000           2qcom,geni-i2c            b            @          f      <        se          p      [           A           Kdefault                                 	  :disabled          spi@988000           2qcom,geni-spi            b            @                                   p      [            f      <        se          A       !        Kdefault       	  :disabled          i2c@98c000           2qcom,geni-i2c            b            @          f      >        se          p      \           A   "        Kdefault                                 	  :disabled          spi@98c000           2qcom,geni-spi            b            @                                   p      \            f      >        se          A   #   $        Kdefault       	  :disabled          i2c@990000           2qcom,geni-i2c            b             @          f      @        se          p      ]           A   %        Kdefault                                 	  :disabled          spi@990000           2qcom,geni-spi            b             @                                   p      ]            f      @        se          A   &   '        Kdefault       	  :disabled          i2c@994000           2qcom,geni-i2c            b     @       @          f      B        se          p      ^           A   (        Kdefault                                 	  :disabled          spi@994000           2qcom,geni-spi            b     @       @                                   p      ^            f      B        se          A   )   *        Kdefault       	  :disabled          i2c@998000           2qcom,geni-i2c            b            @          f      D        se          p      _           A   +        Kdefault                                 	  :disabled          spi@998000           2qcom,geni-spi            b            @                                   p      _            f      D        se          A   ,   -        Kdefault       	  :disabled          serial@99c000            2qcom,geni-debug-uart             b            @          f      F        se          A   .   /        Kdefault         p      `           :okay             dma-controller@a00000         )   2qcom,qdu1000-gpi-dma qcom,sm6350-gpi-dma             b                      p                                                            %         &         '         (         )         *                         ?                                  geniqup@ac0000           2qcom,geni-se-qup             b                        f      \      ]        m-ahb s-ahb                                                          	  :disabled       serial@a80000            2qcom,geni-uart           b             @          f      J        se          A   0        Kdefault         p      a                                   	  :disabled          i2c@a84000           2qcom,geni-i2c            b     @       @          f      L        se          p      b           A   1        Kdefault                                 	  :disabled          spi@a84000           2qcom,geni-spi            b     @       @                                   p      b            f      L        se          A   2   3        Kdefault       	  :disabled          i2c@a88000           2qcom,geni-i2c            b            @          f      N        se          p      c           A   4        Kdefault                                 	  :disabled          spi@a88000           2qcom,geni-spi            b            @                                   p      c            f      N        se          A   5   6        Kdefault       	  :disabled          i2c@a8c000           2qcom,geni-i2c            b            @          f      P        se          p      d           A   7        Kdefault                                 	  :disabled          spi@a8c000           2qcom,geni-spi            b            @                                   p      d            f      P        se          A   8   9        Kdefault       	  :disabled          i2c@a90000           2qcom,geni-i2c            b             @          f      R        se          p      e           A   :        Kdefault                                 	  :disabled          spi@a90000           2qcom,geni-spi            b             @                                   p      e            f      R        se          A   ;   <        Kdefault       	  :disabled          i2c@a94000           2qcom,geni-i2c            b     @       @          f      T        se          p      f           A   =        Kdefault                                 	  :disabled          serial@a94000            2qcom,geni-uart           b     @       @          f      T        se          A   >        Kdefault         p      f                                   	  :disabled          spi@a94000           2qcom,geni-spi            b     @       @                                   p      f            f      T        se          A   ?   @        Kdefault       	  :disabled          i2c@a98000           2qcom,geni-i2c            b            @          f      V        se          p      k           A   A        Kdefault                                 	  :disabled          spi@a98000           2qcom,geni-spi            b            @                                   p      k            f      V        se          A   B   C        Kdefault       	  :disabled          i2c@a9c000           2qcom,geni-i2c            b            @          f      X        se          p      m           A   D        Kdefault                                 	  :disabled          spi@a9c000           2qcom,geni-spi            b            @                                   p      m            f      X        se          A   E   F        Kdefault       	  :disabled             interconnect@1640000             2qcom,qdu1000-system-noc          b    d       P        L           \               G      hwlock@1f40000           2qcom,tcsr-mutex          b                     Y                     mmc@8804000       %   2qcom,qdu1000-sdhci qcom,sdhci-msm-v5              b    @            P              	  ghc cqhci            p                            qhc_irq pwr_irq           f      ^      _               iface core xo                       0     G          H          I          G   ,            'sdhc-ddr cpu-sdhc            {   J              K                                               d,        Àh      	  :disabled       opp-table            2operating-points-v2             K   opp-384000000               `            L         c  8@                         phy@88e3000       1   2qcom,qdu1000-usb-hs-phy qcom,usb-snps-hs-7nm-phy             b    0                             f      l        ref                       :okay               M           N        ,   O            R      phy@88e5000          2qcom,qdu1000-qmp-usb3-uni-phy            b    P                   f      s      l      u      v        aux ref com_aux pipe                                :phy phy_phy                     Fusb3_uni_phy_pipe_clk_src                       :okay            Y   M           P            S      usb@a6f8800          2qcom,qdu1000-dwc3 qcom,dwc3          b    
o                                                    f            m      r      o        cfg_noc core sleep mock_utmi            i      o      m        y$        D                               Q         Q   	      Q            <  qpwr_event hs_phy_irq dp_hs_phy_irq dm_hs_phy_irq ss_phy_irq          {                 L                    0     G         H         I         G   3           'usb-ddr apps-usb            :okay       usb@a600000       
   2snps,dwc3            b    
`                 p                                                         R   S        usb2-phy usb3-phy           peripheral     ports                                port@0           b       endpoint             port@1           b      endpoint                      interrupt-controller@b220000             2qcom,qdu1000-pdc qcom,pdc             b    "             @        d      <                      (     6   ^  a      }   ?                                                Q      spmi@c400000             2qcom,spmi-pmic-arb        P   b    @        0     P       @      D             L             B       @         gcore chnls obsrvr intr cnfg            Q              qperiph_irq                       (                                                     pmic@0           2qcom,pm8150 qcom,spmi-pmic           b                                     pon@800          2qcom,pm8998-pon          b           5           E      pwrkey           2qcom,pm8941-pwrkey          p                      S  =	         \        i   t      	  :disabled          resin            2qcom,pm8941-resin           p                     S  =	         \      	  :disabled             temp-alarm@2400          2qcom,spmi-temp-alarm             b  $         p       $               t   T           thermal                         ^      adc@3100             2qcom,spmi-adc5           b  1                                              p       1                   T   channel@0            b                          ref_gnd       channel@1            b                       
  vref_1p25         channel@6            b                       	  die_temp             adc-tm@3500          2qcom,spmi-adc-tm5            b  5         p       5                                                  	  :disabled          rtc@6000             2qcom,pm8941-rtc          b  `   a       
  grtc alarm           p       a             gpio@c000             2qcom,pm8150-gpio qcom,spmi-gpio          b                       U           
                                           U         pmic@1           2qcom,pm8150 qcom,spmi-pmic           b                                          pinctrl@f000000          2qcom,qdu1000-tlmm            b                      p                                                             V                      Q                          V   qup-uart0-default-state         gpio6 gpio7 gpio8 gpio9          qup00                     qup-i2c1-data-clk-state         gpio10 gpio11            qup01           )            \                  qup-spi1-data-clk-state         gpio10 gpio11 gpio12             qup01           )            8                  qup-spi1-cs-state           gpio13           gpio            )            8                  qup-i2c2-data-clk-state         gpio12 gpio13            qup02           )            \                  qup-spi2-data-clk-state         gpio12 gpio13 gpio10             qup02           )            8                   qup-spi2-cs-state           gpio11           gpio            )            8            !      qup-i2c3-data-clk-state         gpio14 gpio15            qup03           )            \            "      qup-spi3-data-clk-state         gpio14 gpio15 gpio16             qup03           )            8            #      qup-spi3-cs-state           gpio17           gpio            )            8            $      qup-i2c4-data-clk-state         gpio16 gpio17            qup04           )            \            %      qup-spi4-data-clk-state         gpio16 gpio17 gpio14             qup04           )            8            &      qup-spi4-cs-state           gpio15           gpio            )            8            '      qup-i2c5-data-clk-state         gpio130 gpio131          qup05           )            \            (      qup-spi5-data-clk-state         gpio130 gpio131 gpio132          qup05           )            8            )      qup-spi5-cs-state           gpio133          gpio            )            8            *      qup-i2c6-data-clk-state         gpio132 gpio133          qup06           )            \            +      qup-spi6-data-clk-state         gpio132 gpio133 gpio130          qup06           )            8            ,      qup-spi6-cs-state           gpio131          gpio            )            8            -      qup-uart7-rx-state          gpio135          qup07           )            8            /      qup-uart7-tx-state          gpio134          qup07           )            8            .      qup-uart8-default-state         gpio18 gpio19 gpio20 gpio21          qup10               0      qup-i2c9-data-clk-state         gpio22 gpio23            qup11           )            \            1      qup-spi9-data-clk-state         gpio22 gpio23 gpio24             qup11           )            8            2      qup-spi9-cs-state           gpio25           gpio            )            8            3      qup-i2c10-data-clk-state            gpio24 gpio25            qup12           )            \            4      qup-spi10-data-clk-state            gpio24 gpio25 gpio22             qup12           )            8            5      qup-spi10-cs-state          gpio23           gpio            )            8            6      qup-i2c11-data-clk-state            gpio26 gpio27            qup13           )            \            7      qup-spi11-data-clk-state            gpio26 gpio27 gpio28             qup13           )            8            8      qup-spi11-cs-state          gpio29           gpio            )            8            9      qup-i2c12-data-clk-state            gpio28 gpio29            qup14           )            \            :      qup-spi12-data-clk-state            gpio28 gpio29 gpio26             qup14           )            8            ;      qup-spi12-cs-state          gpio27           gpio            )            8            <      qup-i2c13-data-clk-state            gpio30 gpio31            qup15           )            \            =      qup-spi13-data-clk-state            gpio30 gpio31 gpio32             qup15           )            8            ?      qup-spi13-cs-state          gpio33           gpio            )            8            @      qup-uart13-default-state            gpio30 gpio31 gpio32 gpio33          qup15               >      qup-i2c14-data-clk-state            gpio34 gpio35            qup16           )            \            A      qup-spi14-data-clk-state            gpio34 gpio35 gpio36             qup16           )            8            B      qup-spi14-cs-state          gpio37 gpio38            gpio            )            8            C      qup-i2c15-data-clk-state            gpio40 gpio41            qup17           )            \            D      qup-spi15-data-clk-state            gpio40 gpio41 gpio30             qup17           )            8            E      qup-spi15-cs-state          gpio31           gpio            )            8            F      sdc-on-state       clk-pins          	  sdc1_clk            )            8      cmd-pins          	  sdc1_cmd            )   
         \      data-pins         
  sdc1_data           )   
         \      rclk-pins         
  sdc1_rclk            E         sdc-off-state      clk-pins          	  sdc1_clk            )            8      cmd-pins          	  sdc1_cmd            )            \      data-pins         
  sdc1_data           )            \      rclk-pins         
  sdc1_rclk            E            sram@14680000         $   2qcom,qdu1000-imem syscon simple-mfd          b    h                         h                                 pil-reloc@94c            2qcom,pil-reloc-info          b  	L            iommu@15000000        0   2qcom,qdu1000-smmu-500 qcom,smmu-500 arm,mmu-500          b                      T           a        L  p       A                   I          ^          _          `                            a          b          c          d          e          f          g          h          i          j          k          l          m          n          o          p          q          r          s          t          u          v                                                                                                                                 ;         <         =         >         ?         @         A                     interrupt-controller@17200000            2arm,gic-v3            b                  &                 p      	                               t                                    timer@17420000           2arm,armv7-timer-mem          b    B                                                             frame@17421000           bB    B             p                                      frame@17423000           bB0            p       	                    	  :disabled          frame@17425000           bBP    B`            p       
                    	  :disabled          frame@17427000           bBp            p                           	  :disabled          frame@17429000           bB            p                           	  :disabled          frame@1742b000           bB            p                           	  :disabled          frame@1742d000           bB            p                           	  :disabled             rsc@17a00000             2qcom,rpmh-rsc         0   b                                               gdrv-0 drv-1 drv-2         $  p                                                                                             	  apps_rsc             {      bcm-voter            2qcom,bcm-voter                    clock-controller             2qcom,qdu1000-rpmh-clk            f   W        xo                               power-controller             2qcom,qdu1000-rpmhpd         {              X            J   opp-table            2operating-points-v2             X   opp1                     opp2               0      opp3               @      opp4                     opp5                     opp6                           L      opp7              @      opp8              P      opp9                    opp10                         regulators           2qcom,pm8150-rpmh-regulators         a              Y           Y           Y           Y        (   Y        6   Y        D   Y        R   Y        `   Y        n   Y        }   Z           Y           [           Z           \           Y   smps2           vreg_s2a_0p5                      %       smps3           vreg_s3a_1p05            ~        % P      smps4           vreg_s4a_1p8             w@        % w@            \      smps5           vreg_s5a_2p0                     %             [      smps6           vreg_s6a_0p9             	        % 6@            Z      smps7           vreg_s7a_1p2             O        % O      smps8           vreg_s8a_1p3             @        % @      ldo1            vreg_l1a_0p91                    %         =         ldo2            vreg_l2a_2p3             -Q        % 2Z        =               O      ldo3            vreg_l3a_1p2             	        % 9        =               P      ldo5            vreg_l5a_0p8                     %         =         ldo6            vreg_l6a_0p91            m        % ~        =         ldo7            vreg_l7a_1p8             -P        %         =         ldo8            vreg_l8a_0p91                    % H        =               M      ldo9            vreg_l9a_0p91                    %         =         ldo10           vreg_l10a_2p95           )2        % 6        =         ldo11           vreg_l11a_0p91           5         % B@        =         ldo12           vreg_l12a_1p8                     %          =         ldo14           vreg_l14a_1p8            -P        % 0        =               N      ldo15           vreg_l15a_1p8                     %         =         ldo16           vreg_l16a_1p8                    %         =         ldo17           vreg_l17a_3p3            -        % 6        =         ldo18           vreg_l18a_1p2                    %         =               cpufreq@17d90000          ,   2qcom,qdu1000-cpufreq-epss qcom,cpufreq-epss           b                                 gfreq-domain0 freq-domain1            f                      xo alternate            T                                interconnect@19100000            2qcom,qdu1000-gem-noc             b                   L           \               I      system-cache-controller@19200000             2qcom,qdu1000-llcc            b                  0             `             p                                                                                 l  gllcc0_base llcc1_base llcc2_base llcc3_base llcc4_base llcc5_base llcc6_base llcc7_base llcc_broadcast_base         p      
           g   ]        smulti-chan-ddr        efuse@221c8000        (   2qcom,qdu1000-sec-qfprom qcom,sec-qfprom          b    "                                    multi-chan-ddr@12b           b  +                              ]            timer            2arm,armv8-timer       <  p                              
                thermal-zones      pm8150-thermal             d           ^   trips      trip0            s                     Epassive       trip1            8                     Ehot       trip2            6h                  	   Ecritical                   aliases       $  /soc@0/geniqup@9c0000/serial@99c000       clocks     xo-board-clk             2fixed-clock         $                         W      sleep-clk            2fixed-clock                                            ppvar-sys-regulator          2regulator-fixed       
  ppvar_sys            @@        % @@                              _      vph-pwr-regulator            2regulator-fixed         vph_pwr          8u         % 8u                              _            Y         	interrupt-parent #address-cells #size-cells model compatible chassis-type stdout-path device_type reg clocks enable-method power-domains power-domain-names qcom,freq-domains next-level-cache phandle cache-level cache-unified cpu entry-method entry-latency-us exit-latency-us min-residency-us arm,psci-suspend-param local-timer-stop qcom,bcm-voters #interconnect-cells interrupts #power-domain-cells domain-idle-states ranges no-map hwlocks dma-ranges #clock-cells #reset-cells dma-channels dma-channel-mask iommus #dma-cells clock-names interconnects interconnect-names status pinctrl-0 pinctrl-names #hwlock-cells reg-names interrupt-names resets operating-points-v2 dma-coherent bus-width qcom,dll-config qcom,ddr-config opp-hz required-opps opp-peak-kBps opp-avg-kBps #phy-cells vdda-pll-supply vdda18-supply vdda33-supply reset-names clock-output-names vdda-phy-supply assigned-clocks assigned-clock-rates interrupts-extended snps,dis_u2_susphy_quirk snps,dis_enblslpm_quirk phys phy-names dr_mode qcom,pdc-ranges #interrupt-cells interrupt-controller qcom,ee qcom,channel mode-bootloader mode-recovery debounce bias-pull-up linux,code io-channels io-channel-names #thermal-sensor-cells #io-channel-cells qcom,pre-scaling label gpio-controller gpio-ranges #gpio-cells wakeup-parent gpio-reserved-ranges pins function drive-strength bias-disable bias-pull-down #iommu-cells #global-interrupts #redistributor-regions redistributor-stride frame-number qcom,tcs-offset qcom,drv-id qcom,tcs-config opp-level qcom,pmic-id vdd-s1-supply vdd-s2-supply vdd-s3-supply vdd-s4-supply vdd-s5-supply vdd-s6-supply vdd-s7-supply vdd-s8-supply vdd-s9-supply vdd-s10-supply vdd-l1-l8-l11-supply vdd-l2-l10-supply vdd-l3-l4-l5-l18-supply vdd-l6-l9-supply vdd-l7-l12-l14-l15-supply vdd-l13-l16-l17-supply regulator-name regulator-min-microvolt regulator-max-microvolt regulator-initial-mode #freq-domain-cells nvmem-cells nvmem-cell-names bits polling-delay-passive thermal-sensors temperature hysteresis serial0 clock-frequency regulator-always-on regulator-boot-on vin-supply 