Ðþí  (Ë   8  %p   (            [  %8                                                                   '   ,Qualcomm Technologies, Inc. SM4450 QRD           2qcom,sm4450-qrd qcom,sm4450    chosen           =serial0:115200n8          clocks     xo-board             2fixed-clock          I“à          Y             f   !      sleep-clk            2fixed-clock          I  ü         Y             f         bi-tcxo-div2-clk             Y             2fixed-factor-clock           n                u            €            f   "         cpus                                 cpu@0            Šcpu          2arm,cortex-a55           –                 n                špsci             ¨            ¹            Çpsci             Ú                ë            f      l2-cache             2cache            ú                     ¨            f      l3-cache             2cache            ú                     f               cpu@100          Šcpu          2arm,cortex-a55           –                n                špsci             ¨            ¹            Çpsci             Ú                ë            f      l2-cache             2cache            ú                     ¨            f            cpu@200          Šcpu          2arm,cortex-a55           –                n                špsci             ¨            ¹            Çpsci             Ú                ë            f      l2-cache             2cache            ú                     ¨            f            cpu@300          Šcpu          2arm,cortex-a55           –                n                špsci             ¨   	         ¹            Çpsci             Ú                ë            f      l2-cache             2cache            ú                     ¨            f   	         cpu@400          Šcpu          2arm,cortex-a55           –                n                špsci             ¨   
         ¹            Çpsci             Ú                ë            f      l2-cache             2cache            ú                     ¨            f   
         cpu@500          Šcpu          2arm,cortex-a55           –                n                špsci             ¨            ¹            Çpsci             Ú                ë            f      l2-cache             2cache            ú                     ¨            f            cpu@600          Šcpu          2arm,cortex-a78           –                n               špsci             ¨            ¹            Çpsci             Ú               ë            f      l2-cache             2cache            ú                     ¨            f            cpu@700          Šcpu          2arm,cortex-a78           –                n               špsci             ¨            ¹            Çpsci             Ú               ë            f      l2-cache             2cache            ú                     ¨            f            cpu-map    cluster0       core0                    core1                    core2                    core3                    core4                    core5                    core6                    core7                          idle-states         psci       cpu-sleep-0-0            2arm,idle-state          %@          <           M  î        ]  ú         n         f         cpu-sleep-1-0            2arm,idle-state          %@          <  X        M          ]  ·         n         f            domain-idle-states     cluster-sleep-0          2domain-idle-state           %A  D        <          M  	Ä        ]  ½         f         cluster-sleep-1          2domain-idle-state           %A 3D        <          M  
ñ        ]  !f         f               memory@a0000000          Šmemory           –                      pmu-a55          2arm,cortex-a55-pmu                         pmu-a78          2arm,cortex-a78-pmu                         psci             2arm,psci-1.0             ¡smc    power-domain-cpu0           Š             ¹           ž            f         power-domain-cpu1           Š             ¹           ž         power-domain-cpu2           Š             ¹           ž         power-domain-cpu3           Š             ¹           ž         power-domain-cpu4           Š             ¹           ž         power-domain-cpu5           Š             ¹           ž         power-domain-cpu6           Š             ¹           ž         power-domain-cpu7           Š             ¹           ž         power-domain-cpu-cluster0           Š            ž               f            reserved-memory                                   ±   cmd-db@80860000          2qcom,cmd-db          –    €†                  ¸         soc@0                                    ±                               ¿                                2simple-bus     clock-controller@100000          2qcom,sm4450-gcc          –            B          Y           Ê           Š            n                                   f         geniqup@ac0000           2qcom,geni-se-qup             –     ¬                   ±         n      \      ]        ×m-ahb s-ahb                                  ãokay       serial@a88000            2qcom,geni-debug-uart             –     ¨€       @          n      V        ×se                c           ê              ôdefault         ãokay             hwlock@1f40000           2qcom,tcsr-mutex          –    ô                          clock-controller@3d90000             2qcom,sm4450-gpucc            –    Ù                   n             !      "         Y           Ê           Š         clock-controller@ade0000             2qcom,sm4450-camcc            –    
Þ                  n                      Y           Ê           Š         clock-controller@af00000             2qcom,sm4450-dispcc           –    
ð               $   n                                       Y           Ê           Š         interrupt-controller@b220000             2qcom,sm4450-pdc qcom,pdc              –    "             @ ð       d      $        à   ^   ^  î      }   ?                                     1         f          pinctrl@f100000          2qcom,sm4450-tlmm             –           0                 Ð            F        V            1                    b              ‰        n            |                f      qup-uart7-rx-state          ‘gpio23          –qup1_se2_l2         Ÿ            ®         f         qup-uart7-tx-state          ‘gpio22          –qup1_se2_l2         Ÿ            ®         f            interrupt-controller@17200000            2arm,gic-v3            –                  &                       	                        1        »           Ò                f         timer@17420000           2arm,armv7-timer-mem          –    B                 ±                                            frame@17421000           –B    B             ç                                      frame@17423000           –B0            ç                  	         	  ãdisabled          frame@17425000           –BP            ç                  
         	  ãdisabled          frame@17427000           –Bp            ç                           	  ãdisabled          frame@17429000           –B            ç                           	  ãdisabled          frame@1742b000           –B°            ç                           	  ãdisabled          frame@1742d000           –BÐ            ç                           	  ãdisabled             rsc@17a00000             2qcom,rpmh-rsc         0   –                  ¡             ¢                 ôdrv-0 drv-1 drv-2         $                                      	  þapps_rsc                                                                       ¹      bcm-voter            2qcom,bcm-voter        clock-controller             2qcom,sm4450-rpmh-clk             Y            n   !        ×xo           f            cpufreq@17d91000          +   2qcom,sm4450-cpufreq-epss qcom,cpufreq-epss            –    Ù            Ù                 ôfreq-domain0 freq-domain1            n   "              ×xo alternate                                        0dcvsh-irq-0 dcvsh-irq-1         @            Y            f            timer            2arm,armv8-timer       0          ÿ        ÿ        ÿ      
  ÿ      aliases       $  S/soc@0/geniqup@ac0000/serial@a88000          	interrupt-parent #address-cells #size-cells model compatible stdout-path clock-frequency #clock-cells phandle clocks clock-mult clock-div device_type reg enable-method next-level-cache power-domains power-domain-names qcom,freq-domain #cooling-cells cache-level cache-unified cpu entry-method arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us local-timer-stop interrupts #power-domain-cells domain-idle-states ranges no-map dma-ranges #reset-cells clock-names status pinctrl-0 pinctrl-names #hwlock-cells qcom,pdc-ranges #interrupt-cells interrupt-controller gpio-controller #gpio-cells gpio-ranges wakeup-parent gpio-reserved-ranges pins function drive-strength bias-disable #redistributor-regions redistributor-stride frame-number reg-names label qcom,tcs-offset qcom,drv-id qcom,tcs-config interrupt-names #freq-domain-cells serial0 