    8 t   (             t                                                                   '   ,Qualcomm Technologies, Inc. SM8450 QRD           2qcom,sm8450-qrd qcom,sm8450          =handset    chosen           Jserial0:115200n8          clocks     xo-board             2fixed-clock          V             c          s         sleep-clk            2fixed-clock          V             c           s   +         cpus                                 cpu@0            {cpu          2qcom,kryo780                              psci                                     psci                                                         s      l2-cache             2cache                                              s      l3-cache             2cache                                  s               cpu@100          {cpu          2qcom,kryo780                             psci                                     psci                                                         s      l2-cache             2cache                                              s            cpu@200          {cpu          2qcom,kryo780                             psci                            	         psci                                                         s      l2-cache             2cache                                              s            cpu@300          {cpu          2qcom,kryo780                             psci                
                     psci                                                         s      l2-cache             2cache                                              s   
         cpu@400          {cpu          2qcom,kryo780                             psci                                     psci                                                       s      l2-cache             2cache                                              s            cpu@500          {cpu          2qcom,kryo780                             psci                                     psci                                                       s      l2-cache             2cache                                              s            cpu@600          {cpu          2qcom,kryo780                             psci                                     psci                                                       s      l2-cache             2cache                                              s            cpu@700          {cpu          2qcom,kryo780                             psci                                     psci                                                       s      l2-cache             2cache                                              s            cpu-map    cluster0       core0                    core1                    core2                    core3                    core4                    core5                    core6                    core7                          idle-states         psci       cpu-sleep-0-0            2arm,idle-state          silver-rail-power-collapse          -@          D           U          e           v         s   !      cpu-sleep-1-0            2arm,idle-state          gold-rail-power-collapse            -@          D  X        U          e           v         s   "         domain-idle-states     cluster-sleep-0          2domain-idle-state           -A  D        D          U  	        e           s   #      cluster-sleep-1          2domain-idle-state           -A D        D  
        U          e  6         s   $            firmware       scm          2qcom,scm-sm8450 qcom,scm                0                                                 interconnect-0           2qcom,sm8450-clk-virt                                   s   3      interconnect-1           2qcom,sm8450-mc-virt                                s         memory@a0000000          {memory                                pmu          2arm,armv8-pmuv3                        psci             2arm,psci-1.0             smc    power-domain-cpu0                                       !         s         power-domain-cpu1                                       !         s         power-domain-cpu2                                       !         s   	      power-domain-cpu3                                       !         s         power-domain-cpu4                                       "         s         power-domain-cpu5                                       "         s         power-domain-cpu6                                       "         s         power-domain-cpu7                                       "         s         power-domain-cpu-cluster0                          #   $         s             opp-table-qup            2operating-points-v2          s   R   opp-50000000                           %      opp-75000000                xh           &      opp-100000000                           '         reserved-memory                                      memory@80000000                      `           $      memory@80600000              `                  $      memory@80640000              d                  $      memory@807c0000              |                  $      memory@80800000                                $      memory@80860000          2qcom,cmd-db                                $      memory@80880000                                $      memory@808a0000                                $      memory@808e0000                      @          $      memory@808e4000              @                 $      memory@80900000       
   2qcom,smem                                  +   (            $      memory@80b00000                                $      memory@80c00000                    `           $      memory@85700000              p       p           $      memory@85e00000                               $         s         memory@88000000                                $         s         memory@89900000                                $         s         memory@8b900000                                $      memory@8b910000                                $      memory@8b91a000                                $         s         memory@8ba00000                                $      memory@8bb80000                                $      memory@8bbe0000                                $      memory@8bc00000                                $         s         memory@9ee00000                     p           $      memory@9f500000              P                  $      memory@9fd00000          2qcom,rmtfs-mem                      (           $        3           B         memory@a6e00000                                $      memory@a6f00000                                $      memory@bb000000                                 $      memory@c0000000                                  $      memory@e0000000                      `           $      memory@e0600000              `       @           $      memory@e0a00000                                $      memory@e0b00000                    0          $      memory@e55f3000              _0                 $      memory@e55fc000              _       @          $      memory@e5600000              `                  $      memory@e8800000                                $      memory@e8900000                                $      memory@e9b00000                     P           $      memory@ea000000                                $      memory@ed900000                               $         smp2p-adsp           2qcom,smp2p          L            V   )                 j   )              q                  master-kernel           master-kernel                       s         slave-kernel            slave-kernel                                 s            smp2p-cdsp           2qcom,smp2p          L   ^          V   )                 j   )              q                  master-kernel           master-kernel                       s         slave-kernel            slave-kernel                                 s            smp2p-modem          2qcom,smp2p          L            V   )                 j   )              q                  master-kernel           master-kernel                       s         slave-kernel            slave-kernel                                 s         ipa-ap-to-modem         ipa                  ipa-modem-to-ap         ipa                              smp2p-slpi           2qcom,smp2p          L            V   )                 j   )              q                  master-kernel           master-kernel                       s         slave-kernel            slave-kernel                                 s            soc@0                                                                                                   2simple-bus     clock-controller@100000          2qcom,gcc-sm8450                      B          V                               @      *       +   ,   -       -      .       .      .      /            bi_tcxo sleep_clk pcie_0_pipe_clk pcie_1_pipe_clk pcie_1_phy_aux_clk ufs_phy_rx_symbol_0_clk ufs_phy_rx_symbol_1_clk ufs_phy_tx_symbol_0_clk usb3_phy_wrapper_gcc_usb30_pipe_clk             s   1      dma-controller@800000         (   2qcom,sm8450-gpi-dma qcom,sm6350-gpi-dma                                                 L         M         N         O         P         Q         R         S         T         U         V         W                         ~           0            	  $disabled             s   6      geniqup@8c0000           2qcom,geni-se-qup                                    m-ahb s-ahb             1      1              0                                                $okay       i2c@880000           2qcom,geni-i2c                         @         se              1   x        +default         9   2              u                                   H     3          3          4          5                                   Cqup-core qup-config qup-memory           V   6              6                  [tx rx         	  $disabled          spi@880000           2qcom,geni-spi                         @         se              1   x              u           +default         9   7   8      0     3          3          4          5               Cqup-core qup-config          V   6              6                  [tx rx                                   	  $disabled          i2c@884000           2qcom,geni-i2c                 @       @         se              1   z        +default         9   9              G                                   H     3          3          4          5                                   Cqup-core qup-config qup-memory           V   6             6                 [tx rx         	  $disabled          spi@884000           2qcom,geni-spi                 @       @         se              1   z              G           +default         9   :   ;      0     3          3          4          5               Cqup-core qup-config          V   6             6                 [tx rx                                   	  $disabled          i2c@888000           2qcom,geni-i2c                        @         se              1   |        +default         9   <              H                                   H     3          3          4          5                                   Cqup-core qup-config qup-memory           V   6             6                 [tx rx         	  $disabled          spi@888000           2qcom,geni-spi                        @         se              1   |              H           +default         9   =   >      0     3          3          4          5               Cqup-core qup-config          V   6             6                 [tx rx                                   	  $disabled          i2c@88c000           2qcom,geni-i2c                        @         se              1   ~        +default         9   ?              I                                   H     3          3          4          5                                   Cqup-core qup-config qup-memory           V   6             6                 [tx rx         	  $disabled          spi@88c000           2qcom,geni-spi                        @         se              1   ~              I           +default         9   @   A      0     3          3          4          5               Cqup-core qup-config          V   6             6                 [tx rx                                     $okay          i2c@890000           2qcom,geni-i2c                         @         se              1           +default         9   B              J                                   H     3          3          4          5                                   Cqup-core qup-config qup-memory           V   6             6                 [tx rx         	  $disabled          spi@890000           2qcom,geni-spi                         @         se              1                 J           +default         9   C   D      0     3          3          4          5               Cqup-core qup-config          V   6             6                 [tx rx                                     $okay          i2c@894000           2qcom,geni-i2c                 @       @         se              1           +default         9   E              K                                   H     3          3          4          5                                   Cqup-core qup-config qup-memory           V   6             6                 [tx rx         	  $disabled          serial@894000            2qcom,geni-uart                @       @         se              1           +default         9   F              K         0     3         3         5         G              Cqup-core qup-config       	  $disabled          spi@894000           2qcom,geni-spi                 @       @         se              1                 K           +default         9   H   I      0     3          3          4          5               Cqup-core qup-config          V   6             6                 [tx rx                                   	  $disabled          i2c@898000           2qcom,geni-i2c                        @         se              1           +default         9   J              C                                   H     3          3          4          5                                   Cqup-core qup-config qup-memory           V   6             6                 [tx rx         	  $disabled          spi@898000           2qcom,geni-spi                        @         se              1                 C           +default         9   K   L      0     3          3          4          5               Cqup-core qup-config          V   6             6                 [tx rx                                   	  $disabled             dma-controller@900000         (   2qcom,sm8450-gpi-dma qcom,sm6350-gpi-dma                                                                                                                                                                                         ~           0              $okay             s   N      geniqup@9c0000           2qcom,geni-se-qup                                    m-ahb s-ahb             1      1              0                 3           3             	  Cqup-core                                              $okay       i2c@980000           2qcom,geni-i2c                         @         se              1   V        +default         9   M              Y                                   H     3           3          4          5                                   Cqup-core qup-config qup-memory           V   N              N                  [tx rx         	  $disabled          spi@980000           2qcom,geni-spi                         @         se              1   V              Y           +default         9   O   P            Q            e   R      H     3           3          4          5                                   Cqup-core qup-config qup-memory           V   N              N                  [tx rx                                   	  $disabled          i2c@984000           2qcom,geni-i2c                 @       @         se              1   X        +default         9   S              Z                                   H     3           3          4          5                                   Cqup-core qup-config qup-memory           V   N             N                 [tx rx         	  $disabled          spi@984000           2qcom,geni-spi                 @       @         se              1   X              Z           +default         9   T   U      H     3           3          4          5                                   Cqup-core qup-config qup-memory           V   N             N                 [tx rx                                   	  $disabled          i2c@988000           2qcom,geni-i2c                        @         se              1   Z        +default         9   V              [                                   H     3           3          4          5                                   Cqup-core qup-config qup-memory           V   N             N                 [tx rx         	  $disabled          spi@988000           2qcom,geni-spi                        @         se              1   Z              [           +default         9   W   X      H     3           3          4          5                                   Cqup-core qup-config qup-memory           V   N             N                 [tx rx                                   	  $disabled          i2c@98c000           2qcom,geni-i2c                        @         se              1   \        +default         9   Y              \                                   H     3           3          4          5                                   Cqup-core qup-config qup-memory           V   N             N                 [tx rx         	  $disabled          spi@98c000           2qcom,geni-spi                        @         se              1   \              \           +default         9   Z   [      H     3           3          4          5                                   Cqup-core qup-config qup-memory           V   N             N                 [tx rx                                   	  $disabled          i2c@990000           2qcom,geni-i2c                         @         se              1   ^        +default         9   \              ]                                   H     3           3          4          5                                   Cqup-core qup-config qup-memory           V   N             N                 [tx rx         	  $disabled          spi@990000           2qcom,geni-spi                         @         se              1   ^              ]           +default         9   ]   ^            Q            e   R      H     3           3          4          5                                   Cqup-core qup-config qup-memory           V   N             N                 [tx rx                                     $okay          i2c@994000           2qcom,geni-i2c                 @       @         se              1   `        +default         9   _              ^                                   H     3           3          4          5                                   Cqup-core qup-config qup-memory           V   N             N                 [tx rx           $okay          spi@994000           2qcom,geni-spi                 @       @         se              1   `              ^           +default         9   `   a      H     3           3          4          5                                   Cqup-core qup-config qup-memory           V   N             N                 [tx rx                                   	  $disabled          i2c@998000           2qcom,geni-i2c                        @         se              1   b        +default         9   b              _                                   H     3           3          4          5                                   Cqup-core qup-config qup-memory           V   N             N                 [tx rx         	  $disabled          spi@998000           2qcom,geni-spi                        @         se              1   b              _           +default         9   c   d      H     3           3          4          5                                   Cqup-core qup-config qup-memory           V   N             N                 [tx rx                                   	  $disabled          serial@99c000            2qcom,geni-debug-uart                         @         se              1   d        +default         9   e   f              `         0     3         3         5         G              Cqup-core qup-config         $okay             dma-controller@a00000         (   2qcom,sm8450-gpi-dma qcom,sm6350-gpi-dma                                                                                                       %         &         '         (         )         *                         ~           0   V          	  $disabled             s   h      geniqup@ac0000           2qcom,geni-se-qup                          `         m-ahb s-ahb             1      1              0   C               3          3             	  Cqup-core                                            	  $disabled       i2c@a80000           2qcom,geni-i2c                         @         se              1   h        +default         9   g              a                                   H     3          3          4          5                                   Cqup-core qup-config qup-memory           V   h              h                  [tx rx         	  $disabled          spi@a80000           2qcom,geni-spi                         @         se              1   h              a           +default         9   i   j      H     3          3          4          5                                   Cqup-core qup-config qup-memory           V   h              h                  [tx rx                                   	  $disabled          i2c@a84000           2qcom,geni-i2c                 @       @         se              1   j        +default         9   k              b                                   H     3          3          4          5                                   Cqup-core qup-config qup-memory           V   h             h                 [tx rx         	  $disabled          spi@a84000           2qcom,geni-spi                 @       @         se              1   j              b           +default         9   l   m      H     3          3          4          5                                   Cqup-core qup-config qup-memory           V   h             h                 [tx rx                                   	  $disabled          i2c@a88000           2qcom,geni-i2c                        @         se              1   l        +default         9   n              c                                   H     3          3          4          5                                   Cqup-core qup-config qup-memory           V   h             h                 [tx rx         	  $disabled          spi@a88000           2qcom,geni-spi                        @         se              1   l              c           +default         9   o   p      H     3          3          4          5                                   Cqup-core qup-config qup-memory           V   h             h                 [tx rx                                   	  $disabled          i2c@a8c000           2qcom,geni-i2c                        @         se              1   n        +default         9   q              d                                   H     3          3          4          5                                   Cqup-core qup-config qup-memory           V   h             h                 [tx rx         	  $disabled          spi@a8c000           2qcom,geni-spi                        @         se              1   n              d           +default         9   r   s      H     3          3          4          5                                   Cqup-core qup-config qup-memory           V   h             h                 [tx rx                                   	  $disabled          i2c@a90000           2qcom,geni-i2c                         @         se              1   p        +default         9   t              e                                   H     3          3          4          5                                   Cqup-core qup-config qup-memory           V   h             h                 [tx rx         	  $disabled          spi@a90000           2qcom,geni-spi                         @         se              1   p              e           +default         9   u   v      H     3          3          4          5                                   Cqup-core qup-config qup-memory           V   h             h                 [tx rx                                   	  $disabled          i2c@a94000           2qcom,geni-i2c                 @       @         se              1   r        +default         9   w              f         H     3          3          4          5                                   Cqup-core qup-config qup-memory           V   h             h                 [tx rx                                   	  $disabled          spi@a94000           2qcom,geni-spi                 @       @         se              1   r              f           +default         9   x   y      H     3          3          4          5                                   Cqup-core qup-config qup-memory           V   h             h                 [tx rx                                   	  $disabled          i2c@a98000           2qcom,geni-i2c                        @         se              1   t        +default         9   z              k         H     3          3          4          5                                   Cqup-core qup-config qup-memory           V   h             h                 [tx rx                                   	  $disabled          spi@a98000           2qcom,geni-spi                        @         se              1   t              k           +default         9   {   |      H     3          3          4          5                                   Cqup-core qup-config qup-memory           V   h             h                 [tx rx                                   	  $disabled             rng@10c3000          2qcom,sm8450-trng qcom,trng               0              pcie@1c00000             2qcom,pcie-sm8450-pcie0        P               0     `             `             `             `                 yparf dbi elbi atu config             {pci                                                                      8                 `                 `0      `0                        }  Y         }  Y                    `                                                                                        (  msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7                                                                                                                                                                                                 0     ~                  5         G   3           Cpcie-mem cpu-pcie         \      1   6   1   7   ,   *       1   /   1   1   1   3   1   8   1   9   1      1      1   	      ]  pipe pipe_mux phy_pipe ref aux cfg bus_master bus_slave slave_q2a ddrss_sf_tbu aggre0 aggre1                    0            0                1           pci             1               ,        pciephy               ^           &      `            +default         9           e           $okay       opp-table            2operating-points-v2          s      opp-2500000              &%           &        1 А         opp-5000000              LK@           &        1           opp-8000000              z                    1             pcie@0           {pci                                                                                       phy@1c06000           2qcom,sm8450-qmp-gen3x1-pcie-phy              `               (      1   /   1   1   1   2   1   4   1   6        aux cfg_ahb ref rchng pipe          ?pcie_0_pipe_clk          V            R               1           phy         ]   1   4        m         $okay                                   s   ,      pcie@1c08000             2qcom,pcie-sm8450-pcie1        P              0     @             @             @             @                 yparf dbi elbi atu config             {pci                                                                     8                 @                 @0      @0                        }  Z          }  Z                    `        3         4         5         8         9         :         v         w         (  msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7                                                                                                                                                                                             0     ~                  5         G   4           Cpcie-mem cpu-pcie         X      1   C   1   D   -       *       1   :   1   <   1   >   1   E   1   F   1      1   	      V  pipe pipe_mux phy_pipe ref aux cfg bus_master bus_slave slave_q2a ddrss_sf_tbu aggre1                   0           0                1   	        pci             1              -        pciephy               a           &      c            +default         9           e         	  $disabled       opp-table            2operating-points-v2          s      opp-2500000              &%           &        1 А         opp-5000000              LK@           &        1           opp-10000000                            &        1 B@         opp-8000000              z                    1          opp-16000000                 $                    1 h         opp-32000000                H                    1 <            pcie@0           {pci                                                                                       phy@1c0e000           2qcom,sm8450-qmp-gen4x2-pcie-phy                             (      1   ?   1   <   1   =   1   A   1   C        aux cfg_ahb ref rchng pipe          ?pcie_1_pipe_clk          V           R               1           phy         ]   1   A        m       	  $disabled             s   -      interconnect@1500000             2qcom,sm8450-config-noc               P                                       s   G      interconnect@1680000             2qcom,sm8450-system-noc               h                                       s   4      interconnect@16c0000             2qcom,sm8450-pcie-anoc                l                                       s   ~      interconnect@16e0000             2qcom,sm8450-aggre1-noc               n                              1   
   1                       s         interconnect@1700000             2qcom,sm8450-aggre2-noc               p                                          1      1   	   1   
   *            s         interconnect@1740000             2qcom,sm8450-mmss-noc                 t                                      s         hwlock@1f40000           2qcom,tcsr-mutex                                           s   (      syscon@1fc0000           2qcom,sm8450-tcsr syscon                                s         gpu@3d00000          2qcom,adreno-730.1 qcom,adreno         0                                              #  ykgsl_3d0_reg_memory cx_mem cx_dbgc                ,                                      e                                	  $disabled             s      zap-shader                   opp-table            2operating-points-v2          s      opp-818000000               0                opp-791000000               /%          @      opp-734000000               +                 opp-640000000               &%                  opp-599000000               #                 opp-545000000                |
@                 opp-492000000               SS                  opp-421000000               @           P      opp-350000000               ܓ           @      opp-317000000               	@           @      opp-285000000               @           8      opp-220000000                           8            gmu@3d6a000       &   2qcom,adreno-gmu-730.1 qcom,adreno-gmu         0       ֠      P                  )                 ygmu rscc gmu_pdc                  0         1           hfi gmu       8                         1      1   -                  !  ahb gmu cxo axi memnoc hub demet                                   cx gx                                       e            s      opp-table            2operating-points-v2          s      opp-500000000               e                  opp-200000000                           @            clock-controller@3d90000             2qcom,sm8450-gpucc                                     *       1   +   1   ,         V                                  s         iommu@3da0000         @   2qcom,sm8450-smmu-500 qcom,adreno-smmu qcom,smmu-500 arm,mmu-500                                                  8                                                                                                                             >         ?         @         A                                                                                          0                        1   -   1   .               gmu hub hlos bus iface ahb                                   s         phy@88e3000       0   2qcom,sm8450-usb-hs-phy qcom,usb-snps-hs-7nm-phy              0                $okay            R                *            ref            1                                            #        <          R  @        q  N                    '@                         s         phy@88e8000          2qcom,sm8450-qmp-usb3-dp-phy                     0              1      *       1      1           aux ref com_aux usb3_pipe              1      1           phy common           V           R                    $okay                                   s   /   ports                                port@0                  endpoint             port@1                 endpoint                        s            port@2                 endpoint                        s                  remoteproc@2400000           2qcom,sm8450-slpi-pas                 @        @       <  V      	                                              #  wdog fatal ready handover stop-ack              *            xo              Q      Q            lcx lmx                               )               :stop            $okay            Pqcom/sm8450/slpi.mbn       glink-edge          V   )                  j   )               ^slpi                  fastrpc          2qcom,fastrpc            dfastrpcglink-apps-dsp           ^sdsp             x                             compute-cb@1             2qcom,fastrpc-compute-cb                        0  A          compute-cb@2             2qcom,fastrpc-compute-cb                        0  B          compute-cb@3             2qcom,fastrpc-compute-cb                        0  C                   remoteproc@3000000           2qcom,sm8450-adsp-pas                                 <  V                                                    #  wdog fatal ready handover stop-ack              *            xo              Q      Q            lcx lmx                               )               :stop            $okay            Pqcom/sm8450/adsp.mbn       glink-edge          V   )                  j   )               ^lpass                 gpr       	   2qcom,gpr          
  dadsp_apps                                                         service@1            2qcom,q6apm                                  avs/audio msm/adsp/audio_pd    dais             2qcom,q6apm-dais            0            bedais           2qcom,q6apm-lpass-dais                       service@2            2qcom,q6prm                      avs/audio msm/adsp/audio_pd    clock-controller             2qcom,q6prm-lpass-clocks          V            s               fastrpc          2qcom,fastrpc            dfastrpcglink-apps-dsp           ^adsp             x                             compute-cb@3             2qcom,fastrpc-compute-cb                        0            compute-cb@4             2qcom,fastrpc-compute-cb                        0            compute-cb@5             2qcom,fastrpc-compute-cb                        0                     codec@31e0000            2qcom,sm8450-lpass-wsa-macro                             4         D         E         f         g              mclk npl macro dcodec fsgen          V          
  ?wsa2-mclk                       s         soundwire@31f0000            2qcom,soundwire-v1.7.0                                                                iface           ^WSA2            9           +default                               ??        
                    .        @        Q        h                                                           	  $disabled          codec@3200000            2qcom,sm8450-lpass-rx-macro                               4         @         F         f         g              mclk npl macro dcodec fsgen          V            ?mclk                        s         soundwire@3210000            2qcom,soundwire-v1.7.0                !                                                iface           ^RX                                 9           +default                                                  .           @           Q           h                                                                          	  $disabled          codec@3220000            2qcom,sm8450-lpass-tx-macro               "               4         @         F         f         g              mclk npl macro dcodec fsgen          V            ?mclk                        s         codec@3240000            2qcom,sm8450-lpass-wsa-macro              $               4         B         C         f         g              mclk npl macro dcodec fsgen          V            ?mclk                        s         soundwire@3250000            2qcom,soundwire-v1.7.0                %                                                iface           ^WSA         9           +default                               ??        
                    .        @        Q        h                                                           	  $disabled          soundwire@33b0000            2qcom,soundwire-v1.7.0                ;                                            core wakeup                     iface           ^TX          9           +default                                                              .        @        Q        h                                                             	  $disabled          codec@33f0000            2qcom,sm8450-lpass-va-macro               ?               0         9         f         g         F           mclk macro dcodec npl            V            ?fsgen                    	  $disabled             s         remoteproc@32300000          2qcom,sm8450-cdsp-pas                 20               @  V         B                                              #  wdog fatal ready handover stop-ack              *            xo              Q       Q   
         cx mxc                                )               :stop            $okay            Pqcom/sm8450/cdsp.mbn       glink-edge          V   )                  j   )               ^cdsp                  fastrpc          2qcom,fastrpc            dfastrpcglink-apps-dsp           ^cdsp             x                             compute-cb@1             2qcom,fastrpc-compute-cb                        0  !a      0  !         compute-cb@2             2qcom,fastrpc-compute-cb                        0  !b      0  "         compute-cb@3             2qcom,fastrpc-compute-cb                        0  !c      0  #         compute-cb@4             2qcom,fastrpc-compute-cb                        0  !d      0  $         compute-cb@5             2qcom,fastrpc-compute-cb                        0  !e      0  %         compute-cb@6             2qcom,fastrpc-compute-cb                        0  !f      0  &         compute-cb@7             2qcom,fastrpc-compute-cb                        0  !g      0  '         compute-cb@8             2qcom,fastrpc-compute-cb                        0  !h      0  (                  remoteproc@4080000           2qcom,sm8450-mpss-pas                                L  V                                                                0  wdog fatal ready handover stop-ack shutdown-ack             *            xo              Q       Q            cx mss                                )               :stop            $okay            Pqcom/sm8450/modem.mbn      glink-edge          V   )                  j   )               ^modem                       clock-controller@aaf0000             2qcom,sm8450-videocc              
                     *       1               Q              &         V                               cci@ac15000       !   2qcom,sm8450-cci qcom,msm8996-cci                 
P                                              (               {                        -  camnoc_axi slow_ahb_src cpas_ahb cci cci_src            9                            +default sleep         	  $disabled                                 i2c-bus@0                         c B@                                i2c-bus@1                        c B@                                   cci@ac16000       !   2qcom,sm8450-cci qcom,msm8996-cci                 
`                                              (               {            	      
      -  camnoc_axi slow_ahb_src cpas_ahb cci cci_src            9                            +default sleep         	  $disabled                                 i2c-bus@0                         c B@                                i2c-bus@1                        c B@                                   clock-controller@ade0000             2qcom,sm8450-camcc                
                     1      *       *      +            Q              &         V                               	  $disabled             s         display-subsystem@ae00000            2qcom,sm8450-mdss                 
                 ymdss          H                                             5         G              Cmdp0-mem mdp1-mem cpu-cfg                                                     1      1         <               S                                  0  (                                           	  $disabled             s      display-controller@ae01000           2qcom,sm8450-dpu               
           
               	  ymdp vbif          0      1      1               ?      <      K      !  bus nrt_bus iface lut core vsync            ]      K        m$         e               Q                               ports                                port@0                  endpoint                        s            port@1                 endpoint                        s            port@2                 endpoint                        s               opp-table            2operating-points-v2          s      opp-172000000               
@                  opp-200000000                           &      opp-325000000               _@           '      opp-375000000               Z                 opp-500000000               e                        displayport-controller@ae90000           2qcom,sm8450-dp qcom,sm8350-dp         P       
             
            
            
            
                                      (                                       ;  core_iface core_aux ctrl_link ctrl_link_iface stream_pixel          ]                       /      /              /           dp                      e               Q         	  $disabled       ports                                port@0                  endpoint                        s            port@1                 endpoint                        s               opp-table            2operating-points-v2          s      opp-160000000               	h            &      opp-270000000               ߀           '      opp-540000000                /                  opp-810000000               0G                       dsi@ae94000       (   2qcom,sm8450-dsi-ctrl qcom,mdss-dsi-ctrl              
@              	  ydsi_ctrl                                  0                     A      7         1         $  byte byte_intf pixel core iface bus         ]            B                             e               Q                      dsi                                 	  $disabled       ports                                port@0                  endpoint                        s            port@1                 endpoint                opp-table            2operating-points-v2          s      opp-187500000               -           &      opp-300000000                           '      opp-358000000               V                       phy@ae94400          2qcom,sm8450-dsi-phy-5nm       0       
D            
F           
I       `        ydsi_phy dsi_phy_lane dsi_pll             V           R                      *          
  iface ref         	  $disabled             s         dsi@ae96000       (   2qcom,sm8450-dsi-ctrl qcom,mdss-dsi-ctrl              
`              	  ydsi_ctrl                                  0               
      C      9         1         $  byte byte_intf pixel core iface bus         ]            D                             e               Q                      dsi                                 	  $disabled       ports                                port@0                  endpoint                        s            port@1                 endpoint                   phy@ae96400          2qcom,sm8450-dsi-phy-5nm       0       
d            
f           
i       `        ydsi_phy dsi_phy_lane dsi_pll             V           R                      *          
  iface ref         	  $disabled             s            clock-controller@af00000             2qcom,sm8450-dispcc               
               d      *       *      1      +                             /      /                                       Q              &         V                               	  $disabled             s         interrupt-controller@b220000             2qcom,sm8450-pdc qcom,pdc                  "             @        d      H                      (     6   ^  a      }   ?      ~                                               s         thermal-sensor@c263000            2qcom,sm8450-tsens qcom,tsens-v2               &0            "                                                      uplow critical                      s         thermal-sensor@c265000            2qcom,sm8450-tsens qcom,tsens-v2               &P            "0                                                     uplow critical                      s         power-management@c300000          #   2qcom,sm8450-aoss-qmp qcom,aoss-qmp               0                 V   )                   j   )                 V             s         sram@c3f0000             2qcom,rpmh-stats              ?               spmi@c400000             2qcom,spmi-pmic-arb        P       @        0     P       @      D             L             B                ycore chnls obsrvr intr cnfg         periph_irq          V                                                                                  pmic@1           2qcom,pm8350 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
               
                            s         gpio@8800             2qcom,pm8350-gpio qcom,spmi-gpio                      "        2              
        >                                s            pmic@3           2qcom,pm8350b qcom,spmi-pmic                                              temp-alarm@a00           2qcom,spmi-temp-alarm               
               
                            s         gpio@8800         !   2qcom,pm8350b-gpio qcom,spmi-gpio                         "        2                      >                                s            pmic@2           2qcom,pm8350c qcom,spmi-pmic                                              temp-alarm@a00           2qcom,spmi-temp-alarm               
               
                            s         gpio@8800         !   2qcom,pm8350c-gpio qcom,spmi-gpio                         "        2              	        >                                s         led-controller@ee00       +   2qcom,pm8350c-flash-led qcom,spmi-flash-led                    	  $disabled          pwm          2qcom,pm8350c-pwm            J         	  $disabled             pmic@7           2qcom,pm8450 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
               
                            s         gpio@8800             2qcom,pm8450-gpio qcom,spmi-gpio                      "        2                      >                                s            pmic@0           2qcom,pmk8350 qcom,spmi-pmic                                               pon@1300             2qcom,pmk8350-pon                         	  yhlos pbs       pwrkey           2qcom,pmk8350-pwrkey                              U   t      	  $disabled          resin            2qcom,pmk8350-resin                             	  $disabled             adc@3100             2qcom,spmi-adc7             1                                          1               `         adc-tm@3400          2qcom,spmi-adc-tm5-gen2             4                4                                                  	  $disabled          rtc@6100             2qcom,pmk8350-rtc               a   b       
  yrtc alarm                  b            	  $disabled          nvram@7100           2qcom,spmi-sdam             q                                        q       reboot-reason@48                H           r               s            gpio@b000         !   2qcom,pmk8350-gpio qcom,spmi-gpio                         "        2                      >                                s            pmic@4           2qcom,pmr735a qcom,spmi-pmic                                              temp-alarm@a00           2qcom,spmi-temp-alarm               
               
                            s         gpio@8800         !   2qcom,pmr735a-gpio qcom,spmi-gpio                         "        2                      >                                s            pmic@5           2qcom,pmr735b qcom,spmi-pmic                                              temp-alarm@a00           2qcom,spmi-temp-alarm               
               
                            s         gpio@8800         !   2qcom,pmr735b-gpio qcom,spmi-gpio                         "        2                      >                                s               mailbox@ed18000          2qcom,sm8450-ipcc qcom,ipcc               р                                                      w            s   )      pinctrl@f100000          2qcom,sm8450-tlmm                        0                             "        >                               2                                          $            s      sdc2-default-state           s      clk-pins          	  sdc2_clk                              cmd-pins          	  sdc2_cmd                              data-pins         
  sdc2_data                                sdc2-sleep-state             s      clk-pins          	  sdc2_clk                              cmd-pins          	  sdc2_cmd                              data-pins         
  sdc2_data                                cci0-default-state          gpio110 gpio111         cci_i2c                              s         cci0-sleep-state            gpio110 gpio111         cci_i2c                              s         cci1-default-state          gpio112 gpio113         cci_i2c                              s         cci1-sleep-state            gpio112 gpio113         cci_i2c                              s         cci2-default-state          gpio114 gpio115         cci_i2c                              s         cci2-sleep-state            gpio114 gpio115         cci_i2c                              s         cci3-default-state          gpio208 gpio209         cci_i2c                              s         cci3-sleep-state            gpio208 gpio209         cci_i2c                              s         pcie0-default-state          s      perst-pins          gpio94          gpio                              clkreq-pins         gpio95          pcie0_clkreqn                             wake-pins           gpio96          gpio                                 pcie1-default-state          s      perst-pins          gpio97          gpio                              clkreq-pins         gpio98          pcie1_clkreqn                             wake-pins           gpio99          gpio                                 qup-i2c0-data-clk-state         gpio0 gpio1         qup0             s   M      qup-i2c1-data-clk-state         gpio4 gpio5         qup1             s   S      qup-i2c2-data-clk-state         gpio8 gpio9         qup2             s   V      qup-i2c3-data-clk-state         gpio12 gpio13           qup3             s   Y      qup-i2c4-data-clk-state         gpio16 gpio17           qup4             s   \      qup-i2c5-data-clk-state         gpio206 gpio207         qup5             s   _      qup-i2c6-data-clk-state         gpio20 gpio21           qup6             s   b      qup-i2c8-data-clk-state         gpio28 gpio29           qup8             s   g      qup-i2c9-data-clk-state         gpio32 gpio33           qup9             s   k      qup-i2c10-data-clk-state            gpio36 gpio37           qup10            s   n      qup-i2c11-data-clk-state            gpio40 gpio41           qup11            s   q      qup-i2c12-data-clk-state            gpio44 gpio45           qup12            s   t      qup-i2c13-data-clk-state            gpio48 gpio49           qup13                                s   w      qup-i2c14-data-clk-state            gpio52 gpio53           qup14                                s   z      qup-i2c15-data-clk-state            gpio56 gpio57           qup15            s   2      qup-i2c16-data-clk-state            gpio60 gpio61           qup16            s   9      qup-i2c17-data-clk-state            gpio64 gpio65           qup17            s   <      qup-i2c18-data-clk-state            gpio68 gpio69           qup18            s   ?      qup-i2c19-data-clk-state            gpio72 gpio73           qup19            s   B      qup-i2c20-data-clk-state            gpio76 gpio77           qup20            s   E      qup-i2c21-data-clk-state            gpio80 gpio81           qup21            s   J      qup-spi0-cs-state           gpio3           qup0             s   P      qup-spi0-data-clk-state         gpio0 gpio1 gpio2           qup0             s   O      qup-spi1-cs-state           gpio7           qup1             s   U      qup-spi1-data-clk-state         gpio4 gpio5 gpio6           qup1             s   T      qup-spi2-cs-state           gpio11          qup2             s   X      qup-spi2-data-clk-state         gpio8 gpio9 gpio10          qup2             s   W      qup-spi3-cs-state           gpio15          qup3             s   [      qup-spi3-data-clk-state         gpio12 gpio13 gpio14            qup3             s   Z      qup-spi4-cs-state           gpio19          qup4                                 s   ^      qup-spi4-data-clk-state         gpio16 gpio17 gpio18            qup4             s   ]      qup-spi5-cs-state           gpio85          qup5             s   a      qup-spi5-data-clk-state         gpio206 gpio207 gpio84          qup5             s   `      qup-spi6-cs-state           gpio23          qup6             s   d      qup-spi6-data-clk-state         gpio20 gpio21 gpio22            qup6             s   c      qup-spi8-cs-state           gpio31          qup8             s   j      qup-spi8-data-clk-state         gpio28 gpio29 gpio30            qup8             s   i      qup-spi9-cs-state           gpio35          qup9             s   m      qup-spi9-data-clk-state         gpio32 gpio33 gpio34            qup9             s   l      qup-spi10-cs-state          gpio39          qup10            s   p      qup-spi10-data-clk-state            gpio36 gpio37 gpio38            qup10            s   o      qup-spi11-cs-state          gpio43          qup11            s   s      qup-spi11-data-clk-state            gpio40 gpio41 gpio42            qup11            s   r      qup-spi12-cs-state          gpio47          qup12            s   v      qup-spi12-data-clk-state            gpio44 gpio45 gpio46            qup12            s   u      qup-spi13-cs-state          gpio51          qup13            s   y      qup-spi13-data-clk-state            gpio48 gpio49 gpio50            qup13            s   x      qup-spi14-cs-state          gpio55          qup14            s   |      qup-spi14-data-clk-state            gpio52 gpio53 gpio54            qup14            s   {      qup-spi15-cs-state          gpio59          qup15            s   8      qup-spi15-data-clk-state            gpio56 gpio57 gpio58            qup15            s   7      qup-spi16-cs-state          gpio63          qup16            s   ;      qup-spi16-data-clk-state            gpio60 gpio61 gpio62            qup16            s   :      qup-spi17-cs-state          gpio67          qup17            s   >      qup-spi17-data-clk-state            gpio64 gpio65 gpio66            qup17            s   =      qup-spi18-cs-state          gpio71          qup18                                s   A      qup-spi18-data-clk-state            gpio68 gpio69 gpio70            qup18                                s   @      qup-spi19-cs-state          gpio75          qup19                                s   D      qup-spi19-data-clk-state            gpio72 gpio73 gpio74            qup19                                s   C      qup-spi20-cs-state          gpio79          qup20            s   I      qup-spi20-data-clk-state            gpio76 gpio77 gpio78            qup20            s   H      qup-spi21-cs-state          gpio83          qup21            s   L      qup-spi21-data-clk-state            gpio80 gpio81 gpio82            qup21            s   K      qup-uart7-rx-state          gpio26          qup7                                 s   f      qup-uart7-tx-state          gpio27          qup7                                 s   e      qup-uart20-default-state            gpio76 gpio77 gpio78 gpio79         qup20            s   F      sd-card-det-n-state         gpio92          gpio                                 s            pinctrl@3440000          2qcom,sm8450-lpass-lpi-pinctrl                 D             M                  "        >           2                             f         g           core audio           s      tx-swr-active-state          s      clk-pins            gpio0           swr_tx_clk                                       data-pins           gpio1 gpio2 gpio14          swr_tx_data                                         rx-swr-active-state          s      clk-pins            gpio3           swr_rx_clk                                       data-pins           gpio4 gpio5         swr_rx_data                                         dmic01-default-state       clk-pins            gpio6         
  dmic1_clk                       	      data-pins           gpio7           dmic1_data                      dmic23-default-state       clk-pins            gpio8         
  dmic2_clk                       	      data-pins           gpio9           dmic2_data                      wsa-swr-active-state             s      clk-pins            gpio10          wsa_swr_clk                                      data-pins           gpio11          wsa_swr_data                                            wsa2-swr-active-state            s      clk-pins            gpio15          wsa2_swr_clk                                         data-pins           gpio16          wsa2_swr_data                                              sram@146aa000         #   2qcom,sm8450-imem syscon simple-mfd               j                        j                                pil-reloc@94c            2qcom,pil-reloc-info            	L            iommu@15000000        !   2qcom,sm8450-smmu-500 arm,mmu-500                                                               A          a          b          c          d          e          f          g          h          i          j          k          l          m          n          o          p          q          r          s          t          u          v                                                                                                                                 ;         <         =         >         ?         @         A         B         C         D         E         F         G         H         I         J         K         L         M         N         O         P         Q         R         S         T         U         V         W         X         Y                                                                                                                                                                                                                                                                                                   s   0      interrupt-controller@17100000            2arm,gic-v3                              	           	'                                                          	                                              s      msi-controller@17140000          2arm,gic-v3-its                                 	<        	K            s   }         timer@17420000           2arm,armv7-timer-mem                                                               B                  c$    frame@17421000          	V                                         B    B           frame@17423000          	V                  	            B0          	  $disabled          frame@17425000          	V                  
            BP          	  $disabled          frame@17427000          	V                              Bp          	  $disabled          frame@17429000          	V                              B          	  $disabled          frame@1742b000          	V                              B          	  $disabled          frame@1742d000          	V                              B          	  $disabled             rsc@17a00000          	  ^apps_rsc             2qcom,rpmh-rsc         @                                                               ydrv-0 drv-1 drv-2 drv-3       $                                        	c           	s            	                                          bcm-voter            2qcom,bcm-voter           s         clock-controller             2qcom,sm8450-rpmh-clk             V           xo                       s   *      power-controller             2qcom,sm8450-rpmhpd                     e            s   Q   opp-table            2operating-points-v2          s      opp1                     opp2               0         s   %      opp3               8         s         opp4               @         s   &      opp5               P      opp6                        s   '      opp7                     opp8                        s         opp9                     opp10                       s         opp11             @      opp12             P      opp13                   opp14                         regulators-0             2qcom,pm8350-rpmh-regulators         	b           	           	           	           	           	           	           	           	           
           
           
)           
8           
G           
X           
i           
z           
      smps10          
vreg_s10b_1p8           
 w@        
 w@      smps11          
vreg_s11b_0p95          
         
 ؀         s         smps12          
vreg_s12b_1p25          
 @        
 \         s         ldo1            
vreg_l1b_0p91           
         
 	        
            s         ldo2            
vreg_l2b_3p07           
 .         
 .         
            s         ldo3            
vreg_l3b_0p9            
 @        
 @        
         ldo5            
vreg_l5b_0p88           
 m        
         
            s         ldo6            
vreg_l6b_1p2            
 O        
 O        
            s         ldo7            
vreg_l7b_2p5            
 &5@        
 &5@        
            s         ldo9            
vreg_l9b_1p2            
 O        
 O        
            s            regulators-1             2qcom,pm8350c-rpmh-regulators            	c           	           	           	           	           	           	           	           	           
           
           
                                 1           F      smps1           
vreg_s1c_1p86           
 w@        
 @         s         smps10          
vreg_s10c_1p05          
 B@        
       bob       	  
vreg_bob            
 -         
 <l        
            s         ldo1            
vreg_l1c_1p8            
 w@        
 w@        
            s         ldo3            
vreg_l3c_3p0            
 2K         
 2j@        
         ldo4            
vreg_l4c_1p8            
  @        
 -        
         ldo5            
vreg_l5c_1p8            
  @        
 -        
         ldo6            
vreg_l6c_1p8            
 w@        
 -         
            s         ldo7            
vreg_l7c_3p0            
 -         
 -         
         ldo8            
vreg_l8c_1p8            
 w@        
 w@        
         ldo9            
vreg_l9c_2p96           
 -*        
 -         
            s         ldo12           
vreg_l12c_1p8           
 w@        
         
         ldo13           
vreg_l13c_3p0           
 -        
 -        
            regulators-2             2qcom,pm8450-rpmh-regulators         	h           	           	           	           	           	           	           U           c           q      smps2           
vreg_s2h_0p95           
         
 ؀         s         smps3           
vreg_s3h_0p5            
          
        ldo2            
vreg_l2h_0p91           
 m        
         
         ldo3            
vreg_l3h_0p91           
         
         
            regulators-3             2qcom,pmr735a-rpmh-regulators            	e           	           	           	                      c           q                            smps1           
vreg_s1e_1p25           
 O        
 ƀ         s         smps2           
vreg_s2e_0p85           
          
 ހ         s         ldo1            
vreg_l1e_0p8            
 5         
 5       ldo2            
vreg_l2e_0p8            
 5         
 5       ldo3            
vreg_l3e_1p2            
 O        
 O      ldo4            
vreg_l4e_1p7            
         
       ldo5            
vreg_l5e_0p88           
 m        
 m      ldo6            
vreg_l6e_1p2            
 O        
 O            cpufreq@17d91000          +   2qcom,sm8450-cpufreq-epss qcom,cpufreq-epss        0                                0              '  yfreq-domain0 freq-domain1 freq-domain2              *       1   &        xo alternate          $                                      $  dcvsh-irq-0 dcvsh-irq-1 dcvsh-irq-2                     V            s         interconnect@19100000            2qcom,sm8450-gem-noc                                                     s   5      system-cache-controller@19200000             2qcom,sm8450-llcc          `                     `             0             p                                         X  yllcc0_base llcc1_base llcc2_base llcc3_base llcc_broadcast_base llcc_broadcast_and_base               
         ufshc@1d84000         +   2qcom,sm8450-ufshc qcom,ufshc jedec,ufs-2.0               @       0               	              .        ufsphy                                   1           rst             1              0                      0                         5          G   &            Cufs-ddr cpu-ufs       n  core_clk bus_aggr_clk iface_clk core_clk_unipro ref_clk tx_lane0_sync_clk rx_lane0_sync_clk rx_lane1_sync_clk         @      1      1   
   1      1      *       1      1      1         @  xh                 xh xh                                            $okay                                                            % O        7            s         phy@1d87000          2qcom,sm8450-qmp-ufs-phy              p                ref ref_aux qref                *       1      1               1                          ufsphy           V           R            $okay                                   s   .      crypto@1d88000        ;   2qcom,sm8450-inline-crypto-engine qcom,inline-crypto-engine               ؀                    1            s         dma-controller@1dc4000            2qcom,bam-v1.7.4 qcom,bam-v1.7.0              @                                                       F           S            `      <     0        0         0        0         0               s         crypto@1dfa000        )   2qcom,sm8450-qce qcom,sm8150-qce qcom,qce                 ߠ       `         V                    [rx tx         <     0        0         0        0         0                                          Cmemory        mmc@8804000       $   2qcom,sm8450-sdhci qcom,sdhci-msm-v5              @                                            hc_irq pwr_irq              1      1      *            iface core xo              1         0        
                 5          G                Csdhc-ddr cpu-sdhc              0                  Q            e           y                                   $okay                  \            +default sleep           9                                                               opp-table            2operating-points-v2          s      opp-100000000                           &      opp-202000000               
F                       usb@a6f8800          2qcom,sm8450-dwc3 qcom,dwc3               
o                $okay                                            0      1      1      1      1      1      1         &  cfg_noc core iface sleep mock_utmi xo           ]   1      1           m$        D  V                                                           <  pwr_event hs_phy_irq dp_hs_phy_irq dm_hs_phy_irq ss_phy_irq             1              1         0                         5          G   '            Cusb-ddr apps-usb       usb@a600000       
   2snps,dwc3                
`                                      0                                        /            usb2-phy usb3-phy           peripheral     ports                                port@0                  endpoint             port@1                 endpoint                        s                     interconnect@320c0000            2qcom,sm8450-nsp-noc              2                                     interconnect@3c40000             2qcom,sm8450-lpass-ag-noc                        r                                sound         thermal-zones      aoss0-thermal                     trips      thermal-engine-config            H                   Epassive       reset-mon-cfg            8                   Epassive             cpuss0-thermal                   trips      thermal-engine-config            H                   Epassive       reset-mon-cfg            8                   Epassive             cpuss1-thermal                   trips      thermal-engine-config            H                   Epassive       reset-mon-cfg            8                   Epassive             cpuss3-thermal                   trips      thermal-engine-config            H                   Epassive       reset-mon-cfg            8                   Epassive             cpuss4-thermal                   trips      thermal-engine-config            H                   Epassive       reset-mon-cfg            8                   Epassive             cpu4-top-thermal                     trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-crit                             	   Ecritical                cpu4-bottom-thermal                  trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-crit                             	   Ecritical                cpu5-top-thermal                     trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-crit                             	   Ecritical                cpu5-bottom-thermal                  trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-crit                             	   Ecritical                cpu6-top-thermal                  	   trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-crit                             	   Ecritical                cpu6-bottom-thermal               
   trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-crit                             	   Ecritical                cpu7-top-thermal                     trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-crit                             	   Ecritical                cpu7-middle-thermal                  trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-crit                             	   Ecritical                cpu7-bottom-thermal                  trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-crit                             	   Ecritical                gpu-top-thermal         $   
                 cooling-maps       map0            :           ?            trips      trip-point0          L                   Epassive          s         trip-point1          _                   Ehot       trip-point2                          	   Ecritical                gpu-bottom-thermal          $   
                 cooling-maps       map0            :           ?            trips      trip-point0          L                   Epassive          s         trip-point1          _                   Ehot       trip-point2                          	   Ecritical                aoss1-thermal                     trips      thermal-engine-config            H                   Epassive       reset-mon-cfg            8                   Epassive             cpu0-thermal                     trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-crit                             	   Ecritical                cpu1-thermal                     trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-crit                             	   Ecritical                cpu2-thermal                     trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-crit                             	   Ecritical                cpu3-thermal                     trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-crit                             	   Ecritical                cdsp0-thermal           $   
                 trips      thermal-engine-config            H                   Epassive       thermal-hal-config           H                   Epassive       reset-mon-cfg            8                   Epassive       junction-config          s                   Epassive             cdsp1-thermal           $   
                 trips      thermal-engine-config            H                   Epassive       thermal-hal-config           H                   Epassive       reset-mon-cfg            8                   Epassive       junction-config          s                   Epassive             cdsp2-thermal           $   
                 trips      thermal-engine-config            H                   Epassive       thermal-hal-config           H                   Epassive       reset-mon-cfg            8                   Epassive       junction-config          s                   Epassive             video-thermal                    trips      thermal-engine-config            H                   Epassive       reset-mon-cfg            8                   Epassive             mem-thermal         $   
              	   trips      thermal-engine-config            H                   Epassive       ddr0-config          _                   Epassive       reset-mon-cfg            8                   Epassive             modem0-thermal                
   trips      thermal-engine-config            H                   Epassive       mdmss0-config0           p                   Epassive       mdmss0-config1           (                   Epassive       reset-mon-cfg            8                   Epassive             modem1-thermal                   trips      thermal-engine-config            H                   Epassive       mdmss1-config0           p                   Epassive       mdmss1-config1           (                   Epassive       reset-mon-cfg            8                   Epassive             modem2-thermal                   trips      thermal-engine-config            H                   Epassive       mdmss2-config0           p                   Epassive       mdmss2-config1           (                   Epassive       reset-mon-cfg            8                   Epassive             modem3-thermal                   trips      thermal-engine-config            H                   Epassive       mdmss3-config0           p                   Epassive       mdmss3-config1           (                   Epassive       reset-mon-cfg            8                   Epassive             camera0-thermal                  trips      thermal-engine-config            H                   Epassive       reset-mon-cfg            8                   Epassive             camera1-thermal                  trips      thermal-engine-config            H                   Epassive       reset-mon-cfg            8                   Epassive             pm8350-thermal          $   d              trips      trip0            s                     Epassive       pm8350c-crit             8                  	   Ecritical                pm8350b-thermal         $   d              trips      trip0            s                     Epassive       pm8350c-crit             8                  	   Ecritical                pm8350c-thermal         $   d              trips      trip0            s                     Epassive       pm8350c-crit             8                  	   Ecritical                pm8450-thermal          $   d              trips      trip0            s                     Epassive       trip1            8                     Ehot             pmr735a-thermal         $   d              trips      trip0            s                     Epassive       pmr735a-crit             8                  	   Ecritical                pmr735b-thermal         $   d              trips      trip0            s                     Epassive       pmr735a-crit             8                  	   Ecritical                   timer            2arm,armv8-timer       0                                
           c$       reboot-mode          2nvmem-reboot-mode           N           Zreboot-mode         k           y         aliases       $  /soc@0/geniqup@9c0000/serial@99c000       vph-pwr-regulator            2regulator-fixed         
vph_pwr         
 8u         
 8u                            s            	interrupt-parent #address-cells #size-cells model compatible chassis-type stdout-path #clock-cells clock-frequency phandle device_type reg enable-method next-level-cache power-domains power-domain-names qcom,freq-domain #cooling-cells clocks cache-level cache-unified cpu entry-method idle-state-name arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us local-timer-stop qcom,dload-mode interconnects #reset-cells #interconnect-cells qcom,bcm-voters interrupts #power-domain-cells domain-idle-states opp-hz required-opps ranges no-map hwlocks qcom,client-id qcom,vmid qcom,smem interrupts-extended mboxes qcom,local-pid qcom,remote-pid qcom,entry-name #qcom,smem-state-cells interrupt-controller #interrupt-cells dma-ranges clock-names #dma-cells dma-channels dma-channel-mask iommus status pinctrl-names pinctrl-0 interconnect-names dmas dma-names operating-points-v2 reg-names linux,pci-domain bus-range num-lanes msi-map msi-map-mask interrupt-names interrupt-map-mask interrupt-map iommu-map resets reset-names phys phy-names perst-gpios wake-gpios opp-peak-kBps clock-output-names #phy-cells assigned-clocks assigned-clock-rates vdda-phy-supply vdda-pll-supply #hwlock-cells qcom,gmu memory-region opp-level qcom,qmp #iommu-cells #global-interrupts dma-coherent vdda18-supply vdda33-supply qcom,squelch-detector-bp qcom,hs-disconnect-bp qcom,pre-emphasis-amplitude-bp qcom,pre-emphasis-duration-bp qcom,hs-amplitude-bp qcom,hs-output-impedance-micro-ohms qcom,hs-crossover-voltage-microvolt qcom,hs-rise-fall-time-bp orientation-switch remote-endpoint qcom,smem-states qcom,smem-state-names firmware-name label qcom,glink-channels qcom,non-secure-domain qcom,domain qcom,intents #sound-dai-cells qcom,protection-domain qcom,din-ports qcom,dout-ports qcom,ports-sinterval-low qcom,ports-offset1 qcom,ports-offset2 qcom,ports-hstart qcom,ports-hstop qcom,ports-word-length qcom,ports-block-pack-mode qcom,ports-block-group-count qcom,ports-lane-control pinctrl-1 assigned-clock-parents qcom,pdc-ranges #qcom,sensors #thermal-sensor-cells qcom,ee qcom,channel gpio-controller gpio-ranges #gpio-cells #pwm-cells linux,code #io-channel-cells bits #mbox-cells wakeup-parent gpio-reserved-ranges pins drive-strength bias-disable bias-pull-up function bias-pull-down slew-rate bias-bus-hold output-high #redistributor-regions redistributor-stride msi-controller #msi-cells frame-number qcom,tcs-offset qcom,drv-id qcom,tcs-config qcom,pmic-id vdd-s1-supply vdd-s2-supply vdd-s3-supply vdd-s4-supply vdd-s5-supply vdd-s6-supply vdd-s7-supply vdd-s8-supply vdd-s9-supply vdd-s10-supply vdd-s11-supply vdd-s12-supply vdd-l1-l4-supply vdd-l2-l7-supply vdd-l3-l5-supply vdd-l6-l9-l10-supply vdd-l8-supply regulator-name regulator-min-microvolt regulator-max-microvolt regulator-initial-mode vdd-l1-l12-supply vdd-l2-l8-supply vdd-l3-l4-l5-l7-l13-supply vdd-l6-l9-l11-supply vdd-bob-supply vdd-l2-supply vdd-l3-supply vdd-l4-supply vdd-l1-l2-supply vdd-l5-l6-supply vdd-l7-bob-supply #freq-domain-cells lanes-per-direction freq-table-hz qcom,ice reset-gpios vcc-supply vcc-max-microamp vccq-supply vccq-max-microamp vdd-hba-supply qcom,num-ees num-channels qcom,controlled-remotely bus-width sdhci-caps-mask cd-gpios vmmc-supply vqmmc-supply no-sdio no-mmc snps,dis_u2_susphy_quirk snps,dis_enblslpm_quirk dr_mode thermal-sensors temperature hysteresis polling-delay-passive trip cooling-device nvmem-cells nvmem-cell-names mode-recovery mode-bootloader serial0 regulator-always-on regulator-boot-on 