 ɀ   8    (             p                                                                   '   ,Qualcomm Technologies, Inc. SM8550 QRD           2qcom,sm8550-qrd qcom,sm8550          =handset    chosen           Jserial0:115200n8          clocks     xo-board             2fixed-clock          V             c          s         sleep-clk            2fixed-clock          V             c           s   *      bi-tcxo-div2-clk             V             2fixed-factor-clock           {                                        s   )      bi-tcxo-ao-div2-clk          V             2fixed-factor-clock           {                                       s            cpus                                 cpu@0            cpu          2arm,cortex-a510                           {                psci                                     psci                                           d        %            s      l2-cache             2cache           4            @                     s      l3-cache             2cache           4            @         s               cpu@100          cpu          2arm,cortex-a510                          {                psci                                     psci                                           d        %            s      l2-cache             2cache           4            @                     s            cpu@200          cpu          2arm,cortex-a510                          {                psci                	            
         psci                                           d        %            s      l2-cache             2cache           4            @                     s   	         cpu@300          cpu          2arm,cortex-a715                          {               psci                                     psci                                                 %            s      l2-cache             2cache           4            @                     s            cpu@400          cpu          2arm,cortex-a715                          {               psci                                     psci                                                 %            s      l2-cache             2cache           4            @                     s            cpu@500          cpu          2arm,cortex-a710                          {               psci                                     psci                                                 %            s      l2-cache             2cache           4            @                     s            cpu@600          cpu          2arm,cortex-a710                          {               psci                                     psci                                                 %            s      l2-cache             2cache           4            @                     s            cpu@700          cpu          2arm,cortex-x3                            {               psci                                     psci                              f          L        %            s      l2-cache             2cache           4            @                     s            cpu-map    cluster0       core0           N         core1           N         core2           N         core3           N         core4           N         core5           N         core6           N         core7           N               idle-states         Rpsci       cpu-sleep-0-0            2arm,idle-state          _silver-rail-power-collapse          o@            &                    ,                  s   "      cpu-sleep-1-0            2arm,idle-state          _gold-rail-power-collapse            o@            X                                      s   #      cpu-sleep-2-0            2arm,idle-state          _goldplus-rail-power-collapse            o@                      F          8                  s   $         domain-idle-states     cluster-sleep-0          2domain-idle-state           oA  D                    	.          #         s   %      cluster-sleep-1          2domain-idle-state           oA D          
          0          '         s   &            firmware       scm          2qcom,scm-sm8550 qcom,scm                                                      interconnect-0           2qcom,sm8550-clk-virt                                    s   2      interconnect-1           2qcom,sm8550-mc-virt                                 s         memory@a0000000          memory                                pmu-a510             2arm,cortex-a510-pmu                        pmu-a710             2arm,cortex-a710-pmu                        pmu-a715             2arm,cortex-a715-pmu                        pmu-x3           2arm,cortex-x3-pmu                          psci             2arm,psci-1.0             smc    power-domain-cpu0                           !        *   "         s         power-domain-cpu1                           !        *   "         s         power-domain-cpu2                           !        *   "         s   
      power-domain-cpu3                           !        *   #         s         power-domain-cpu4                           !        *   #         s         power-domain-cpu5                           !        *   #         s         power-domain-cpu6                           !        *   #         s         power-domain-cpu7                           !        *   $         s         power-domain-cluster                        *   %   &         s   !         reserved-memory                                   =   hyp-region@80000000                                 D      cpusys-vm-region@80a00000                       @           D      hyp-tags-region@80e00000                        =           D      xbl-sc-region@d8100000                                 D      hyp-tags-reserved-region@811d0000                                  D      xbl-dt-log-merged-region@81a00000                       &           D      aop-cmd-db-region@81c60000           2qcom,cmd-db                                D      aop-config-merged-region@81c80000                       @          D      smem@81d00000         
   2qcom,smem                                  K   '            D      adsp-mhi-region@81f00000                                   D      global-sync-region@82600000              `                  D      tz-stat-region@82700000              p                  D      cdsp-secure-heap-region@82800000                       `           D      mpss-region@8a800000                                  D         s         q6-mpss-dtb-region@9b000000                                 D         s         ipa-fw-region@9b080000                                 D         s         ipa-gsi-region@9b090000              	                  D      gpu-micro-code-region@9b09a000               	                  D         s         spss-region@9b100000                                   D      spu-tz-shared-region@9b280000                (                  D      spu-modem-shared-region@9b2e0000                 .                  D      camera-region@9b300000               0                  D      video-region@9bb00000                       p           D      cvp-region@9c200000                      p           D      cdsp-region@9c900000                                   D         s         q6-cdsp-dtb-region@9e900000                                D         s         q6-adsp-dtb-region@9e980000                                D         s         adspslpi-region@9ea00000                                  D         s         rmtfs-region@d4a80000            2qcom,rmtfs-mem               Ԩ       (           D        S           b         mpss-dsm-region@d4d00000                       0           D         s         tz-reserved-region@d8000000                                 D      cpucp-fw-region@d8140000                                   D      qtee-region@d8300000                 0       P           D      ta-region@d8800000               ؀                 D      tz-tags-region@e1200000                     t           D      hwfence-shbuf-region@e6440000                D       '          D      trust-ui-vm-region@f3600000              `                D      trust-ui-vm-dump-region@f80ee000                                  D      trust-ui-vm-qrt-region@f80ef000                               D      trust-ui-vm-vblk0-ring-region@f80f8000                      @          D      trust-ui-vm-vblk1-ring-region@f80fc000                      @          D      trust-ui-vm-swiotlb-region@f8100000                                D      oem-vm-region@f8400000               @                 D      oem-vm-vblk0-ring-region@fcc00000                        @          D      oem-vm-swiotlb-region@fcc04000               @                 D      hyp-ext-tags-region@fce00000                                  D      hyp-ext-reserved-region@ff700000                 p                  D         smp2p-adsp           2qcom,smp2p          l            v   (                    (                                master-kernel           master-kernel                       s         slave-kernel            slave-kernel                                 s            smp2p-cdsp           2qcom,smp2p          l   ^          v   (                    (                                master-kernel           master-kernel                       s         slave-kernel            slave-kernel                                 s            smp2p-modem          2qcom,smp2p          l            v   (                    (                                master-kernel           master-kernel                       s         slave-kernel            slave-kernel                                 s         ipa-ap-to-modem         ipa                     s         ipa-modem-to-ap         ipa                              s            soc@0            2simple-bus          =                                                                                  clock-controller@100000          2qcom,sm8550-gcc                      B          V                               <   {   )   *   +   ,       ,      -       -      -      .             s   0      mailbox@408000           2qcom,sm8550-ipcc qcom,ipcc                @                                                                  s   (      dma-controller@800000         (   2qcom,sm8550-gpi-dma qcom,sm6350-gpi-dma         !                                        L         M         N         O         P         Q         R         S         T         U         V         W           ,           9   >        J   /  6             Q      	  ^disabled             s   5      geniqup@8c0000           2qcom,geni-se-qup                                     =        em-ahb s-ahb          {   0      0           J   /  #             Q                                 ^okay       i2c@880000           2qcom,geni-i2c                         @         ese           {   0   o        qdefault            1              u                                   H     2          2          3          4                                   qup-core qup-config qup-memory              5              5                  tx rx         	  ^disabled          spi@880000           2qcom,geni-spi                         @         ese           {   0   o              u           qdefault            6   7      H     2          2          3          4                                   qup-core qup-config qup-memory              5              5                  tx rx                                   	  ^disabled          i2c@884000           2qcom,geni-i2c                 @       @         ese           {   0   q        qdefault            8              G                                   H     2          2          3          4                                   qup-core qup-config qup-memory              5             5                 tx rx         	  ^disabled          spi@884000           2qcom,geni-spi                 @       @         ese           {   0   q              G           qdefault            9   :      H     2          2          3          4                                   qup-core qup-config qup-memory              5             5                 tx rx                                   	  ^disabled          i2c@888000           2qcom,geni-i2c                        @         ese           {   0   s        qdefault            ;              H                                   H     2          2          3          4                                   qup-core qup-config qup-memory              5             5                 tx rx         	  ^disabled          spi@888000           2qcom,geni-spi                        @         ese           {   0   s              H           qdefault            <   =      H     2          2          3          4                                   qup-core qup-config qup-memory              5             5                 tx rx                                   	  ^disabled          i2c@88c000           2qcom,geni-i2c                        @         ese           {   0   u        qdefault            >              I                                   H     2          2          3          4                                   qup-core qup-config qup-memory              5             5                 tx rx         	  ^disabled          spi@88c000           2qcom,geni-spi                        @         ese           {   0   u              I           qdefault            ?   @      H     2          2          3          4                                   qup-core qup-config qup-memory              5             5                 tx rx                                   	  ^disabled          i2c@890000           2qcom,geni-i2c                         @         ese           {   0   w        qdefault            A              J                                   H     2          2          3          4                                   qup-core qup-config qup-memory              5             5                 tx rx         	  ^disabled          spi@890000           2qcom,geni-spi                         @         ese           {   0   w              J           qdefault            B   C      H     2          2          3          4                                   qup-core qup-config qup-memory              5             5                 tx rx                                   	  ^disabled          i2c@894000           2qcom,geni-i2c                 @       @         ese           {   0   y        qdefault            D              K                                   H     2          2          3          4                                   qup-core qup-config qup-memory              5             5                 tx rx         	  ^disabled          spi@894000           2qcom,geni-spi                 @       @         ese           {   0   y              K           qdefault            E   F      H     2          2          3          4                                   qup-core qup-config qup-memory              5             5                 tx rx                                   	  ^disabled          serial@898000            2qcom,geni-uart                       @         ese           {   0   {        qdefault            G   H                       0     2          2          3          4               qup-core qup-config         ^okay       bluetooth            2qcom,wcn7850-bt            I           J           K           L           M           N        
   O         0          i2c@89c000           2qcom,geni-i2c                        @         ese           {   0   }        qdefault            P                                                 H     2          2          3          4                                   qup-core qup-config qup-memory              5             5                 tx rx         	  ^disabled          spi@89c000           2qcom,geni-spi                        @         ese           {   0   }                         qdefault            Q   R      H     2          2          3          4                                   qup-core qup-config qup-memory              5             5                 tx rx                                   	  ^disabled             geniqup@9c0000           2qcom,geni-se-i2c-master-hub                                 es-ahb            {   0   Z                                  =        ^okay       i2c@980000           2qcom,geni-i2c-master-hub                          @         ese core          {   0   F   0   E        qdefault            S                                                 0     2           2          3          4               qup-core qup-config       	  ^disabled          i2c@984000           2qcom,geni-i2c-master-hub                  @       @         ese core          {   0   H   0   E        qdefault            T                                                 0     2           2          3          4               qup-core qup-config       	  ^disabled          i2c@988000           2qcom,geni-i2c-master-hub                         @         ese core          {   0   J   0   E        qdefault            U                                                 0     2           2          3          4               qup-core qup-config         ^okay       typec-retimer@1c             2onnn,nb7vpq904m                     %   V         0         ?   ports                                port@0                  endpoint            R   W         s           port@1                 endpoint            b                     R   X         s                  typec-mux@42             2fcs,fsa4480             B        %   Y         m         ?   port       endpoint            R   Z         s                 i2c@98c000           2qcom,geni-i2c-master-hub                         @         ese core          {   0   L   0   E        qdefault            [                                                 0     2           2          3          4               qup-core qup-config       	  ^disabled          i2c@990000           2qcom,geni-i2c-master-hub                          @         ese core          {   0   N   0   E        qdefault            \                                                 0     2           2          3          4               qup-core qup-config       	  ^disabled          i2c@994000           2qcom,geni-i2c-master-hub                  @       @         ese core          {   0   P   0   E        qdefault            ]                                                 0     2           2          3          4               qup-core qup-config       	  ^disabled          i2c@998000           2qcom,geni-i2c-master-hub                         @         ese core          {   0   R   0   E        qdefault            ^                                                 0     2           2          3          4               qup-core qup-config       	  ^disabled          i2c@99c000           2qcom,geni-i2c-master-hub                         @         ese core          {   0   T   0   E        qdefault            _                                                 0     2           2          3          4               qup-core qup-config       	  ^disabled          i2c@9a0000           2qcom,geni-i2c-master-hub                          @         ese core          {   0   V   0   E        qdefault            `                                                 0     2           2          3          4               qup-core qup-config       	  ^disabled          i2c@9a4000           2qcom,geni-i2c-master-hub                  @       @         ese core          {   0   X   0   E        qdefault            a                                                 0     2           2          3          4               qup-core qup-config       	  ^disabled             dma-controller@a00000         (   2qcom,sm8550-gpi-dma qcom,sm6350-gpi-dma         !                                                                                              %         &         '         (         )         *           ,           9           J   /                Q        ^okay             s   d      geniqup@ac0000           2qcom,geni-se-qup                                     =        em-ahb s-ahb          {   0      0           J   /                  2          2             	  qup-core             Q                                 ^okay       i2c@a80000           2qcom,geni-i2c                         @         ese           {   0   ]        qdefault            b              a                                   H     2          2          3          4          c                         qup-core qup-config qup-memory              d              d                  tx rx         	  ^disabled          spi@a80000           2qcom,geni-spi                         @         ese           {   0   ]              a           qdefault            e   f      H     2          2          3          4          c                         qup-core qup-config qup-memory              d              d                  tx rx                                   	  ^disabled          i2c@a84000           2qcom,geni-i2c                 @       @         ese           {   0   _        qdefault            g              b                                   H     2          2          3          4          c                         qup-core qup-config qup-memory              d             d                 tx rx         	  ^disabled          spi@a84000           2qcom,geni-spi                 @       @         ese           {   0   _              b           qdefault            h   i      H     2          2          3          4          c                         qup-core qup-config qup-memory              d             d                 tx rx                                   	  ^disabled          i2c@a88000           2qcom,geni-i2c                        @         ese           {   0   a        qdefault            j              c                                   H     2          2          3          4          c                         qup-core qup-config qup-memory              d             d                 tx rx         	  ^disabled          spi@a88000           2qcom,geni-spi                        @         ese           {   0   a              c           qdefault            k   l      H     2          2          3          4          c                         qup-core qup-config qup-memory              d             d                 tx rx                                   	  ^disabled          i2c@a8c000           2qcom,geni-i2c                        @         ese           {   0   c        qdefault            m              d                                   H     2          2          3          4          c                         qup-core qup-config qup-memory              d             d                 tx rx         	  ^disabled          spi@a8c000           2qcom,geni-spi                        @         ese           {   0   c              d           qdefault            n   o      H     2          2          3          4          c                         qup-core qup-config qup-memory              d             d                 tx rx                                   	  ^disabled          i2c@a90000           2qcom,geni-i2c                         @         ese           {   0   e        qdefault            p              e                                   H     2          2          3          4          c                         qup-core qup-config qup-memory              d             d                 tx rx         	  ^disabled          spi@a90000           2qcom,geni-spi                         @         ese           {   0   e              e           qdefault            q   r      H     2          2          3          4          c                         qup-core qup-config qup-memory              d             d                 tx rx                                     ^okay       touchscreen@0            2goodix,gt9916                             s                      y   s                 t         B@          8          	`        qdefault            u   v         i2c@a94000           2qcom,geni-i2c                 @       @         ese           {   0   g        qdefault            w              f         H     2          2          3          4          c                         qup-core qup-config qup-memory              d             d                 tx rx                                   	  ^disabled          spi@a94000           2qcom,geni-spi                 @       @         ese           {   0   g              f           qdefault            x   y      H     2          2          3          4          c                         qup-core qup-config qup-memory              d             d                 tx rx                                   	  ^disabled          i2c@a98000           2qcom,geni-i2c                        @         ese           {   0   i        qdefault            z              k         H     2          2          3          4          c                         qup-core qup-config qup-memory              d             d                 tx rx                                   	  ^disabled          spi@a98000           2qcom,geni-spi                        @         ese           {   0   i              k           qdefault            {   |      H     2          2          3          4          c                         qup-core qup-config qup-memory              d             d                 tx rx                                   	  ^disabled          serial@a9c000            2qcom,geni-debug-uart                         @         ese           {   0   k        qdefault            }              C           qup-core qup-config       0     2          2          3          4               ^okay             interconnect@1500000             2qcom,sm8550-cnoc-main                P       0                                s         interconnect@1600000             2qcom,sm8550-config-noc               `        b                                 s   4      interconnect@1680000             2qcom,sm8550-system-noc               h       Ѐ                             interconnect@16c0000             2qcom,sm8550-pcie-anoc                l       "                     {   0       0   
                     s   ~      interconnect@16e0000             2qcom,sm8550-aggre1-noc               n       D                     {   0      0                        s   c      interconnect@1700000             2qcom,sm8550-aggre2-noc               p                            {                           s         interconnect@1780000             2qcom,sm8550-mmss-noc                 x                                        s         rng@10c3000          2qcom,sm8550-trng qcom,trng               0              pcie@1c00000             pci          2qcom,pcie-sm8550          P               0     `             `             `             `                 parf dbi elbi atu config                                   8  =               `                 `0      `0                                Q                             `                                                                                        (  msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7                                                                                                                                                                                                 8   {   0   "   0   $   0   %   0   *   0   +   0      0          =  eaux cfg bus_master bus_slave slave_q2a ddrss_sf_tbu noc_aggr          0     ~                    3                         pcie-mem cpu-pcie            )                                 1       /            /             ;   0           Bpci             0            N   +        Spciephy         ^okay            ]   s   `            h   s   ^                      qdefault    pcie@0           pci                                                                              =   wifi@0           2pci17cb,1107                                           I           J           K           L           M           N        
   O        t                          phy@1c06000           2qcom,sm8550-qmp-gen3x2-pcie-phy              `               (   {   0   "   0   $          0   &   0   (        eaux cfg_ahb ref rchng pipe          ;   0           Bphy            0   &                     0            V            pcie0_pipe_clk                      ^okay                                   s   +      pcie@1c08000             pci          2qcom,pcie-sm8550          P              0     @             @             @             @                 parf dbi elbi atu config                                   8  =               @                 @0      @0                                Q                            `        3         4         5         8         9         :         v         w         (  msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7                                                                                                                                                                                             @   {   0   ,   0   .   0   /   0   6   0   7   0      0       0         I  eaux cfg bus_master bus_slave slave_q2a ddrss_sf_tbu noc_aggr cnoc_sf_axi               0   ,        $       0     ~                    3             	            pcie-mem cpu-pcie            )                                1       /           /             ;   0      0   	        Bpci link_down               0           N   ,        Spciephy       	  ^disabled       pcie@0           pci                                                                              =         phy@1c0e000           2qcom,sm8550-qmp-gen4x2-pcie-phy                             (   {   0   0   0   .         0   2   0   4        eaux cfg_ahb ref rchng pipe          ;   0      0   
        Bphy phy_nocsr              0   2                     0            V           pcie1_pipe_clk                    	  ^disabled             s   ,      dma-controller@1dc4000            2qcom,bam-v1.7.4 qcom,bam-v1.7.0              @                                !                                                      J   /         /               s         crypto@1dfa000        )   2qcom,sm8550-qce qcom,sm8150-qce qcom,qce                 ߠ       `                             rx tx           J   /         /                                          memory        phy@1d80000          2qcom,sm8550-qmp-ufs-phy                                 {          0                 eref ref_aux qref                0           ;               Bufsphy           V                       ^okay                                   s   -      ufs@1d84000       +   2qcom,sm8550-ufshc qcom,ufshc jedec,ufs-2.0               @       0               	           N   -        Sufsphy          6                      ;   0           Brst             0           J           J   /   `             Q        X         0     c                    3          4   #            ufs-ddr cpu-ufs       n  ecore_clk bus_aggr_clk iface_clk core_clk_unipro ref_clk tx_lane0_sync_clk rx_lane0_sync_clk rx_lane1_sync_clk         @   {   0      0      0      0            0      0      0           l           ^okay            y   s              %           u                      O                    s      opp-table            2operating-points-v2          s      opp-75000000          @      xh                    xh                                        J         opp-150000000         @      р                    р                                        J         opp-300000000         @                                                                    J               crypto@1d88000        ;   2qcom,sm8550-inline-crypto-engine qcom,inline-crypto-engine               ؀                 {   0            s         hwlock@1f40000           2qcom,tcsr-mutex                                           s   '      clock-controller@1fc0000             2qcom,sm8550-tcsr syscon                                {                V                       s         gpu@3d00000       !   2qcom,adreno-43050a01 qcom,adreno          0                                              #  kgsl_3d0_reg_memory cx_mem cx_dbgc                ,           J                             X                      %           ^okay             s     zap-shader                     qcom/sm8550/a740_zap.mbn          opp-table            2operating-points-v2          s      opp-680000000               (                  opp-615000000               $'                 opp-550000000                U                 opp-475000000               O           P      opp-401000000               @           @      opp-348000000                           <      opp-295000000               W           8      opp-220000000                           4            gmu@3d6a000       &   2qcom,adreno-gmu-740.1 qcom,adreno-gmu         0       ֠      P                  (                 gmu rscc gmu_pdc                  0         1           hfi gmu       8   {                      0      0                      !  eahb gmu cxo axi memnoc hub demet                                   cx gx           J                             X            s      opp-table            2operating-points-v2          s      opp-500000000               e                  opp-200000000                           @            clock-controller@3d90000             2qcom,sm8550-gpucc                                  {   )   0      0            V                                  s         iommu@3da0000         @   2qcom,sm8550-smmu-500 qcom,adreno-smmu qcom,smmu-500 arm,mmu-500                                                   8                                                                                                                                      >         ?         @         A                                                                                     {         0       0   !               ehlos bus iface ahb                           Q         s         ipa@3f40000          2qcom,sm8550-ipa         J   /         /            0                            P     @               ipa-reg ipa-shared gsi        8  v                                                 (  ipa gsi ipa-clock-query ipa-setup-ready          {              ecore          0                         3          4               memory config                                          *  1ipa-clock-enabled-valid ipa-clock-enabled           ^okay            Gself                       qcom/sm8550/ipa_fws.mbn       remoteproc@4080000           2qcom,sm8550-mpss-pas                                L  v                                                                0  wdog fatal ready handover stop-ack shutdown-ack          {               exo                                 cx mss                                                                                   1stop            ^okay          0  qcom/sm8550/modem.mbn qcom/sm8550/modem_dtb.mbn    glink-edge          v   (                     (               Wmpss                        remoteproc@6800000           2qcom,sm8550-adsp-pas                                <  v                                                    #  wdog fatal ready handover stop-ack           {               exo                                lcx lmx                                                                               1stop            ^okay          .  qcom/sm8550/adsp.mbn qcom/sm8550/adsp_dtb.mbn      glink-edge          v   (                     (               Wlpass                 fastrpc          2qcom,fastrpc            ]fastrpcglink-apps-dsp           Wadsp             q                             compute-cb@3             2qcom,fastrpc-compute-cb                     J   /        /  c             Q      compute-cb@4             2qcom,fastrpc-compute-cb                     J   /        /  d             Q      compute-cb@5             2qcom,fastrpc-compute-cb                     J   /        /  e             Q      compute-cb@6             2qcom,fastrpc-compute-cb                     J   /        /  f             Q      compute-cb@7             2qcom,fastrpc-compute-cb                     J   /        /  g             Q         gpr       	   2qcom,gpr          
  ]adsp_apps                                                         service@1            2qcom,q6apm                                  avs/audio msm/adsp/audio_pd          s     dais             2qcom,q6apm-dais         J   /        /  a          bedais           2qcom,q6apm-lpass-dais                       s           service@2            2qcom,q6prm                      avs/audio msm/adsp/audio_pd    clock-controller             2qcom,q6prm-lpass-clocks          V            s                     codec@6aa0000            2qcom,sm8550-lpass-wsa-macro                             (   {      D         f         g              emclk macro dcodec fsgen          V          
  wsa2-mclk                       s         soundwire@6ab0000            2qcom,soundwire-v2.0.0                                                    {           eiface           WWSA2                       qdefault                       	           ?   ?                                       #           5           F           ]                  x                                                         	  ^disabled          codec@6ac0000            2qcom,sm8550-lpass-rx-macro                              (   {      @         f         g              emclk macro dcodec fsgen          V            mclk                        s         soundwire@6ad0000            2qcom,soundwire-v2.0.0                                                    {           eiface           WRX                     qdefault                                 ?                                           #        5        F        ]          x                                                            ^okay             s     codec@0,4            2sdw20217010d00                                                  s           codec@6ae0000            2qcom,sm8550-lpass-tx-macro                              (   {      9         f         g              emclk macro dcodec fsgen          V            mclk                        s         codec@6b00000            2qcom,sm8550-lpass-wsa-macro                             (   {      B         f         g              emclk macro dcodec fsgen          V            mclk                        s         soundwire@6b10000            2qcom,soundwire-v2.0.0                                                    {           eiface           WWSA                    qdefault                       	           ?   ?                                       #           5           F           ]                  x                                                           ^okay             s  #   speaker@0,0          2sdw20217020400                           qdefault                                               	  SpkrLeft               V                   	               
            s  !      speaker@0,1          2sdw20217020400                          qdefault                                               
  SpkrRight              V                   	                           s  "         soundwire@6d30000            2qcom,soundwire-v2.0.0                                                           core wakeup          {           eiface           WTX                     qdefault                                	                              #        5        F        ]        x                                                       ^okay             s      codec@0,3            2sdw20217010d00                          	,                     s           codec@6d44000            2qcom,sm8550-lpass-va-macro               @              $   {      9         f         g           emclk macro dcodec            V            fsgen                       s         pinctrl@6e80000          2qcom,sm8550-lpass-lpi-pinctrl                              %                  	A        	Q           	]                       {      f         g           ecore audio           s      tx-swr-active-state          s      clk-pins            	igpio0           	nswr_tx_clk          	w           	            	      data-pins           	igpio1 gpio2 gpio14          	nswr_tx_data         	w           	            	         rx-swr-active-state          s      clk-pins            	igpio3           	nswr_rx_clk          	w           	            	      data-pins           	igpio4 gpio5         	nswr_rx_data         	w           	            	         dmic01-default-state       clk-pins            	igpio6         
  	ndmic1_clk           	w            	      data-pins           	igpio7           	ndmic1_data          	w            	         dmic23-default-state       clk-pins            	igpio8         
  	ndmic2_clk           	w            	      data-pins           	igpio9           	ndmic2_data          	w            	         wsa-swr-active-state             s      clk-pins            	igpio10          	nwsa_swr_clk         	w           	            	      data-pins           	igpio11          	nwsa_swr_data            	w           	            	         wsa2-swr-active-state            s      clk-pins            	igpio15          	nwsa2_swr_clk            	w           	            	      data-pins           	igpio16          	nwsa2_swr_data           	w           	            	         spkr-1-sd-n-active-state            	igpio17          	ngpio            	w            	         	         s         spkr-2-sd-n-active-state            	igpio18          	ngpio            	w            	         	         s            interconnect@7400000             2qcom,sm8550-lpass-lpiaon-noc                 @                                    interconnect@7430000             2qcom,sm8550-lpass-lpicx-noc              C                                        s         interconnect@7e40000             2qcom,sm8550-lpass-ag-noc                                                      mmc@8804000       $   2qcom,sm8550-sdhci qcom,sdhci-msm-v5              @                                            hc_irq pwr_irq           {   0      0                  eiface core xo           J   /  @            	 d,        	߀h                        X         0                         3          4               sdhc-ddr cpu-sdhc           	            Q        	             	  ^disabled       opp-table            2operating-points-v2          s      opp-19200000                $         J         opp-50000000                        J         opp-100000000                        J         opp-202000000               
F        J               clock-controller@aaf0000             2qcom,sm8550-videocc              
                  {   )   0                          J            V                               cci@ac15000       !   2qcom,sm8550-cci qcom,msm8996-cci                 
P                                                 {                          ecamnoc_axi cpas_ahb cci                       
	              qdefault sleep         	  ^disabled                                 i2c-bus@0                         c B@                                i2c-bus@1                        c B@                                   cci@ac16000       !   2qcom,sm8550-cci qcom,msm8996-cci                 
`                                                 {                  
        ecamnoc_axi cpas_ahb cci                    
	           qdefault sleep         	  ^disabled                                 i2c-bus@0                         c B@                                   cci@ac17000       !   2qcom,sm8550-cci qcom,msm8996-cci                 
p                                                 {                          ecamnoc_axi cpas_ahb cci                       
	              qdefault sleep         	  ^disabled                                 i2c-bus@0                         c B@                                i2c-bus@1                        c B@                                   clock-controller@ade0000             2qcom,sm8550-camcc                
                  {   0      )      *                       J            V                                  s         display-subsystem@ae00000            2qcom,sm8550-mdss                 
                 mdss                   S                                 {         0      0         =        ;                                                         	  mdp0-mem            J   /                                        =        ^okay             s      display-controller@ae01000           2qcom,sm8550-dpu               
           
               	  mdp vbif                                   0   {   0      0               @      =      I      !  ebus nrt_bus iface lut core vsync                                 I        $         X      ports                                port@0                  endpoint            R            s            port@1                 endpoint            R            s            port@2                 endpoint            R            s               opp-table            2operating-points-v2          s      opp-200000000                        J         opp-325000000               _@        J         opp-375000000               Z        J         opp-514000000                       J               displayport-controller@ae90000           2qcom,sm8550-dp qcom,sm8350-dp         P       
             
            
            
            
                                      (   {                                    ;  ecore_iface core_aux ctrl_link ctrl_link_iface stream_pixel                              
   .      .           N   .           Sdp                      X                          ^okay       ports                                port@0                  endpoint            R            s            port@1                 endpoint            R           b                s               opp-table            2operating-points-v2          s      opp-162000000               	        J         opp-270000000               ߀        J         opp-540000000                /         J         opp-810000000               0G        J               dsi@ae94000       (   2qcom,sm8550-dsi-ctrl qcom,mdss-dsi-ctrl              
@              	  dsi_ctrl                                  0   {                  B      8         0         $  ebyte byte_intf pixel core iface bus                                    C        
                     X           N           Sdsi                                   ^okay            
*      ports                                port@0                  endpoint            R            s            port@1                 endpoint            R           b                      s               opp-table            2operating-points-v2          s      opp-187500000               -        J         opp-300000000                        J         opp-358000000               V        J            panel@0          2visionox,vtdr6130                                      
	              qdefault sleep           
6                      
A           y   s         port       endpoint            R            s                  phy@ae95000          2qcom,sm8550-dsi-phy-4nm       0       
P            
R           
U                dsi_phy dsi_phy_lane dsi_pll             {                   
  eiface ref            V                       ^okay            
N            s         dsi@ae96000       (   2qcom,sm8550-dsi-ctrl qcom,mdss-dsi-ctrl              
`              	  dsi_ctrl                                  0   {                  D      :         0         $  ebyte byte_intf pixel core iface bus                              	      E        
                     X           N           Sdsi                                 	  ^disabled       ports                                port@0                  endpoint            R            s            port@1                 endpoint                   phy@ae97000          2qcom,sm8550-dsi-phy-4nm       0       
p            
r           
u                dsi_phy dsi_phy_lane dsi_pll             {                   
  eiface ref            V                     	  ^disabled             s            clock-controller@af00000             2qcom,sm8550-dispcc               
               \   {   )      0      *                             .      .                                                  J            V                                  s         phy@88e3000          2qcom,sm8550-snps-eusb2-phy               0       T                     {              eref         ;   0           ^okay                       
Z           N            s         phy@88e8000          2qcom,sm8550-qmp-usb3-dp-phy                     0           {   0             0      0           eaux ref com_aux usb3_pipe               0           ;   0      0           Bphy common           V                       ?        ^okay                                   s   .   ports                                port@0                  endpoint            R            s   X         port@1                 endpoint            R            s            port@2                 endpoint            R            s                  usb@a6f8800          2qcom,sm8550-dwc3 qcom,dwc3               
o                                          =      0   {   0      0      0      0      0               &  ecfg_noc core iface sleep mock_utmi xo              0      0           $        D  v                                                           <  pwr_event hs_phy_irq dp_hs_phy_irq dm_hs_phy_irq ss_phy_irq             0           J           ;   0         0     c                    3          4   $            usb-ddr apps-usb            ^okay       usb@a600000       
   2snps,dwc3                
`                                   J   /   @            N      .            Susb2-phy usb3-phy           
h             
|         
         
         
         
         
                  (         >         S         Q         b   ports                                port@0                  endpoint            R            s           port@1                 endpoint            R            s                     interrupt-controller@b220000             2qcom,sm8550-pdc qcom,pdc                  "             @        d      <  r         ^   ^  a      }   ?      ~                                                        s         thermal-sensor@c271000            2qcom,sm8550-tsens qcom,tsens-v2               '            "                                                      uplow critical                      s         thermal-sensor@c272000            2qcom,sm8550-tsens qcom,tsens-v2               '             "0                                                     uplow critical                      s         thermal-sensor@c273000            2qcom,sm8550-tsens qcom,tsens-v2               '0            "@                                                     uplow critical                      s         power-management@c300000          #   2qcom,sm8550-aoss-qmp qcom,aoss-qmp               0                      (        v   (                      (                 V             s         sram@c3f0000             2qcom,rpmh-stats              ?               spmi@c400000             2qcom,spmi-pmic-arb        P       @        0     P       @      D             L             B       @         core chnls obsrvr intr cnfg         periph_irq          v                                                                                              pmic@c           2qcom,pm8010 qcom,spmi-pmic                                               temp-alarm@2400          2qcom,spmi-temp-alarm               $               $                            s  	         pmic@d           2qcom,pm8010 qcom,spmi-pmic                                               temp-alarm@2400          2qcom,spmi-temp-alarm               $               $                            s  
         pmic@1           2qcom,pm8550 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
               
                            s        gpio@8800             2qcom,pm8550-gpio qcom,spmi-gpio                      	A        	]                      	Q                                s      volume-up-n-state           	igpio6           	nnormal                               	         s           led-controller@ee00       *   2qcom,pm8550-flash-led qcom,spmi-flash-led                       ^okay       led-0           	nflash                                                                 $          led-1           	nflash                                                                  $            pwm       !   2qcom,pm8550-pwm qcom,pm8350c-pwm            8           ^okay       multi-led              	        	nstatus                               led@1                                led@2                                led@3                                         pmic@7           2qcom,pm8550 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
               
                            s        gpio@8800         !   2qcom,pm8550b-gpio qcom,spmi-gpio                         	A        	]                      	Q                                s         phy@fd00             2qcom,pm8550b-eusb2-repeater                                 C   V        P            s            pmic@5           2qcom,pm8550 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
               
                            s        gpio@8800         "   2qcom,pm8550ve-gpio qcom,spmi-gpio                        	A        	]                      	Q                                s            pmic@2           2qcom,pm8550 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
               
                            s        gpio@8800         "   2qcom,pm8550vs-gpio qcom,spmi-gpio                        	A        	]                      	Q                                s            pmic@3           2qcom,pm8550 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
               
                            s        gpio@8800         "   2qcom,pm8550vs-gpio qcom,spmi-gpio                        	A        	]                      	Q                                s            pmic@4           2qcom,pm8550 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
               
                            s        gpio@8800         "   2qcom,pm8550vs-gpio qcom,spmi-gpio                        	A        	]                      	Q                                s            pmic@6           2qcom,pm8550 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
               
                            s        gpio@8800         "   2qcom,pm8550vs-gpio qcom,spmi-gpio                        	A        	]                      	Q                                s            pmic@0           2qcom,pm8550 qcom,spmi-pmic                                                pon@1300             2qcom,pmk8350-pon                         	  hlos pbs       pwrkey           2qcom,pmk8350-pwrkey                              \   t        ^okay          resin            2qcom,pmk8350-resin                               ^okay            \   r         rtc@6100             2qcom,pmk8350-rtc               a   b       
  rtc alarm                  b            nvram@7100           2qcom,spmi-sdam             q                                  =      q       reboot-reason@48                H           g               s           gpio@8800         !   2qcom,pmk8550-gpio qcom,spmi-gpio                         	A        	]                      	Q                                s      sleep-clk-state         	igpio3           	nfunc1            l         z         	                     s  &            pmic@a           2qcom,pmr735d qcom,spmi-pmic             
                                 temp-alarm@a00           2qcom,spmi-temp-alarm               
            
   
                            s        gpio@8800         !   2qcom,pmr735d-gpio qcom,spmi-gpio                         	A        	]                      	Q                                s            pmic@b           2qcom,pmr735d qcom,spmi-pmic                                              temp-alarm@a00           2qcom,spmi-temp-alarm               
               
                            s        gpio@8800         !   2qcom,pmr735d-gpio qcom,spmi-gpio                         	A        	]                      	Q                                s               pinctrl@f100000          2qcom,sm8550-tlmm                        0                             	A        	Q                               	]   s                                              s   s   cci0-0-default-state             s      sda-pins            	igpio110         	ncci_i2c_sda         	w                   scl-pins            	igpio111         	ncci_i2c_scl         	w                      cci0-0-sleep-state           s      sda-pins            	igpio110         	ncci_i2c_sda         	w                  scl-pins            	igpio111         	ncci_i2c_scl         	w                     cci0-1-default-state             s      sda-pins            	igpio112         	ncci_i2c_sda         	w                   scl-pins            	igpio113         	ncci_i2c_scl         	w                      cci0-1-sleep-state           s      sda-pins            	igpio112         	ncci_i2c_sda         	w                  scl-pins            	igpio113         	ncci_i2c_scl         	w                     cci1-0-default-state             s      sda-pins            	igpio114         	ncci_i2c_sda         	w                   scl-pins            	igpio115         	ncci_i2c_scl         	w                      cci1-0-sleep-state           s      sda-pins            	igpio114         	ncci_i2c_sda         	w                  scl-pins            	igpio115         	ncci_i2c_scl         	w                     cci2-0-default-state             s      sda-pins            	igpio74          	ncci_i2c_sda         	w                   scl-pins            	igpio75          	ncci_i2c_scl         	w                      cci2-0-sleep-state           s      sda-pins            	igpio74          	ncci_i2c_sda         	w                  scl-pins            	igpio75          	ncci_i2c_scl         	w                     cci2-1-default-state             s      sda-pins            	igpio0           	ncci_i2c_sda         	w                   scl-pins            	igpio1           	ncci_i2c_scl         	w                      cci2-1-sleep-state           s      sda-pins            	igpio0           	ncci_i2c_sda         	w                  scl-pins            	igpio1           	ncci_i2c_scl         	w                     hub-i2c0-data-clk-state         	igpio16 gpio17           	ni2chub0_se0         	w                     s   S      hub-i2c1-data-clk-state         	igpio18 gpio19           	ni2chub0_se1         	w                     s   T      hub-i2c2-data-clk-state         	igpio20 gpio21           	ni2chub0_se2         	w                     s   U      hub-i2c3-data-clk-state         	igpio22 gpio23           	ni2chub0_se3         	w                     s   [      hub-i2c4-data-clk-state         	igpio4 gpio5         	ni2chub0_se4         	w                     s   \      hub-i2c5-data-clk-state         	igpio6 gpio7         	ni2chub0_se5         	w                     s   ]      hub-i2c6-data-clk-state         	igpio8 gpio9         	ni2chub0_se6         	w                     s   ^      hub-i2c7-data-clk-state         	igpio10 gpio11           	ni2chub0_se7         	w                     s   _      hub-i2c8-data-clk-state         	igpio206 gpio207         	ni2chub0_se8         	w                     s   `      hub-i2c9-data-clk-state         	igpio84 gpio85           	ni2chub0_se9         	w                     s   a      pcie0-default-state          s      perst-pins          	igpio94          	ngpio            	w                  clkreq-pins         	igpio95          	npcie0_clk_req_n         	w                  wake-pins           	igpio96          	ngpio            	w                     pcie1-default-state    perst-pins          	igpio97          	ngpio            	w                  clkreq-pins         	igpio98          	npcie1_clk_req_n         	w                  wake-pins           	igpio99          	ngpio            	w                     qup-i2c0-data-clk-state         	igpio28 gpio29         	  	nqup1_se0            	w                      s   b      qup-i2c1-data-clk-state         	igpio32 gpio33         	  	nqup1_se1            	w                      s   g      qup-i2c2-data-clk-state         	igpio36 gpio37         	  	nqup1_se2            	w                      s   j      qup-i2c3-data-clk-state         	igpio40 gpio41         	  	nqup1_se3            	w                      s   m      qup-i2c4-data-clk-state         	igpio44 gpio45         	  	nqup1_se4            	w                      s   p      qup-i2c5-data-clk-state         	igpio52 gpio53         	  	nqup1_se5            	w                      s   w      qup-i2c6-data-clk-state         	igpio48 gpio49         	  	nqup1_se6            	w                      s   z      qup-i2c8-data-clk-state          s   1   scl-pins            	igpio57          	nqup2_se0_l1_mira            	w                   sda-pins            	igpio56          	nqup2_se0_l0_mira            	w                      qup-i2c9-data-clk-state         	igpio60 gpio61         	  	nqup2_se1            	w                      s   8      qup-i2c10-data-clk-state            	igpio64 gpio65         	  	nqup2_se2            	w                      s   ;      qup-i2c11-data-clk-state            	igpio68 gpio69         	  	nqup2_se3            	w                      s   >      qup-i2c12-data-clk-state            	igpio2 gpio3       	  	nqup2_se4            	w                      s   A      qup-i2c13-data-clk-state            	igpio80 gpio81         	  	nqup2_se5            	w                      s   D      qup-i2c15-data-clk-state            	igpio72 gpio106        	  	nqup2_se7            	w                      s   P      qup-spi0-cs-state           	igpio31        	  	nqup1_se0            	w            	         s   f      qup-spi0-data-clk-state         	igpio28 gpio29 gpio30          	  	nqup1_se0            	w            	         s   e      qup-spi1-cs-state           	igpio35        	  	nqup1_se1            	w            	         s   i      qup-spi1-data-clk-state         	igpio32 gpio33 gpio34          	  	nqup1_se1            	w            	         s   h      qup-spi2-cs-state           	igpio39        	  	nqup1_se2            	w            	         s   l      qup-spi2-data-clk-state         	igpio36 gpio37 gpio38          	  	nqup1_se2            	w            	         s   k      qup-spi3-cs-state           	igpio43        	  	nqup1_se3            	w            	         s   o      qup-spi3-data-clk-state         	igpio40 gpio41 gpio42          	  	nqup1_se3            	w            	         s   n      qup-spi4-cs-state           	igpio47        	  	nqup1_se4            	w            	         s   r      qup-spi4-data-clk-state         	igpio44 gpio45 gpio46          	  	nqup1_se4            	w            	         s   q      qup-spi5-cs-state           	igpio55        	  	nqup1_se5            	w            	         s   y      qup-spi5-data-clk-state         	igpio52 gpio53 gpio54          	  	nqup1_se5            	w            	         s   x      qup-spi6-cs-state           	igpio51        	  	nqup1_se6            	w            	         s   |      qup-spi6-data-clk-state         	igpio48 gpio49 gpio50          	  	nqup1_se6            	w            	         s   {      qup-spi8-cs-state           	igpio59          	nqup2_se0_l3_mira            	w            	         s   7      qup-spi8-data-clk-state         	igpio56 gpio57 gpio58            	nqup2_se0_l2_mira            	w            	         s   6      qup-spi9-cs-state           	igpio63        	  	nqup2_se1            	w            	         s   :      qup-spi9-data-clk-state         	igpio60 gpio61 gpio62          	  	nqup2_se1            	w            	         s   9      qup-spi10-cs-state          	igpio67        	  	nqup2_se2            	w            	         s   =      qup-spi10-data-clk-state            	igpio64 gpio65 gpio66          	  	nqup2_se2            	w            	         s   <      qup-spi11-cs-state          	igpio71        	  	nqup2_se3            	w            	         s   @      qup-spi11-data-clk-state            	igpio68 gpio69 gpio70          	  	nqup2_se3            	w            	         s   ?      qup-spi12-cs-state          	igpio119       	  	nqup2_se4            	w            	         s   C      qup-spi12-data-clk-state            	igpio2 gpio3 gpio118       	  	nqup2_se4            	w            	         s   B      qup-spi13-cs-state          	igpio83        	  	nqup2_se5            	w            	         s   F      qup-spi13-data-clk-state            	igpio80 gpio81 gpio82          	  	nqup2_se5            	w            	         s   E      qup-spi15-cs-state          	igpio75        	  	nqup2_se7            	w            	         s   R      qup-spi15-data-clk-state            	igpio72 gpio106 gpio74         	  	nqup2_se7            	w            	         s   Q      qup-uart7-default-state         	igpio26 gpio27         	  	nqup1_se7            	w            	         s   }      qup-uart14-default-state            	igpio78 gpio79         	  	nqup2_se6            	w                     s   G      qup-uart14-cts-rts-state            	igpio76 gpio77         	  	nqup2_se6            	w                     s   H      sdc2-sleep-state       clk-pins          	  	isdc2_clk             	        	w         cmd-pins          	  	isdc2_cmd                     	w         data-pins         
  	isdc2_data                    	w            sdc2-default-state     clk-pins          	  	isdc2_clk             	        	w         cmd-pins          	  	isdc2_cmd                     	w   
      data-pins         
  	isdc2_data                    	w   
         bt-default-state             s  %   bt-en-pins          	igpio81          	ngpio            	w            	      sw-ctrl-pins            	igpio82          	ngpio                      sde-dsi-active-state            	igpio133         	ngpio            	w            	         s         sde-dsi-suspend-state           	igpio133         	ngpio            	w                     s         sde-te-active-state         	igpio86        
  	nmdp_vsync           	w                     s         sde-te-suspend-state            	igpio86        
  	nmdp_vsync           	w                     s         ts-irq-state            	igpio25          	ngpio            	w                     s   u      ts-reset-state          	igpio24          	ngpio            	w                     s   v      wcd-reset-n-active-state            	igpio108         	ngpio            	w            	         	         s        wlan-en-state           	igpio80          	ngpio            	w                     s  $         iommu@15000000        /   2qcom,sm8550-smmu-500 qcom,smmu-500 arm,mmu-500                                                              A          a          b          c          d          e          f          g          h          i          j          k          l          m          n          o          p          q          r          s          t          u          v                                                                                                                                 ;         <         =         >         ?         @         A         B         C         D         E         F         G         H         I         J         K         L         M         N         O         P         Q         R         S         T         U         V         W         X         Y                                                                                                                                                                                                                                                                                                   Q         s   /      interrupt-controller@17100000            2arm,gic-v3                                                =                                                            	                                     s      msi-controller@17140000          2arm,gic-v3-its                                                     s            timer@17420000           2arm,armv7-timer-mem              B                 =                                            frame@17421000           B    B                                                    frame@17423000           B0                               	         	  ^disabled          frame@17425000           BP                               
         	  ^disabled          frame@17427000           Bp                                        	  ^disabled          frame@17429000           B                                        	  ^disabled          frame@1742b000           B                                        	  ^disabled          frame@1742d000           B                                        	  ^disabled             rsc@17a00000          	  Wapps_rsc             2qcom,rpmh-rsc         @                                                               drv-0 drv-1 drv-2 drv-3       $                                                               )                                      !   bcm-voter            2qcom,bcm-voter           s          clock-controller             2qcom,sm8550-rpmh-clk             V           exo           {            s         power-controller             2qcom,sm8550-rpmhpd                     X            s      opp-table            2operating-points-v2          s      opp-16                   opp-48             0         s         opp-52             4      opp-56             8         s         opp-60             <      opp-64             @         s         opp-80             P      opp-128                     s         opp-144                  opp-192                     s         opp-256                     s         opp-320           @      opp-336           P      opp-384                 opp-416                       regulators-0             2qcom,pm8550-rpmh-regulators         9b           F           V           f           {   Y                      Y           Y           Y                                                bob1          
  vreg_bob1            2K         6 <l        N            s   Y      bob2          
  vreg_bob2            )         6 <l        N            s         ldo1            vreg_l1b_1p8             w@        6 w@        N         ldo2            vreg_l2b_3p0             -         6 -         N         ldo5            vreg_l5b_3p1             /]         6 /]         N            s         ldo6            vreg_l6b_1p8             w@        6 -         N         ldo7            vreg_l7b_1p8             w@        6 -         N         ldo8            vreg_l8b_1p8             w@        6 -         N         ldo9            vreg_l9b_2p9             -*        6 -         N         ldo11           vreg_l11b_1p2            O        6          N            s         ldo12           vreg_l12b_1p8            w@        6 w@        N            s         ldo13           vreg_l13b_3p0            -        6 -        N            s         ldo14           vreg_l14b_3p2            0         6 0         N            s   t      ldo15           vreg_l15b_1p8            w@        6 w@        N            s   V      ldo16           vreg_l16b_2p8            *        6 *        N         ldo17           vreg_l17b_2p5            &5@        6 &5@        N            s            regulators-1             2qcom,pm8550vs-rpmh-regulators           9c           e           s                 ldo3            vreg_l3c_0p9             m        6         N            regulators-2             2qcom,pm8550vs-rpmh-regulators           9d           e           s                 ldo1            vreg_l1d_0p88            m        6 	        N            s            regulators-3             2qcom,pm8550vs-rpmh-regulators           9e           e           s                                       smps4           vreg_s4e_0p95            @        6         N            s         smps5           vreg_s5e_1p08            z        6          N         ldo1            vreg_l1e_0p88            m        6 m        N            s         ldo2            vreg_l2e_0p9             @        6         N         ldo3            vreg_l3e_1p2             O        6 O        N            s            regulators-4             2qcom,pm8550ve-rpmh-regulators           9f           e           s                            smps4           vreg_s4f_0p5                      6 
`        N         ldo1            vreg_l1f_0p9                     6         N         ldo2            vreg_l2f_0p88            m        6         N         ldo3            vreg_l3f_0p88            m        6         N            s            regulators-5             2qcom,pm8550vs-rpmh-regulators           9g           e           s                                                                                   smps1           vreg_s1g_1p25            O        6          N         smps2           vreg_s2g_0p85            5         6 B@        N            s  (      smps3           vreg_s3g_0p8                     6 Q        N         smps4           vreg_s4g_1p25            O        6 @        N            s         smps5           vreg_s5g_0p85                     6 Q        N            s  '      smps6           vreg_s6g_1p86            w@        6         N            s         ldo1            vreg_l1g_1p2             O        6 O        N            s         ldo3            vreg_l3g_1p2             O        6 O        N            s            regulators-6             2qcom,pm8010-rpmh-regulators         9m                                                          Y   ldo1            vreg_l1m_1p056                    6          N         ldo2            vreg_l2m_1p056                    6          N         ldo3            vreg_l3m_2p8             *        6 *        N         ldo4            vreg_l4m_2p8             *        6 *        N         ldo5            vreg_l5m_1p8             w@        6 w@        N         ldo6            vreg_l6m_1p8             w@        6 w@        N         ldo7            vreg_l7m_2p9             *        6 ,O        N            regulators-7             2qcom,pm8010-rpmh-regulators         9n                                               Y           Y   ldo1            vreg_l1n_1p1             ؀        6 O        N         ldo2            vreg_l2n_1p1             ؀        6 O        N         ldo3            vreg_l3n_2p8             *        6 -        N         ldo4            vreg_l4n_2p8             *        6 2Z        N         ldo5            vreg_l5n_1p8             w@        6 w@        N         ldo6            vreg_l6n_3p3             *        6 2j@        N         ldo7            vreg_l7n_2p96            *        6 -*        N               cpufreq@17d91000          +   2qcom,sm8550-cpufreq-epss qcom,cpufreq-epss        0                                0              '  freq-domain0 freq-domain1 freq-domain2           {   )   0           exo alternate          $                                      $  dcvsh-irq-0 dcvsh-irq-1 dcvsh-irq-2         !            V            s         pmu@24091000          .   2qcom,sm8550-llcc-bwmon qcom,sc7280-llcc-bwmon                $	                       Q                                      X      opp-table            2operating-points-v2          s      opp-0           4 p      opp-1           4 ,h      opp-2           4 Z      opp-3           4 ci8      opp-4           4 y      opp-5           4 A      opp-6           4 H      opp-7           4 ։      opp-8           4 h            pmu@240b6400          (   2qcom,sm8550-cpu-bwmon qcom,sdm845-bwmon              $d                      E              3         3              X      opp-table            2operating-points-v2          s      opp-0           4 E      opp-1           4 l}p      opp-2           4       opp-3           4       opp-4           4 9`      opp-5           4 /(            interconnect@24100000            2qcom,sm8550-gem-noc              $                                        s   3      system-cache-controller@25000000             2qcom,sm8550-llcc          `       %               %               %@              %`              %              %                X  llcc0_base llcc1_base llcc2_base llcc3_base llcc_broadcast_base llcc_broadcast_and_base               
         interconnect@320c0000            2qcom,sm8550-nsp-noc              2                                        s         remoteproc@32300000          2qcom,sm8550-cdsp-pas                 20               @  v         B                                              #  wdog fatal ready handover stop-ack           {               exo                        
               cx mxc nsp                                                                                1stop            ^okay          .  qcom/sm8550/cdsp.mbn qcom/sm8550/cdsp_dtb.mbn      glink-edge          v   (                     (               Wcdsp                  fastrpc          2qcom,fastrpc            ]fastrpcglink-apps-dsp           Wcdsp             q                             compute-cb@1             2qcom,fastrpc-compute-cb                   $  J   /  a       /         /              Q      compute-cb@2             2qcom,fastrpc-compute-cb                   $  J   /  b       /         /              Q      compute-cb@3             2qcom,fastrpc-compute-cb                   $  J   /  c       /         /              Q      compute-cb@4             2qcom,fastrpc-compute-cb                   $  J   /  d       /         /              Q      compute-cb@5             2qcom,fastrpc-compute-cb                   $  J   /  e       /         /              Q      compute-cb@6             2qcom,fastrpc-compute-cb                   $  J   /  f       /         /              Q      compute-cb@7             2qcom,fastrpc-compute-cb                   $  J   /  g       /         /              Q      compute-cb@8             2qcom,fastrpc-compute-cb                   $  J   /  h       /         /              Q                  thermal-zones      aoss0-thermal           B          trips      thermal-engine-config           R H        ^           Epassive       reset-mon-config            R 8        ^           Epassive             cpuss0-thermal          B         trips      thermal-engine-config           R H        ^           Epassive       reset-mon-config            R 8        ^           Epassive             cpuss1-thermal          B         trips      thermal-engine-config           R H        ^           Epassive       reset-mon-config            R 8        ^           Epassive             cpuss2-thermal          B         trips      thermal-engine-config           R H        ^           Epassive       reset-mon-config            R 8        ^           Epassive             cpuss3-thermal          B         trips      thermal-engine-config           R H        ^           Epassive       reset-mon-config            R 8        ^           Epassive             cpu3-top-thermal            B         trips      trip-point0         R _        ^           Epassive       trip-point1         R s        ^           Epassive       cpu-critical            R         ^        	   Ecritical                cpu3-bottom-thermal         B         trips      trip-point0         R _        ^           Epassive       trip-point1         R s        ^           Epassive       cpu-critical            R         ^        	   Ecritical                cpu4-top-thermal            B         trips      trip-point0         R _        ^           Epassive       trip-point1         R s        ^           Epassive       cpu-critical            R         ^        	   Ecritical                cpu4-bottom-thermal         B         trips      trip-point0         R _        ^           Epassive       trip-point1         R s        ^           Epassive       cpu-critical            R         ^        	   Ecritical                cpu5-top-thermal            B      	   trips      trip-point0         R _        ^           Epassive       trip-point1         R s        ^           Epassive       cpu-critical            R         ^        	   Ecritical                cpu5-bottom-thermal         B      
   trips      trip-point0         R _        ^           Epassive       trip-point1         R s        ^           Epassive       cpu-critical            R         ^        	   Ecritical                cpu6-top-thermal            B         trips      trip-point0         R _        ^           Epassive       trip-point1         R s        ^           Epassive       cpu-critical            R         ^        	   Ecritical                cpu6-bottom-thermal         B         trips      trip-point0         R _        ^           Epassive       trip-point1         R s        ^           Epassive       cpu-critical            R         ^        	   Ecritical                cpu7-top-thermal            B         trips      trip-point0         R _        ^           Epassive       trip-point1         R s        ^           Epassive       cpu-critical            R         ^        	   Ecritical                cpu7-middle-thermal         B         trips      trip-point0         R _        ^           Epassive       trip-point1         R s        ^           Epassive       cpu-critical            R         ^        	   Ecritical                cpu7-bottom-thermal         B         trips      trip-point0         R _        ^           Epassive       trip-point1         R s        ^           Epassive       cpu-critical            R         ^        	   Ecritical                aoss1-thermal           B          trips      thermal-engine-config           R H        ^           Epassive       reset-mon-config            R 8        ^           Epassive             cpu0-thermal            B         trips      trip-point0         R _        ^           Epassive       trip-point1         R s        ^           Epassive       cpu-critical            R         ^        	   Ecritical                cpu1-thermal            B         trips      trip-point0         R _        ^           Epassive       trip-point1         R s        ^           Epassive       cpu-critical            R         ^        	   Ecritical                cpu2-thermal            B         trips      trip-point0         R _        ^           Epassive       trip-point1         R s        ^           Epassive       cpu-critical            R         ^        	   Ecritical                cdsp0-thermal           i   
        B         trips      thermal-engine-config           R H        ^           Epassive       thermal-hal-config          R H        ^           Epassive       reset-mon-config            R 8        ^           Epassive       junction-config         R s        ^           Epassive             cdsp1-thermal           i   
        B         trips      thermal-engine-config           R H        ^           Epassive       thermal-hal-config          R H        ^           Epassive       reset-mon-config            R 8        ^           Epassive       junction-config         R s        ^           Epassive             cdsp2-thermal           i   
        B         trips      thermal-engine-config           R H        ^           Epassive       thermal-hal-config          R H        ^           Epassive       reset-mon-config            R 8        ^           Epassive       junction-config         R s        ^           Epassive             cdsp3-thermal           i   
        B         trips      thermal-engine-config           R H        ^           Epassive       thermal-hal-config          R H        ^           Epassive       reset-mon-config            R 8        ^           Epassive       junction-config         R s        ^           Epassive             video-thermal           B         trips      thermal-engine-config           R H        ^           Epassive       reset-mon-config            R 8        ^           Epassive             mem-thermal         i   
        B      	   trips      thermal-engine-config           R H        ^           Epassive       ddr0-config         R _        ^           Epassive       reset-mon-config            R 8        ^           Epassive             modem0-thermal          B      
   trips      thermal-engine-config           R H        ^           Epassive       mdmss0-config0          R p        ^           Epassive       mdmss0-config1          R (        ^           Epassive       reset-mon-config            R 8        ^           Epassive             modem1-thermal          B         trips      thermal-engine-config           R H        ^           Epassive       mdmss1-config0          R p        ^           Epassive       mdmss1-config1          R (        ^           Epassive       reset-mon-config            R 8        ^           Epassive             modem2-thermal          B         trips      thermal-engine-config           R H        ^           Epassive       mdmss2-config0          R p        ^           Epassive       mdmss2-config1          R (        ^           Epassive       reset-mon-config            R 8        ^           Epassive             modem3-thermal          B         trips      thermal-engine-config           R H        ^           Epassive       mdmss3-config0          R p        ^           Epassive       mdmss3-config1          R (        ^           Epassive       reset-mon-config            R 8        ^           Epassive             camera0-thermal         B         trips      thermal-engine-config           R H        ^           Epassive       reset-mon-config            R 8        ^           Epassive             camera1-thermal         B         trips      thermal-engine-config           R H        ^           Epassive       reset-mon-config            R 8        ^           Epassive             aoss2-thermal           B          trips      thermal-engine-config           R H        ^           Epassive       reset-mon-config            R 8        ^           Epassive             gpuss-0-thermal         i   
        B         cooling-maps       map0                                  trips      trip-point0         R L        ^           Epassive          s         trip-point1         R _        ^           Ehot       trip-point2         R         ^        	   Ecritical                gpuss-1-thermal         i   
        B         cooling-maps       map0                                 trips      trip-point0         R L        ^           Epassive          s        trip-point1         R _        ^           Ehot       trip-point2         R         ^        	   Ecritical                gpuss-2-thermal         i   
        B         cooling-maps       map0                                 trips      trip-point0         R L        ^           Epassive          s        trip-point1         R _        ^           Ehot       trip-point2         R         ^        	   Ecritical                gpuss-3-thermal         i   
        B         cooling-maps       map0                                 trips      trip-point0         R L        ^           Epassive          s        trip-point1         R _        ^           Ehot       trip-point2         R         ^        	   Ecritical                gpuss-4-thermal         i   
        B         cooling-maps       map0                                 trips      trip-point0         R L        ^           Epassive          s        trip-point1         R _        ^           Ehot       trip-point2         R         ^        	   Ecritical                gpuss-5-thermal         i   
        B         cooling-maps       map0                                 trips      trip-point0         R L        ^           Epassive          s        trip-point1         R _        ^           Ehot       trip-point2         R         ^        	   Ecritical                gpuss-6-thermal         i   
        B         cooling-maps       map0                                 trips      trip-point0         R L        ^           Epassive          s        trip-point1         R _        ^           Ehot       trip-point2         R         ^        	   Ecritical                gpuss-7-thermal         i   
        B         cooling-maps       map0                                 trips      trip-point0         R L        ^           Epassive          s        trip-point1         R _        ^           Ehot       trip-point2         R         ^        	   Ecritical                pm8010-m-thermal            i   d        B  	   trips      trip0           R s        ^             Epassive       trip1           R 8        ^             Ehot             pm8010-n-thermal            i   d        B  
   trips      trip0           R s        ^             Epassive       trip1           R 8        ^             Ehot             pm8550-thermal          i   d        B     trips      trip0           R s        ^             Epassive       trip1           R 8        ^             Ehot             pm8550b-thermal         i   d        B     trips      trip0           R s        ^             Epassive       trip1           R 8        ^             Ehot             pm8550ve-thermal            i   d        B     trips      trip0           R s        ^             Epassive       trip1           R 8        ^             Ehot             pm8550vs-c-thermal          i   d        B     trips      trip0           R s        ^             Epassive       trip1           R 8        ^             Ehot             pm8550vs-d-thermal          i   d        B     trips      trip0           R s        ^             Epassive       trip1           R 8        ^             Ehot             pm8550vs-e-thermal          i   d        B     trips      trip0           R s        ^             Epassive       trip1           R 8        ^             Ehot             pm8550vs-g-thermal          i   d        B     trips      trip0           R s        ^             Epassive       trip1           R 8        ^             Ehot             pmr735d-k-thermal           i   d        B     trips      trip0           R s        ^             Epassive       trip1           R 8        ^             Ehot             pmr735d-l-thermal           i   d        B     trips      trip0           R s        ^             Epassive       trip1           R 8        ^             Ehot                timer            2arm,armv8-timer       0                                
        reboot-mode          2nvmem-reboot-mode                     reboot-mode                             aliases       $  /soc@0/geniqup@ac0000/serial@a9c000       $  /soc@0/geniqup@8c0000/serial@898000       audio-codec          2qcom,wcd9385-codec          qdefault                    w@         w@         w@        & w@         > $ I                   e           P                            y   s   l              V           V           V           Y                    s        gpio-keys         
   2gpio-keys                     qdefault    key-volume-up         
  WVolume Up           \   s                                              +         pmic-glink        '   2qcom,sm8550-pmic-glink qcom,pmic-glink                                    9   s          connector@0          2usb-c-connector                      Kdual            Vdual       ports                                port@0                  endpoint            R           s            port@1                 endpoint            R           s   W         port@2                 endpoint            R           s   Z                  sound         (   2qcom,sm8550-sndcard qcom,sm8450-sndcard          ,SM8550-QRD         `SpkrLeft IN WSA_SPK1 OUT SpkrRight IN WSA_SPK2 OUT IN1_HPHL HPHL_OUT IN2_HPHR HPHR_OUT AMIC1 MIC BIAS1 AMIC2 MIC BIAS2 AMIC3 MIC BIAS3 AMIC4 MIC BIAS3 AMIC5 MIC BIAS4 VA DMIC0 MIC BIAS1 VA DMIC1 MIC BIAS1 VA DMIC2 MIC BIAS3 TX DMIC0 MIC BIAS1 TX DMIC1 MIC BIAS2 TX DMIC2 MIC BIAS3 TX SWR_INPUT0 ADC1_OUTPUT TX SWR_INPUT1 ADC2_OUTPUT TX SWR_INPUT0 ADC3_OUTPUT TX SWR_INPUT1 ADC4_OUTPUT       wcd-playback-dai-link           nWCD Playback       cpu         x     q      codec           x                         platform            x           wcd-capture-dai-link            nWCD Capture    cpu         x     x      codec           x                         platform            x           wsa-dai-link            nWSA Playback       cpu         x     i      codec           x  !  "  #                 platform            x           va-dai-link         nVA Capture     cpu         x     x      codec           x             platform            x              vph-pwr-regulator            2regulator-fixed         vph_pwr          8u         6 8u                            s         wcn7850-pmu          2qcom,wcn7850-pmu            qdefault           $  %  &           s   P               s   Q              '        
A   V          (                              
      regulators     ldo0            vreg_pmu_rfa_cmn             s   I      ldo1            vreg_pmu_aon_0p59            s   J      ldo2            vreg_pmu_wlcx_0p8            s   K      ldo3            vreg_pmu_wlmx_0p85           s   L      ldo4            vreg_pmu_btcmx_0p85       ldo5            vreg_pmu_rfa_0p8             s   M      ldo6            vreg_pmu_rfa_1p2             s   N      ldo7            vreg_pmu_rfa_1p8             s   O      ldo8            vreg_pmu_pcie_0p9            s         ldo9            vreg_pmu_pcie_1p8            s                  	interrupt-parent #address-cells #size-cells model compatible chassis-type stdout-path #clock-cells clock-frequency phandle clocks clock-mult clock-div device_type reg enable-method next-level-cache power-domains power-domain-names qcom,freq-domain capacity-dmips-mhz dynamic-power-coefficient #cooling-cells cache-level cache-unified cpu entry-method idle-state-name arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us local-timer-stop qcom,dload-mode interconnects #interconnect-cells qcom,bcm-voters interrupts #power-domain-cells domain-idle-states ranges no-map hwlocks qcom,client-id qcom,vmid qcom,smem interrupts-extended mboxes qcom,local-pid qcom,remote-pid qcom,entry-name #qcom,smem-state-cells interrupt-controller #interrupt-cells dma-ranges #reset-cells #mbox-cells #dma-cells dma-channels dma-channel-mask iommus dma-coherent status clock-names pinctrl-names pinctrl-0 interconnect-names dmas dma-names vddrfacmn-supply vddaon-supply vddwlcx-supply vddwlmx-supply vddrfa0p8-supply vddrfa1p2-supply vddrfa1p8-supply max-speed vcc-supply retimer-switch orientation-switch remote-endpoint data-lanes mode-switch reset-gpios avdd-supply spi-max-frequency touchscreen-size-x touchscreen-size-y reg-names bus-range linux,pci-domain num-lanes interrupt-names interrupt-map-mask interrupt-map msi-map iommu-map resets reset-names phys phy-names wake-gpios perst-gpios vddpcie0p9-supply vddpcie1p8-supply assigned-clocks assigned-clock-rates clock-output-names #phy-cells vdda-phy-supply vdda-pll-supply qcom,ee qcom,num-ees num-channels qcom,controlled-remotely lanes-per-direction required-opps operating-points-v2 qcom,ice vcc-max-microamp vccq-supply vccq-max-microamp vdd-hba-supply opp-hz #hwlock-cells qcom,gmu memory-region firmware-name opp-level qcom,qmp #iommu-cells #global-interrupts qcom,smem-states qcom,smem-state-names qcom,gsi-loader label qcom,glink-channels qcom,non-secure-domain qcom,domain qcom,intents #sound-dai-cells qcom,protection-domain qcom,din-ports qcom,dout-ports qcom,ports-sinterval qcom,ports-offset1 qcom,ports-offset2 qcom,ports-hstart qcom,ports-hstop qcom,ports-word-length qcom,ports-block-pack-mode qcom,ports-block-group-count qcom,ports-lane-control qcom,rx-port-mapping powerdown-gpios sound-name-prefix vdd-1p8-supply vdd-io-supply qcom,port-mapping qcom,ports-sinterval-low qcom,tx-port-mapping gpio-controller #gpio-cells gpio-ranges pins function drive-strength slew-rate bias-disable bias-bus-hold output-high input-enable output-low qcom,dll-config qcom,ddr-config bus-width sdhci-caps-mask pinctrl-1 assigned-clock-parents vdda-supply vci-supply vddio-supply vdds-supply vdda12-supply snps,hird-threshold snps,usb2-gadget-lpm-disable snps,dis_u2_susphy_quirk snps,dis_enblslpm_quirk snps,dis-u1-entry-quirk snps,dis-u2-entry-quirk snps,is-utmi-l1-suspend snps,usb3_lpm_capable snps,usb2-lpm-disable snps,has-lpm-erratum tx-fifo-resize usb-role-switch qcom,pdc-ranges #qcom,sensors #thermal-sensor-cells qcom,channel qcom,bus-id power-source bias-pull-up color led-sources led-max-microamp flash-max-microamp flash-max-timeout-us function-enumerator #pwm-cells vdd18-supply vdd3-supply linux,code bits input-disable output-enable wakeup-parent gpio-reserved-ranges bias-pull-down #redistributor-regions redistributor-stride msi-controller #msi-cells frame-number qcom,tcs-offset qcom,drv-id qcom,tcs-config qcom,pmic-id vdd-bob1-supply vdd-bob2-supply vdd-l1-l4-l10-supply vdd-l2-l13-l14-supply vdd-l3-supply vdd-l5-l16-supply vdd-l6-l7-supply vdd-l8-l9-supply vdd-l11-supply vdd-l12-supply vdd-l15-supply vdd-l17-supply regulator-name regulator-min-microvolt regulator-max-microvolt regulator-initial-mode vdd-l1-supply vdd-l2-supply vdd-s4-supply vdd-s5-supply vdd-s1-supply vdd-s2-supply vdd-s3-supply vdd-s6-supply vdd-l1-l2-supply vdd-l3-l4-supply vdd-l5-supply vdd-l6-supply vdd-l7-supply #freq-domain-cells opp-peak-kBps thermal-sensors temperature hysteresis polling-delay-passive trip cooling-device nvmem-cells nvmem-cell-names mode-recovery mode-bootloader serial0 serial1 qcom,micbias1-microvolt qcom,micbias2-microvolt qcom,micbias3-microvolt qcom,micbias4-microvolt qcom,mbhc-buttons-vthreshold-microvolt qcom,mbhc-headset-vthreshold-microvolt qcom,mbhc-headphone-vthreshold-microvolt qcom,rx-device qcom,tx-device vdd-buck-supply vdd-rxtx-supply vdd-mic-bias-supply debounce-interval linux,can-disable wakeup-source orientation-gpios power-role data-role audio-routing link-name sound-dai regulator-always-on regulator-boot-on wlan-enable-gpios bt-enable-gpios vdddig-supply 