 =   8 X   (            (X                                                                     '   ,Qualcomm Technologies, Inc. SM8650 HDK           2qcom,sm8650-hdk qcom,sm8650       	   =embedded       chosen           Jserial0:115200n8          clocks     xo-board             2fixed-clock          V             c          s         sleep-clk            2fixed-clock          V             c           s   *      bi-tcxo-div2-clk             2fixed-factor-clock           V             {                                        s   (      bi-tcxo-ao-div2-clk          2fixed-factor-clock           V             {                                       s   )         cpus                                 cpu@0            cpu          2arm,cortex-a520                           {                            psci             psci                                        d                       %            s      l2-cache             2cache           4            @                     s      l3-cache             2cache           4            @         s               cpu@100          cpu          2arm,cortex-a520                          {                            psci             psci                                        d                       %            s         cpu@200          cpu          2arm,cortex-a720                          {                           psci             psci                	                                              %            s      l2-cache             2cache           4            @                     s   	         cpu@300          cpu          2arm,cortex-a720                          {                  
         psci             psci                                                              %            s      l2-cache             2cache           4            @                     s            cpu@400          cpu          2arm,cortex-a720                          {                           psci             psci                                                              %            s      l2-cache             2cache           4            @                     s            cpu@500          cpu          2arm,cortex-a720                          {                           psci             psci                                                              %            s      l2-cache             2cache           4            @                     s            cpu@600          cpu          2arm,cortex-a720                          {                           psci             psci                                                              %            s      l2-cache             2cache           4            @                     s            cpu@700          cpu          2arm,cortex-x4                            {                           psci             psci                           f           L                      %            s      l2-cache             2cache           4            @                     s            cpu-map    cluster0       core0           N         core1           N         core2           N         core3           N         core4           N         core5           N         core6           N         core7           N               idle-states         Rpsci       cpu-sleep-0-0            2arm,idle-state          _silver-rail-power-collapse          o@            &                    ,                  s   !      cpu-sleep-1-0            2arm,idle-state          _gold-rail-power-collapse            o@            X                                      s   "      cpu-sleep-2-0            2arm,idle-state          _gold-plus-rail-power-collapse           o@                      F          8                  s   #         domain-idle-states     cluster-sleep-0          2domain-idle-state           oA  D                    	.          #         s   $      cluster-sleep-1          2domain-idle-state           oA D          
          0          '         s   %            firmware       scm          2qcom,scm-sm8650 qcom,scm                                                    s  )         interconnect-0           2qcom,sm8650-clk-virt                                   s   1      interconnect-1           2qcom,sm8650-mc-virt                                s         memory@a0000000          memory                                pmu-a520             2arm,cortex-a520-pmu                        pmu-a720             2arm,cortex-a720-pmu                        pmu-x4           2arm,cortex-x4-pmu                          psci             2arm,psci-1.0             smc    power-domain-cpu0                                    *   !         s         power-domain-cpu1                                    *   !         s         power-domain-cpu2                                    *   "         s         power-domain-cpu3                                    *   "         s   
      power-domain-cpu4                                    *   "         s         power-domain-cpu5                                    *   "         s         power-domain-cpu6                                    *   "         s         power-domain-cpu7                                    *   #         s         power-domain-cluster                        *   $   %         s             reserved-memory                                   =         s  *   hyp@80000000                                    D         s  +      cpusys-vm@80e00000                      @           D         s  ,      xbl-dt-log-merged@81a00000                      &           D         s  -      aop-cmd-db@81c60000          2qcom,cmd-db                                D         s  .      aop-tme-uefi-merged@81c80000                        P          D         s  /      smem@81d00000         
   2qcom,smem                                  K   &            D         s  0      adsp-mhi@81f00000                                  D         s  1      pvmfw@824a0000               J                  D         s  2      global-sync@82600000                 `                  D         s         tz-stat@82700000                 p                  D         s  3      qdss@82800000                                  D         s  4      qlink-logging@84800000                                  D         s         mpss-dsm@86b00000                                 D         s         mpss-dsm-2@8b400000              @                  D         s         mpss@8bc00000                      @           D         s         q6-mpss-dtb@9b000000                                    D         s         ipa-fw@9b080000                                D         s         ipa-gsi@9b090000                 	                  D         s  5      gpu-micro-code@9b09a000              	                  D         s         spss@9b0a0000                
                  D         s  6      spu-tz-shared@9b280000               (                  D         s  7      spu-modem-shared@9b2e0000                .                  D         s  8      camera@9b300000              0                  D         s  9      video@9bb00000                                 D         s  :      cvp@9c300000                 0       p           D         s  ;      cdsp@9ca00000                      @           D         s         q6-cdsp-dtb@9de00000                                   D         s         q6-adsp-dtb@9de80000                                   D         s         adspslpi@9df00000                                 D         s         rmtfs@d7c00000           2qcom,rmtfs-mem                      @           D        S           b            s  <      tz-merged@d8000000                                  D         s  =      hwfence-shbuf@e6440000               D       -          D         s  >      trust-ui-vm@f3800000                       @           D         s  ?      oem-vm@f7c00000                               D         s  @      llcc-lpi@ff800000                       `           D         s  A         smp2p-adsp           2qcom,smp2p          l   '                    '                                            master-kernel           master-kernel                       s         slave-kernel            slave-kernel                                 s            smp2p-cdsp           2qcom,smp2p          l   '                    '                 ^                            master-kernel           master-kernel                       s         slave-kernel            slave-kernel                                 s            smp2p-modem          2qcom,smp2p          l   '                    '                                            master-kernel           master-kernel                       s         slave-kernel            slave-kernel                                 s         ipa-ap-to-modem         ipa                     s         ipa-modem-to-ap         ipa                              s            soc@0            2simple-bus                                                                  =                                s  B   clock-controller@100000          2qcom,sm8650-gcc                      B       @   {   (   )   *   +   ,       ,      -       -      -      .             V                                  s   0      mailbox@406000           2qcom,sm8650-ipcc qcom,ipcc                @`                                                                  s   '      dma-controller@800000         (   2qcom,sm8650-gpi-dma qcom,sm6350-gpi-dma                                      L         M         N         O         P         Q         R         S         T         U         V         W           !           .   ?        ?           J   /  6             Q      	  ^disabled             s   4      geniqup@8c0000           2qcom,geni-se-qup                                     {   0      0           em-ahb s-ahb         J   /  #             Q                                  =        ^okay             s  C   i2c@880000           2qcom,geni-i2c                         @               u            {   0   v        ese        H     1         1         2         3                                qqup-core qup-config qup-memory              4              4                  tx rx              5        default                                 	  ^disabled             s  D      spi@880000           2qcom,geni-spi                         @               u            {   0   v        ese        H     1         1         2         3                                qqup-core qup-config qup-memory              4              4                  tx rx              6   7        default                                 	  ^disabled             s  E      i2c@884000           2qcom,geni-i2c                 @       @               G            {   0   x        ese        H     1         1         2         3                                qqup-core qup-config qup-memory              4             4                 tx rx              8        default                                 	  ^disabled             s  F      spi@884000           2qcom,geni-spi                 @       @               G            {   0   x        ese        H     1         1         2         3                                qqup-core qup-config qup-memory              4             4                 tx rx              9   :        default                                 	  ^disabled             s  G      i2c@888000           2qcom,geni-i2c                        @               H            {   0   z        ese        H     1         1         2         3                                qqup-core qup-config qup-memory              4             4                 tx rx              ;        default                                 	  ^disabled             s  H      spi@888000           2qcom,geni-spi                        @               H            {   0   z        ese        H     1         1         2         3                                qqup-core qup-config qup-memory              4             4                 tx rx              <   =        default                                 	  ^disabled             s  I      i2c@88c000           2qcom,geni-i2c                        @               I            {   0   |        ese        H     1         1         2         3                                qqup-core qup-config qup-memory              4             4                 tx rx              >        default                                 	  ^disabled             s  J      spi@88c000           2qcom,geni-spi                        @               I            {   0   |        ese        H     1         1         2         3                                qqup-core qup-config qup-memory              4             4                 tx rx              ?   @        default                                 	  ^disabled             s  K      i2c@890000           2qcom,geni-i2c                         @               J            {   0   ~        ese        H     1         1         2         3                                qqup-core qup-config qup-memory              4             4                 tx rx              A        default                                 	  ^disabled             s  L      spi@890000           2qcom,geni-spi                         @               J            {   0   ~        ese        H     1         1         2         3                                qqup-core qup-config qup-memory              4             4                 tx rx              B   C        default                                 	  ^disabled             s  M      i2c@894000           2qcom,geni-i2c                 @       @               K            {   0           ese        H     1         1         2         3                                qqup-core qup-config qup-memory              4             4                 tx rx              D        default                                 	  ^disabled             s  N      spi@894000           2qcom,geni-spi                 @       @               K            {   0           ese        H     1         1         2         3                                qqup-core qup-config qup-memory              4             4                 tx rx              E   F        default                                 	  ^disabled             s  O      serial@898000            2qcom,geni-uart                       @                           {   0           ese        0     1         1         2         3              qqup-core qup-config            G   H        default         ^okay             s  P   bluetooth            2qcom,wcn7850-bt            I           J           K           L           M           N        
   O         0          serial@89c000            2qcom,geni-debug-uart                         @                           {   0           ese        0     1         1         2         3              qqup-core qup-config            P        default         ^okay             s  Q         geniqup@9c0000           2qcom,geni-se-i2c-master-hub                                  {   0   \        es-ahb                                     =      	  ^disabled             s  R   i2c@980000           2qcom,geni-i2c-master-hub                          @                           {   0   H   0   G        ese core       0     1          1         2         3              qqup-core qup-config            Q        default                                 	  ^disabled             s  S      i2c@984000           2qcom,geni-i2c-master-hub                  @       @                           {   0   J   0   G        ese core       0     1          1         2         3              qqup-core qup-config            R        default                                 	  ^disabled             s  T      i2c@988000           2qcom,geni-i2c-master-hub                         @                           {   0   L   0   G        ese core       0     1          1         2         3              qqup-core qup-config            S        default                                 	  ^disabled             s  U      i2c@98c000           2qcom,geni-i2c-master-hub                         @                           {   0   N   0   G        ese core       0     1          1         2         3              qqup-core qup-config            T        default                                 	  ^disabled             s  V      i2c@990000           2qcom,geni-i2c-master-hub                          @                           {   0   P   0   G        ese core       0     1          1         2         3              qqup-core qup-config            U        default                                 	  ^disabled             s  W      i2c@994000           2qcom,geni-i2c-master-hub                  @       @                           {   0   R   0   G        ese core       0     1          1         2         3              qqup-core qup-config            V        default                                 	  ^disabled             s  X      i2c@998000           2qcom,geni-i2c-master-hub                         @                           {   0   T   0   G        ese core       0     1          1         2         3              qqup-core qup-config            W        default                                 	  ^disabled             s  Y      i2c@99c000           2qcom,geni-i2c-master-hub                         @                           {   0   V   0   G        ese core       0     1          1         2         3              qqup-core qup-config            X        default                                 	  ^disabled             s  Z      i2c@9a0000           2qcom,geni-i2c-master-hub                          @                           {   0   X   0   G        ese core       0     1          1         2         3              qqup-core qup-config            Y        default                                 	  ^disabled             s  [      i2c@9a4000           2qcom,geni-i2c-master-hub                  @       @                           {   0   Z   0   G        ese core       0     1          1         2         3              qqup-core qup-config            Z        default                                 	  ^disabled             s  \         dma-controller@a00000         (   2qcom,sm8650-gpi-dma qcom,sm6350-gpi-dma                                                                                            %         &         '         (         )         *           !           .           ?           J   /                Q        ^okay             s   \      geniqup@ac0000           2qcom,geni-se-qup                                     {   0      0           em-ahb s-ahb            1         1            	  qqup-core            J   /               Q                                  =        ^okay             s  ]   i2c@a80000           2qcom,geni-i2c                         @               a            {   0   a        ese        H     1         1         2         3         [                       qqup-core qup-config qup-memory              \              \                  tx rx              ]        default                                 	  ^disabled             s  ^      spi@a80000           2qcom,geni-spi                         @               a            {   0   a        ese        H     1         1         2         3         [                       qqup-core qup-config qup-memory              \              \                  tx rx              ^   _        default                                 	  ^disabled             s  _      i2c@a84000           2qcom,geni-i2c                 @       @               b            {   0   c        ese        H     1         1         2         3         [                       qqup-core qup-config qup-memory              \             \                 tx rx              `        default                                 	  ^disabled             s  `      spi@a84000           2qcom,geni-spi                 @       @               b            {   0   c        ese        H     1         1         2         3         [                       qqup-core qup-config qup-memory              \             \                 tx rx              a   b        default                                 	  ^disabled             s  a      i2c@a88000           2qcom,geni-i2c                        @               c            {   0   e        ese        H     1         1         2         3         [                       qqup-core qup-config qup-memory              \             \                 tx rx              c        default                                 	  ^disabled             s  b      spi@a88000           2qcom,geni-spi                        @               c            {   0   e        ese        H     1         1         2         3         [                       qqup-core qup-config qup-memory              \             \                 tx rx              d   e        default                                 	  ^disabled             s  c      i2c@a8c000           2qcom,geni-i2c                        @               d            {   0   g        ese        H     1         1         2         3         [                       qqup-core qup-config qup-memory              \             \                 tx rx              f        default                                   ^okay             s  d   typec-mux@e       &   2qcom,wcd9395-usbss qcom,wcd9390-usbss                       %   g        0   h                <         H         s  e   ports                                port@0                  endpoint            [   i         s                    spi@a8c000           2qcom,geni-spi                        @               d            {   0   g        ese        H     1         1         2         3         [                       qqup-core qup-config qup-memory              \             \                 tx rx              j   k        default                                 	  ^disabled             s  f      i2c@a90000           2qcom,geni-i2c                         @               e            {   0   i        ese        H     1         1         2         3         [                       qqup-core qup-config qup-memory              \             \                 tx rx              l        default                                 	  ^disabled             s  g      spi@a90000           2qcom,geni-spi                         @               e            {   0   i        ese        H     1         1         2         3         [                       qqup-core qup-config qup-memory              \             \                 tx rx              m   n        default                                 	  ^disabled             s  h      i2c@a94000           2qcom,geni-i2c                 @       @               f            {   0   k        ese        H     1         1         2         3         [                       qqup-core qup-config qup-memory              \             \                 tx rx              o        default                                 	  ^disabled             s  i      spi@a94000           2qcom,geni-spi                 @       @               f            {   0   k        ese        H     1         1         2         3         [                       qqup-core qup-config qup-memory              \             \                 tx rx              p   q        default                                 	  ^disabled             s  j      i2c@a98000           2qcom,geni-i2c                        @               k            {   0   m        ese        H     1         1         2         3         [                       qqup-core qup-config qup-memory              \             \                 tx rx              r        default                                   ^okay             c          s  k   hdmi-bridge@2b           2lontium,lt9611uxc               +        l   h   U           0   h               %   s        k   t           u   v        default          s  l   ports                                port@0                  endpoint            [   w         s            port@2                 endpoint            [   x         s                    spi@a98000           2qcom,geni-spi                        @               k            {   0   m        ese        H     1         1         2         3         [                       qqup-core qup-config qup-memory              \             \                 tx rx              y   z        default                                 	  ^disabled             s  m      i2c@a9c000           2qcom,geni-i2c                        @               C            {   0   o        ese        H     1         1         2         3         [                       qqup-core qup-config qup-memory              \             \                 tx rx              {        default                                 	  ^disabled             s  n      spi@a9c000           2qcom,geni-spi                        @               C            {   0   o        ese        H     1         1         2         3         [                       qqup-core qup-config qup-memory              \             \                 tx rx              |   }        default                                 	  ^disabled             s  o         interconnect@1500000             2qcom,sm8650-cnoc-main                P       @                               s         interconnect@1600000             2qcom,sm8650-config-noc               `        b                                s   3      interconnect@1680000             2qcom,sm8650-system-noc               h       Ѐ                               s  p      interconnect@16c0000             2qcom,sm8650-pcie-anoc                l       "          {   0       0   	                               s   ~      interconnect@16e0000             2qcom,sm8650-aggre1-noc               n       d          {   0      0                                  s   [      interconnect@1700000             2qcom,sm8650-aggre2-noc               p                 {                                     s         interconnect@1780000             2qcom,sm8650-mmss-noc                 x                                       s         rng@10c3000          2qcom,sm8650-trng qcom,trng               0                 s  q      pcie@1c00000             pci       "   2qcom,pcie-sm8650 qcom,pcie-sm8550         P               0     `             `             `             `                 vparf dbi elbi atu config          `                                                                                        (  msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7       @   {   0   $   0   &   0   '   0   ,   0   -   0      0       0         I  eaux cfg bus_master bus_slave slave_q2a ddrss_sf_tbu noc_aggr cnoc_sf_axi               0           pci       0     ~                  2                       qpcie-mem cpu-pcie               0                    /            /                                                                                                                                                                                                                                                                                            +        pciephy                                8  =               `                 `0      `0                 Q        ^okay               h   `            "   h   ^                      default          s  r   pcie@0           pci                                                                              =         s  s   wifi@0           2pci17cb,1107                                           I           J           K           L           M           N        
   O        .           @               phy@1c06000           2qcom,sm8650-qmp-gen3x2-pcie-phy              `               (   {   0   $   0   &          0   (   0   *        eaux cfg_ahb ref rchng pipe          R   0   (        b            0           phy             0            V            wpcie0_pipe_clk                      ^okay                                   s   +      pcie@1c08000             pci       "   2qcom,pcie-sm8650 qcom,pcie-sm8550         P              0     @             @             @             @                 vparf dbi elbi atu config          `        3         4         5         8         9         :         v         w         (  msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7       @   {   0   .   0   0   0   1   0   8   0   9   0      0       0         I  eaux cfg bus_master bus_slave slave_q2a ddrss_sf_tbu noc_aggr cnoc_sf_axi            R   0   .        b$            0      0   	        pci link_down         0     ~                  2                       qpcie-mem cpu-pcie               0                   /           /                                                                                                                                                                                                                                                                                      ,        pciephy          Q                               8  =               @                 @0      @0                ^okay               h   c            "   h   a                      default          s  t   pcie@0           pci                                                                              =         phy@1c0e000           2qcom,sm8650-qmp-gen4x2-pcie-phy                             (   {   0   2   0   0         0   4   0   6        eaux cfg_ahb ref rchng pipe          R   0   4        b            0      0   
        phy phy_nocsr               0            V           wpcie1_pipe_clk                      ^okay                                              s   ,      dma-controller@1dc4000           2qcom,bam-v1.7.0              @                                ?           J   /         /                                                          s         crypto@1dfa000        )   2qcom,sm8650-qce qcom,sm8150-qce qcom,qce                 ߠ       `                                   qmemory                              rx tx           J   /         /               s  u      phy@1d80000          2qcom,sm8650-qmp-ufs-phy                                 {          0                 eref ref_aux qref                           ufsphy              0            V                       ^okay                                   s   -      ufs@1d84000       +   2qcom,sm8650-ufshc qcom,ufshc jedec,ufs-2.0               @       0               	         @   {   0      0      0      0            0      0      0         n  ecore_clk bus_aggr_clk iface_clk core_clk_unipro ref_clk tx_lane0_sync_clk rx_lane0_sync_clk rx_lane1_sync_clk         @   J                 J J                                   0           rst       0     [                  2         3   %           qufs-ddr cpu-ufs             0                      J   /   `             Q                   1              -        ufsphy                     ^okay            0   h              k           :          K           W O         s         crypto@1d88000        ;   2qcom,sm8650-inline-crypto-engine qcom,inline-crypto-engine               ؀                 {   0            s         hwlock@1f40000           2qcom,tcsr-mutex                               i            s   &      clock-controller@1fc0000             2qcom,sm8650-tcsr syscon                     
           {                V                       s         gpu@3d00000       !   2qcom,adreno-43051401 qcom,adreno          0                                               #  vkgsl_3d0_reg_memory cx_mem cx_dbgc                ,           J                             w                      %           ^okay             s     zap-shader                     qcom/sm8650/gen70900_zap.mbn          opp-table            2operating-points-v2          s      opp-231000000                          4      opp-310000000               z9           8      opp-366000000               з           <      opp-422000000               '5           @      opp-500000000               e            P      opp-578000000               "s                 opp-629000000               %}@                 opp-680000000               (                  opp-720000000               *T                  opp-770000000               -D                 opp-834000000               1Ԁ          @            gmu@3d6a000       &   2qcom,adreno-gmu-750.1 qcom,adreno-gmu         0       ֠      P                  (                 vgmu rscc gmu_pdc                  0         1           hfi gmu       8   {                      0      0   "                  !  eahb gmu cxo axi memnoc hub demet                                   cx gx           J                             w            s      opp-table            2operating-points-v2          s      opp-260000000               I            @      opp-625000000               %@@                       clock-controller@3d90000             2qcom,sm8650-gpucc                                  {   (   0       0   !         V                                  s         iommu@3da0000         @   2qcom,sm8650-smmu-500 qcom,adreno-smmu qcom,smmu-500 arm,mmu-500                                                  8                                                                                                                                      >         ?         @         A                                                                                     {         0   "   0   #               ehlos bus iface ahb                          Q         s         ipa@3f40000           2qcom,sm8650-ipa qcom,sm8550-ipa         J   /         /            0                            P     @               vipa-reg ipa-shared gsi        8  l                                                 (  ipa gsi ipa-clock-query ipa-setup-ready          {              ecore          0                         2          3               qmemory config                                         *  ipa-clock-enabled-valid ipa-clock-enabled           ^okay            self                       qcom/sm8650/ipa_fws.mbn          s  v      remoteproc@4080000           2qcom,sm8650-mpss-pas                                L  l                                                                0  wdog fatal ready handover stop-ack shutdown-ack          {               exo                                                            cx mss                                                           stop            ^okay          0  qcom/sm8650/modem.mbn qcom/sm8650/modem_dtb.mbn          s  w   glink-edge          l   '                     '                          !mpss             remoteproc@6800000           2qcom,sm8650-adsp-pas                                <  l                                                    #  wdog fatal ready handover stop-ack           {               exo                                                           lcx lmx                                                 stop            ^okay          .  qcom/sm8650/adsp.mbn qcom/sm8650/adsp_dtb.mbn            s  x   glink-edge          l   '                     '                          !lpass            s  y   fastrpc          2qcom,fastrpc            'fastrpcglink-apps-dsp           !adsp             ;                             compute-cb@3             2qcom,fastrpc-compute-cb                     J   /        /  C             Q      compute-cb@4             2qcom,fastrpc-compute-cb                     J   /        /  D             Q      compute-cb@5             2qcom,fastrpc-compute-cb                     J   /        /  E             Q      compute-cb@6             2qcom,fastrpc-compute-cb                     J   /        /  F             Q      compute-cb@7             2qcom,fastrpc-compute-cb                   $  J   /     @   /  g       /               Q         gpr       	   2qcom,gpr          
  'adsp_apps           R           ^                                   service@1            2qcom,q6apm                      k            |avs/audio msm/adsp/audio_pd          s     bedais           2qcom,q6apm-lpass-dais           k            s        dais             2qcom,q6apm-dais         J   /        /  a             s  z         service@2            2qcom,q6prm                      |avs/audio msm/adsp/audio_pd          s  {   clock-controller             2qcom,q6prm-lpass-clocks          V            s                     codec@6aa0000         8   2qcom,sm8650-lpass-wsa-macro qcom,sm8550-lpass-wsa-macro                             (   {      D         f         g              emclk macro dcodec fsgen          V          
  wwsa2-mclk           k            s         soundwire@6ab0000            2qcom,soundwire-v2.0.0                                                    {           eiface           !WSA2                       default                       	           ?   ?                                                                        '                  B           _                                     k         	  ^disabled             s  |      codec@6ac0000         6   2qcom,sm8650-lpass-rx-macro qcom,sm8550-lpass-rx-macro                               (   {      @         f         g              emclk macro dcodec fsgen          V            wmclk            k            s         soundwire@6ad0000            2qcom,soundwire-v2.0.0                                                    {           eiface           !RX                     default                                        1               	                                                    '          B          _                                       k           ^okay             s     codec@0,4            2sdw20217010e00                          w                  	         s  #         codec@6ae0000         6   2qcom,sm8650-lpass-tx-macro qcom,sm8550-lpass-tx-macro                               (   {      9         f         g              emclk macro dcodec fsgen          V            wmclk            k            s         codec@6b00000         8   2qcom,sm8650-lpass-wsa-macro qcom,sm8550-lpass-wsa-macro                             (   {      B         f         g              emclk macro dcodec fsgen          V            wmclk            k            s         soundwire@6b10000            2qcom,soundwire-v2.0.0                                                    {           eiface           !WSA                    default                       	           ?   ?                                                                        '                  B           _                                     k           ^okay             s  !   speaker@0,0          2sdw20217020400                                      default                          k          	  SpkrLeft               g                                  
            s        speaker@0,1          2sdw20217020400                                     default            h   M           k          
  SpkrRight              g                                              s            soundwire@6d30000            2qcom,soundwire-v2.0.0                                                           core wakeup          {           eiface           !TX                     default                                                                                      '        B        _                                    k           ^okay             s     codec@0,3            2sdw20217010e00                                               s  $         codec@6d44000         6   2qcom,sm8650-lpass-va-macro qcom,sm8550-lpass-va-macro                @              $   {      9         f         g           emclk macro dcodec            V            wfsgen           k            s         pinctrl@6e80000          2qcom,sm8650-lpass-lpi-pinctrl                                  {      f         g           ecore audio           	        	           	'                       s      tx-swr-active-state          s      clk-pins            	3gpio0           	8swr_tx_clk          	A           	P            	Z      data-pins           	3gpio1 gpio2 gpio14          	8swr_tx_data         	A           	P            	g         rx-swr-active-state          s      clk-pins            	3gpio3           	8swr_rx_clk          	A           	P            	Z      data-pins           	3gpio4 gpio5         	8swr_rx_data         	A           	P            	g         dmic01-default-state             s  }   clk-pins            	3gpio6         
  	8dmic1_clk           	A            	u      data-pins           	3gpio7           	8dmic1_data          	A            	         dmic23-default-state             s  ~   clk-pins            	3gpio8         
  	8dmic2_clk           	A            	u      data-pins           	3gpio9           	8dmic2_data          	A            	         wsa-swr-active-state             s      clk-pins            	3gpio10          	8wsa_swr_clk         	A           	P            	Z      data-pins           	3gpio11          	8wsa_swr_data            	A           	P            	g         wsa2-swr-active-state            s      clk-pins            	3gpio15          	8wsa2_swr_clk            	A           	P            	Z      data-pins           	3gpio16          	8wsa2_swr_data           	A           	P            	g         spkr-1-sd-n-active-state            	3gpio21          	8gpio            	A            	Z         	         s            interconnect@7400000             2qcom,sm8650-lpass-lpiaon-noc                 @                                      s        interconnect@7430000             2qcom,sm8650-lpass-lpicx-noc              C                                       s         interconnect@7e40000             2qcom,sm8650-lpass-ag-noc                                                        s        mmc@8804000       $   2qcom,sm8650-sdhci qcom,sdhci-msm-v5              @                                            hc_irq pwr_irq           {   0      0                  eiface core xo         0                       2         3               qsdhc-ddr cpu-sdhc                           w           J   /  @            	           	               	 d,        	Àh         Q        ^okay            	                  	           	            	         	                      
              default sleep            s     opp-table            2operating-points-v2          s      opp-19200000                $                  opp-50000000                                 opp-100000000                                 opp-202000000               
F                       clock-controller@aaf0000             2qcom,sm8650-videocc              
                  {   (   0                           V                                  s        cci@ac15000       !   2qcom,sm8650-cci qcom,msm8996-cci                 
P                                                  {                  
        ecamnoc_axi cpas_ahb cci                       
              default sleep         	  ^disabled                                       s     i2c-bus@0                         c B@                                   s        i2c-bus@1                        c B@                                   s           cci@ac16000       !   2qcom,sm8650-cci qcom,msm8996-cci                 
`                                                  {                          ecamnoc_axi cpas_ahb cci                       
              default sleep         	  ^disabled                                       s     i2c-bus@0                         c B@                                   s        i2c-bus@1                        c B@                                   s           cci@ac17000       !   2qcom,sm8650-cci qcom,msm8996-cci                 
p                                                  {                          ecamnoc_axi cpas_ahb cci                       
              default sleep         	  ^disabled                                       s     i2c-bus@0                         c B@                                   s        i2c-bus@1                        c B@                                   s           clock-controller@ade0000             2qcom,sm8650-camcc                
                  {   0      (   )   *                        V                                  s         display-subsystem@ae00000            2qcom,sm8650-mdss                 
                 vmdss                   S            {         0         =                     0                       2         3              qmdp0-mem cpu-cfg                            J   /                                                            =        ^okay             s      display-controller@ae01000           2qcom,sm8650-dpu               
           
               	  vmdp vbif            l             (   {   0               @      =      I        enrt_bus iface lut core vsync            R      I        b$         w                           s     ports                                port@0                  endpoint            [            s            port@1                 endpoint            [            s            port@2                 endpoint            [            s               opp-table            2operating-points-v2          s      opp-200000000                                 opp-325000000               _@                 opp-375000000               Z                 opp-514000000                                      dsi@ae94000       (   2qcom,sm8650-dsi-ctrl qcom,mdss-dsi-ctrl              
@              	  vdsi_ctrl            l            0   {                  B      8         0         $  ebyte byte_intf pixel core iface bus         R            C        
                     w                                     dsi                                   ^okay            
%            s     ports                                port@0                  endpoint            [            s            port@1                 endpoint            [           
1                      s   w            opp-table            2operating-points-v2          s      opp-187500000               -                 opp-300000000                                 opp-358000000               V                       phy@ae95000          2qcom,sm8650-dsi-phy-4nm       0       
P            
R           
U                vdsi_phy dsi_phy_lane dsi_pll             {                   
  eiface ref            V                       ^okay            
<            s         dsi@ae96000       (   2qcom,sm8650-dsi-ctrl qcom,mdss-dsi-ctrl              
`              	  vdsi_ctrl            l            0   {                  D      :         0         $  ebyte byte_intf pixel core iface bus         R      	      E        
                     w                                     dsi                                 	  ^disabled             s     ports                                port@0                  endpoint            [            s            port@1                 endpoint             s                 phy@ae97000          2qcom,sm8650-dsi-phy-4nm       0       
p            
r           
u                vdsi_phy dsi_phy_lane dsi_pll             {                   
  eiface ref            V                     	  ^disabled             s         displayport-controller@af54000           2qcom,sm8650-dp        P       
@           
B            
P       p    
`            
p                l            (   {                                    ;  ecore_iface core_aux ctrl_link ctrl_link_iface stream_pixel          R                    
   .      .           w                             .           dp          k            ^okay             s     opp-table            2operating-points-v2          s      opp-162000000               	                 opp-270000000               ߀                 opp-540000000                /                  opp-810000000               0G                    ports                                port@0                  endpoint            [            s            port@1                 endpoint            [           
1                s                     clock-controller@af00000             2qcom,sm8650-dispcc               
               \   {   (   )   0      *                             .      .                                                              V                                 ^okay             s         phy@88e3000       6   2qcom,sm8650-snps-eusb2-phy qcom,sm8550-snps-eusb2-phy                0       T         {              eref            0                       ^okay            %           
H                       s         phy@88e8000          2qcom,sm8650-qmp-usb3-dp-phy                     0           {   0             0      0           eaux ref com_aux usb3_pipe              0      0           phy common              0            V                       H        ^okay                                   s   .   ports                                port@0                  endpoint            [            s           port@1                 endpoint            [            s            port@2                 endpoint            [            s                  usb@a6f8800          2qcom,sm8650-dwc3 qcom,dwc3               
o              D  l                                                           <  pwr_event hs_phy_irq dp_hs_phy_irq dm_hs_phy_irq ss_phy_irq       0   {   0   
   0      0      0      0               &  ecfg_noc core iface sleep mock_utmi xo           R   0      0           b$             0               0                                                =        ^okay             s     usb@a600000       
   2snps,dwc3                
`                                   J   /   @                  .            usb2-phy usb3-phy           
V             
j         
         
         
         
         
                            ,         A         Q        Potg          X         s     ports                                port@0                  endpoint            [            s           port@1                 endpoint            [            s                     interrupt-controller@b220000             2qcom,sm8650-pdc qcom,pdc                  "             @        d                   H  h         ^   ^  a      }   ?      ~                                                    s         thermal-sensor@c228000            2qcom,sm8650-tsens qcom,tsens-v2               "            "                                           uplow critical          x                       s         thermal-sensor@c229000            2qcom,sm8650-tsens qcom,tsens-v2               "            "0                                          uplow critical          x                       s         thermal-sensor@c22a000            2qcom,sm8650-tsens qcom,tsens-v2               "            "@                                          uplow critical          x                       s         power-management@c300000          #   2qcom,sm8650-aoss-qmp qcom,aoss-qmp               0                      '        l   '                      '                 V             s         sram@c3f0000             2qcom,rpmh-stats              ?               spmi@c400000             2qcom,spmi-pmic-arb        P       @        0     P       @      D             L             B       @         vcore chnls obsrvr intr cnfg         l                 periph_irq                                                                                             s     pmic@c           2qcom,pm8010 qcom,spmi-pmic                                                     s     temp-alarm@2400          2qcom,spmi-temp-alarm               $               $                            s  
         pmic@d           2qcom,pm8010 qcom,spmi-pmic                                                     s     temp-alarm@2400          2qcom,spmi-temp-alarm               $               $                            s           pmic@1           2qcom,pm8550 qcom,spmi-pmic                                                     s     temp-alarm@a00           2qcom,spmi-temp-alarm               
               
                            s        gpio@8800             2qcom,pm8550-gpio qcom,spmi-gpio                      	        	'                      	                                s      sdc2-card-det-state         	3gpio12          	8normal                    	                             s         volume-up-n-state           	3gpio6           	8normal                    	                    s           led-controller@ee00       *   2qcom,pm8550-flash-led qcom,spmi-flash-led                     	  ^disabled             s        pwm       !   2qcom,pm8550-pwm qcom,pm8350c-pwm                       ^okay                                       s     led@1                       	8status                     off       led@2                       	8status                     off       led@3                       	8status                     off             pmic@7           2qcom,pm8550 qcom,spmi-pmic                                                     s     temp-alarm@a00           2qcom,spmi-temp-alarm               
               
                            s        gpio@8800         !   2qcom,pm8550b-gpio qcom,spmi-gpio                         	        	'                      	                                s         phy@fd00             2qcom,pm8550b-eusb2-repeater                                    g        
            s            pmic@8           2qcom,pm8550 qcom,spmi-pmic                                                     s     temp-alarm@a00           2qcom,spmi-temp-alarm               
               
                            s        gpio@8800         "   2qcom,pm8550ve-gpio qcom,spmi-gpio                        	        	'                      	                                s            pmic@2           2qcom,pm8550 qcom,spmi-pmic                                                     s     temp-alarm@a00           2qcom,spmi-temp-alarm               
               
                            s        gpio@8800         "   2qcom,pm8550vs-gpio qcom,spmi-gpio                        	        	'                      	                                s            pmic@3           2qcom,pm8550 qcom,spmi-pmic                                                     s     temp-alarm@a00           2qcom,spmi-temp-alarm               
               
                            s        gpio@8800         "   2qcom,pm8550vs-gpio qcom,spmi-gpio                        	        	'                      	                                s            pmic@4           2qcom,pm8550 qcom,spmi-pmic                                                     s     temp-alarm@a00           2qcom,spmi-temp-alarm               
               
                            s        gpio@8800         "   2qcom,pm8550vs-gpio qcom,spmi-gpio                        	        	'                      	                                s            pmic@6           2qcom,pm8550 qcom,spmi-pmic                                                     s     temp-alarm@a00           2qcom,spmi-temp-alarm               
               
                            s        gpio@8800         "   2qcom,pm8550vs-gpio qcom,spmi-gpio                        	        	'                      	                                s            pmic@0           2qcom,pm8550 qcom,spmi-pmic                                                      s     pon@1300             2qcom,pmk8350-pon                         	  vhlos pbs             s     pwrkey           2qcom,pmk8350-pwrkey                                 t        ^okay             s        resin            2qcom,pmk8350-resin                               ^okay               r         s           rtc@6100             2qcom,pmk8350-rtc               a   b       
  vrtc alarm                  b              ^okay             s        nvram@7100           2qcom,spmi-sdam             q                                  =      q             s     reboot-reason@48                H           !               s           gpio@8800         !   2qcom,pmk8550-gpio qcom,spmi-gpio                         	        	'                      	                                s               pinctrl@f100000          2qcom,sm8650-tlmm                        0                             	        	                               	'   h                   &           4          J            s   h   cci0-0-default-state             s      sda-pins            	3gpio113         	8cci_i2c_sda         	A                   scl-pins            	3gpio114         	8cci_i2c_scl         	A                      cci0-0-sleep-state           s      sda-pins            	3gpio113         	8cci_i2c_sda         	A            I      scl-pins            	3gpio114         	8cci_i2c_scl         	A            I         cci0-1-default-state             s      sda-pins            	3gpio115         	8cci_i2c_sda         	A                   scl-pins            	3gpio116         	8cci_i2c_scl         	A                      cci0-1-sleep-state           s      sda-pins            	3gpio115         	8cci_i2c_sda         	A            I      scl-pins            	3gpio116         	8cci_i2c_scl         	A            I         cci1-0-default-state             s      sda-pins            	3gpio117         	8cci_i2c_sda         	A                   scl-pins            	3gpio118         	8cci_i2c_scl         	A                      cci1-0-sleep-state           s      sda-pins            	3gpio117         	8cci_i2c_sda         	A            I      scl-pins            	3gpio118         	8cci_i2c_scl         	A            I         cci1-1-default-state             s      sda-pins            	3gpio12          	8cci_i2c_sda         	A                   scl-pins            	3gpio13          	8cci_i2c_scl         	A                      cci1-1-sleep-state           s      sda-pins            	3gpio12          	8cci_i2c_sda         	A            I      scl-pins            	3gpio13          	8cci_i2c_scl         	A            I         cci2-0-default-state             s      sda-pins            	3gpio112         	8cci_i2c_sda         	A                   scl-pins            	3gpio153         	8cci_i2c_scl         	A                      cci2-0-sleep-state           s      sda-pins            	3gpio112         	8cci_i2c_sda         	A            I      scl-pins            	3gpio153         	8cci_i2c_scl         	A            I         cci2-1-default-state             s      sda-pins            	3gpio119         	8cci_i2c_sda         	A                   scl-pins            	3gpio120         	8cci_i2c_scl         	A                      cci2-1-sleep-state           s      sda-pins            	3gpio119         	8cci_i2c_sda         	A            I      scl-pins            	3gpio120         	8cci_i2c_scl         	A            I         hub-i2c0-data-clk-state         	3gpio64 gpio65           	8i2chub0_se0         	A                     s   Q      hub-i2c1-data-clk-state         	3gpio66 gpio67           	8i2chub0_se1         	A                     s   R      hub-i2c2-data-clk-state         	3gpio68 gpio69           	8i2chub0_se2         	A                     s   S      hub-i2c3-data-clk-state         	3gpio70 gpio71           	8i2chub0_se3         	A                     s   T      hub-i2c4-data-clk-state         	3gpio72 gpio73           	8i2chub0_se4         	A                     s   U      hub-i2c5-data-clk-state         	3gpio74 gpio75           	8i2chub0_se5         	A                     s   V      hub-i2c6-data-clk-state         	3gpio76 gpio77           	8i2chub0_se6         	A                     s   W      hub-i2c7-data-clk-state         	3gpio78 gpio79           	8i2chub0_se7         	A                     s   X      hub-i2c8-data-clk-state         	3gpio206 gpio207         	8i2chub0_se8         	A                     s   Y      hub-i2c9-data-clk-state         	3gpio80 gpio81           	8i2chub0_se9         	A                     s   Z      pcie0-default-state          s      perst-pins          	3gpio94          	8gpio            	A            I      clkreq-pins         	3gpio95          	8pcie0_clk_req_n         	A                  wake-pins           	3gpio96          	8gpio            	A                     pcie1-default-state          s      perst-pins          	3gpio97          	8gpio            	A            I      clkreq-pins         	3gpio98          	8pcie1_clk_req_n         	A                  wake-pins           	3gpio99          	8gpio            	A                     qup-i2c0-data-clk-state         	3gpio32 gpio33         	  	8qup1_se0            	A                     s   ]      qup-i2c1-data-clk-state         	3gpio36 gpio37         	  	8qup1_se1            	A                     s   `      qup-i2c2-data-clk-state         	3gpio40 gpio41         	  	8qup1_se2            	A                     s   c      qup-i2c3-data-clk-state         	3gpio44 gpio45         	  	8qup1_se3            	A                      s   f      qup-i2c4-data-clk-state         	3gpio48 gpio49         	  	8qup1_se4            	A                     s   l      qup-i2c5-data-clk-state         	3gpio52 gpio53         	  	8qup1_se5            	A                     s   o      qup-i2c6-data-clk-state         	3gpio56 gpio57         	  	8qup1_se6            	A                     s   r      qup-i2c7-data-clk-state         	3gpio60 gpio61         	  	8qup1_se7            	A                     s   {      qup-i2c8-data-clk-state         	3gpio0 gpio1       	  	8qup2_se0            	A                     s   5      qup-i2c9-data-clk-state         	3gpio4 gpio5       	  	8qup2_se1            	A                     s   8      qup-i2c10-data-clk-state            	3gpio8 gpio9       	  	8qup2_se2            	A                     s   ;      qup-i2c11-data-clk-state            	3gpio12 gpio13         	  	8qup2_se3            	A                     s   >      qup-i2c12-data-clk-state            	3gpio16 gpio17         	  	8qup2_se4            	A                     s   A      qup-i2c13-data-clk-state            	3gpio20 gpio21         	  	8qup2_se5            	A                     s   D      qup-i2c14-data-clk-state            	3gpio24 gpio25         	  	8qup2_se6            	A                     s        qup-spi0-cs-state           	3gpio35        	  	8qup1_se0            	A            	Z         s   _      qup-spi0-data-clk-state         	3gpio32 gpio33 gpio34          	  	8qup1_se0            	A            	Z         s   ^      qup-spi1-cs-state           	3gpio39        	  	8qup1_se1            	A            	Z         s   b      qup-spi1-data-clk-state         	3gpio36 gpio37 gpio38          	  	8qup1_se1            	A            	Z         s   a      qup-spi2-cs-state           	3gpio43        	  	8qup1_se2            	A            	Z         s   e      qup-spi2-data-clk-state         	3gpio40 gpio41 gpio42          	  	8qup1_se2            	A            	Z         s   d      qup-spi3-cs-state           	3gpio47        	  	8qup1_se3            	A            	Z         s   k      qup-spi3-data-clk-state         	3gpio44 gpio45 gpio46          	  	8qup1_se3            	A            	Z         s   j      qup-spi4-cs-state           	3gpio51        	  	8qup1_se4            	A            	Z         s   n      qup-spi4-data-clk-state         	3gpio48 gpio49 gpio50          	  	8qup1_se4            	A            	Z         s   m      qup-spi5-cs-state           	3gpio55        	  	8qup1_se5            	A            	Z         s   q      qup-spi5-data-clk-state         	3gpio52 gpio53 gpio54          	  	8qup1_se5            	A            	Z         s   p      qup-spi6-cs-state           	3gpio59        	  	8qup1_se6            	A            	Z         s   z      qup-spi6-data-clk-state         	3gpio56 gpio57 gpio58          	  	8qup1_se6            	A            	Z         s   y      qup-spi7-cs-state           	3gpio63        	  	8qup1_se7            	A            	Z         s   }      qup-spi7-data-clk-state         	3gpio60 gpio61 gpio62          	  	8qup1_se7            	A            	Z         s   |      qup-spi8-cs-state           	3gpio3         	  	8qup2_se0            	A            	Z         s   7      qup-spi8-data-clk-state         	3gpio0 gpio1 gpio2         	  	8qup2_se0            	A            	Z         s   6      qup-spi9-cs-state           	3gpio7         	  	8qup2_se1            	A            	Z         s   :      qup-spi9-data-clk-state         	3gpio4 gpio5 gpio6         	  	8qup2_se1            	A            	Z         s   9      qup-spi10-cs-state          	3gpio11        	  	8qup2_se2            	A            	Z         s   =      qup-spi10-data-clk-state            	3gpio8 gpio9 gpio10        	  	8qup2_se2            	A            	Z         s   <      qup-spi11-cs-state          	3gpio15        	  	8qup2_se3            	A            	Z         s   @      qup-spi11-data-clk-state            	3gpio12 gpio13 gpio14          	  	8qup2_se3            	A            	Z         s   ?      qup-spi12-cs-state          	3gpio19        	  	8qup2_se4            	A            	Z         s   C      qup-spi12-data-clk-state            	3gpio16 gpio17 gpio18          	  	8qup2_se4            	A            	Z         s   B      qup-spi13-cs-state          	3gpio23        	  	8qup2_se5            	A            	Z         s   F      qup-spi13-data-clk-state            	3gpio20 gpio21 gpio22          	  	8qup2_se5            	A            	Z         s   E      qup-spi14-cs-state          	3gpio27        	  	8qup2_se6            	A            	Z         s        qup-spi14-data-clk-state            	3gpio24 gpio25 gpio26          	  	8qup2_se6            	A            	Z         s        qup-uart14-default-state            	3gpio26 gpio27         	  	8qup2_se6            	A                     s   G      qup-uart14-cts-rts-state            	3gpio24 gpio25         	  	8qup2_se6            	A            I         s   H      qup-uart15-default-state            	3gpio30 gpio31         	  	8qup2_se7            	A            	Z         s   P      sdc2-sleep-state             s      clk-pins          	  	3sdc2_clk            	A            	Z      cmd-pins          	  	3sdc2_cmd            	A                  data-pins         
  	3sdc2_data           	A                     sdc2-default-state           s      clk-pins          	  	3sdc2_clk            	A            	Z      cmd-pins          	  	3sdc2_cmd            	A   
               data-pins         
  	3sdc2_data           	A   
                  bt-default-state             s  &   bt-en-pins          	3gpio17          	8gpio            	A            	Z      sw-ctrl-pins            	3gpio18          	8gpio             I         lt9611-irq-state            	3gpio85          	8gpio             	Z         s   u      lt9611-rst-state            	3gpio28          	8gpio             	u         s   v      spkr-2-sd-n-active-state            	3gpio77          	8gpio            	A            	Z         	         s         wcd-reset-n-active-state            	3gpio107         	8gpio            	A            	Z         	         s  "      wlan-en-state           	3gpio16          	8gpio            	A            I         s  %         iommu@15000000        /   2qcom,sm8650-smmu-500 qcom,smmu-500 arm,mmu-500                                       A          a          b          c          d          e          f          g          h          i          j          k          l          m          n          o          p          q          r          s          t          u          v                                                                                                                                 ;         <         =         >         ?         @         A         B         C         D         E         F         G         H         I         J         K         L         M         N         O         P         Q         R         S         T         U         V         W         X         Y                                                                                                                                                                                                                                                                                                                         Q         s   /      interrupt-controller@17100000            2arm,gic-v3                                                     	                               X           o                                         =         s      msi-controller@17140000          2arm,gic-v3-its                                                     s            timer@17420000           2arm,armv7-timer-mem              B                 =                                            frame@17421000           B    B                                                   frame@17423000           B0                   	                    	  ^disabled          frame@17425000           BP                   
                    	  ^disabled          frame@17427000           Bp                                       	  ^disabled          frame@17429000           B                                       	  ^disabled          frame@1742b000           B                                       	  ^disabled          frame@1742d000           B                                       	  ^disabled             rsc@17a00000             2qcom,rpmh-rsc         @                                                               vdrv-0 drv-1 drv-2         $                                                                                                            	  !apps_rsc             s     bcm-voter            2qcom,bcm-voter           s         clock-controller             2qcom,sm8650-rpmh-clk             {           exo           V            s         power-controller             2qcom,sm8650-rpmhpd          w                       s      opp-table            2operating-points-v2          s      opp-16                      s        opp-48             0         s         opp-52             4         s        opp-56             8         s         opp-60             <         s        opp-64             @         s         opp-80             P         s        opp-128                     s         opp-144                     s        opp-192                     s         opp-256                     s         opp-320           @         s        opp-336           P         s        opp-384                    s        opp-416                    s              regulators-0             2qcom,pm8550-rpmh-regulators                                                                -           >           O           ^           m           |           b      bob1          
  vreg_bob1            2K          <l                    s         bob2          
  vreg_bob2            )          -                     s         ldo2            vreg_l2b_3p0             -          -                                            s        ldo5            vreg_l5b_3p1             /]          /]                                            s         ldo6            vreg_l6b_1p8             w@         -                                            s        ldo7            vreg_l7b_1p8             w@         -                     s        ldo8            vreg_l8b_1p8             w@         -                                            s         ldo9            vreg_l9b_2p9             -*         -                                            s         ldo11           vreg_l11b_1p2            O                                                     s        ldo12           vreg_l12b_1p8            w@         w@                                           s        ldo13           vreg_l13b_3p0            -         -                                           s        ldo14           vreg_l14b_3p2            0          0                                            s        ldo15           vreg_l15b_1p8            w@         w@                                           s   g      ldo16           vreg_l16b_2p8            *         *                                           s        ldo17           vreg_l17b_2p5            &5@         &5@                                           s            regulators-1             2qcom,pm8550vs-rpmh-regulators                      -                      ;           I           W           e           s                      c      smps1           vreg_s1c_1p2             *@                             s         smps2           vreg_s2c_0p8                                            s  (      smps3           vreg_s3c_0p9                      <@                    s         smps4           vreg_s4c_1p2             @                              s        smps5           vreg_s5c_0p7             y                             s        smps6           vreg_s6c_1p8             R                              s         ldo1            vreg_l1c_1p2             O         O                                           s         ldo3            vreg_l3c_1p2             O         O                                           s            regulators-2             2qcom,pm8550vs-rpmh-regulators                      d      ldo1            vreg_l1d_0p88                     	                                           s            regulators-3             2qcom,pm8550vs-rpmh-regulators                      e      ldo3            vreg_l3e_0p9             m         	                                           s            regulators-4             2qcom,pm8550vs-rpmh-regulators                                 g      ldo1            vreg_l1g_0p91                     	                                           s        ldo3            vreg_l3g_0p91            m                                                    s            regulators-5             2qcom,pm8550ve-rpmh-regulators                      -                      e           i      smps4           vreg_s4i_0p85                       Q                    s  '      ldo1            vreg_l1i_0p88            m                                                    s         ldo2            vreg_l2i_0p88            m                                                    s        ldo3            vreg_l3i_0p91            O         O                                           s            regulators-6             2qcom,pm8010-rpmh-regulators         m                                                             ldo1            vreg_l1m_1p1             ؀         ؀                                           s        ldo2            vreg_l2m_1p056                                                                 s        ldo3            vreg_l3m_2p8             *         *                    s        ldo4            vreg_l4m_2p8             *         *                    s        ldo5            vreg_l5m_1p8             w@         w@                    s        ldo6            vreg_l6m_2p8             *         *                    s        ldo7            vreg_l7m_2p96            -*         -*                    s           regulators-7             2qcom,pm8010-rpmh-regulators         n                                                             ldo1            vreg_l1n_1p1             ؀         ؀                                           s        ldo2            vreg_l2n_1p056                                                                 s        ldo3            vreg_l3n_1p8             w@         w@                    s        ldo4            vreg_l4n_1p8             w@         w@                    s        ldo5            vreg_l5n_2p8             *         *                    s        ldo6            vreg_l6n_2p8             *         *                    s        ldo7            vreg_l7n_3p3             2j@         2j@                    s              cpufreq@17d91000          +   2qcom,sm8650-cpufreq-epss qcom,cpufreq-epss        @                                0            @              4  vfreq-domain0 freq-domain1 freq-domain2 freq-domain3       0                                               0  dcvsh-irq-0 dcvsh-irq-1 dcvsh-irq-2 dcvsh-irq-3          {   (   0           exo alternate                        V            s         pmu@24091000          .   2qcom,sm8650-llcc-bwmon qcom,sc7280-llcc-bwmon                $	                       Q                                      w      opp-table            2operating-points-v2          s      opp-0            p      opp-1            ,h      opp-2            Z      opp-3            ci8      opp-4            y      opp-5            A      opp-6            H      opp-7            ։      opp-8            h            pmu@240b7400          (   2qcom,sm8650-cpu-bwmon qcom,sdm845-bwmon              $t                      E              2         2              w      opp-table            2operating-points-v2          s      opp-0            E      opp-1            l}p      opp-2                  opp-3                  opp-4            9`      opp-5            /(            interconnect@24100000            2qcom,sm8650-gem-noc              $       P                               s   2      system-cache-controller@25000000             2qcom,sm8650-llcc          `       %               %@              %               %`              %              %                X  vllcc0_base llcc1_base llcc2_base llcc3_base llcc_broadcast_base llcc_broadcast_and_base               
         interconnect@320c0000            2qcom,sm8650-nsp-noc              2                                       s         remoteproc@32300000          2qcom,sm8650-cdsp-pas                 20               @  l         B                                              #  wdog fatal ready handover stop-ack           {               exo                                                   
               cx mxc nsp                                                     stop            ^okay          .  qcom/sm8650/cdsp.mbn qcom/sm8650/cdsp_dtb.mbn            s     glink-edge          l   '                     '                          !cdsp       fastrpc          2qcom,fastrpc            'fastrpcglink-apps-dsp           !cdsp             ;                             compute-cb@1             2qcom,fastrpc-compute-cb                   $  J   /  a       /         /               Q      compute-cb@2             2qcom,fastrpc-compute-cb                   $  J   /  b       /         /               Q      compute-cb@3             2qcom,fastrpc-compute-cb                   $  J   /  c       /         /               Q      compute-cb@4             2qcom,fastrpc-compute-cb                   $  J   /  d       /         /               Q      compute-cb@5             2qcom,fastrpc-compute-cb                   $  J   /  e       /         /               Q      compute-cb@6             2qcom,fastrpc-compute-cb                   $  J   /  f       /         /               Q      compute-cb@7             2qcom,fastrpc-compute-cb                   $  J   /  g       /         /               Q      compute-cb@8             2qcom,fastrpc-compute-cb                   $  J   /  h       /         /               Q      compute-cb@12            2qcom,fastrpc-compute-cb                   $  J   /  l       /         /               Q      compute-cb@13            2qcom,fastrpc-compute-cb                   $  J   /  m       /         /               Q      compute-cb@14            2qcom,fastrpc-compute-cb                   $  J   /  n       /         /               Q                  thermal-zones      aoss0-thermal                     trips      trip-point0          _                   Ehot       aoss0-critical                             	   Ecritical                cpuss0-thermal                   trips      trip-point0          _                   Ehot       cpuss0-critical                            	   Ecritical                cpuss1-thermal                   trips      trip-point0          _                   Ehot       cpuss1-critical                            	   Ecritical                cpuss2-thermal                   trips      trip-point0          _                   Ehot       cpuss2-critical                            	   Ecritical                cpuss3-thermal                   trips      trip-point0          _                   Ehot       cpuss3-critical                            	   Ecritical                cpu2-top-thermal                     trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu2-critical                            	   Ecritical                cpu2-bottom-thermal                  trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu2-critical                            	   Ecritical                cpu3-top-thermal                     trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu3-critical                            	   Ecritical                cpu3-bottom-thermal                  trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu3-critical                            	   Ecritical                cpu4-top-thermal                  	   trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu4-critical                            	   Ecritical                cpu4-bottom-thermal               
   trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu4-critical                            	   Ecritical                cpu5-top-thermal                     trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu5-critical                            	   Ecritical                cpu5-bottom-thermal                  trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu5-critical                            	   Ecritical                cpu6-top-thermal                     trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu6-critical                            	   Ecritical                cpu6-bottom-thermal                  trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu6-critical                            	   Ecritical                aoss1-thermal                     trips      trip-point0          _                   Ehot       aoss1-critical                             	   Ecritical                cpu7-top-thermal                     trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu7-critical                            	   Ecritical                cpu7-middle-thermal                  trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu7-critical                            	   Ecritical                cpu7-bottom-thermal                  trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu7-critical                            	   Ecritical                cpu0-thermal                     trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu0-critical                            	   Ecritical                cpu1-thermal                     trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu1-critical                            	   Ecritical                nsphvx0-thermal         #   
                 trips      trip-point0          _                   Ehot       nsphvx1-critical                               	   Ecritical                nsphvx1-thermal         #   
                 trips      trip-point0          _                   Ehot       nsphvx1-critical                               	   Ecritical                nsphmx0-thermal         #   
                 trips      trip-point0          _                   Ehot       nsphmx0-critical                               	   Ecritical                nsphmx1-thermal         #   
              	   trips      trip-point0          _                   Ehot       nsphmx1-critical                               	   Ecritical                nsphmx2-thermal         #   
              
   trips      trip-point0          _                   Ehot       nsphmx2-critical                               	   Ecritical                nsphmx3-thermal         #   
                 trips      trip-point0          _                   Ehot       nsphmx3-critical                               	   Ecritical                video-thermal           #   
                 trips      trip-point0          _                   Ehot       video-critical                             	   Ecritical                ddr-thermal         #   
                 trips      trip-point0          _                   Ehot       ddr-critical                               	   Ecritical                camera0-thermal                  trips      trip-point0          _                   Ehot       camera0-critical                               	   Ecritical                camera1-thermal                  trips      trip-point0          _                   Ehot       camera1-critical                               	   Ecritical                aoss2-thermal                     trips      trip-point0          _                   Ehot       aoss2-critical                             	   Ecritical                gpuss0-thermal          #   
                 cooling-maps       map0            9          >           trips      trip-point0          s                   Epassive          s        trip-point1                             Ehot       trip-point2          8                  	   Ecritical                gpuss1-thermal          #   
                 cooling-maps       map0            9          >           trips      trip-point0          s                   Epassive          s        trip-point1                             Ehot       trip-point2          8                  	   Ecritical                gpuss2-thermal          #   
                 cooling-maps       map0            9          >           trips      trip-point0          s                   Epassive          s        trip-point1                             Ehot       trip-point2          8                  	   Ecritical                gpuss3-thermal          #   
                 cooling-maps       map0            9          >           trips      trip-point0          s                   Epassive          s        trip-point1                             Ehot       trip-point2          8                  	   Ecritical                gpuss4-thermal          #   
                 cooling-maps       map0            9          >           trips      trip-point0          s                   Epassive          s        trip-point1                             Ehot       trip-point2          8                  	   Ecritical                gpuss5-thermal          #   
                 cooling-maps       map0            9          >           trips      trip-point0          s                   Epassive          s        trip-point1                             Ehot       trip-point2          8                  	   Ecritical                gpuss6-thermal          #   
                 cooling-maps       map0            9          >           trips      trip-point0          s                   Epassive          s        trip-point1                             Ehot       trip-point2          8                  	   Ecritical                gpuss7-thermal          #   
                 cooling-maps       map0            9  	        >           trips      trip-point0          s                   Epassive          s  	      trip-point1                             Ehot       trip-point2          8                  	   Ecritical                modem0-thermal                	   trips      trip-point0          _                   Ehot       modem0-critical                            	   Ecritical                modem1-thermal                
   trips      trip-point0          _                   Ehot       modem1-critical                            	   Ecritical                modem2-thermal                   trips      trip-point0          _                   Ehot       modem2-critical                            	   Ecritical                modem3-thermal                   trips      trip-point0          _                   Ehot       modem3-critical                            	   Ecritical                pm8010-m-thermal            #   d          
   trips      trip0            s                     Epassive       trip1            8                     Ehot             pm8010-n-thermal            #   d             trips      trip0            s                     Epassive       trip1            8                     Ehot             pm8550-thermal          #   d             trips      trip0            s                     Epassive       trip1            8                     Ehot             pm8550b-thermal         #   d             trips      trip0            s                     Epassive       trip1            8                     Ehot             pm8550ve-thermal            #   d             trips      trip0            s                     Epassive       trip1            8                     Ehot             pm8550vs-c-thermal          #   d             trips      trip0            s                     Epassive       trip1            8                     Ehot             pm8550vs-d-thermal          #   d             trips      trip0            s                     Epassive       trip1            8                     Ehot             pm8550vs-e-thermal          #   d             trips      trip0            s                     Epassive       trip1            8                     Ehot             pm8550vs-g-thermal          #   d             trips      trip0            s                     Epassive       trip1            8                     Ehot                timer            2arm,armv8-timer       0                                   
         reboot-mode          2nvmem-reboot-mode           M          Yreboot-mode         j           x         aliases       $  /soc@0/geniqup@8c0000/serial@89c000       $  /soc@0/geniqup@8c0000/serial@898000       hdmi-out             2hdmi-connector           Ea      port       endpoint            [           s   x            gpio-keys         
   2gpio-keys                     default    key-volume-up         
  !Volume Up              s        6                                               leds          
   2gpio-leds      led-0         
  	8bluetooth                      6                  bluetooth-power         off       led-1         
  	8indicator                      6      	            off                led-2           	8wlan                       6      
            phy0tx          off          pmic-glink        >   2qcom,sm8650-pmic-glink qcom,sm8550-pmic-glink qcom,pmic-glink                                        h          connector@0          2usb-c-connector                      dual            dual       ports                                port@0                  endpoint            [           s            port@1                 endpoint            [           s            port@2                 endpoint            [           s   i                  regulator-lt9611-1v2             2regulator-fixed         LT9611_1V2           O         O                   "   h   O             '         s   s      regulator-lt9611-3v3             2regulator-fixed         LT9611_3V3           2Z         2Z                  "   h   N             '         s   t      sound         (   2qcom,sm8650-sndcard qcom,sm8450-sndcard          ,SM8650-HDK          :SpkrLeft IN WSA_SPK1 OUT SpkrRight IN WSA_SPK2 OUT IN1_HPHL HPHL_OUT IN2_HPHR HPHR_OUT AMIC1 MIC BIAS1 AMIC2 MIC BIAS2 AMIC5 MIC BIAS4 TX SWR_INPUT0 ADC1_OUTPUT TX SWR_INPUT1 ADC2_OUTPUT TX SWR_INPUT3 ADC4_OUTPUT       wcd-playback-dai-link           HWCD Playback       cpu         R     q      codec           R                         platform            R           wcd-capture-dai-link            HWCD Capture    cpu         R     x      codec           R                        platform            R           wsa-dai-link            HWSA Playback       cpu         R     i      codec           R       !                 platform            R              regulator-vph-pwr            2regulator-fixed         vph_pwr          8u          8u          \         p         s         regulator-vreg-bob-3v3           2regulator-fixed         VREG_BOB_3P3             2Z         2Z                    s        audio-codec       &   2qcom,wcd9395-codec qcom,wcd9390-codec             "        default          w@         w@         w@         w@          $ I                   	         0  P        Y  #        h  $        0   h   k           w   g           g           g                   k            s        wcn7850-pmu          2qcom,wcn7850-pmu            default           %  &           h                  h               %  '           g                     (                              
            {         regulators     ldo0            vreg_pmu_rfa_cmn             s   I      ldo1            vreg_pmu_aon_0p59            s   J      ldo2            vreg_pmu_wlcx_0p8            s   K      ldo3            vreg_pmu_wlmx_0p85           s   L      ldo4            vreg_pmu_btcmx_0p85          s        ldo5            vreg_pmu_rfa_0p8             s   M      ldo6            vreg_pmu_rfa_1p2             s   N      ldo7            vreg_pmu_rfa_1p8             s   O      ldo8            vreg_pmu_pcie_0p9            s         ldo9            vreg_pmu_pcie_1p8            s               __symbols__         /clocks/xo-board            /clocks/sleep-clk           /clocks/bi-tcxo-div2-clk            /clocks/bi-tcxo-ao-div2-clk         (/cpus/cpu@0         -/cpus/cpu@0/l2-cache            2/cpus/cpu@0/l2-cache/l3-cache           7/cpus/cpu@100           </cpus/cpu@200           A/cpus/cpu@200/l2-cache          H/cpus/cpu@300           M/cpus/cpu@300/l2-cache          T/cpus/cpu@400           Y/cpus/cpu@400/l2-cache          `/cpus/cpu@500           e/cpus/cpu@500/l2-cache          l/cpus/cpu@600           q/cpus/cpu@600/l2-cache          x/cpus/cpu@700           }/cpus/cpu@700/l2-cache           /cpus/idle-states/cpu-sleep-0-0          /cpus/idle-states/cpu-sleep-1-0          /cpus/idle-states/cpu-sleep-2-0       )  /cpus/domain-idle-states/cluster-sleep-0          )  /cpus/domain-idle-states/cluster-sleep-1            /firmware/scm           /interconnect-0         /interconnect-1         /psci/power-domain-cpu0         /psci/power-domain-cpu1         /psci/power-domain-cpu2         /psci/power-domain-cpu3         /psci/power-domain-cpu4         /psci/power-domain-cpu5         #/psci/power-domain-cpu6         +/psci/power-domain-cpu7         3/psci/power-domain-cluster          >/reserved-memory            N/reserved-memory/hyp@80000000         $  V/reserved-memory/cpusys-vm@80e00000       ,  d/reserved-memory/xbl-dt-log-merged@81a00000       %  z/reserved-memory/aop-cmd-db@81c60000          .  /reserved-memory/aop-tme-uefi-merged@81c80000           /reserved-memory/smem@81d00000        #  /reserved-memory/adsp-mhi@81f00000           /reserved-memory/pvmfw@824a0000       &  /reserved-memory/global-sync@82600000         "  /reserved-memory/tz-stat@82700000           /reserved-memory/qdss@82800000        (  /reserved-memory/qlink-logging@84800000       #  /reserved-memory/mpss-dsm@86b00000        %  /reserved-memory/mpss-dsm-2@8b400000            /reserved-memory/mpss@8bc00000        &  /reserved-memory/q6-mpss-dtb@9b000000         !  $/reserved-memory/ipa-fw@9b080000          "  //reserved-memory/ipa-gsi@9b090000         )  ;/reserved-memory/gpu-micro-code@9b09a000            N/reserved-memory/spss@9b0a0000        (  ^/reserved-memory/spu-tz-shared@9b280000       +  p/reserved-memory/spu-modem-shared@9b2e0000        !  /reserved-memory/camera@9b300000             /reserved-memory/video@9bb00000         /reserved-memory/cvp@9c300000           /reserved-memory/cdsp@9ca00000        &  /reserved-memory/q6-cdsp-dtb@9de00000         &  /reserved-memory/q6-adsp-dtb@9de80000         #  /reserved-memory/adspslpi@9df00000           /reserved-memory/rmtfs@d7c00000       $  /reserved-memory/tz-merged@d8000000       (  /reserved-memory/hwfence-shbuf@e6440000       &  /reserved-memory/trust-ui-vm@f3800000         !  /reserved-memory/oem-vm@f7c00000          #  /reserved-memory/llcc-lpi@ff800000          &/smp2p-adsp/master-kernel           5/smp2p-adsp/slave-kernel            C/smp2p-cdsp/master-kernel           R/smp2p-cdsp/slave-kernel            `/smp2p-modem/master-kernel          p/smp2p-modem/slave-kernel           /smp2p-modem/ipa-ap-to-modem            /smp2p-modem/ipa-modem-to-ap            /soc@0          /soc@0/clock-controller@100000          /soc@0/mailbox@406000           /soc@0/dma-controller@800000            /soc@0/geniqup@8c0000         !  /soc@0/geniqup@8c0000/i2c@880000          !  /soc@0/geniqup@8c0000/spi@880000          !  /soc@0/geniqup@8c0000/i2c@884000          !  /soc@0/geniqup@8c0000/spi@884000          !  /soc@0/geniqup@8c0000/i2c@888000          !  /soc@0/geniqup@8c0000/spi@888000          !  /soc@0/geniqup@8c0000/i2c@88c000          !  /soc@0/geniqup@8c0000/spi@88c000          !  /soc@0/geniqup@8c0000/i2c@890000          !  /soc@0/geniqup@8c0000/spi@890000          !  /soc@0/geniqup@8c0000/i2c@894000          !  /soc@0/geniqup@8c0000/spi@894000          $  /soc@0/geniqup@8c0000/serial@898000       $  /soc@0/geniqup@8c0000/serial@89c000         /soc@0/geniqup@9c0000         !  /soc@0/geniqup@9c0000/i2c@980000          !  (/soc@0/geniqup@9c0000/i2c@984000          !  2/soc@0/geniqup@9c0000/i2c@988000          !  </soc@0/geniqup@9c0000/i2c@98c000          !  F/soc@0/geniqup@9c0000/i2c@990000          !  P/soc@0/geniqup@9c0000/i2c@994000          !  Z/soc@0/geniqup@9c0000/i2c@998000          !  d/soc@0/geniqup@9c0000/i2c@99c000          !  n/soc@0/geniqup@9c0000/i2c@9a0000          !  x/soc@0/geniqup@9c0000/i2c@9a4000            /soc@0/dma-controller@a00000            /soc@0/geniqup@ac0000         !  /soc@0/geniqup@ac0000/i2c@a80000          !  /soc@0/geniqup@ac0000/spi@a80000          !  /soc@0/geniqup@ac0000/i2c@a84000          !  /soc@0/geniqup@ac0000/spi@a84000          !  /soc@0/geniqup@ac0000/i2c@a88000          !  /soc@0/geniqup@ac0000/spi@a88000          !  /soc@0/geniqup@ac0000/i2c@a8c000          -  /soc@0/geniqup@ac0000/i2c@a8c000/typec-mux@e          C  /soc@0/geniqup@ac0000/i2c@a8c000/typec-mux@e/ports/port@0/endpoint        !  /soc@0/geniqup@ac0000/spi@a8c000          !  /soc@0/geniqup@ac0000/i2c@a90000          !  /soc@0/geniqup@ac0000/spi@a90000          !  /soc@0/geniqup@ac0000/i2c@a94000          !  /soc@0/geniqup@ac0000/spi@a94000          !  /soc@0/geniqup@ac0000/i2c@a98000          0  /soc@0/geniqup@ac0000/i2c@a98000/hdmi-bridge@2b       F   /soc@0/geniqup@ac0000/i2c@a98000/hdmi-bridge@2b/ports/port@0/endpoint         F  	/soc@0/geniqup@ac0000/i2c@a98000/hdmi-bridge@2b/ports/port@2/endpoint         !  /soc@0/geniqup@ac0000/spi@a98000          !  /soc@0/geniqup@ac0000/i2c@a9c000          !  /soc@0/geniqup@ac0000/spi@a9c000            #/soc@0/interconnect@1500000         -/soc@0/interconnect@1600000         8/soc@0/interconnect@1680000         C/soc@0/interconnect@16c0000         L/soc@0/interconnect@16e0000         W/soc@0/interconnect@1700000         b/soc@0/interconnect@1780000         k/soc@0/rng@10c3000          o/soc@0/pcie@1c00000         u/soc@0/pcie@1c00000/pcie@0          /soc@0/phy@1c06000          /soc@0/pcie@1c08000         /soc@0/phy@1c0e000          /soc@0/dma-controller@1dc4000           /soc@0/crypto@1dfa000           /soc@0/phy@1d80000          /soc@0/ufs@1d84000          6/soc@0/crypto@1d88000           /soc@0/hwlock@1f40000            /soc@0/clock-controller@1fc0000         /soc@0/gpu@3d00000          /soc@0/gpu@3d00000/opp-table            /soc@0/gmu@3d6a000          /soc@0/gmu@3d6a000/opp-table             /soc@0/clock-controller@3d90000         /soc@0/iommu@3da0000            /soc@0/ipa@3f40000          /soc@0/remoteproc@4080000           /soc@0/remoteproc@6800000         %  '/soc@0/remoteproc@6800000/glink-edge          3  =/soc@0/remoteproc@6800000/glink-edge/gpr/service@1        :  C/soc@0/remoteproc@6800000/glink-edge/gpr/service@1/bedais         8  N/soc@0/remoteproc@6800000/glink-edge/gpr/service@1/dais       3  W/soc@0/remoteproc@6800000/glink-edge/gpr/service@2        D  ]/soc@0/remoteproc@6800000/glink-edge/gpr/service@2/clock-controller         e/soc@0/codec@6aa0000            u/soc@0/soundwire@6ab0000            z/soc@0/codec@6ac0000            /soc@0/soundwire@6ad0000          #  /soc@0/soundwire@6ad0000/codec@0,4          /soc@0/codec@6ae0000            /soc@0/codec@6b00000            /soc@0/soundwire@6b10000          %  /soc@0/soundwire@6b10000/speaker@0,0          %  /soc@0/soundwire@6b10000/speaker@0,1            /soc@0/soundwire@6d30000          #  /soc@0/soundwire@6d30000/codec@0,3          /soc@0/codec@6d44000            /soc@0/pinctrl@6e80000        +  /soc@0/pinctrl@6e80000/tx-swr-active-state        +  /soc@0/pinctrl@6e80000/rx-swr-active-state        ,  /soc@0/pinctrl@6e80000/dmic01-default-state       ,  /soc@0/pinctrl@6e80000/dmic23-default-state       ,  +/soc@0/pinctrl@6e80000/wsa-swr-active-state       -  :/soc@0/pinctrl@6e80000/wsa2-swr-active-state          0  J/soc@0/pinctrl@6e80000/spkr-1-sd-n-active-state         ]/soc@0/interconnect@7400000         n/soc@0/interconnect@7430000         ~/soc@0/interconnect@7e40000         /soc@0/mmc@8804000          /soc@0/mmc@8804000/opp-table             /soc@0/clock-controller@aaf0000         /soc@0/cci@ac15000          /soc@0/cci@ac15000/i2c-bus@0            /soc@0/cci@ac15000/i2c-bus@1            /soc@0/cci@ac16000          /soc@0/cci@ac16000/i2c-bus@0            /soc@0/cci@ac16000/i2c-bus@1            /soc@0/cci@ac17000          /soc@0/cci@ac17000/i2c-bus@0            /soc@0/cci@ac17000/i2c-bus@1             /soc@0/clock-controller@ade0000       !  /soc@0/display-subsystem@ae00000          <   /soc@0/display-subsystem@ae00000/display-controller@ae01000       R  	/soc@0/display-subsystem@ae00000/display-controller@ae01000/ports/port@0/endpoint         R  /soc@0/display-subsystem@ae00000/display-controller@ae01000/ports/port@1/endpoint         R  %/soc@0/display-subsystem@ae00000/display-controller@ae01000/ports/port@2/endpoint         F  3/soc@0/display-subsystem@ae00000/display-controller@ae01000/opp-table         -  A/soc@0/display-subsystem@ae00000/dsi@ae94000          C  K/soc@0/display-subsystem@ae00000/dsi@ae94000/ports/port@0/endpoint        C  X/soc@0/display-subsystem@ae00000/dsi@ae94000/ports/port@1/endpoint        7  f/soc@0/display-subsystem@ae00000/dsi@ae94000/opp-table        -  y/soc@0/display-subsystem@ae00000/phy@ae95000          -  /soc@0/display-subsystem@ae00000/dsi@ae96000          C  /soc@0/display-subsystem@ae00000/dsi@ae96000/ports/port@0/endpoint        C  /soc@0/display-subsystem@ae00000/dsi@ae96000/ports/port@1/endpoint        -  /soc@0/display-subsystem@ae00000/phy@ae97000          @  /soc@0/display-subsystem@ae00000/displayport-controller@af54000       J  4/soc@0/display-subsystem@ae00000/displayport-controller@af54000/opp-table         V  /soc@0/display-subsystem@ae00000/displayport-controller@af54000/ports/port@0/endpoint         V  /soc@0/display-subsystem@ae00000/displayport-controller@af54000/ports/port@1/endpoint            /soc@0/clock-controller@af00000         /soc@0/phy@88e3000          /soc@0/phy@88e8000        )  /soc@0/phy@88e8000/ports/port@0/endpoint          )  /soc@0/phy@88e8000/ports/port@1/endpoint          )  '/soc@0/phy@88e8000/ports/port@2/endpoint            ;/soc@0/usb@a6f8800          A/soc@0/usb@a6f8800/usb@a600000        5  L/soc@0/usb@a6f8800/usb@a600000/ports/port@0/endpoint          5  Z/soc@0/usb@a6f8800/usb@a600000/ports/port@1/endpoint          $  h/soc@0/interrupt-controller@b220000         l/soc@0/thermal-sensor@c228000           s/soc@0/thermal-sensor@c229000           z/soc@0/thermal-sensor@c22a000            /soc@0/power-management@c300000         /soc@0/spmi@c400000         /soc@0/spmi@c400000/pmic@c        +  /soc@0/spmi@c400000/pmic@c/temp-alarm@2400          /soc@0/spmi@c400000/pmic@d        +  /soc@0/spmi@c400000/pmic@d/temp-alarm@2400          /soc@0/spmi@c400000/pmic@1        *  /soc@0/spmi@c400000/pmic@1/temp-alarm@a00         %  /soc@0/spmi@c400000/pmic@1/gpio@8800          9  /soc@0/spmi@c400000/pmic@1/gpio@8800/sdc2-card-det-state          7  /soc@0/spmi@c400000/pmic@1/gpio@8800/volume-up-n-state        /  /soc@0/spmi@c400000/pmic@1/led-controller@ee00          /soc@0/spmi@c400000/pmic@1/pwm          '/soc@0/spmi@c400000/pmic@7        *  //soc@0/spmi@c400000/pmic@7/temp-alarm@a00         %  B/soc@0/spmi@c400000/pmic@7/gpio@8800          $  P/soc@0/spmi@c400000/pmic@7/phy@fd00         g/soc@0/spmi@c400000/pmic@8        *  p/soc@0/spmi@c400000/pmic@8/temp-alarm@a00         %  /soc@0/spmi@c400000/pmic@8/gpio@8800            /soc@0/spmi@c400000/pmic@2        *  /soc@0/spmi@c400000/pmic@2/temp-alarm@a00         %  /soc@0/spmi@c400000/pmic@2/gpio@8800            /soc@0/spmi@c400000/pmic@3        *  /soc@0/spmi@c400000/pmic@3/temp-alarm@a00         %  /soc@0/spmi@c400000/pmic@3/gpio@8800            /soc@0/spmi@c400000/pmic@4        *  /soc@0/spmi@c400000/pmic@4/temp-alarm@a00         %  /soc@0/spmi@c400000/pmic@4/gpio@8800            )/soc@0/spmi@c400000/pmic@6        *  4/soc@0/spmi@c400000/pmic@6/temp-alarm@a00         %  J/soc@0/spmi@c400000/pmic@6/gpio@8800            [/soc@0/spmi@c400000/pmic@0        $  c/soc@0/spmi@c400000/pmic@0/pon@1300       +  o/soc@0/spmi@c400000/pmic@0/pon@1300/pwrkey        *  z/soc@0/spmi@c400000/pmic@0/pon@1300/resin         $  /soc@0/spmi@c400000/pmic@0/rtc@6100       &  /soc@0/spmi@c400000/pmic@0/nvram@7100         7  /soc@0/spmi@c400000/pmic@0/nvram@7100/reboot-reason@48        %  /soc@0/spmi@c400000/pmic@0/gpio@8800            /soc@0/pinctrl@f100000        ,  /soc@0/pinctrl@f100000/cci0-0-default-state       *  /soc@0/pinctrl@f100000/cci0-0-sleep-state         ,  /soc@0/pinctrl@f100000/cci0-1-default-state       *  /soc@0/pinctrl@f100000/cci0-1-sleep-state         ,  /soc@0/pinctrl@f100000/cci1-0-default-state       *  /soc@0/pinctrl@f100000/cci1-0-sleep-state         ,  /soc@0/pinctrl@f100000/cci1-1-default-state       *  /soc@0/pinctrl@f100000/cci1-1-sleep-state         ,  +/soc@0/pinctrl@f100000/cci2-0-default-state       *  :/soc@0/pinctrl@f100000/cci2-0-sleep-state         ,  G/soc@0/pinctrl@f100000/cci2-1-default-state       *  V/soc@0/pinctrl@f100000/cci2-1-sleep-state         /  c/soc@0/pinctrl@f100000/hub-i2c0-data-clk-state        /  u/soc@0/pinctrl@f100000/hub-i2c1-data-clk-state        /  /soc@0/pinctrl@f100000/hub-i2c2-data-clk-state        /  /soc@0/pinctrl@f100000/hub-i2c3-data-clk-state        /  /soc@0/pinctrl@f100000/hub-i2c4-data-clk-state        /  /soc@0/pinctrl@f100000/hub-i2c5-data-clk-state        /  /soc@0/pinctrl@f100000/hub-i2c6-data-clk-state        /  /soc@0/pinctrl@f100000/hub-i2c7-data-clk-state        /  /soc@0/pinctrl@f100000/hub-i2c8-data-clk-state        /  /soc@0/pinctrl@f100000/hub-i2c9-data-clk-state        +  /soc@0/pinctrl@f100000/pcie0-default-state        +  +/soc@0/pinctrl@f100000/pcie1-default-state        /  ?/soc@0/pinctrl@f100000/qup-i2c0-data-clk-state        /  Q/soc@0/pinctrl@f100000/qup-i2c1-data-clk-state        /  c/soc@0/pinctrl@f100000/qup-i2c2-data-clk-state        /  u/soc@0/pinctrl@f100000/qup-i2c3-data-clk-state        /  /soc@0/pinctrl@f100000/qup-i2c4-data-clk-state        /  /soc@0/pinctrl@f100000/qup-i2c5-data-clk-state        /  /soc@0/pinctrl@f100000/qup-i2c6-data-clk-state        /  /soc@0/pinctrl@f100000/qup-i2c7-data-clk-state        /  /soc@0/pinctrl@f100000/qup-i2c8-data-clk-state        /  /soc@0/pinctrl@f100000/qup-i2c9-data-clk-state        0  /soc@0/pinctrl@f100000/qup-i2c10-data-clk-state       0   /soc@0/pinctrl@f100000/qup-i2c11-data-clk-state       0   /soc@0/pinctrl@f100000/qup-i2c12-data-clk-state       0   ,/soc@0/pinctrl@f100000/qup-i2c13-data-clk-state       0   ?/soc@0/pinctrl@f100000/qup-i2c14-data-clk-state       )   R/soc@0/pinctrl@f100000/qup-spi0-cs-state          /   ^/soc@0/pinctrl@f100000/qup-spi0-data-clk-state        )   p/soc@0/pinctrl@f100000/qup-spi1-cs-state          /   |/soc@0/pinctrl@f100000/qup-spi1-data-clk-state        )   /soc@0/pinctrl@f100000/qup-spi2-cs-state          /   /soc@0/pinctrl@f100000/qup-spi2-data-clk-state        )   /soc@0/pinctrl@f100000/qup-spi3-cs-state          /   /soc@0/pinctrl@f100000/qup-spi3-data-clk-state        )   /soc@0/pinctrl@f100000/qup-spi4-cs-state          /   /soc@0/pinctrl@f100000/qup-spi4-data-clk-state        )   /soc@0/pinctrl@f100000/qup-spi5-cs-state          /   /soc@0/pinctrl@f100000/qup-spi5-data-clk-state        )  !/soc@0/pinctrl@f100000/qup-spi6-cs-state          /  !/soc@0/pinctrl@f100000/qup-spi6-data-clk-state        )  !$/soc@0/pinctrl@f100000/qup-spi7-cs-state          /  !0/soc@0/pinctrl@f100000/qup-spi7-data-clk-state        )  !B/soc@0/pinctrl@f100000/qup-spi8-cs-state          /  !N/soc@0/pinctrl@f100000/qup-spi8-data-clk-state        )  !`/soc@0/pinctrl@f100000/qup-spi9-cs-state          /  !l/soc@0/pinctrl@f100000/qup-spi9-data-clk-state        *  !~/soc@0/pinctrl@f100000/qup-spi10-cs-state         0  !/soc@0/pinctrl@f100000/qup-spi10-data-clk-state       *  !/soc@0/pinctrl@f100000/qup-spi11-cs-state         0  !/soc@0/pinctrl@f100000/qup-spi11-data-clk-state       *  !/soc@0/pinctrl@f100000/qup-spi12-cs-state         0  !/soc@0/pinctrl@f100000/qup-spi12-data-clk-state       *  !/soc@0/pinctrl@f100000/qup-spi13-cs-state         0  !/soc@0/pinctrl@f100000/qup-spi13-data-clk-state       *  !/soc@0/pinctrl@f100000/qup-spi14-cs-state         0  "/soc@0/pinctrl@f100000/qup-spi14-data-clk-state       0  "/soc@0/pinctrl@f100000/qup-uart14-default-state       0  "1/soc@0/pinctrl@f100000/qup-uart14-cts-rts-state       0  "D/soc@0/pinctrl@f100000/qup-uart15-default-state       (  "W/soc@0/pinctrl@f100000/sdc2-sleep-state       *  "b/soc@0/pinctrl@f100000/sdc2-default-state         (  "o/soc@0/pinctrl@f100000/bt-default-state       (  "z/soc@0/pinctrl@f100000/lt9611-irq-state       (  "/soc@0/pinctrl@f100000/lt9611-rst-state       0  "/soc@0/pinctrl@f100000/spkr-2-sd-n-active-state       0  "/soc@0/pinctrl@f100000/wcd-reset-n-active-state       %  "/soc@0/pinctrl@f100000/wlan-en-state            "/soc@0/iommu@15000000         %  "/soc@0/interrupt-controller@17100000          =  "/soc@0/interrupt-controller@17100000/msi-controller@17140000            "/soc@0/rsc@17a00000         "/soc@0/rsc@17a00000/bcm-voter         %  "/soc@0/rsc@17a00000/clock-controller          %  "/soc@0/rsc@17a00000/power-controller          /  "/soc@0/rsc@17a00000/power-controller/opp-table        6  #/soc@0/rsc@17a00000/power-controller/opp-table/opp-16         6  #/soc@0/rsc@17a00000/power-controller/opp-table/opp-48         6  #//soc@0/rsc@17a00000/power-controller/opp-table/opp-52         6  #E/soc@0/rsc@17a00000/power-controller/opp-table/opp-56         6  #[/soc@0/rsc@17a00000/power-controller/opp-table/opp-60         6  #q/soc@0/rsc@17a00000/power-controller/opp-table/opp-64         6  #/soc@0/rsc@17a00000/power-controller/opp-table/opp-80         7  #/soc@0/rsc@17a00000/power-controller/opp-table/opp-128        7  #/soc@0/rsc@17a00000/power-controller/opp-table/opp-144        7  #/soc@0/rsc@17a00000/power-controller/opp-table/opp-192        7  #/soc@0/rsc@17a00000/power-controller/opp-table/opp-256        7  #/soc@0/rsc@17a00000/power-controller/opp-table/opp-320        7  #/soc@0/rsc@17a00000/power-controller/opp-table/opp-336        7  $ /soc@0/rsc@17a00000/power-controller/opp-table/opp-384        7  $/soc@0/rsc@17a00000/power-controller/opp-table/opp-416        &  $%/soc@0/rsc@17a00000/regulators-0/bob1         &  $//soc@0/rsc@17a00000/regulators-0/bob2         &  $9/soc@0/rsc@17a00000/regulators-0/ldo2         &  $F/soc@0/rsc@17a00000/regulators-0/ldo5         &  $S/soc@0/rsc@17a00000/regulators-0/ldo6         &  $`/soc@0/rsc@17a00000/regulators-0/ldo7         &  $m/soc@0/rsc@17a00000/regulators-0/ldo8         &  $z/soc@0/rsc@17a00000/regulators-0/ldo9         '  $/soc@0/rsc@17a00000/regulators-0/ldo11        '  $/soc@0/rsc@17a00000/regulators-0/ldo12        '  $/soc@0/rsc@17a00000/regulators-0/ldo13        '  $/soc@0/rsc@17a00000/regulators-0/ldo14        '  $/soc@0/rsc@17a00000/regulators-0/ldo15        '  $/soc@0/rsc@17a00000/regulators-0/ldo16        '  $/soc@0/rsc@17a00000/regulators-0/ldo17        '  $/soc@0/rsc@17a00000/regulators-1/smps1        '  $/soc@0/rsc@17a00000/regulators-1/smps2        '  %/soc@0/rsc@17a00000/regulators-1/smps3        '  %/soc@0/rsc@17a00000/regulators-1/smps4        '  %/soc@0/rsc@17a00000/regulators-1/smps5        '  %*/soc@0/rsc@17a00000/regulators-1/smps6        &  %7/soc@0/rsc@17a00000/regulators-1/ldo1         &  %D/soc@0/rsc@17a00000/regulators-1/ldo3         &  %Q/soc@0/rsc@17a00000/regulators-2/ldo1         &  %_/soc@0/rsc@17a00000/regulators-3/ldo3         &  %l/soc@0/rsc@17a00000/regulators-4/ldo1         &  %z/soc@0/rsc@17a00000/regulators-4/ldo3         '  %/soc@0/rsc@17a00000/regulators-5/smps4        &  %/soc@0/rsc@17a00000/regulators-5/ldo1         &  %/soc@0/rsc@17a00000/regulators-5/ldo2         &  %/soc@0/rsc@17a00000/regulators-5/ldo3         &  %/soc@0/rsc@17a00000/regulators-6/ldo1         &  %/soc@0/rsc@17a00000/regulators-6/ldo2         &  %/soc@0/rsc@17a00000/regulators-6/ldo3         &  %/soc@0/rsc@17a00000/regulators-6/ldo4         &  %/soc@0/rsc@17a00000/regulators-6/ldo5         &  &/soc@0/rsc@17a00000/regulators-6/ldo6         &  &/soc@0/rsc@17a00000/regulators-6/ldo7         &  &/soc@0/rsc@17a00000/regulators-7/ldo1         &  &*/soc@0/rsc@17a00000/regulators-7/ldo2         &  &9/soc@0/rsc@17a00000/regulators-7/ldo3         &  &F/soc@0/rsc@17a00000/regulators-7/ldo4         &  &S/soc@0/rsc@17a00000/regulators-7/ldo5         &  &`/soc@0/rsc@17a00000/regulators-7/ldo6         &  &m/soc@0/rsc@17a00000/regulators-7/ldo7           &z/soc@0/cpufreq@17d91000         &/soc@0/pmu@24091000/opp-table           &/soc@0/pmu@240b7400/opp-table           &/soc@0/interconnect@24100000            &/soc@0/interconnect@320c0000            &/soc@0/remoteproc@32300000        0  &/thermal-zones/gpuss0-thermal/trips/trip-point0       0  &/thermal-zones/gpuss1-thermal/trips/trip-point0       0  &/thermal-zones/gpuss2-thermal/trips/trip-point0       0  &/thermal-zones/gpuss3-thermal/trips/trip-point0       0  &/thermal-zones/gpuss4-thermal/trips/trip-point0       0  '
/thermal-zones/gpuss5-thermal/trips/trip-point0       0  '/thermal-zones/gpuss6-thermal/trips/trip-point0       0  '"/thermal-zones/gpuss7-thermal/trips/trip-point0         './hdmi-out/port/endpoint       .  'A/pmic-glink/connector@0/ports/port@0/endpoint         .  'R/pmic-glink/connector@0/ports/port@1/endpoint         .  'c/pmic-glink/connector@0/ports/port@2/endpoint           'r/regulator-lt9611-1v2           '}/regulator-lt9611-3v3           '/regulator-vph-pwr          '/regulator-vreg-bob-3v3         '/audio-codec            '/wcn7850-pmu/regulators/ldo0            '/wcn7850-pmu/regulators/ldo1            '/wcn7850-pmu/regulators/ldo2            '/wcn7850-pmu/regulators/ldo3            '/wcn7850-pmu/regulators/ldo4            (/wcn7850-pmu/regulators/ldo5            (/wcn7850-pmu/regulators/ldo6            (#/wcn7850-pmu/regulators/ldo7            (4/wcn7850-pmu/regulators/ldo8            (F/wcn7850-pmu/regulators/ldo9             	interrupt-parent #address-cells #size-cells model compatible chassis-type stdout-path #clock-cells clock-frequency phandle clocks clock-mult clock-div device_type reg power-domains power-domain-names enable-method next-level-cache capacity-dmips-mhz dynamic-power-coefficient qcom,freq-domain #cooling-cells cache-level cache-unified cpu entry-method idle-state-name arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us local-timer-stop qcom,dload-mode interconnects #interconnect-cells qcom,bcm-voters interrupts #power-domain-cells domain-idle-states ranges no-map hwlocks qcom,client-id qcom,vmid interrupts-extended mboxes qcom,smem qcom,local-pid qcom,remote-pid qcom,entry-name #qcom,smem-state-cells interrupt-controller #interrupt-cells dma-ranges #reset-cells #mbox-cells dma-channels dma-channel-mask #dma-cells iommus dma-coherent status clock-names interconnect-names dmas dma-names pinctrl-0 pinctrl-names vddrfacmn-supply vddaon-supply vddwlcx-supply vddwlmx-supply vddrfa0p8-supply vddrfa1p2-supply vddrfa1p8-supply max-speed vdd-supply reset-gpios mode-switch orientation-switch remote-endpoint vcc-supply reg-names interrupt-names resets reset-names iommu-map interrupt-map interrupt-map-mask msi-map msi-map-mask linux,pci-domain num-lanes bus-range phys phy-names wake-gpios perst-gpios vddpcie0p9-supply vddpcie1p8-supply assigned-clocks assigned-clock-rates clock-output-names #phy-cells vdda-phy-supply vdda-pll-supply vdda-qref-supply qcom,ee qcom,num-ees num-channels qcom,controlled-remotely freq-table-hz required-opps lanes-per-direction qcom,ice vcc-max-microamp vccq-supply vccq-max-microamp #hwlock-cells operating-points-v2 qcom,gmu memory-region firmware-name opp-hz opp-level qcom,qmp #iommu-cells #global-interrupts qcom,smem-states qcom,smem-state-names qcom,gsi-loader label qcom,glink-channels qcom,non-secure-domain qcom,domain qcom,intents #sound-dai-cells qcom,protection-domain qcom,din-ports qcom,dout-ports qcom,ports-sinterval qcom,ports-offset1 qcom,ports-offset2 qcom,ports-hstart qcom,ports-hstop qcom,ports-word-length qcom,ports-block-pack-mode qcom,ports-block-group-count qcom,ports-lane-control qcom,rx-port-mapping powerdown-gpios sound-name-prefix vdd-1p8-supply vdd-io-supply qcom,port-mapping qcom,ports-sinterval-low qcom,tx-port-mapping gpio-controller #gpio-cells gpio-ranges pins function drive-strength slew-rate bias-disable bias-bus-hold output-high input-enable output-low bus-width sdhci-caps-mask qcom,dll-config qcom,ddr-config cd-gpios vmmc-supply vqmmc-supply no-sdio no-mmc pinctrl-1 assigned-clock-parents vdda-supply data-lanes vdds-supply vdda12-supply snps,hird-threshold snps,usb2-gadget-lpm-disable snps,dis_u2_susphy_quirk snps,dis_enblslpm_quirk snps,dis-u1-entry-quirk snps,dis-u2-entry-quirk snps,is-utmi-l1-suspend snps,usb3_lpm_capable snps,usb2-lpm-disable snps,has-lpm-erratum tx-fifo-resize dr_mode usb-role-switch qcom,pdc-ranges #qcom,sensors #thermal-sensor-cells qcom,channel qcom,bus-id bias-pull-up output-disable power-source #pwm-cells color default-state vdd18-supply vdd3-supply linux,code bits wakeup-parent gpio-reserved-ranges bias-pull-down #redistributor-regions redistributor-stride msi-controller #msi-cells frame-number qcom,tcs-offset qcom,drv-id qcom,tcs-config vdd-bob1-supply vdd-bob2-supply vdd-l2-l13-l14-supply vdd-l3-supply vdd-l5-l16-supply vdd-l6-l7-supply vdd-l8-l9-supply vdd-l11-supply vdd-l12-supply vdd-l15-supply vdd-l17-supply qcom,pmic-id regulator-name regulator-min-microvolt regulator-max-microvolt regulator-initial-mode regulator-allow-set-load regulator-allowed-modes vdd-l1-supply vdd-l2-supply vdd-s1-supply vdd-s2-supply vdd-s3-supply vdd-s4-supply vdd-s5-supply vdd-s6-supply vdd-l1-l2-supply vdd-l3-l4-supply vdd-l5-supply vdd-l6-supply vdd-l7-supply #freq-domain-cells opp-peak-kBps thermal-sensors temperature hysteresis polling-delay-passive trip cooling-device nvmem-cells nvmem-cell-names mode-recovery mode-bootloader serial0 serial1 debounce-interval linux,can-disable wakeup-source linux,default-trigger panic-indicator orientation-gpios power-role data-role vin-supply gpio enable-active-high audio-routing link-name sound-dai regulator-always-on regulator-boot-on qcom,micbias1-microvolt qcom,micbias2-microvolt qcom,micbias3-microvolt qcom,micbias4-microvolt qcom,mbhc-buttons-vthreshold-microvolt qcom,mbhc-headset-vthreshold-microvolt qcom,mbhc-headphone-vthreshold-microvolt qcom,rx-device qcom,tx-device vdd-buck-supply vdd-rxtx-supply vdd-mic-bias-supply wlan-enable-gpios bt-enable-gpios vddio-supply vddio1p2-supply vdddig-supply xo_board sleep_clk bi_tcxo_div2 bi_tcxo_ao_div2 cpu0 l2_0 l3_0 cpu1 cpu2 l2_200 cpu3 l2_300 cpu4 l2_400 cpu5 l2_500 cpu6 l2_600 cpu7 l2_700 silver_cpu_sleep_0 gold_cpu_sleep_0 gold_plus_cpu_sleep_0 cluster_sleep_0 cluster_sleep_1 scm clk_virt mc_virt cpu_pd0 cpu_pd1 cpu_pd2 cpu_pd3 cpu_pd4 cpu_pd5 cpu_pd6 cpu_pd7 cluster_pd reserved_memory hyp_mem cpusys_vm_mem xbl_dt_log_merged_mem aop_cmd_db_mem aop_tme_uefi_merged_mem adsp_mhi_mem pvmfw_mem global_sync_mem tz_stat_mem qdss_mem qlink_logging_mem mpss_dsm_mem mpss_dsm_mem_2 mpss_mem q6_mpss_dtb_mem ipa_fw_mem ipa_gsi_mem gpu_micro_code_mem spss_region_mem spu_tz_shared_mem spu_modem_shared_mem camera_mem video_mem cvp_mem cdsp_mem q6_cdsp_dtb_mem q6_adsp_dtb_mem adspslpi_mem rmtfs_mem tz_merged_mem hwfence_shbuf trust_ui_vm_mem oem_vm_mem llcc_lpi_mem smp2p_adsp_out smp2p_adsp_in smp2p_cdsp_out smp2p_cdsp_in smp2p_modem_out smp2p_modem_in ipa_smp2p_out ipa_smp2p_in soc gcc ipcc gpi_dma2 qupv3_id_1 i2c8 spi8 i2c9 spi9 i2c10 spi10 i2c11 spi11 i2c12 spi12 i2c13 spi13 uart14 uart15 i2c_master_hub_0 i2c_hub_0 i2c_hub_1 i2c_hub_2 i2c_hub_3 i2c_hub_4 i2c_hub_5 i2c_hub_6 i2c_hub_7 i2c_hub_8 i2c_hub_9 gpi_dma1 qupv3_id_0 i2c0 spi0 i2c1 spi1 i2c2 spi2 i2c3 wcd_usbss wcd_usbss_sbu_mux spi3 i2c4 spi4 i2c5 spi5 i2c6 lt9611_codec lt9611_a lt9611_out spi6 i2c7 spi7 cnoc_main config_noc system_noc pcie_noc aggre1_noc aggre2_noc mmss_noc rng pcie0 pcieport0 pcie0_phy pcie1 pcie1_phy cryptobam crypto ufs_mem_phy ufs_mem_hc tcsr_mutex tcsr gpu gpu_opp_table gmu_opp_table gpucc adreno_smmu ipa remoteproc_mpss remoteproc_adsp remoteproc_adsp_glink q6apm q6apmbedai q6apmdai q6prm q6prmcc lpass_wsa2macro swr3 lpass_rxmacro swr1 wcd_rx lpass_txmacro lpass_wsamacro swr0 north_spkr south_spkr swr2 wcd_tx lpass_vamacro lpass_tlmm tx_swr_active rx_swr_active dmic01_default dmic23_default wsa_swr_active wsa2_swr_active spkr_1_sd_n_active lpass_lpiaon_noc lpass_lpicx_noc lpass_ag_noc sdhc_2 sdhc2_opp_table videocc cci0 cci0_i2c0 cci0_i2c1 cci1 cci1_i2c0 cci1_i2c1 cci2 cci2_i2c0 cci2_i2c1 camcc mdss mdss_mdp dpu_intf1_out dpu_intf2_out dpu_intf0_out mdp_opp_table mdss_dsi0 mdss_dsi0_in mdss_dsi0_out mdss_dsi_opp_table mdss_dsi0_phy mdss_dsi1 mdss_dsi1_in mdss_dsi1_out mdss_dsi1_phy mdss_dp0 mdss_dp0_in mdss_dp0_out dispcc usb_1_hsphy usb_dp_qmpphy usb_dp_qmpphy_out usb_dp_qmpphy_usb_ss_in usb_dp_qmpphy_dp_in usb_1 usb_1_dwc3 usb_1_dwc3_hs usb_1_dwc3_ss pdc tsens0 tsens1 tsens2 aoss_qmp spmi_bus pm8010_m pm8010_m_temp_alarm pm8010_n pm8010_n_temp_alarm pm8550 pm8550_temp_alarm pm8550_gpios sdc2_card_det_n volume_up_n pm8550_flash pm8550_pwm pm8550b pm8550b_temp_alarm pm8550b_gpios pm8550b_eusb2_repeater pm8550ve pm8550ve_temp_alarm pm8550ve_gpios pm8550vs_c pm8550vs_c_temp_alarm pm8550vs_c_gpios pm8550vs_d pm8550vs_d_temp_alarm pm8550vs_d_gpios pm8550vs_e pm8550vs_e_temp_alarm pm8550vs_e_gpios pm8550vs_g pm8550vs_g_temp_alarm pm8550vs_g_gpios pmk8550 pmk8550_pon pon_pwrkey pon_resin pmk8550_rtc pmk8550_sdam_2 reboot_reason pmk8550_gpios cci0_0_default cci0_0_sleep cci0_1_default cci0_1_sleep cci1_0_default cci1_0_sleep cci1_1_default cci1_1_sleep cci2_0_default cci2_0_sleep cci2_1_default cci2_1_sleep hub_i2c0_data_clk hub_i2c1_data_clk hub_i2c2_data_clk hub_i2c3_data_clk hub_i2c4_data_clk hub_i2c5_data_clk hub_i2c6_data_clk hub_i2c7_data_clk hub_i2c8_data_clk hub_i2c9_data_clk pcie0_default_state pcie1_default_state qup_i2c0_data_clk qup_i2c1_data_clk qup_i2c2_data_clk qup_i2c3_data_clk qup_i2c4_data_clk qup_i2c5_data_clk qup_i2c6_data_clk qup_i2c7_data_clk qup_i2c8_data_clk qup_i2c9_data_clk qup_i2c10_data_clk qup_i2c11_data_clk qup_i2c12_data_clk qup_i2c13_data_clk qup_i2c14_data_clk qup_spi0_cs qup_spi0_data_clk qup_spi1_cs qup_spi1_data_clk qup_spi2_cs qup_spi2_data_clk qup_spi3_cs qup_spi3_data_clk qup_spi4_cs qup_spi4_data_clk qup_spi5_cs qup_spi5_data_clk qup_spi6_cs qup_spi6_data_clk qup_spi7_cs qup_spi7_data_clk qup_spi8_cs qup_spi8_data_clk qup_spi9_cs qup_spi9_data_clk qup_spi10_cs qup_spi10_data_clk qup_spi11_cs qup_spi11_data_clk qup_spi12_cs qup_spi12_data_clk qup_spi13_cs qup_spi13_data_clk qup_spi14_cs qup_spi14_data_clk qup_uart14_default qup_uart14_cts_rts qup_uart15_default sdc2_sleep sdc2_default bt_default lt9611_irq_pin lt9611_rst_pin spkr_2_sd_n_active wcd_default wlan_en apps_smmu intc gic_its apps_rsc apps_bcm_voter rpmhcc rpmhpd rpmhpd_opp_table rpmhpd_opp_ret rpmhpd_opp_min_svs rpmhpd_opp_low_svs_d2 rpmhpd_opp_low_svs_d1 rpmhpd_opp_low_svs_d0 rpmhpd_opp_low_svs rpmhpd_opp_low_svs_l1 rpmhpd_opp_svs rpmhpd_opp_svs_l0 rpmhpd_opp_svs_l1 rpmhpd_opp_nom rpmhpd_opp_nom_l1 rpmhpd_opp_nom_l2 rpmhpd_opp_turbo rpmhpd_opp_turbo_l1 vreg_bob1 vreg_bob2 vreg_l2b_3p0 vreg_l5b_3p1 vreg_l6b_1p8 vreg_l7b_1p8 vreg_l8b_1p8 vreg_l9b_2p9 vreg_l11b_1p2 vreg_l12b_1p8 vreg_l13b_3p0 vreg_l14b_3p2 vreg_l15b_1p8 vreg_l16b_2p8 vreg_l17b_2p5 vreg_s1c_1p2 vreg_s2c_0p8 vreg_s3c_0p9 vreg_s4c_1p2 vreg_s5c_0p7 vreg_s6c_1p8 vreg_l1c_1p2 vreg_l3c_1p2 vreg_l1d_0p88 vreg_l3e_0p9 vreg_l1g_0p91 vreg_l3g_0p91 vreg_s4i_0p85 vreg_l1i_0p88 vreg_l2i_0p88 vreg_l3i_1p2 vreg_l1m_1p1 vreg_l2m_1p056 vreg_l3m_2p8 vreg_l4m_2p8 vreg_l5m_1p8 vreg_l6m_2p8 vreg_l7m_2p96 vreg_l1n_1p1 vreg_l2n_1p056 vreg_l3n_1p8 vreg_l4n_1p8 vreg_l5n_2p8 vreg_l6n_2p8 vreg_l7n_3p3 cpufreq_hw llcc_bwmon_opp_table cpu_bwmon_opp_table gem_noc nsp_noc remoteproc_cdsp gpu0_alert0 gpu1_alert0 gpu2_alert0 gpu3_alert0 gpu4_alert0 gpu5_alert0 gpu6_alert0 gpu7_alert0 hdmi_connector_out pmic_glink_hs_in pmic_glink_ss_in pmic_glink_sbu lt9611_1v2 lt9611_3v3 vph_pwr vreg_bob_3v3 wcd939x vreg_pmu_rfa_cmn vreg_pmu_aon_0p59 vreg_pmu_wlcx_0p8 vreg_pmu_wlmx_0p85 vreg_pmu_btcmx_0p85 vreg_pmu_rfa_0p8 vreg_pmu_rfa_1p2 vreg_pmu_rfa_1p8 vreg_pmu_pcie_0p9 vreg_pmu_pcie_1p8 