    8    (                                                                                '   ,Qualcomm Technologies, Inc. SM8650 MTP           2qcom,sm8650-mtp qcom,sm8650    chosen           =serial0:115200n8          clocks     xo-board             2fixed-clock          I             V          f         sleep-clk            2fixed-clock          I             V           f   *      bi-tcxo-div2-clk             2fixed-factor-clock           I             n                u                        f   (      bi-tcxo-ao-div2-clk          2fixed-factor-clock           I             n               u                        f   )         cpus                                 cpu@0            cpu          2arm,cortex-a520                           n                            psci             psci                                        d                                   f      l2-cache             2cache           '            3                     f      l3-cache             2cache           '            3         f               cpu@100          cpu          2arm,cortex-a520                          n                            psci             psci                                        d                                   f         cpu@200          cpu          2arm,cortex-a720                          n                           psci             psci                	                                                          f      l2-cache             2cache           '            3                     f   	         cpu@300          cpu          2arm,cortex-a720                          n                  
         psci             psci                                                                          f      l2-cache             2cache           '            3                     f            cpu@400          cpu          2arm,cortex-a720                          n                           psci             psci                                                                          f      l2-cache             2cache           '            3                     f            cpu@500          cpu          2arm,cortex-a720                          n                           psci             psci                                                                          f      l2-cache             2cache           '            3                     f            cpu@600          cpu          2arm,cortex-a720                          n                           psci             psci                                                                          f      l2-cache             2cache           '            3                     f            cpu@700          cpu          2arm,cortex-x4                            n                           psci             psci                           f           L                                  f      l2-cache             2cache           '            3                     f            cpu-map    cluster0       core0           A         core1           A         core2           A         core3           A         core4           A         core5           A         core6           A         core7           A               idle-states         Epsci       cpu-sleep-0-0            2arm,idle-state          Rsilver-rail-power-collapse          b@          y  &                    ,                  f   !      cpu-sleep-1-0            2arm,idle-state          Rgold-rail-power-collapse            b@          y  X                                      f   "      cpu-sleep-2-0            2arm,idle-state          Rgold-plus-rail-power-collapse           b@          y            F          8                  f   #         domain-idle-states     cluster-sleep-0          2domain-idle-state           bA  D        y            	.          #         f   $      cluster-sleep-1          2domain-idle-state           bA D        y  
          0          '         f   %            firmware       scm          2qcom,scm-sm8650 qcom,scm                                                    interconnect-0           2qcom,sm8650-clk-virt                                   f   1      interconnect-1           2qcom,sm8650-mc-virt                                f         memory@a0000000          memory                                pmu-a520             2arm,cortex-a520-pmu                        pmu-a720             2arm,cortex-a720-pmu                        pmu-x4           2arm,cortex-x4-pmu                          psci             2arm,psci-1.0             smc    power-domain-cpu0           	                            !         f         power-domain-cpu1           	                            !         f         power-domain-cpu2           	                            "         f         power-domain-cpu3           	                            "         f   
      power-domain-cpu4           	                            "         f         power-domain-cpu5           	                            "         f         power-domain-cpu6           	                            "         f         power-domain-cpu7           	                            #         f         power-domain-cluster            	               $   %         f             reserved-memory                                   0   hyp@80000000                                    7      cpusys-vm@80e00000                      @           7      xbl-dt-log-merged@81a00000                      &           7      aop-cmd-db@81c60000          2qcom,cmd-db                                7      aop-tme-uefi-merged@81c80000                        P          7      smem@81d00000         
   2qcom,smem                                  >   &            7      adsp-mhi@81f00000                                  7      pvmfw@824a0000               J                  7      global-sync@82600000                 `                  7         f         tz-stat@82700000                 p                  7      qdss@82800000                                  7      qlink-logging@84800000                                  7         f         mpss-dsm@86b00000                                 7         f         mpss-dsm-2@8b400000              @                  7         f         mpss@8bc00000                      @           7         f         q6-mpss-dtb@9b000000                                    7         f         ipa-fw@9b080000                                7      ipa-gsi@9b090000                 	                  7      gpu-micro-code@9b09a000              	                  7         f         spss@9b0a0000                
                  7      spu-tz-shared@9b280000               (                  7      spu-modem-shared@9b2e0000                .                  7      camera@9b300000              0                  7      video@9bb00000                                 7      cvp@9c300000                 0       p           7      cdsp@9ca00000                      @           7         f         q6-cdsp-dtb@9de00000                                   7         f         q6-adsp-dtb@9de80000                                   7         f         adspslpi@9df00000                                 7         f         rmtfs@d7c00000           2qcom,rmtfs-mem                      @           7        F           U         tz-merged@d8000000                                  7      hwfence-shbuf@e6440000               D       -          7      trust-ui-vm@f3800000                       @           7      oem-vm@f7c00000                               7      llcc-lpi@ff800000                       `           7         smp2p-adsp           2qcom,smp2p          _   '                 s   '              z                              master-kernel           master-kernel                       f         slave-kernel            slave-kernel                                 f            smp2p-cdsp           2qcom,smp2p          _   '                 s   '              z   ^                            master-kernel           master-kernel                       f         slave-kernel            slave-kernel                                 f            smp2p-modem          2qcom,smp2p          _   '                 s   '              z                              master-kernel           master-kernel                       f         slave-kernel            slave-kernel                                 f         ipa-ap-to-modem         ipa                     f         ipa-modem-to-ap         ipa                              f            soc@0            2simple-bus                                                                  0                          clock-controller@100000          2qcom,sm8650-gcc                      B       @   n   (   )   *   +   ,       ,      -       -      -      .             I                      	            f   0      mailbox@406000           2qcom,sm8650-ipcc qcom,ipcc                @`                                                                  f   '      dma-controller@800000         (   2qcom,sm8650-gpi-dma qcom,sm6350-gpi-dma                                      L         M         N         O         P         Q         R         S         T         U         V         W                      !   ?        2           =   /  6             D      	  Qdisabled             f   4      geniqup@8c0000           2qcom,geni-se-qup                                     n   0      0           Xm-ahb s-ahb         =   /  #             D                                  0        Qokay       i2c@880000           2qcom,geni-i2c                         @               u            n   0   v        Xse        H     1         1         2         3                                dqup-core qup-config qup-memory           w   4              4                  |tx rx              5        default                                 	  Qdisabled          spi@880000           2qcom,geni-spi                         @               u            n   0   v        Xse        H     1         1         2         3                                dqup-core qup-config qup-memory           w   4              4                  |tx rx              6   7        default                                 	  Qdisabled          i2c@884000           2qcom,geni-i2c                 @       @               G            n   0   x        Xse        H     1         1         2         3                                dqup-core qup-config qup-memory           w   4             4                 |tx rx              8        default                                 	  Qdisabled          spi@884000           2qcom,geni-spi                 @       @               G            n   0   x        Xse        H     1         1         2         3                                dqup-core qup-config qup-memory           w   4             4                 |tx rx              9   :        default                                 	  Qdisabled          i2c@888000           2qcom,geni-i2c                        @               H            n   0   z        Xse        H     1         1         2         3                                dqup-core qup-config qup-memory           w   4             4                 |tx rx              ;        default                                 	  Qdisabled          spi@888000           2qcom,geni-spi                        @               H            n   0   z        Xse        H     1         1         2         3                                dqup-core qup-config qup-memory           w   4             4                 |tx rx              <   =        default                                 	  Qdisabled          i2c@88c000           2qcom,geni-i2c                        @               I            n   0   |        Xse        H     1         1         2         3                                dqup-core qup-config qup-memory           w   4             4                 |tx rx              >        default                                 	  Qdisabled          spi@88c000           2qcom,geni-spi                        @               I            n   0   |        Xse        H     1         1         2         3                                dqup-core qup-config qup-memory           w   4             4                 |tx rx              ?   @        default                                 	  Qdisabled          i2c@890000           2qcom,geni-i2c                         @               J            n   0   ~        Xse        H     1         1         2         3                                dqup-core qup-config qup-memory           w   4             4                 |tx rx              A        default                                 	  Qdisabled          spi@890000           2qcom,geni-spi                         @               J            n   0   ~        Xse        H     1         1         2         3                                dqup-core qup-config qup-memory           w   4             4                 |tx rx              B   C        default                                 	  Qdisabled          i2c@894000           2qcom,geni-i2c                 @       @               K            n   0           Xse        H     1         1         2         3                                dqup-core qup-config qup-memory           w   4             4                 |tx rx              D        default                                 	  Qdisabled          spi@894000           2qcom,geni-spi                 @       @               K            n   0           Xse        H     1         1         2         3                                dqup-core qup-config qup-memory           w   4             4                 |tx rx              E   F        default                                 	  Qdisabled          serial@898000            2qcom,geni-uart                       @                           n   0           Xse        0     1         1         2         3              dqup-core qup-config            G   H        default       	  Qdisabled          serial@89c000            2qcom,geni-debug-uart                         @                           n   0           Xse        0     1         1         2         3              dqup-core qup-config            I        default         Qokay             geniqup@9c0000           2qcom,geni-se-i2c-master-hub                                  n   0   \        Xs-ahb                                     0      	  Qdisabled       i2c@980000           2qcom,geni-i2c-master-hub                          @                           n   0   H   0   G        Xse core       0     1          1         2         3              dqup-core qup-config            J        default                                 	  Qdisabled          i2c@984000           2qcom,geni-i2c-master-hub                  @       @                           n   0   J   0   G        Xse core       0     1          1         2         3              dqup-core qup-config            K        default                                 	  Qdisabled          i2c@988000           2qcom,geni-i2c-master-hub                         @                           n   0   L   0   G        Xse core       0     1          1         2         3              dqup-core qup-config            L        default                                 	  Qdisabled          i2c@98c000           2qcom,geni-i2c-master-hub                         @                           n   0   N   0   G        Xse core       0     1          1         2         3              dqup-core qup-config            M        default                                 	  Qdisabled          i2c@990000           2qcom,geni-i2c-master-hub                          @                           n   0   P   0   G        Xse core       0     1          1         2         3              dqup-core qup-config            N        default                                 	  Qdisabled          i2c@994000           2qcom,geni-i2c-master-hub                  @       @                           n   0   R   0   G        Xse core       0     1          1         2         3              dqup-core qup-config            O        default                                 	  Qdisabled          i2c@998000           2qcom,geni-i2c-master-hub                         @                           n   0   T   0   G        Xse core       0     1          1         2         3              dqup-core qup-config            P        default                                 	  Qdisabled          i2c@99c000           2qcom,geni-i2c-master-hub                         @                           n   0   V   0   G        Xse core       0     1          1         2         3              dqup-core qup-config            Q        default                                 	  Qdisabled          i2c@9a0000           2qcom,geni-i2c-master-hub                          @                           n   0   X   0   G        Xse core       0     1          1         2         3              dqup-core qup-config            R        default                                 	  Qdisabled          i2c@9a4000           2qcom,geni-i2c-master-hub                  @       @                           n   0   Z   0   G        Xse core       0     1          1         2         3              dqup-core qup-config            S        default                                 	  Qdisabled             dma-controller@a00000         (   2qcom,sm8650-gpi-dma qcom,sm6350-gpi-dma                                                                                            %         &         '         (         )         *                      !           2           =   /                D      	  Qdisabled             f   U      geniqup@ac0000           2qcom,geni-se-qup                                     n   0      0           Xm-ahb s-ahb            1         1            	  dqup-core            =   /                D                                  0      	  Qdisabled       i2c@a80000           2qcom,geni-i2c                         @               a            n   0   a        Xse        H     1         1         2         3         T                       dqup-core qup-config qup-memory           w   U              U                  |tx rx              V        default                                 	  Qdisabled          spi@a80000           2qcom,geni-spi                         @               a            n   0   a        Xse        H     1         1         2         3         T                       dqup-core qup-config qup-memory           w   U              U                  |tx rx              W   X        default                                 	  Qdisabled          i2c@a84000           2qcom,geni-i2c                 @       @               b            n   0   c        Xse        H     1         1         2         3         T                       dqup-core qup-config qup-memory           w   U             U                 |tx rx              Y        default                                 	  Qdisabled          spi@a84000           2qcom,geni-spi                 @       @               b            n   0   c        Xse        H     1         1         2         3         T                       dqup-core qup-config qup-memory           w   U             U                 |tx rx              Z   [        default                                 	  Qdisabled          i2c@a88000           2qcom,geni-i2c                        @               c            n   0   e        Xse        H     1         1         2         3         T                       dqup-core qup-config qup-memory           w   U             U                 |tx rx              \        default                                 	  Qdisabled          spi@a88000           2qcom,geni-spi                        @               c            n   0   e        Xse        H     1         1         2         3         T                       dqup-core qup-config qup-memory           w   U             U                 |tx rx              ]   ^        default                                 	  Qdisabled          i2c@a8c000           2qcom,geni-i2c                        @               d            n   0   g        Xse        H     1         1         2         3         T                       dqup-core qup-config qup-memory           w   U             U                 |tx rx              _        default                                 	  Qdisabled          spi@a8c000           2qcom,geni-spi                        @               d            n   0   g        Xse        H     1         1         2         3         T                       dqup-core qup-config qup-memory           w   U             U                 |tx rx              `   a        default                                 	  Qdisabled          i2c@a90000           2qcom,geni-i2c                         @               e            n   0   i        Xse        H     1         1         2         3         T                       dqup-core qup-config qup-memory           w   U             U                 |tx rx              b        default                                 	  Qdisabled          spi@a90000           2qcom,geni-spi                         @               e            n   0   i        Xse        H     1         1         2         3         T                       dqup-core qup-config qup-memory           w   U             U                 |tx rx              c   d        default                                 	  Qdisabled          i2c@a94000           2qcom,geni-i2c                 @       @               f            n   0   k        Xse        H     1         1         2         3         T                       dqup-core qup-config qup-memory           w   U             U                 |tx rx              e        default                                 	  Qdisabled          spi@a94000           2qcom,geni-spi                 @       @               f            n   0   k        Xse        H     1         1         2         3         T                       dqup-core qup-config qup-memory           w   U             U                 |tx rx              f   g        default                                 	  Qdisabled          i2c@a98000           2qcom,geni-i2c                        @               k            n   0   m        Xse        H     1         1         2         3         T                       dqup-core qup-config qup-memory           w   U             U                 |tx rx              h        default                                 	  Qdisabled          spi@a98000           2qcom,geni-spi                        @               k            n   0   m        Xse        H     1         1         2         3         T                       dqup-core qup-config qup-memory           w   U             U                 |tx rx              i   j        default                                 	  Qdisabled          i2c@a9c000           2qcom,geni-i2c                        @               C            n   0   o        Xse        H     1         1         2         3         T                       dqup-core qup-config qup-memory           w   U             U                 |tx rx              k        default                                 	  Qdisabled          spi@a9c000           2qcom,geni-spi                        @               C            n   0   o        Xse        H     1         1         2         3         T                       dqup-core qup-config qup-memory           w   U             U                 |tx rx              l   m        default                                 	  Qdisabled             interconnect@1500000             2qcom,sm8650-cnoc-main                P       @                               f   o      interconnect@1600000             2qcom,sm8650-config-noc               `        b                                f   3      interconnect@1680000             2qcom,sm8650-system-noc               h       Ѐ                            interconnect@16c0000             2qcom,sm8650-pcie-anoc                l       "          n   0       0   	                               f   n      interconnect@16e0000             2qcom,sm8650-aggre1-noc               n       d          n   0      0                                  f   T      interconnect@1700000             2qcom,sm8650-aggre2-noc               p                 n                                     f         interconnect@1780000             2qcom,sm8650-mmss-noc                 x                                       f         rng@10c3000          2qcom,sm8650-trng qcom,trng               0              pcie@1c00000             pci       "   2qcom,pcie-sm8650 qcom,pcie-sm8550         P               0     `             `             `             `                 parf dbi elbi atu config          `                                                                                        (  msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7       @   n   0   $   0   &   0   '   0   ,   0   -   0      0       0         I  Xaux cfg bus_master bus_slave slave_q2a ddrss_sf_tbu noc_aggr cnoc_sf_axi               0           pci       0     n                  2         o              dpcie-mem cpu-pcie               0                    /            /                                                                                                                                                                                                               p            p                                               &               0   +        5pciephy                                8  0               `                 `0      `0                 D        Qokay            ?   q   `            J   q   ^              r        default    pcie@0           pci                                      &                                        0         phy@1c06000           2qcom,sm8650-qmp-gen3x2-pcie-phy              `               (   n   0   $   0   &          0   (   0   *        Xaux cfg_ahb ref rchng pipe          V   0   (        f            0           phy             0            I            {pcie0_pipe_clk                      Qokay               s           t         f   +      pcie@1c08000             pci       "   2qcom,pcie-sm8650 qcom,pcie-sm8550         P              0     @             @             @             @                 parf dbi elbi atu config          `        3         4         5         8         9         :         v         w         (  msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7       @   n   0   .   0   0   0   1   0   8   0   9   0      0       0         I  Xaux cfg bus_master bus_slave slave_q2a ddrss_sf_tbu noc_aggr cnoc_sf_axi            V   0   .        f$            0      0   	        pci link_down         0     n                  2         o              dpcie-mem cpu-pcie               0                   /           /                                                                                                                                                                                                           p           p                                              &               0   ,        5pciephy          D                               8  0               @                 @0      @0                Qokay            ?   q   c            J   q   a              u        default    pcie@0           pci                                      &                                        0         phy@1c0e000           2qcom,sm8650-qmp-gen4x2-pcie-phy                             (   n   0   2   0   0         0   4   0   6        Xaux cfg_ahb ref rchng pipe          V   0   4        f            0      0   
        phy phy_nocsr               0            I           {pcie1_pipe_clk                      Qokay               v           t           s         f   ,      dma-controller@1dc4000           2qcom,bam-v1.7.0              @                                2           =   /         /                                                          f   w      crypto@1dfa000        )   2qcom,sm8650-qce qcom,sm8150-qce qcom,qce                 ߠ       `                                   dmemory          w   w      w           |rx tx           =   /         /            phy@1d80000          2qcom,sm8650-qmp-ufs-phy                                 n          0                 Xref ref_aux qref               x            ufsphy              0            I                       Qokay               y           t         f   -      ufs@1d84000       +   2qcom,sm8650-ufshc qcom,ufshc jedec,ufs-2.0               @       0               	         @   n   0      0      0      0            0      0      0         n  Xcore_clk bus_aggr_clk iface_clk core_clk_unipro ref_clk tx_lane0_sync_clk rx_lane0_sync_clk rx_lane1_sync_clk         @   J                 J J                                   0           rst       0     T                  2         3   %           dufs-ddr cpu-ufs             0              z        =   /   `             D        !           5   {        0   -        5ufsphy                     Qokay            >   q              J   |        U          f   }        r O         f   x      crypto@1d88000        ;   2qcom,sm8650-inline-crypto-engine qcom,inline-crypto-engine               ؀                 n   0            f   {      hwlock@1f40000           2qcom,tcsr-mutex                                           f   &      clock-controller@1fc0000             2qcom,sm8650-tcsr syscon                     
           n                I                       f         gpu@3d00000       !   2qcom,adreno-43051401 qcom,adreno          0                                               #  kgsl_3d0_reg_memory cx_mem cx_dbgc                ,           =   ~           ~                                              	  Qdisabled             f      zap-shader                   opp-table            2operating-points-v2          f      opp-231000000                          4      opp-310000000               z9           8      opp-366000000               з           <      opp-422000000               '5           @      opp-500000000               e            P      opp-578000000               "s                 opp-629000000               %}@                 opp-680000000               (                  opp-720000000               *T                  opp-770000000               -D                 opp-834000000               1Ԁ          @            gmu@3d6a000       &   2qcom,adreno-gmu-750.1 qcom,adreno-gmu         0       ֠      P                  (                 gmu rscc gmu_pdc                  0         1           hfi gmu       8   n                      0      0   "                  !  Xahb gmu cxo axi memnoc hub demet                                   cx gx           =   ~                                      f      opp-table            2operating-points-v2          f      opp-260000000               I            @      opp-625000000               %@@                       clock-controller@3d90000             2qcom,sm8650-gpucc                                  n   (   0       0   !         I                      	            f         iommu@3da0000         @   2qcom,sm8650-smmu-500 qcom,adreno-smmu qcom,smmu-500 arm,mmu-500                                                  8                                                                                                                                      >         ?         @         A                                                                                     n         0   "   0   #               Xhlos bus iface ahb                          D         f   ~      ipa@3f40000           2qcom,sm8650-ipa qcom,sm8550-ipa         =   /         /            0                            P     @               ipa-reg ipa-shared gsi        8  _                                                 (  ipa gsi ipa-clock-query ipa-setup-ready          n              Xcore          0                         2          3               dmemory config                                         *  ipa-clock-enabled-valid ipa-clock-enabled         	  Qdisabled          remoteproc@4080000           2qcom,sm8650-mpss-pas                                L  _                                                                0  wdog fatal ready handover stop-ack shutdown-ack          n               Xxo                                                            cx mss                                                           stop            Qokay          0  qcom/sm8650/modem.mbn qcom/sm8650/modem_dtb.mbn    glink-edge          _   '                  s   '                          ,mpss             remoteproc@6800000           2qcom,sm8650-adsp-pas                                <  _                                                    #  wdog fatal ready handover stop-ack           n               Xxo                                                           lcx lmx                                                 stop            Qokay          .  qcom/sm8650/adsp.mbn qcom/sm8650/adsp_dtb.mbn      glink-edge          _   '                  s   '                          ,lpass      fastrpc          2qcom,fastrpc            2fastrpcglink-apps-dsp           ,adsp             F                             compute-cb@3             2qcom,fastrpc-compute-cb                     =   /        /  C             D      compute-cb@4             2qcom,fastrpc-compute-cb                     =   /        /  D             D      compute-cb@5             2qcom,fastrpc-compute-cb                     =   /        /  E             D      compute-cb@6             2qcom,fastrpc-compute-cb                     =   /        /  F             D      compute-cb@7             2qcom,fastrpc-compute-cb                   $  =   /     @   /  g       /               D         gpr       	   2qcom,gpr          
  2adsp_apps           ]           i                                   service@1            2qcom,q6apm                      v            avs/audio msm/adsp/audio_pd          f     bedais           2qcom,q6apm-lpass-dais           v            f        dais             2qcom,q6apm-dais         =   /        /  a             service@2            2qcom,q6prm                      avs/audio msm/adsp/audio_pd    clock-controller             2qcom,q6prm-lpass-clocks          I            f                     codec@6aa0000         8   2qcom,sm8650-lpass-wsa-macro qcom,sm8550-lpass-wsa-macro                             (   n      D         f         g              Xmclk macro dcodec fsgen          I          
  {wsa2-mclk           v            f         soundwire@6ab0000            2qcom,soundwire-v2.0.0                                                    n           Xiface           ,WSA2                       default                       	           ?   ?                                                  
                      2                  M           j                                     v         	  Qdisabled          codec@6ac0000         6   2qcom,sm8650-lpass-rx-macro qcom,sm8550-lpass-rx-macro                               (   n      @         f         g              Xmclk macro dcodec fsgen          I            {mclk            v            f         soundwire@6ad0000            2qcom,soundwire-v2.0.0                                                    n           Xiface           ,RX                     default                                        1               	                                  
                  2          M          j                                       v         	  Qdisabled          codec@6ae0000         6   2qcom,sm8650-lpass-tx-macro qcom,sm8550-lpass-tx-macro                               (   n      9         f         g              Xmclk macro dcodec fsgen          I            {mclk            v            f         codec@6b00000         8   2qcom,sm8650-lpass-wsa-macro qcom,sm8550-lpass-wsa-macro                             (   n      B         f         g              Xmclk macro dcodec fsgen          I            {mclk            v            f         soundwire@6b10000            2qcom,soundwire-v2.0.0                                                    n           Xiface           ,WSA                    default                       	           ?   ?                                                  
                      2                  M           j                                     v           Qokay             f     speaker@0,0          2sdw20217020400                                      default                          v          	  SpkrLeft                                                 
            f        speaker@0,1          2sdw20217020400                                     default            q   M           v          
  SpkrRight                                                            f           soundwire@6d30000            2qcom,soundwire-v2.0.0                                                           core wakeup          n           Xiface           ,TX                     default                                                                      
                2        M        j                                    v         	  Qdisabled          codec@6d44000         6   2qcom,sm8650-lpass-va-macro qcom,sm8550-lpass-va-macro                @              $   n      9         f         g           Xmclk macro dcodec            I            {fsgen           v            f         pinctrl@6e80000          2qcom,sm8650-lpass-lpi-pinctrl                                  n      f         g           Xcore audio                                                     f      tx-swr-active-state          f      clk-pins            gpio0           swr_tx_clk          "           1            ;      data-pins           gpio1 gpio2 gpio14          swr_tx_data         "           1            H         rx-swr-active-state          f      clk-pins            gpio3           swr_rx_clk          "           1            ;      data-pins           gpio4 gpio5         swr_rx_data         "           1            H         dmic01-default-state       clk-pins            gpio6         
  dmic1_clk           "            V      data-pins           gpio7           dmic1_data          "            b         dmic23-default-state       clk-pins            gpio8         
  dmic2_clk           "            V      data-pins           gpio9           dmic2_data          "            b         wsa-swr-active-state             f      clk-pins            gpio10          wsa_swr_clk         "           1            ;      data-pins           gpio11          wsa_swr_data            "           1            H         wsa2-swr-active-state            f      clk-pins            gpio15          wsa2_swr_clk            "           1            ;      data-pins           gpio16          wsa2_swr_data           "           1            H         spkr-1-sd-n-active-state            gpio21          gpio            "            ;         o         f            interconnect@7400000             2qcom,sm8650-lpass-lpiaon-noc                 @                                   interconnect@7430000             2qcom,sm8650-lpass-lpicx-noc              C                                       f         interconnect@7e40000             2qcom,sm8650-lpass-ag-noc                                                     mmc@8804000       $   2qcom,sm8650-sdhci qcom,sdhci-msm-v5              @                                            hc_irq pwr_irq           n   0      0                  Xiface core xo         0                       2         3               dsdhc-ddr cpu-sdhc                                      =   /  @            z                           d,        h         D        Qokay                                                                                                 default sleep      opp-table            2operating-points-v2          f      opp-19200000                $                  opp-50000000                                 opp-100000000                                 opp-202000000               
F                       clock-controller@aaf0000             2qcom,sm8650-videocc              
                  n   (   0                           I                      	         cci@ac15000       !   2qcom,sm8650-cci qcom,msm8996-cci                 
P                                                  n                  
        Xcamnoc_axi cpas_ahb cci                                     default sleep         	  Qdisabled                                 i2c-bus@0                         V B@                                i2c-bus@1                        V B@                                   cci@ac16000       !   2qcom,sm8650-cci qcom,msm8996-cci                 
`                                                  n                          Xcamnoc_axi cpas_ahb cci                                     default sleep         	  Qdisabled                                 i2c-bus@0                         V B@                                i2c-bus@1                        V B@                                   cci@ac17000       !   2qcom,sm8650-cci qcom,msm8996-cci                 
p                                                  n                          Xcamnoc_axi cpas_ahb cci                                     default sleep         	  Qdisabled                                 i2c-bus@0                         V B@                                i2c-bus@1                        V B@                                   clock-controller@ade0000             2qcom,sm8650-camcc                
                  n   0      (   )   *                        I                      	            f         display-subsystem@ae00000            2qcom,sm8650-mdss                 
                 mdss                   S            n         0         =                     0                       2         3              dmdp0-mem cpu-cfg                            =   /                                                            0        Qokay             f      display-controller@ae01000           2qcom,sm8650-dpu               
           
               	  mdp vbif            _             (   n   0               @      =      I        Xnrt_bus iface lut core vsync            V      I        f$                              ports                                port@0                  endpoint                        f            port@1                 endpoint                        f            port@2                 endpoint                        f               opp-table            2operating-points-v2          f      opp-200000000                                 opp-325000000               _@                 opp-375000000               Z                 opp-514000000                          z            dsi@ae94000       (   2qcom,sm8650-dsi-ctrl qcom,mdss-dsi-ctrl              
@              	  dsi_ctrl            _            0   n                  B      8         0         $  Xbyte byte_intf pixel core iface bus         V            C                                                       0           5dsi                                   Qokay            	   t   ports                                port@0                  endpoint                        f            port@1                 endpoint                       	"                      f               opp-table            2operating-points-v2          f      opp-187500000               -                 opp-300000000                                 opp-358000000               V                    panel@0          2visionox,vtdr6130                        >   q              	-           	:           	E                                       default sleep      port       endpoint                        f                  phy@ae95000          2qcom,sm8650-dsi-phy-4nm       0       
P            
R           
U                dsi_phy dsi_phy_lane dsi_pll             n                   
  Xiface ref            I                       Qokay            	P   s         f         dsi@ae96000       (   2qcom,sm8650-dsi-ctrl qcom,mdss-dsi-ctrl              
`              	  dsi_ctrl            _            0   n                  D      :         0         $  Xbyte byte_intf pixel core iface bus         V      	      E                                                       0           5dsi                                 	  Qdisabled       ports                                port@0                  endpoint                        f            port@1                 endpoint                   phy@ae97000          2qcom,sm8650-dsi-phy-4nm       0       
p            
r           
u                dsi_phy dsi_phy_lane dsi_pll             n                   
  Xiface ref            I                     	  Qdisabled             f         displayport-controller@af54000           2qcom,sm8650-dp        P       
@           
B            
P       p    
`            
p                _            (   n                                    ;  Xcore_iface core_aux ctrl_link ctrl_link_iface stream_pixel          V                       .      .                                     0   .           5dp          v          	  Qdisabled       opp-table            2operating-points-v2          f      opp-162000000               	                 opp-270000000               ߀                 opp-540000000                /                  opp-810000000               0G           z         ports                                port@0                  endpoint                        f            port@1                 endpoint                        f                     clock-controller@af00000             2qcom,sm8650-dispcc               
               \   n   (   )   0      *                             .      .                                                              I                      	           Qokay             f         phy@88e3000       6   2qcom,sm8650-snps-eusb2-phy qcom,sm8550-snps-eusb2-phy                0       T         n              Xref            0                       Qokay            	E   s        	\   t        0            f         phy@88e8000          2qcom,sm8650-qmp-usb3-dp-phy                     0           n   0             0      0           Xaux ref com_aux usb3_pipe              0      0           phy common              0            I                       	j        Qokay               t                    f   .   ports                                port@0                  endpoint                        f           port@1                 endpoint                        f            port@2                 endpoint                        f                  usb@a6f8800          2qcom,sm8650-dwc3 qcom,dwc3               
o              D  _                                                           <  pwr_event hs_phy_irq dp_hs_phy_irq dm_hs_phy_irq ss_phy_irq       0   n   0   
   0      0      0      0               &  Xcfg_noc core iface sleep mock_utmi xo           V   0      0           f$             0               0              z                                  0        Qokay       usb@a600000       
   2snps,dwc3                
`                                   =   /   @            0      .            5usb2-phy usb3-phy           	}             	         	         	         	         	         
         
'         
=         
S         
h         D        
wotg          
   ports                                port@0                  endpoint                        f           port@1                 endpoint                        f                     interrupt-controller@b220000             2qcom,sm8650-pdc qcom,pdc                  "             @        d                   H  
         ^   ^  a      }   ?      ~                                                    f         thermal-sensor@c228000            2qcom,sm8650-tsens qcom,tsens-v2               "            "                                           uplow critical          
           
            f         thermal-sensor@c229000            2qcom,sm8650-tsens qcom,tsens-v2               "            "0                                          uplow critical          
           
            f         thermal-sensor@c22a000            2qcom,sm8650-tsens qcom,tsens-v2               "            "@                                          uplow critical          
           
            f         power-management@c300000          #   2qcom,sm8650-aoss-qmp qcom,aoss-qmp               0                      '        _   '                   s   '                 I             f         sram@c3f0000             2qcom,rpmh-stats              ?               spmi@c400000             2qcom,spmi-pmic-arb        P       @        0     P       @      D             L             B       @         core chnls obsrvr intr cnfg         _                 periph_irq                      
            
                                                     pmic@c           2qcom,pm8010 qcom,spmi-pmic                                               temp-alarm@2400          2qcom,spmi-temp-alarm               $               $               
             f           pmic@d           2qcom,pm8010 qcom,spmi-pmic                                               temp-alarm@2400          2qcom,spmi-temp-alarm               $               $               
             f           pmic@1           2qcom,pm8550 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
               
               
             f        gpio@8800             2qcom,pm8550-gpio qcom,spmi-gpio                                                                                    f      sdc2-card-det-state         gpio12          normal           
         b         
        
            f            led-controller@ee00       *   2qcom,pm8550-flash-led qcom,spmi-flash-led                     	  Qdisabled          pwm       !   2qcom,pm8550-pwm qcom,pm8350c-pwm                     	  Qdisabled             pmic@7           2qcom,pm8550 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
               
               
             f        gpio@8800         !   2qcom,pm8550b-gpio qcom,spmi-gpio                                                                                       f         phy@fd00             2qcom,pm8550b-eusb2-repeater                                                        f            pmic@8           2qcom,pm8550 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
               
               
             f        gpio@8800         "   2qcom,pm8550ve-gpio qcom,spmi-gpio                                                                                      f            pmic@2           2qcom,pm8550 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
               
               
             f        gpio@8800         "   2qcom,pm8550vs-gpio qcom,spmi-gpio                                                                                      f            pmic@3           2qcom,pm8550 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
               
               
             f        gpio@8800         "   2qcom,pm8550vs-gpio qcom,spmi-gpio                                                                                      f            pmic@4           2qcom,pm8550 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
               
               
             f  	      gpio@8800         "   2qcom,pm8550vs-gpio qcom,spmi-gpio                                                                                      f            pmic@6           2qcom,pm8550 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
               
               
             f  
      gpio@8800         "   2qcom,pm8550vs-gpio qcom,spmi-gpio                                                                                      f            pmic@0           2qcom,pm8550 qcom,spmi-pmic                                                pon@1300             2qcom,pmk8350-pon                         	  hlos pbs       pwrkey           2qcom,pmk8350-pwrkey                              )   t      	  Qdisabled          resin            2qcom,pmk8350-resin                             	  Qdisabled             rtc@6100             2qcom,pmk8350-rtc               a   b       
  rtc alarm                  b            nvram@7100           2qcom,spmi-sdam             q                                  0      q       reboot-reason@48                H           4               f           gpio@8800         !   2qcom,pmk8550-gpio qcom,spmi-gpio                                                                                       f            pmic@a           2qcom,pmr735d qcom,spmi-pmic             
                                 temp-alarm@a00           2qcom,spmi-temp-alarm               
            
   
               
             f        gpio@8800         !   2qcom,pmr735d-gpio qcom,spmi-gpio                                                                                       f               pinctrl@f100000          2qcom,sm8650-tlmm                        0                                                                       q                   9           G          J            f   q   cci0-0-default-state             f      sda-pins            gpio113         cci_i2c_sda         "           
        scl-pins            gpio114         cci_i2c_scl         "           
           cci0-0-sleep-state           f      sda-pins            gpio113         cci_i2c_sda         "            \      scl-pins            gpio114         cci_i2c_scl         "            \         cci0-1-default-state             f      sda-pins            gpio115         cci_i2c_sda         "           
        scl-pins            gpio116         cci_i2c_scl         "           
           cci0-1-sleep-state           f      sda-pins            gpio115         cci_i2c_sda         "            \      scl-pins            gpio116         cci_i2c_scl         "            \         cci1-0-default-state             f      sda-pins            gpio117         cci_i2c_sda         "           
        scl-pins            gpio118         cci_i2c_scl         "           
           cci1-0-sleep-state           f      sda-pins            gpio117         cci_i2c_sda         "            \      scl-pins            gpio118         cci_i2c_scl         "            \         cci1-1-default-state             f      sda-pins            gpio12          cci_i2c_sda         "           
        scl-pins            gpio13          cci_i2c_scl         "           
           cci1-1-sleep-state           f      sda-pins            gpio12          cci_i2c_sda         "            \      scl-pins            gpio13          cci_i2c_scl         "            \         cci2-0-default-state             f      sda-pins            gpio112         cci_i2c_sda         "           
        scl-pins            gpio153         cci_i2c_scl         "           
           cci2-0-sleep-state           f      sda-pins            gpio112         cci_i2c_sda         "            \      scl-pins            gpio153         cci_i2c_scl         "            \         cci2-1-default-state             f      sda-pins            gpio119         cci_i2c_sda         "           
        scl-pins            gpio120         cci_i2c_scl         "           
           cci2-1-sleep-state           f      sda-pins            gpio119         cci_i2c_sda         "            \      scl-pins            gpio120         cci_i2c_scl         "            \         hub-i2c0-data-clk-state         gpio64 gpio65           i2chub0_se0         "            
         f   J      hub-i2c1-data-clk-state         gpio66 gpio67           i2chub0_se1         "            
         f   K      hub-i2c2-data-clk-state         gpio68 gpio69           i2chub0_se2         "            
         f   L      hub-i2c3-data-clk-state         gpio70 gpio71           i2chub0_se3         "            
         f   M      hub-i2c4-data-clk-state         gpio72 gpio73           i2chub0_se4         "            
         f   N      hub-i2c5-data-clk-state         gpio74 gpio75           i2chub0_se5         "            
         f   O      hub-i2c6-data-clk-state         gpio76 gpio77           i2chub0_se6         "            
         f   P      hub-i2c7-data-clk-state         gpio78 gpio79           i2chub0_se7         "            
         f   Q      hub-i2c8-data-clk-state         gpio206 gpio207         i2chub0_se8         "            
         f   R      hub-i2c9-data-clk-state         gpio80 gpio81           i2chub0_se9         "            
         f   S      pcie0-default-state          f   r   perst-pins          gpio94          gpio            "            \      clkreq-pins         gpio95          pcie0_clk_req_n         "            
      wake-pins           gpio96          gpio            "            
         pcie1-default-state          f   u   perst-pins          gpio97          gpio            "            \      clkreq-pins         gpio98          pcie1_clk_req_n         "            
      wake-pins           gpio99          gpio            "            
         qup-i2c0-data-clk-state         gpio32 gpio33         	  qup1_se0            "            
         f   V      qup-i2c1-data-clk-state         gpio36 gpio37         	  qup1_se1            "            
         f   Y      qup-i2c2-data-clk-state         gpio40 gpio41         	  qup1_se2            "            
         f   \      qup-i2c3-data-clk-state         gpio44 gpio45         	  qup1_se3            "            
         f   _      qup-i2c4-data-clk-state         gpio48 gpio49         	  qup1_se4            "            
         f   b      qup-i2c5-data-clk-state         gpio52 gpio53         	  qup1_se5            "            
         f   e      qup-i2c6-data-clk-state         gpio56 gpio57         	  qup1_se6            "            
         f   h      qup-i2c7-data-clk-state         gpio60 gpio61         	  qup1_se7            "            
         f   k      qup-i2c8-data-clk-state         gpio0 gpio1       	  qup2_se0            "            
         f   5      qup-i2c9-data-clk-state         gpio4 gpio5       	  qup2_se1            "            
         f   8      qup-i2c10-data-clk-state            gpio8 gpio9       	  qup2_se2            "            
         f   ;      qup-i2c11-data-clk-state            gpio12 gpio13         	  qup2_se3            "            
         f   >      qup-i2c12-data-clk-state            gpio16 gpio17         	  qup2_se4            "            
         f   A      qup-i2c13-data-clk-state            gpio20 gpio21         	  qup2_se5            "            
         f   D      qup-i2c14-data-clk-state            gpio24 gpio25         	  qup2_se6            "            
      qup-spi0-cs-state           gpio35        	  qup1_se0            "            ;         f   X      qup-spi0-data-clk-state         gpio32 gpio33 gpio34          	  qup1_se0            "            ;         f   W      qup-spi1-cs-state           gpio39        	  qup1_se1            "            ;         f   [      qup-spi1-data-clk-state         gpio36 gpio37 gpio38          	  qup1_se1            "            ;         f   Z      qup-spi2-cs-state           gpio43        	  qup1_se2            "            ;         f   ^      qup-spi2-data-clk-state         gpio40 gpio41 gpio42          	  qup1_se2            "            ;         f   ]      qup-spi3-cs-state           gpio47        	  qup1_se3            "            ;         f   a      qup-spi3-data-clk-state         gpio44 gpio45 gpio46          	  qup1_se3            "            ;         f   `      qup-spi4-cs-state           gpio51        	  qup1_se4            "            ;         f   d      qup-spi4-data-clk-state         gpio48 gpio49 gpio50          	  qup1_se4            "            ;         f   c      qup-spi5-cs-state           gpio55        	  qup1_se5            "            ;         f   g      qup-spi5-data-clk-state         gpio52 gpio53 gpio54          	  qup1_se5            "            ;         f   f      qup-spi6-cs-state           gpio59        	  qup1_se6            "            ;         f   j      qup-spi6-data-clk-state         gpio56 gpio57 gpio58          	  qup1_se6            "            ;         f   i      qup-spi7-cs-state           gpio63        	  qup1_se7            "            ;         f   m      qup-spi7-data-clk-state         gpio60 gpio61 gpio62          	  qup1_se7            "            ;         f   l      qup-spi8-cs-state           gpio3         	  qup2_se0            "            ;         f   7      qup-spi8-data-clk-state         gpio0 gpio1 gpio2         	  qup2_se0            "            ;         f   6      qup-spi9-cs-state           gpio7         	  qup2_se1            "            ;         f   :      qup-spi9-data-clk-state         gpio4 gpio5 gpio6         	  qup2_se1            "            ;         f   9      qup-spi10-cs-state          gpio11        	  qup2_se2            "            ;         f   =      qup-spi10-data-clk-state            gpio8 gpio9 gpio10        	  qup2_se2            "            ;         f   <      qup-spi11-cs-state          gpio15        	  qup2_se3            "            ;         f   @      qup-spi11-data-clk-state            gpio12 gpio13 gpio14          	  qup2_se3            "            ;         f   ?      qup-spi12-cs-state          gpio19        	  qup2_se4            "            ;         f   C      qup-spi12-data-clk-state            gpio16 gpio17 gpio18          	  qup2_se4            "            ;         f   B      qup-spi13-cs-state          gpio23        	  qup2_se5            "            ;         f   F      qup-spi13-data-clk-state            gpio20 gpio21 gpio22          	  qup2_se5            "            ;         f   E      qup-spi14-cs-state          gpio27        	  qup2_se6            "            ;      qup-spi14-data-clk-state            gpio24 gpio25 gpio26          	  qup2_se6            "            ;      qup-uart14-default-state            gpio26 gpio27         	  qup2_se6            "            
         f   G      qup-uart14-cts-rts-state            gpio24 gpio25         	  qup2_se6            "            \         f   H      qup-uart15-default-state            gpio30 gpio31         	  qup2_se7            "            ;         f   I      sdc2-sleep-state             f      clk-pins          	  sdc2_clk            "            ;      cmd-pins          	  sdc2_cmd            "            
      data-pins         
  sdc2_data           "            
         sdc2-default-state           f      clk-pins          	  sdc2_clk            "            ;      cmd-pins          	  sdc2_cmd            "   
         
      data-pins         
  sdc2_data           "   
         
         disp0-reset-n-active-state          gpio133         gpio            "            ;         f         disp0-reset-n-suspend-state         gpio133         gpio            "            \         f         mdp-vsync-active-state          gpio86        
  mdp_vsync           "            \         f         mdp-vsync-suspend-state         gpio86        
  mdp_vsync           "            \         f         spkr-2-sd-n-active-state            gpio77          gpio            "            ;         o         f            iommu@15000000        /   2qcom,sm8650-smmu-500 qcom,smmu-500 arm,mmu-500                                       A          a          b          c          d          e          f          g          h          i          j          k          l          m          n          o          p          q          r          s          t          u          v                                                                                                                                 ;         <         =         >         ?         @         A         B         C         D         E         F         G         H         I         J         K         L         M         N         O         P         Q         R         S         T         U         V         W         X         Y                                                                                                                                                                                                                                                                                                                         D         f   /      interrupt-controller@17100000            2arm,gic-v3                                                     	                               k                                                    0         f      msi-controller@17140000          2arm,gic-v3-its                                                     f   p         timer@17420000           2arm,armv7-timer-mem              B                 0                                            frame@17421000           B    B                                                   frame@17423000           B0                   	                    	  Qdisabled          frame@17425000           BP                   
                    	  Qdisabled          frame@17427000           Bp                                       	  Qdisabled          frame@17429000           B                                       	  Qdisabled          frame@1742b000           B                                       	  Qdisabled          frame@1742d000           B                                       	  Qdisabled             rsc@17a00000             2qcom,rpmh-rsc         @                                                               drv-0 drv-1 drv-2         $                                                                                                            	  ,apps_rsc       bcm-voter            2qcom,bcm-voter           f         clock-controller             2qcom,sm8650-rpmh-clk             n           Xxo           I            f         power-controller             2qcom,sm8650-rpmhpd                     	            f      opp-table            2operating-points-v2          f      opp-16                   opp-48             0         f         opp-52             4      opp-56             8         f         opp-60             <      opp-64             @         f         opp-80             P      opp-128                     f         opp-144                  opp-192                     f         opp-256                     f   z      opp-320           @      opp-336           P      opp-384                 opp-416                       regulators-0             2qcom,pm8550-rpmh-regulators                               
                       .           @           Q           b           q                                 b      bob1          
  vreg_bob1            2K          <l                    f         bob2          
  vreg_bob2            )          -                     f         ldo2            vreg_l2b_3p0             -          -                                         ldo5            vreg_l5b_3p1             /]          /]                                            f         ldo6            vreg_l6b_1p8             w@         -                                         ldo7            vreg_l7b_1p8             w@         -                  ldo8            vreg_l8b_1p8             w@         -                                            f         ldo9            vreg_l9b_2p9             -*         -                                            f         ldo11           vreg_l11b_1p2            O                                                     f         ldo12           vreg_l12b_1p8            w@         w@                                           f         ldo13           vreg_l13b_3p0            -         -                                           f         ldo14           vreg_l14b_3p2            0          0                                         ldo15           vreg_l15b_1p8            w@         w@                                           f         ldo16           vreg_l16b_2p8            *         *                                        ldo17           vreg_l17b_2p5            &5@         &5@                                           f   |         regulators-1             2qcom,pm8550vs-rpmh-regulators           2           @                       N           \           j           x                                 c      smps1           vreg_s1c_1p2             *@                             f         smps2           vreg_s2c_0p8                                         smps3           vreg_s3c_0p9                      <@                    f         smps4           vreg_s4c_1p2             @                           smps5           vreg_s5c_0p7             y                          smps6           vreg_s6c_1p8             R                              f         ldo1            vreg_l1c_1p2             O         O                                           f   }      ldo3            vreg_l3c_1p2             O         O                                           f            regulators-2             2qcom,pm8550vs-rpmh-regulators           2           d      ldo1            vreg_l1d_0p88                     	                                           f   y         regulators-3             2qcom,pm8550vs-rpmh-regulators                       e      ldo3            vreg_l3e_0p9             m         	                                           f   v         regulators-4             2qcom,pm8550vs-rpmh-regulators           2                       g      ldo1            vreg_l1g_0p91                     	                                        ldo3            vreg_l3g_0p91            m                                                    f            regulators-5             2qcom,pm8550ve-rpmh-regulators           2           @                       x           i      smps4           vreg_s4i_0p85                       Q                 ldo1            vreg_l1i_0p88            m                                                    f   s      ldo2            vreg_l2i_0p88            m                                                 ldo3            vreg_l3i_0p91            O         O                                           f   t         regulators-6             2qcom,pm8010-rpmh-regulators         m                                                             ldo1            vreg_l1m_1p1             ؀         ؀                                        ldo2            vreg_l2m_1p056                                                              ldo3            vreg_l3m_2p8             *         *                 ldo4            vreg_l4m_2p8             *         *                 ldo5            vreg_l5m_1p8             w@         w@                 ldo6            vreg_l6m_2p8             *         *                 ldo7            vreg_l7m_2p96            -*         -*                    regulators-7             2qcom,pm8010-rpmh-regulators         n                                                             ldo1            vreg_l1n_1p1             ؀         ؀                                        ldo2            vreg_l2n_1p056                                                              ldo3            vreg_l3n_1p8             w@         w@                 ldo4            vreg_l4n_1p8             w@         w@                 ldo5            vreg_l5n_2p8             *         *                 ldo6            vreg_l6n_2p8             *         *                 ldo7            vreg_l7n_3p3             2j@         2j@                       cpufreq@17d91000          +   2qcom,sm8650-cpufreq-epss qcom,cpufreq-epss        @                                0            @              4  freq-domain0 freq-domain1 freq-domain2 freq-domain3       0                                               0  dcvsh-irq-0 dcvsh-irq-1 dcvsh-irq-2 dcvsh-irq-3          n   (   0           Xxo alternate                        I            f         pmu@24091000          .   2qcom,sm8650-llcc-bwmon qcom,sc7280-llcc-bwmon                $	                       Q                                            opp-table            2operating-points-v2          f      opp-0            p      opp-1            ,h      opp-2            Z      opp-3            ci8      opp-4            y      opp-5            A      opp-6            H      opp-7            ։      opp-8            h            pmu@240b7400          (   2qcom,sm8650-cpu-bwmon qcom,sdm845-bwmon              $t                      E              2         2                    opp-table            2operating-points-v2          f      opp-0            E      opp-1            l}p      opp-2                  opp-3                  opp-4            9`      opp-5            /(            interconnect@24100000            2qcom,sm8650-gem-noc              $       P                               f   2      system-cache-controller@25000000             2qcom,sm8650-llcc          `       %               %@              %               %`              %              %                X  llcc0_base llcc1_base llcc2_base llcc3_base llcc_broadcast_base llcc_broadcast_and_base               
         interconnect@320c0000            2qcom,sm8650-nsp-noc              2                                       f         remoteproc@32300000          2qcom,sm8650-cdsp-pas                 20               @  _         B                                              #  wdog fatal ready handover stop-ack           n               Xxo                                                   
               cx mxc nsp                                                     stop            Qokay          .  qcom/sm8650/cdsp.mbn qcom/sm8650/cdsp_dtb.mbn      glink-edge          _   '                  s   '                          ,cdsp       fastrpc          2qcom,fastrpc            2fastrpcglink-apps-dsp           ,cdsp             F                             compute-cb@1             2qcom,fastrpc-compute-cb                   $  =   /  a       /         /               D      compute-cb@2             2qcom,fastrpc-compute-cb                   $  =   /  b       /         /               D      compute-cb@3             2qcom,fastrpc-compute-cb                   $  =   /  c       /         /               D      compute-cb@4             2qcom,fastrpc-compute-cb                   $  =   /  d       /         /               D      compute-cb@5             2qcom,fastrpc-compute-cb                   $  =   /  e       /         /               D      compute-cb@6             2qcom,fastrpc-compute-cb                   $  =   /  f       /         /               D      compute-cb@7             2qcom,fastrpc-compute-cb                   $  =   /  g       /         /               D      compute-cb@8             2qcom,fastrpc-compute-cb                   $  =   /  h       /         /               D      compute-cb@12            2qcom,fastrpc-compute-cb                   $  =   /  l       /         /               D      compute-cb@13            2qcom,fastrpc-compute-cb                   $  =   /  m       /         /               D      compute-cb@14            2qcom,fastrpc-compute-cb                   $  =   /  n       /         /               D                  thermal-zones      aoss0-thermal                     trips      trip-point0          _        +           hot       aoss0-critical                   +          	   critical                cpuss0-thermal                   trips      trip-point0          _        +           hot       cpuss0-critical                  +          	   critical                cpuss1-thermal                   trips      trip-point0          _        +           hot       cpuss1-critical                  +          	   critical                cpuss2-thermal                   trips      trip-point0          _        +           hot       cpuss2-critical                  +          	   critical                cpuss3-thermal                   trips      trip-point0          _        +           hot       cpuss3-critical                  +          	   critical                cpu2-top-thermal                     trips      trip-point0          _        +           passive       trip-point1          s        +           passive       cpu2-critical                    +        	   critical                cpu2-bottom-thermal                  trips      trip-point0          _        +           passive       trip-point1          s        +           passive       cpu2-critical                    +        	   critical                cpu3-top-thermal                     trips      trip-point0          _        +           passive       trip-point1          s        +           passive       cpu3-critical                    +        	   critical                cpu3-bottom-thermal                  trips      trip-point0          _        +           passive       trip-point1          s        +           passive       cpu3-critical                    +        	   critical                cpu4-top-thermal                  	   trips      trip-point0          _        +           passive       trip-point1          s        +           passive       cpu4-critical                    +        	   critical                cpu4-bottom-thermal               
   trips      trip-point0          _        +           passive       trip-point1          s        +           passive       cpu4-critical                    +        	   critical                cpu5-top-thermal                     trips      trip-point0          _        +           passive       trip-point1          s        +           passive       cpu5-critical                    +        	   critical                cpu5-bottom-thermal                  trips      trip-point0          _        +           passive       trip-point1          s        +           passive       cpu5-critical                    +        	   critical                cpu6-top-thermal                     trips      trip-point0          _        +           passive       trip-point1          s        +           passive       cpu6-critical                    +        	   critical                cpu6-bottom-thermal                  trips      trip-point0          _        +           passive       trip-point1          s        +           passive       cpu6-critical                    +        	   critical                aoss1-thermal                     trips      trip-point0          _        +           hot       aoss1-critical                   +          	   critical                cpu7-top-thermal                     trips      trip-point0          _        +           passive       trip-point1          s        +           passive       cpu7-critical                    +        	   critical                cpu7-middle-thermal                  trips      trip-point0          _        +           passive       trip-point1          s        +           passive       cpu7-critical                    +        	   critical                cpu7-bottom-thermal                  trips      trip-point0          _        +           passive       trip-point1          s        +           passive       cpu7-critical                    +        	   critical                cpu0-thermal                     trips      trip-point0          _        +           passive       trip-point1          s        +           passive       cpu0-critical                    +        	   critical                cpu1-thermal                     trips      trip-point0          _        +           passive       trip-point1          s        +           passive       cpu1-critical                    +        	   critical                nsphvx0-thermal         6   
                 trips      trip-point0          _        +           hot       nsphvx1-critical                     +          	   critical                nsphvx1-thermal         6   
                 trips      trip-point0          _        +           hot       nsphvx1-critical                     +          	   critical                nsphmx0-thermal         6   
                 trips      trip-point0          _        +           hot       nsphmx0-critical                     +          	   critical                nsphmx1-thermal         6   
              	   trips      trip-point0          _        +           hot       nsphmx1-critical                     +          	   critical                nsphmx2-thermal         6   
              
   trips      trip-point0          _        +           hot       nsphmx2-critical                     +          	   critical                nsphmx3-thermal         6   
                 trips      trip-point0          _        +           hot       nsphmx3-critical                     +          	   critical                video-thermal           6   
                 trips      trip-point0          _        +           hot       video-critical                   +          	   critical                ddr-thermal         6   
                 trips      trip-point0          _        +           hot       ddr-critical                     +          	   critical                camera0-thermal                  trips      trip-point0          _        +           hot       camera0-critical                     +          	   critical                camera1-thermal                  trips      trip-point0          _        +           hot       camera1-critical                     +          	   critical                aoss2-thermal                     trips      trip-point0          _        +           hot       aoss2-critical                   +          	   critical                gpuss0-thermal          6   
                 cooling-maps       map0            L           Q            trips      trip-point0          s        +           passive          f         trip-point1                  +           hot       trip-point2          8        +          	   critical                gpuss1-thermal          6   
                 cooling-maps       map0            L           Q            trips      trip-point0          s        +           passive          f         trip-point1                  +           hot       trip-point2          8        +          	   critical                gpuss2-thermal          6   
                 cooling-maps       map0            L           Q            trips      trip-point0          s        +           passive          f         trip-point1                  +           hot       trip-point2          8        +          	   critical                gpuss3-thermal          6   
                 cooling-maps       map0            L           Q            trips      trip-point0          s        +           passive          f         trip-point1                  +           hot       trip-point2          8        +          	   critical                gpuss4-thermal          6   
                 cooling-maps       map0            L           Q            trips      trip-point0          s        +           passive          f         trip-point1                  +           hot       trip-point2          8        +          	   critical                gpuss5-thermal          6   
                 cooling-maps       map0            L           Q            trips      trip-point0          s        +           passive          f         trip-point1                  +           hot       trip-point2          8        +          	   critical                gpuss6-thermal          6   
                 cooling-maps       map0            L           Q            trips      trip-point0          s        +           passive          f         trip-point1                  +           hot       trip-point2          8        +          	   critical                gpuss7-thermal          6   
                 cooling-maps       map0            L          Q            trips      trip-point0          s        +           passive          f        trip-point1                  +           hot       trip-point2          8        +          	   critical                modem0-thermal                	   trips      trip-point0          _        +           hot       modem0-critical                  +          	   critical                modem1-thermal                
   trips      trip-point0          _        +           hot       modem1-critical                  +          	   critical                modem2-thermal                   trips      trip-point0          _        +           hot       modem2-critical                  +          	   critical                modem3-thermal                   trips      trip-point0          _        +           hot       modem3-critical                  +          	   critical                pm8010-m-thermal            6   d             trips      trip0            s        +             passive       trip1            8        +             hot             pm8010-n-thermal            6   d             trips      trip0            s        +             passive       trip1            8        +             hot             pm8550-thermal          6   d             trips      trip0            s        +             passive       trip1            8        +             hot             pm8550b-thermal         6   d             trips      trip0            s        +             passive       trip1            8        +             hot             pm8550ve-thermal            6   d             trips      trip0            s        +             passive       trip1            8        +             hot             pm8550vs-c-thermal          6   d             trips      trip0            s        +             passive       trip1            8        +             hot             pm8550vs-d-thermal          6   d             trips      trip0            s        +             passive       trip1            8        +             hot             pm8550vs-e-thermal          6   d          	   trips      trip0            s        +             passive       trip1            8        +             hot             pm8550vs-g-thermal          6   d          
   trips      trip0            s        +             passive       trip1            8        +             hot             pmr735d-k-thermal           6   d             trips      trip0            s        +             passive       trip1            8        +             hot                timer            2arm,armv8-timer       0                                   
         reboot-mode          2nvmem-reboot-mode           `          lreboot-mode         }                    aliases       $  /soc@0/geniqup@8c0000/serial@89c000       pmic-glink        >   2qcom,sm8650-pmic-glink qcom,sm8550-pmic-glink qcom,pmic-glink                                        q          connector@0          2usb-c-connector                      dual            dual       ports                                port@0                  endpoint                       f            port@1                 endpoint                       f                     sound         (   2qcom,sm8650-sndcard qcom,sm8450-sndcard          ,SM8650-MTP        3  SpkrLeft IN WSA_SPK1 OUT SpkrRight IN WSA_SPK2 OUT     wsa-dai-link            WSA Playback       cpu              i      codec                                  platform                          vph-pwr-regulator            2regulator-fixed         vph_pwr          8u          8u                             f            	interrupt-parent #address-cells #size-cells model compatible stdout-path #clock-cells clock-frequency phandle clocks clock-mult clock-div device_type reg power-domains power-domain-names enable-method next-level-cache capacity-dmips-mhz dynamic-power-coefficient qcom,freq-domain #cooling-cells cache-level cache-unified cpu entry-method idle-state-name arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us local-timer-stop qcom,dload-mode interconnects #interconnect-cells qcom,bcm-voters interrupts #power-domain-cells domain-idle-states ranges no-map hwlocks qcom,client-id qcom,vmid interrupts-extended mboxes qcom,smem qcom,local-pid qcom,remote-pid qcom,entry-name #qcom,smem-state-cells interrupt-controller #interrupt-cells dma-ranges #reset-cells #mbox-cells dma-channels dma-channel-mask #dma-cells iommus dma-coherent status clock-names interconnect-names dmas dma-names pinctrl-0 pinctrl-names reg-names interrupt-names resets reset-names iommu-map interrupt-map interrupt-map-mask msi-map msi-map-mask linux,pci-domain num-lanes bus-range phys phy-names wake-gpios perst-gpios assigned-clocks assigned-clock-rates clock-output-names #phy-cells vdda-phy-supply vdda-pll-supply vdda-qref-supply qcom,ee qcom,num-ees num-channels qcom,controlled-remotely freq-table-hz required-opps lanes-per-direction qcom,ice reset-gpios vcc-supply vcc-max-microamp vccq-supply vccq-max-microamp #hwlock-cells operating-points-v2 qcom,gmu memory-region opp-hz opp-level qcom,qmp #iommu-cells #global-interrupts qcom,smem-states qcom,smem-state-names firmware-name label qcom,glink-channels qcom,non-secure-domain qcom,domain qcom,intents #sound-dai-cells qcom,protection-domain qcom,din-ports qcom,dout-ports qcom,ports-sinterval qcom,ports-offset1 qcom,ports-offset2 qcom,ports-hstart qcom,ports-hstop qcom,ports-word-length qcom,ports-block-pack-mode qcom,ports-block-group-count qcom,ports-lane-control powerdown-gpios sound-name-prefix vdd-1p8-supply vdd-io-supply qcom,port-mapping qcom,ports-sinterval-low gpio-controller #gpio-cells gpio-ranges pins function drive-strength slew-rate bias-disable bias-bus-hold output-high input-enable output-low bus-width sdhci-caps-mask qcom,dll-config qcom,ddr-config cd-gpios vmmc-supply vqmmc-supply no-sdio no-mmc pinctrl-1 remote-endpoint assigned-clock-parents vdda-supply data-lanes vddio-supply vci-supply vdd-supply vdds-supply vdda12-supply orientation-switch snps,hird-threshold snps,usb2-gadget-lpm-disable snps,dis_u2_susphy_quirk snps,dis_enblslpm_quirk snps,dis-u1-entry-quirk snps,dis-u2-entry-quirk snps,is-utmi-l1-suspend snps,usb3_lpm_capable snps,usb2-lpm-disable snps,has-lpm-erratum tx-fifo-resize dr_mode usb-role-switch qcom,pdc-ranges #qcom,sensors #thermal-sensor-cells qcom,channel qcom,bus-id bias-pull-up output-disable power-source #pwm-cells vdd18-supply vdd3-supply linux,code bits wakeup-parent gpio-reserved-ranges bias-pull-down #redistributor-regions redistributor-stride msi-controller #msi-cells frame-number qcom,tcs-offset qcom,drv-id qcom,tcs-config vdd-bob1-supply vdd-bob2-supply vdd-l2-l13-l14-supply vdd-l3-supply vdd-l5-l16-supply vdd-l6-l7-supply vdd-l8-l9-supply vdd-l11-supply vdd-l12-supply vdd-l15-supply vdd-l17-supply qcom,pmic-id regulator-name regulator-min-microvolt regulator-max-microvolt regulator-initial-mode regulator-allow-set-load regulator-allowed-modes vdd-l1-supply vdd-l2-supply vdd-s1-supply vdd-s2-supply vdd-s3-supply vdd-s4-supply vdd-s5-supply vdd-s6-supply vdd-l1-l2-supply vdd-l3-l4-supply vdd-l5-supply vdd-l6-supply vdd-l7-supply #freq-domain-cells opp-peak-kBps thermal-sensors temperature hysteresis polling-delay-passive trip cooling-device nvmem-cells nvmem-cell-names mode-recovery mode-bootloader serial0 orientation-gpios power-role data-role audio-routing link-name sound-dai regulator-always-on regulator-boot-on 