     8     (            	t  P                             :    engicam,px30-core-ctouch2 engicam,px30-core rockchip,px30                                    +            7Engicam PX30.Core C.TOUCH 2.0      aliases          =/i2c@ff180000            B/i2c@ff190000            G/i2c@ff1a0000            L/i2c@ff1b0000            Q/serial@ff030000             Y/serial@ff158000             a/serial@ff160000             i/serial@ff168000             q/serial@ff170000             y/serial@ff178000             /spi@ff1d0000            /spi@ff1d8000            /ethernet@ff360000           /mmc@ff370000            /mmc@ff380000            /mmc@ff390000         cpus                         +       cpu@0            cpu           arm,cortex-a35                            psci                                                          Z                              !         cpu@1            cpu           arm,cortex-a35                           psci                                                          Z                              !         cpu@2            cpu           arm,cortex-a35                           psci                                                          Z                              !   	      cpu@3            cpu           arm,cortex-a35                           psci                                                          Z                              !   
      idle-states         )psci       cpu-sleep             arm,idle-state           6        G           ^   x        o                     !         cluster-sleep             arm,idle-state           6        G          ^          o                    !               opp-table-0           operating-points-v2                  !      opp-600000000               #F          ~ ~ p          @               opp-816000000               0,            p          @      opp-1008000000              <            p          @      opp-1200000000              G              p          @      opp-1296000000              M?d          p p p          @         arm-pmu           arm,cortex-a35-pmu        0         d          e          f          g                    	   
      display-subsystem             rockchip,display-subsystem                      	  disabled          external-gmac-clock           fixed-clock                 gmac_clkin                    psci              arm,psci-1.0             smc       timer             arm,armv8-timer       0                                
        thermal-zones      soc-thermal         (           >          L          ^          trips      trip-point-0            n p        z           passive       trip-point-1            n L        z           passive         !         soc-crit            n 8        z        	   critical             cooling-maps       map0                                                 gpu-thermal         (   d        >          ^         trips      gpu-threshold           n p        z           passive       gpu-target          n L        z           passive         !         gpu-crit            n 8        z        	   critical             cooling-maps       map0                                         xin24m            fixed-clock                     n6         xin24m          !   l      power-management@ff000000         $    rockchip,px30-pmu syscon simple-mfd                           power-controller              rockchip,px30-power-controller                                  +            !   n   power-domain@5                                       <                                power-domain@7                                   ;                             power-domain@9              	                     C      @      ?                             power-domain@10             
      @                                9      7      8      :                                      power-domain@11                                        K                                power-domain@12                   X                                                        D      5      6                                      power-domain@13                   (                                 3                  !   "   #                  power-domain@14                            I           $                        syscon@ff010000       '    rockchip,px30-pmugrf syscon simple-mfd                                             +           !      io-domains        $    rockchip,px30-pmu-io-voltage-domain         okay               %           %      reboot-mode           syscon-reboot-mode                     RB        RB	        RB        RB         RB         serial@ff030000       $    rockchip,px30-uart snps,dw-apb-uart                                                     &      &           (baudclk apb_pclk            4   '       '           9tx rx           C           M           Zdefault         h   (   )   *      	  disabled          i2s@ff060000              rockchip,px30-i2s-tdm                                                                             (mclk_tx mclk_rx hclk            4   '      '           9tx rx           r   +                          
  tx-m rx-m           Zdefault       0  h   ,   -   .   /   0   1   2   3   4   5   6   7                  	  disabled          i2s@ff070000          &    rockchip,px30-i2s rockchip,rk3066-i2s                                                                       (i2s_clk i2s_hclk            4   '      '           9tx rx           Zdefault         h   8   9   :   ;                  	  disabled          i2s@ff080000          &    rockchip,px30-i2s rockchip,rk3066-i2s                                                                       (i2s_clk i2s_hclk            4   '      '           9tx rx           Zdefault         h   <   =   >   ?                  	  disabled          interrupt-controller@ff131000             arm,gic-400                                        @                                 @             `                       	          !         syscon@ff140000       $    rockchip,px30-grf syscon simple-mfd                                            +           !   +   io-domains             rockchip,px30-io-voltage-domain         okay               %           %           %           %           %           @      lvds              rockchip,px30-lvds             A        "dphy            r   +        ,lvds          	  disabled       ports                        +       port@0                                    +       endpoint@0                       <   B        !         endpoint@1                      <   C        !            port@1                             serial@ff158000       $    rockchip,px30-uart snps,dw-apb-uart                                                            I        (baudclk apb_pclk            4   '      '           9tx rx           C           M           Zdefault         h   D   E   F      	  disabled          serial@ff160000       $    rockchip,px30-uart snps,dw-apb-uart                                                             J        (baudclk apb_pclk            4   '      '           9tx rx           C           M           Zdefault         h   G        okay          serial@ff168000       $    rockchip,px30-uart snps,dw-apb-uart                                                            K        (baudclk apb_pclk            4   '      '           9tx rx           C           M           Zdefault         h   H   I   J      	  disabled          serial@ff170000       $    rockchip,px30-uart snps,dw-apb-uart                                                             L        (baudclk apb_pclk            4   '      '   	        9tx rx           C           M           Zdefault         h   K   L   M      	  disabled          serial@ff178000       $    rockchip,px30-uart snps,dw-apb-uart                                                            M        (baudclk apb_pclk            4   '   
   '           9tx rx           C           M           Zdefault         h   N   O   P      	  disabled          i2c@ff180000          &    rockchip,px30-i2c rockchip,rk3399-i2c                                             N      	  (i2c pclk                              Zdefault         h   Q                     +            okay       pmic@20           rockchip,rk809                           R                      Zdefault         h   S         L         m                   rk808-clkout1 rk808-clkout2         {   T           T           T           T           U           U           U           U           T   regulators     DCDC_REG1           vdd_log                   
         ~        4 p        L  q   regulator-state-mem          a        y ~         DCDC_REG2           vdd_arm                   
         ~        4 p        L  q        !      regulator-state-mem                  y ~         DCDC_REG3           vcc_ddr                   
   regulator-state-mem          a         DCDC_REG4           vcc_3v3                   
         2Z        4 2Z        !   %   regulator-state-mem          a        y 2Z         DCDC_REG5           vcc3v3_sys                    
         2Z        4 2Z        !   U   regulator-state-mem          a        y 2Z         LDO_REG1            vcc_1v0                   
         B@        4 B@   regulator-state-mem          a        y B@         LDO_REG2            vcc_1v8                   
         w@        4 w@        !   @   regulator-state-mem          a        y w@         LDO_REG3            vdd_1v0                   
         B@        4 B@   regulator-state-mem          a        y B@         LDO_REG4            vcc3v0_pmu                    
         2Z        4 2Z   regulator-state-mem          a        y 2Z         LDO_REG5          	  vccio_sd                      
         w@        4 2Z   regulator-state-mem          a        y 2Z         SWITCH_REG1          
        vcc3v3_lcd        SWITCH_REG2         vcc5v0_host                   
               i2c@ff190000          &    rockchip,px30-i2c rockchip,rk3399-i2c                                             O      	  (i2c pclk                              Zdefault         h   V                     +          	  disabled          i2c@ff1a0000          &    rockchip,px30-i2c rockchip,rk3399-i2c                                             P      	  (i2c pclk                   	           Zdefault         h   W                     +          	  disabled          i2c@ff1b0000          &    rockchip,px30-i2c rockchip,rk3399-i2c                                              Q      	  (i2c pclk                   
           Zdefault         h   X                     +          	  disabled          spi@ff1d0000          &    rockchip,px30-spi rockchip,rk3066-spi                                                          $     U        (spiclk apb_pclk         4   '      '           9tx rx                      Zdefault         h   Y   Z   [   \                     +          	  disabled          spi@ff1d8000          &    rockchip,px30-spi rockchip,rk3066-spi                                                         %     V        (spiclk apb_pclk         4   '      '           9tx rx                      Zdefault         h   ]   ^   _   `   a                     +          	  disabled          watchdog@ff1e0000             rockchip,px30-wdt snps,dw-wdt                                       [               %         	  disabled          pwm@ff200000          &    rockchip,px30-pwm rockchip,rk3328-pwm                                         "     S      	  (pwm pclk            Zdefault         h   b                   okay          pwm@ff200010          &    rockchip,px30-pwm rockchip,rk3328-pwm                                        "     S      	  (pwm pclk            Zdefault         h   c                 	  disabled          pwm@ff200020          &    rockchip,px30-pwm rockchip,rk3328-pwm                                         "     S      	  (pwm pclk            Zdefault         h   d                 	  disabled          pwm@ff200030          &    rockchip,px30-pwm rockchip,rk3328-pwm                  0                      "     S      	  (pwm pclk            Zdefault         h   e                 	  disabled          pwm@ff208000          &    rockchip,px30-pwm rockchip,rk3328-pwm                                        #     T      	  (pwm pclk            Zdefault         h   f                 	  disabled          pwm@ff208010          &    rockchip,px30-pwm rockchip,rk3328-pwm                                       #     T      	  (pwm pclk            Zdefault         h   g                 	  disabled          pwm@ff208020          &    rockchip,px30-pwm rockchip,rk3328-pwm                                        #     T      	  (pwm pclk            Zdefault         h   h                 	  disabled          pwm@ff208030          &    rockchip,px30-pwm rockchip,rk3328-pwm                 0                      #     T      	  (pwm pclk            Zdefault         h   i                 	  disabled          timer@ff210000        *    rockchip,px30-timer rockchip,rk3288-timer                !                                         Y      &        (pclk timer        dma-controller@ff240000           arm,pl330 arm,primecell              $        @                                                           	  (apb_pclk                       !   '      tsadc@ff280000            rockchip,px30-tsadc              (                        $                 ,          P               ,     X        (tsadc apb_pclk                      
  tsadc-apb           r   +                 Zinit default sleep          h   j           k        (   j        2           okay            H           _           !         saradc@ff288000       ,    rockchip,px30-saradc rockchip,rk3399-saradc              (                       T           z                  -     W        (saradc apb_pclk                       saradc-apb        	  disabled          nvmem@ff290000            rockchip,px30-otp                )        @                /     Z     a        (otp apb_pclk phy                          phy                      +      id@7                         cpu-leakage@17                       performance@1e                                        clock-controller@ff2b0000             rockchip,px30-cru                +                     l   &           (xin24m gpll         r   +                            8                                     @      I        Fq   рр          !         clock-controller@ff2bc000             rockchip,px30-pmucru                 +                    l        (xin24m          r   +                                 &      &      &           G          !   &      syscon@ff2c0000       ,    rockchip,px30-usb2phy-grf syscon simple-mfd              ,                              +      usb2phy@100           rockchip,px30-usb2phy                               &   
        (phyclk                                       m        usb480m_phy         okay            !   m   host-port                              D         
  linestate           okay            !   p      otg-port                      $         B          A          @           otg-bvalid otg-id linestate         okay            !   o            phy@ff2e0000              rockchip,px30-dsi-dphy               .                     &        E      	  (ref pclk                  >        apb                        n         	  disabled            !   A      phy@ff2f0000              rockchip,px30-csi-dphy               /        @               F        (pclk                           n                 /        apb         r   +      	  disabled            !         usb@ff300000          0    rockchip,px30-usb rockchip,rk3066-usb snps,dwc2              0                        >                         (otg         otg                                          @                  o      	  "usb2-phy               n           okay          usb@ff340000              generic-ehci                 4                        <                            p        "usb            n           okay          usb@ff350000              generic-ohci                 5                        =                            p        "usb            n           okay          ethernet@ff360000             rockchip,px30-gmac               6                        +           macirq        @         >      ?      ?      @      A           C      L      [  (stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac clk_mac_speed          r   +        rmii            Zdefault         h   q   r           n   	              ^      
  stmmaceth           okay            output          ,   %         7        M      P  P        b   s             mmc@ff370000          .    rockchip,px30-dw-mshc rockchip,rk3288-dw-mshc                7        @                6                         ;      C      D        (biu ciu ciu-drive ciu-sample            r           |           р        Zdefault         h   t   u   v   w           n           okay                                   %           %      mmc@ff380000          .    rockchip,px30-dw-mshc rockchip,rk3288-dw-mshc                8        @                7                         8      E      F        (biu ciu ciu-drive ciu-sample            r           |           р        Zdefault         h   x   y   z           n   
        okay                         +                                                  {                     wifi@1            brcm,bcm4329-fmac                        mmc@ff390000          .    rockchip,px30-dw-mshc rockchip,rk3288-dw-mshc                9        @                5                         9      G      H        (biu ciu ciu-drive ciu-sample            r           |           р        Zdefault         h   |   }   ~           n   
        okay                      -               spi@ff3a0000              rockchip,sfc                 :        @                8                  :             (clk_sfc hclk_sfc            h                 Zdefault            n   
      	  disabled          nand-controller@ff3b0000              rockchip,px30-nfc                ;        @                9                        7        (ahb nfc               7        р        Zdefault          h                                   n   
      	  disabled          opp-table-1           operating-points-v2         !      opp-200000000                         ~      opp-300000000                               opp-400000000               ׄ                opp-480000000               8          *         gpu@ff400000          $    rockchip,px30-mali arm,mali-bifrost              @        @       $         /          .          -           job mmu gpu                I                       n                    	  disabled            !         video-codec@ff442000              rockchip,px30-vpu                D                        P          O         
  vepu vdpu                              
  (aclk hclk           <              n         iommu@ff442800            rockchip,iommu               D(                       Q                                (aclk iface          C               n           !         dsi@ff450000          (    rockchip,px30-mipi-dsi snps,dw-mipi-dsi              E                        K                 D        (pclk               A        "dphy               n                 =        apb         r   +                     +          	  disabled       ports                        +       port@0                                    +       endpoint@0                       <           !         endpoint@1                      <           !            port@1                          vop@ff460000              rockchip,px30-vop-big                F                       M                                      (aclk_vop dclk_vop hclk_vop                3      4      5        axi ahb dclk            <              n         	  disabled       port                         +            !      endpoint@0                       <           !         endpoint@1                      <           !   B            iommu@ff460f00            rockchip,iommu               F                       M                                (aclk iface             n           C          	  disabled            !         vop@ff470000              rockchip,px30-vop-lit                G                       N                                      (aclk_vop dclk_vop hclk_vop                7      8      9        axi ahb dclk            <              n         	  disabled       port                         +            !      endpoint@0                       <           !         endpoint@1                      <           !   C            iommu@ff470f00            rockchip,iommu               G                       N                                (aclk iface             n           C          	  disabled            !         isp@ff4a0000              rockchip,px30-cif-isp                J               $         F          I          J           isp mi mipi                 3                 _        (isp aclk hclk pclk          <                      "dphy               n         	  disabled       ports                        +       port@0                                    +                iommu@ff4a8000            rockchip,iommu               J                       F                                (aclk iface             n            P        C            !         qos@ff518000              rockchip,px30-qos syscon                 Q                 !         qos@ff520000              rockchip,px30-qos syscon                 R                  !   $      qos@ff52c000              rockchip,px30-qos syscon                 R                 !         qos@ff538000              rockchip,px30-qos syscon                 S                 !         qos@ff538080              rockchip,px30-qos syscon                 S                !         qos@ff538100              rockchip,px30-qos syscon                 S                 !         qos@ff538180              rockchip,px30-qos syscon                 S                !         qos@ff540000              rockchip,px30-qos syscon                 T                  !         qos@ff540080              rockchip,px30-qos syscon                 T                 !         qos@ff548000              rockchip,px30-qos syscon                 T                 !         qos@ff548080              rockchip,px30-qos syscon                 T                !          qos@ff548100              rockchip,px30-qos syscon                 T                 !   !      qos@ff548180              rockchip,px30-qos syscon                 T                !   "      qos@ff548200              rockchip,px30-qos syscon                 T                 !   #      qos@ff550000              rockchip,px30-qos syscon                 U                  !         qos@ff550080              rockchip,px30-qos syscon                 U                 !         qos@ff550100              rockchip,px30-qos syscon                 U                 !         qos@ff550180              rockchip,px30-qos syscon                 U                !         qos@ff558000              rockchip,px30-qos syscon                 U                 !         qos@ff558080              rockchip,px30-qos syscon                 U                !         pinctrl           rockchip,px30-pinctrl           r   +        k                        +            x   gpio@ff040000             rockchip,gpio-bank                                                      &                                                   !   R      gpio@ff250000             rockchip,gpio-bank               %                                         \                                                !         gpio@ff260000             rockchip,gpio-bank               &                                         ]                                                !   s      gpio@ff270000             rockchip,gpio-bank               '                                         ^                                              pcfg-pull-up                     !         pcfg-pull-down                 pcfg-pull-none                   !         pcfg-pull-none-2ma                            pcfg-pull-up-2ma                              pcfg-pull-up-4ma                                !         pcfg-pull-none-4ma                            pcfg-pull-down-4ma                            pcfg-pull-none-8ma                              !         pcfg-pull-up-8ma                                !         pcfg-pull-none-12ma                             !         pcfg-pull-up-12ma                               !         pcfg-pull-none-smt                            !         pcfg-output-high                   pcfg-output-low                pcfg-input-high                           !         pcfg-input                 i2c0       i2c0-xfer            	                    	              !   Q         i2c1       i2c1-xfer            	                                  !   V         i2c2       i2c2-xfer            	                                !   W         i2c3       i2c3-xfer            	                                !   X         tsadc      tsadc-otp-pin           	                      !   j      tsadc-otp-out           	                     !   k         uart0      uart0-xfer           	       
                           !   (      uart0-cts           	                     !   )      uart0-rts           	                     !   *         uart1      uart1-xfer           	                                !   D      uart1-cts           	                    !   E      uart1-rts           	                    !   F         uart2-m0       uart2m0-xfer             	                                 uart2-m1       uart2m1-xfer             	                                !   G         uart3-m0       uart3m0-xfer             	                                uart3m0-cts         	                   uart3m0-rts         	                      uart3-m1       uart3m1-xfer             	                                !   H      uart3m1-cts         	                    !   I      uart3m1-rts         	                    !   J         uart4      uart4-xfer           	                                !   K      uart4-cts           	                    !   L      uart4-rts           	                    !   M         uart5      uart5-xfer           	                                !   N      uart5-cts           	                    !   O      uart5-rts           	                    !   P         spi0       spi0-clk            	                    !   Y      spi0-csn            	                    !   Z      spi0-miso           	                    !   [      spi0-mosi           	                    !   \      spi0-clk-hs         	                  spi0-miso-hs            	                  spi0-mosi-hs            	                     spi1       spi1-clk            	                    !   ]      spi1-csn0           	      	              !   ^      spi1-csn1           	      
              !   _      spi1-miso           	                    !   `      spi1-mosi           	                    !   a      spi1-clk-hs         	                  spi1-miso-hs            	                  spi1-mosi-hs            	                     pdm    pdm-clk0m0          	                  pdm-clk0m1          	                  pdm-clk1            	                  pdm-sdi0m0          	                  pdm-sdi0m1          	                  pdm-sdi1            	                  pdm-sdi2            	                  pdm-sdi3            	                  pdm-clk0m0-sleep            	                   pdm-clk0m1-sleep            	                   pdm-clk1-sleep          	                   pdm-sdi0m0-sleep            	                   pdm-sdi0m1-sleep            	                   pdm-sdi1-sleep          	                   pdm-sdi2-sleep          	                   pdm-sdi3-sleep          	                      i2s0       i2s0-8ch-mclk           	                  i2s0-8ch-sclktx         	                    !   ,      i2s0-8ch-sclkrx         	                    !   -      i2s0-8ch-lrcktx         	                    !   .      i2s0-8ch-lrckrx         	                    !   /      i2s0-8ch-sdo0           	                    !   0      i2s0-8ch-sdo1           	                    !   2      i2s0-8ch-sdo2           	                    !   4      i2s0-8ch-sdo3           	                    !   6      i2s0-8ch-sdi0           	                    !   1      i2s0-8ch-sdi1           	                    !   3      i2s0-8ch-sdi2           	      	              !   5      i2s0-8ch-sdi3           	                    !   7         i2s1       i2s1-2ch-mclk           	                  i2s1-2ch-sclk           	                    !   8      i2s1-2ch-lrck           	                    !   9      i2s1-2ch-sdi            	                    !   :      i2s1-2ch-sdo            	                    !   ;         i2s2       i2s2-2ch-mclk           	                  i2s2-2ch-sclk           	                    !   <      i2s2-2ch-lrck           	                    !   =      i2s2-2ch-sdi            	                    !   >      i2s2-2ch-sdo            	                    !   ?         sdmmc      sdmmc-clk           	                    !   t      sdmmc-cmd           	                    !   u      sdmmc-det           	                     !   v      sdmmc-bus1          	                  sdmmc-bus4        @  	                                                        !   w         sdio       sdio-clk            	                    !   z      sdio-cmd            	                    !   y      sdio-bus4         @  	                                                        !   x         emmc       emmc-clk            	      	              !   |      emmc-cmd            	      
              !   }      emmc-rstnout            	                  emmc-bus1           	                   emmc-bus4         @  	                                                       emmc-bus8           	                                                                                                         !   ~         flash      flash-cs0           	                    !         flash-rdy           	      	              !         flash-dqs           	      
              !         flash-ale           	                    !         flash-cle           	                    !         flash-wrn           	                    !         flash-csl           	                  flash-rdn           	                    !         flash-bus8          	                                                                                                         !            sfc    sfc-bus4          @  	                                                         !         sfc-bus2             	                               sfc-cs0         	                    !         sfc-clk         	      	              !            lcdc       lcdc-rgb-dclk-pin           	                   lcdc-rgb-m0-hsync-pin           	                  lcdc-rgb-m0-vsync-pin           	                  lcdc-rgb-m0-den-pin         	                  lcdc-rgb888-m0-data-pins           	                                                                  
            	                                                                                                                                                                                                                        lcdc-rgb666-m0-data-pins            	                                                                  
            	                                                                                                                                                lcdc-rgb565-m0-data-pins            	                                                                  
            	                                                                                                                        lcdc-rgb888-m1-data-pins           	                                          
                                                                                                                                                                        lcdc-rgb666-m1-data-pins            	                                          
                                                                                                lcdc-rgb565-m1-data-pins            	                                          
                                                                           pwm0       pwm0-pin            	                     !   b         pwm1       pwm1-pin            	                     !   c         pwm2       pwm2-pin            	                    !   d         pwm3       pwm3-pin            	                     !   e         pwm4       pwm4-pin            	                    !   f         pwm5       pwm5-pin            	                    !   g         pwm6       pwm6-pin            	                    !   h         pwm7       pwm7-pin            	                    !   i         gmac       rmii-pins           	                                                                                                       	              !   q      mac-refclk-12ma         	      
              !   r      mac-refclk          	      
               cif-m0     cif-clkout-m0           	                  dvp-d2d9-m0         	                                                                                                                   	            
                        dvp-d0d1-m0          	                              d10-d11-m0           	                                 cif-m1     cif-clkout-m1           	                  dvp-d2d9-m1         	                                                      	                                                                                                dvp-d0d1-m1          	                              d10-d11-m1           	                                 isp    isp-prelight            	                     bt     bt-enable-h         	                     !            sdio-pwrseq    wifi-enable-h           	                     !            pmic       pmic_int            	                      !   S            vcc5v0-sys            regulator-fixed         vcc5v0_sys                    
         LK@        4 LK@        !   T      sdio-pwrseq           mmc-pwrseq-simple                     
  (ext_clock           	   P        Zdefault         h           	1                 !   {      vcc3v3-btreg              regulator-gpio           	=        Zdefault         h           btreg-gpio-supply            2Z        4 2Z                   2Z            	P                vcc3v3-rf-aux-mod             regulator-fixed         vcc3v3_rf_aux_mod            2Z        4 2Z                  
        	]   T      xin32k            fixed-clock                                xin32k          !         chosen          	hserial2:115200n8             	compatible interrupt-parent #address-cells #size-cells model i2c0 i2c1 i2c2 i2c3 serial0 serial1 serial2 serial3 serial4 serial5 spi0 spi1 ethernet0 mmc1 mmc2 mmc0 device_type reg enable-method clocks #cooling-cells cpu-idle-states dynamic-power-coefficient operating-points-v2 cpu-supply phandle entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend interrupts interrupt-affinity ports status clock-frequency clock-output-names #clock-cells polling-delay-passive polling-delay sustainable-power thermal-sensors temperature hysteresis trip cooling-device contribution #power-domain-cells pm_qos pmuio1-supply pmuio2-supply offset mode-bootloader mode-fastboot mode-loader mode-normal mode-recovery clock-names dmas dma-names reg-shift reg-io-width pinctrl-names pinctrl-0 rockchip,grf resets reset-names #sound-dai-cells #interrupt-cells interrupt-controller vccio1-supply vccio2-supply vccio3-supply vccio4-supply vccio5-supply vccio6-supply phys phy-names rockchip,output remote-endpoint rockchip,system-power-controller wakeup-source vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-on-in-suspend regulator-suspend-microvolt regulator-off-in-suspend num-cs #pwm-cells arm,pl330-periph-burst #dma-cells assigned-clocks assigned-clock-rates rockchip,hw-tshut-temp pinctrl-1 pinctrl-2 #thermal-sensor-cells rockchip,hw-tshut-mode rockchip,hw-tshut-polarity #io-channel-cells bits #reset-cells assigned-clock-parents #phy-cells interrupt-names power-domains dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size phy-mode clock_in_out phy-supply snps,reset-active-low snps,reset-delays-us snps,reset-gpio bus-width fifo-depth max-frequency cap-sd-highspeed card-detect-delay vmmc-supply vqmmc-supply cap-sdio-irq keep-power-in-suspend mmc-pwrseq non-removable sd-uhs-sdr104 cap-mmc-highspeed mmc-hs200-1_8v iommus #iommu-cells rockchip,disable-mmu-reset rockchip,pmu ranges gpio-controller #gpio-cells bias-pull-up bias-pull-down bias-disable drive-strength input-schmitt-enable output-high output-low input-enable rockchip,pins post-power-on-delay-ms reset-gpios enable-active-high enable-gpios vin-supply stdout-path 