     8      (            	                               $    rockchip,rk3328-evb rockchip,rk3328                                  +            7Rockchip RK3328 EVB    aliases          =/pinctrl/gpio@ff210000           C/pinctrl/gpio@ff220000           I/pinctrl/gpio@ff230000           O/pinctrl/gpio@ff240000           U/serial@ff110000             ]/serial@ff120000             e/serial@ff130000             m/i2c@ff150000            r/i2c@ff160000            w/i2c@ff170000            |/i2c@ff180000            /ethernet@ff550000           /mmc@ff500000            /mmc@ff510000            /mmc@ff520000         cpus                         +       cpu@0            cpu           arm,cortex-a53                                                                      x         psci                                      @        +           8           E   @        W           d           u              	      cpu@1            cpu           arm,cortex-a53                                                                     x         psci                                      @        +           8           E   @        W           d           u              
      cpu@2            cpu           arm,cortex-a53                                                                     x         psci                                      @        +           8           E   @        W           d           u                    cpu@3            cpu           arm,cortex-a53                                                                     x         psci                                      @        +           8           E   @        W           d           u                    idle-states         psci       cpu-sleep             arm,idle-state                                 x                                         l2-cache              cache                                             @        -                       opp-table-0           operating-points-v2          	              opp-408000000               Q          ~        )  @         :      opp-600000000               #F          ~        )  @      opp-816000000               0,          B@        )  @      opp-1008000000              <                  )  @      opp-1200000000              G          (        )  @      opp-1296000000              M?d                   )  @         analog-sound              simple-audio-card           Fi2s         _           yAnalog        	  disabled       simple-audio-card,cpu                    simple-audio-card,codec                     arm-pmu           arm,cortex-a53-pmu        0         d          e          f          g              	   
            display-subsystem             rockchip,display-subsystem                   hdmi-sound            simple-audio-card           Fi2s         _           yHDMI          	  disabled       simple-audio-card,cpu                    simple-audio-card,codec                     psci              arm,psci-1.0 arm,psci-0.2            smc       timer             arm,armv8-timer       0                                
        xin24m            fixed-clock                     n6         xin24m             B      i2s@ff000000          (    rockchip,rk3328-i2s rockchip,rk3066-i2s                                                         )     7        i2s_clk i2s_hclk                                tx rx                     	  disabled                     i2s@ff010000          (    rockchip,rk3328-i2s rockchip,rk3066-i2s                                                        *     8        i2s_clk i2s_hclk                                tx rx                     	  disabled                     i2s@ff020000          (    rockchip,rk3328-i2s rockchip,rk3066-i2s                                                        +     9        i2s_clk i2s_hclk                                 tx rx                     	  disabled          spdif@ff030000            rockchip,rk3328-spdif                                                          .     :      
  mclk hclk                 
        tx          !default         /                     	  disabled          pdm@ff040000              rockchip,pdm                                         =     R        pdm_clk pdm_hclk                          rx          !default sleep           /                       9                     	  disabled          syscon@ff100000       &    rockchip,rk3328-grf syscon simple-mfd                                    7   io-domains        "    rockchip,rk3328-io-voltage-domain         	  disabled          gpio              rockchip,rk3328-grf-gpio             C        S         power-controller          !    rockchip,rk3328-power-controller            _                        +               9   power-domain@6                             D        _          power-domain@5                                   B      A      B        _          power-domain@8                                  F        _             reboot-mode           syscon-reboot-mode          s          zRB         RB        RB	        RB         serial@ff110000       &    rockchip,rk3328-uart snps,dw-apb-uart                                        7                  &              baudclk apb_pclk                                tx rx           !default         /                                     	  disabled          serial@ff120000       &    rockchip,rk3328-uart snps,dw-apb-uart                                        8                  '              baudclk apb_pclk                                tx rx           !default         /          !                            	  disabled          serial@ff130000       &    rockchip,rk3328-uart snps,dw-apb-uart                                        9                  (              baudclk apb_pclk                                tx rx           !default         /   "                              okay          i2c@ff150000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c                                      $                        +                   7            	  i2c pclk            !default         /   #      	  disabled          i2c@ff160000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c                                      %                        +                   8            	  i2c pclk            !default         /   $        okay       pmic@18           rockchip,rk805                          %                                 xin32k rk805-clkout2             C        S           !default         /   &                             '           '           '           '        &   (        2   (   regulators     DCDC_REG1         
  >vdd_logic           M 
4        e           }            regulator-state-mem                   B@         DCDC_REG2           >vdd_arm         M 
4        e           }                       regulator-state-mem                   ~         DCDC_REG3           >vcc_ddr          }            regulator-state-mem                   DCDC_REG4           >vcc_io          M 2Z        e 2Z         }                    (   regulator-state-mem                   2Z         LDO_REG1            >vcc_18          M w@        e w@         }            regulator-state-mem                   w@         LDO_REG2            >vcc18_emmc          M w@        e w@         }            regulator-state-mem                   w@         LDO_REG3            >vdd_10          M B@        e B@         }            regulator-state-mem                   B@                  i2c@ff170000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c                                      &                        +                   9            	  i2c pclk            !default         /   )      	  disabled          i2c@ff180000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c                                      '                        +                   :            	  i2c pclk            !default         /   *      	  disabled          spi@ff190000          (    rockchip,rk3328-spi rockchip,rk3066-spi                                      1                        +                                  spiclk apb_pclk                     	        tx rx           !default         /   +   ,   -   .      	  disabled          watchdog@ff1a0000              rockchip,rk3328-wdt snps,dw-wdt                                      (                        pwm@ff1b0000              rockchip,rk3328-pwm                                      <            	  pwm pclk            !default         /   /                 	  disabled          pwm@ff1b0010              rockchip,rk3328-pwm                                     <            	  pwm pclk            !default         /   0                 	  disabled          pwm@ff1b0020              rockchip,rk3328-pwm                                      <            	  pwm pclk            !default         /   1                 	  disabled          pwm@ff1b0030              rockchip,rk3328-pwm               0                      <            	  pwm pclk            !default         /   2                 	  disabled          dma-controller@ff1f0000           arm,pl330 arm,primecell                      @                                                            	  apb_pclk                                thermal-zones      soc-thermal                              (          :   3       trips      trip-point0         J p        V           passive       trip-point1         J L        V           passive            4      soc-crit            J s        V        	   critical             cooling-maps       map0            a   4      0  f   	   
              u                  tsadc@ff250000            rockchip,rk3328-tsadc                %                        :                 $          P               $              tsadc apb_pclk          !init default sleep          /   5        9   6           5              B      
  tsadc-apb              7                            okay               3      efuse@ff260000            rockchip,rk3328-efuse                &         P                     +                  >        pclk_efuse                 id@7                         cpu-leakage@17                       logic-leakage@19                         cpu-version@1a                                          C         adc@ff280000          .    rockchip,rk3328-saradc rockchip,rk3399-saradc                (                        P                             %              saradc apb_pclk               V        saradc-apb        	  disabled          gpu@ff300000          "    rockchip,rk3328-mali arm,mali-450                0               T         Z          W          ]          X          Y          [          \         "  )gp gpmmu pp pp0 ppmmu0 pp1 ppmmu1                              	  bus core                  f      iommu@ff330200            rockchip,iommu               3                       `                                aclk iface          9          	  disabled          iommu@ff340800            rockchip,iommu               4        @               b                       F        aclk iface          9          	  disabled          video-codec@ff350000              rockchip,rk3328-vpu              5                        	           )vdpu                        F      
  aclk hclk           F   8        M   9         iommu@ff350800            rockchip,iommu               5        @                                      F        aclk iface          9            M   9              8      video-codec@ff360000          *    rockchip,rk3328-vdec rockchip,rk3399-vdec                6                                               B      A      B        axi ahb cabac core                      A      B        ׄ ׄ          F   :        M   9         iommu@ff360480            rockchip,iommu                6       @    6       @               J                       B        aclk iface          9            M   9              :      vop@ff370000              rockchip,rk3328-vop              7        >                                        x     ;        aclk_vop dclk_vop hclk_vop                                    axi ahb dclk            F   ;      	  disabled       port                         +                  endpoint@0                       [   <           A            iommu@ff373f00            rockchip,iommu               7?                                               ;        aclk iface          9          	  disabled               ;      hdmi@ff3c0000             rockchip,rk3328-dw-hdmi              <                                   #                        F              iahb isfr cec           k   =        phdmi            !default         /   >   ?   @           7                  	  disabled                  ports                        +       port@0                  endpoint            [   A           <         port@1                          codec@ff410000            rockchip,rk3328-codec                A                              *      
  pclk mclk              7                  	  disabled                     phy@ff430000              rockchip,rk3328-hdmi-phy                 C                        S                     B      y        sysclk refoclk refpclk        	  hdmi_phy                        z   C        cpu-version                   	  disabled               =      clock-controller@ff440000         (    rockchip,rk3328-cru rockchip,cru syscon              D                    7                                    x      =            &      '      (                                                      A      B      D      C      "      \      5                             H                 4                  $        z               B   B   B      |           n6 n6 n6     ׄ     n6 #F L  G рxhxhрxhxh                    syscon@ff450000       .    rockchip,rk3328-usb2phy-grf syscon simple-mfd                E                              +      usb2phy@100           rockchip,rk3328-usb2phy                            B        phyclk          usb480m_phy                           {           D        okay               D   otg-port                      $         ;          <          =           )otg-bvalid otg-id linestate         okay               U      host-port                              >         
  )linestate           okay               V            mmc@ff500000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc              P        @                                  =      !      J      N        biu ciu ciu-drive ciu-sample                       р              m        reset           okay                                                  !default         /   E   F   G   H           I      mmc@ff510000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc              Q        @                                  >      "      K      O        biu ciu ciu-drive ciu-sample                       р              n        reset           okay                                 #         0        F   J         Q        !default         /   K   L   M      mmc@ff520000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc              R        @                                  ?      #      L      P        biu ciu ciu-drive ciu-sample                       р              o        reset           okay                                 Q        !default         /   N   O   P      ethernet@ff540000             rockchip,rk3328-gmac                 T                                   )macirq        8         d      W      X      Z      Y                  M  stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac                  c      
  stmmaceth              7        _           m           {         	  disabled          ethernet@ff550000             rockchip,rk3328-gmac                 U                    7                          )macirq        8         T      S      S      U                  V      I  stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref aclk_mac pclk_mac clk_macphy                  b      
  stmmaceth           rmii               Q        _           m           {           output          okay               R                      e              T   mdio              snps,dwmac-mdio                      +       ethernet-phy@0        4    ethernet-phy-id1234.d400 ethernet-phy-ieee802.3-c22                             V              d        !default         /   S   T                    Q            usb@ff580000          2    rockchip,rk3328-usb rockchip,rk3066-usb snps,dwc2                X                                         M        otg         otg                                          @               k   U      	  pusb2-phy            okay          usb@ff5c0000              generic-ehci                 \                                         N   D        k   V        pusb         okay          usb@ff5d0000              generic-ohci                 ]                                         N   D        k   V        pusb         okay          mmc@ff5f0000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc              _        @                                  @            M      Q        biu ciu ciu-drive ciu-sample                       р              h        reset         	  disabled          usb@ff600000              rockchip,rk3328-dwc3 snps,dwc3               `                        C                  `      a              ref_clk suspend_clk bus_clk         otg       
  utmi_wide                     :         R         t                        	  disabled          interrupt-controller@ff811000             arm,gic-400                                        @                                 @             `                       	                   crypto@ff060000           rockchip,rk3328-crypto                       @                                 P     Q      ;        hclk_master hclk_slave sclk               D        crypto-rst        pinctrl           rockchip,rk3328-pinctrl            7                     +               gpio@ff210000             rockchip,gpio-bank               !                        3                           C        S                                  d      gpio@ff220000             rockchip,gpio-bank               "                        4                           C        S                                  c      gpio@ff230000             rockchip,gpio-bank               #                        5                           C        S                                  %      gpio@ff240000             rockchip,gpio-bank               $                        6                           C        S                             pcfg-pull-up                        Y      pcfg-pull-down           	           a      pcfg-pull-none           	           W      pcfg-pull-none-2ma           	        	              `      pcfg-pull-up-2ma                     	         pcfg-pull-up-4ma                     	              Z      pcfg-pull-none-4ma           	        	              ]      pcfg-pull-down-4ma           	        	         pcfg-pull-none-8ma           	        	              [      pcfg-pull-up-8ma                     	              \      pcfg-pull-none-12ma          	        	              ^      pcfg-pull-up-12ma                    	              _      pcfg-output-high             	,      pcfg-output-low          	8      pcfg-input-high                   	C           X      pcfg-input           	C      i2c0       i2c0-xfer            	P            W            W           #         i2c1       i2c1-xfer            	P            W            W           $         i2c2       i2c2-xfer            	P            W            W           )         i2c3       i2c3-xfer            	P             W             W           *      i2c3-pins            	P              W              W         hdmi_i2c       hdmii2c-xfer             	P             W             W           ?         pdm-0      pdmm0-clk           	P            W                 pdmm0-fsync         	P            W      pdmm0-sdi0          	P            W                 pdmm0-sdi1          	P            W                 pdmm0-sdi2          	P            W                 pdmm0-sdi3          	P            W                 pdmm0-clk-sleep         	P             X                 pdmm0-sdi0-sleep            	P             X                 pdmm0-sdi1-sleep            	P             X                 pdmm0-sdi2-sleep            	P             X                 pdmm0-sdi3-sleep            	P             X                 pdmm0-fsync-sleep           	P             X         tsadc      otp-pin         	P             W           5      otp-out         	P            W           6         uart0      uart0-xfer           	P      	      W            Y                 uart0-cts           	P            W                 uart0-rts           	P      
      W                 uart0-rts-pin           	P      
       W         uart1      uart1-xfer           	P            W            Y                 uart1-cts           	P            W                  uart1-rts           	P            W           !      uart1-rts-pin           	P             W         uart2-0    uart2m0-xfer             	P             W            Y         uart2-1    uart2m1-xfer             	P             W            Y           "         spi0-0     spi0m0-clk          	P            Y      spi0m0-cs0          	P            Y      spi0m0-tx           	P      	      Y      spi0m0-rx           	P      
      Y      spi0m0-cs1          	P            Y         spi0-1     spi0m1-clk          	P            Y      spi0m1-cs0          	P            Y      spi0m1-tx           	P            Y      spi0m1-rx           	P            Y      spi0m1-cs1          	P            Y         spi0-2     spi0m2-clk          	P             Y           +      spi0m2-cs0          	P            Y           .      spi0m2-tx           	P            Y           ,      spi0m2-rx           	P            Y           -         i2s1       i2s1-mclk           	P            W      i2s1-sclk           	P            W      i2s1-lrckrx         	P            W      i2s1-lrcktx         	P            W      i2s1-sdi            	P            W      i2s1-sdo            	P            W      i2s1-sdio1          	P            W      i2s1-sdio2          	P            W      i2s1-sdio3          	P            W      i2s1-sleep          	P             X             X             X             X             X             X             X             X             X         i2s2-0     i2s2m0-mclk         	P            W      i2s2m0-sclk         	P            W      i2s2m0-lrckrx           	P            W      i2s2m0-lrcktx           	P            W      i2s2m0-sdi          	P            W      i2s2m0-sdo          	P            W      i2s2m0-sleep          `  	P             X             X             X             X             X             X         i2s2-1     i2s2m1-mclk         	P            W      i2s2m1-sclk         	P             W      i2sm1-lrckrx            	P            W      i2s2m1-lrcktx           	P            W      i2s2m1-sdi          	P            W      i2s2m1-sdo          	P            W      i2s2m1-sleep          P  	P             X              X             X             X             X         spdif-0    spdifm0-tx          	P             W         spdif-1    spdifm1-tx          	P            W         spdif-2    spdifm2-tx          	P             W                    sdmmc0-0       sdmmc0m0-pwren          	P            Z      sdmmc0m0-pin            	P             Z         sdmmc0-1       sdmmc0m1-pwren          	P             Z      sdmmc0m1-pin            	P              Z           e         sdmmc0     sdmmc0-clk          	P            [           E      sdmmc0-cmd          	P            \           F      sdmmc0-dectn            	P            Z           G      sdmmc0-wrprt            	P            Z      sdmmc0-bus1         	P             \      sdmmc0-bus4       @  	P             \            \            \            \           H      sdmmc0-pins         	P             Z             Z             Z             Z             Z             Z             Z              Z         sdmmc0ext      sdmmc0ext-clk           	P            ]      sdmmc0ext-cmd           	P             Z      sdmmc0ext-wrprt         	P            Z      sdmmc0ext-dectn         	P            Z      sdmmc0ext-bus1          	P            Z      sdmmc0ext-bus4        @  	P            Z            Z            Z            Z      sdmmc0ext-pins          	P              Z             Z             Z             Z             Z             Z             Z             Z         sdmmc1     sdmmc1-clk          	P            [           M      sdmmc1-cmd          	P            \           L      sdmmc1-pwren            	P            \      sdmmc1-wrprt            	P            \      sdmmc1-dectn            	P            \      sdmmc1-bus1         	P            \      sdmmc1-bus4       @  	P            \            \            \            \           K      sdmmc1-pins         	P             Z             Z             Z             Z             Z             Z             Z             Z             Z         emmc       emmc-clk            	P            ^           N      emmc-cmd            	P            _           O      emmc-pwren          	P            W      emmc-rstnout            	P            W      emmc-bus1           	P             _      emmc-bus4         @  	P             _            _            _            _      emmc-bus8           	P             _            _            _            _            _            _            _            _           P         pwm0       pwm0-pin            	P            W           /         pwm1       pwm1-pin            	P            W           0         pwm2       pwm2-pin            	P            W           1         pwmir      pwmir-pin           	P            W           2         gmac-1     rgmiim1-pins         `  	P            [            ]            ]            [            ]            ]            ]      
      ]            ]            [      	      [            ]            ]            [            [             [             [             ]             [             [             [             [      rmiim1-pins         	P            `            ^            `            `            `            `      
      `            `            ^      	      ^             W             W             W             W             W             W         gmac2phy       fephyled-speed10            	P             W      fephyled-duplex         	P             W      fephyled-rxm1           	P            W           S      fephyled-txm1           	P            W      fephyled-linkm1         	P            W           T         tsadc_pin      tsadc-int           	P            W      tsadc-pin           	P             W         hdmi_pin       hdmi-cec            	P             W           >      hdmi-hpd            	P             a           @         cif-0      dvp-d2d9-m0         	P            W            W            W            W            W      	      W      
      W            W            W             W            W            W         cif-1      dvp-d2d9-m1         	P            W            W            W            W            W            W            W            W            W             W            W            W         pmic       pmic-int-l          	P             Y           &         sdio-pwrseq    wifi-enable-h           	P             W           b            chosen          	^serial2:1500000n8         dc-12v            regulator-fixed         >dc_12v           }                 M          e             f      sdio-pwrseq           mmc-pwrseq-simple           !default         /   b        	j   c                 J      sdmmc-regulator           regulator-fixed         	v   d              !default         /   e        >vcc_sd          M 2Z        e 2Z        	{   (           I      vcc-sys           regulator-fixed         >vcc_sys          }                 M LK@        e LK@        	{   f           '      vcc-phy-regulator             regulator-fixed         >vcc_phy          }                    R         	compatible interrupt-parent #address-cells #size-cells model gpio0 gpio1 gpio2 gpio3 serial0 serial1 serial2 i2c0 i2c1 i2c2 i2c3 ethernet0 mmc0 mmc1 mmc2 device_type reg clocks #cooling-cells cpu-idle-states dynamic-power-coefficient enable-method operating-points-v2 i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache cpu-supply phandle entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us cache-level cache-unified opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend simple-audio-card,format simple-audio-card,mclk-fs simple-audio-card,name status sound-dai interrupts interrupt-affinity ports #clock-cells clock-frequency clock-output-names clock-names dmas dma-names #sound-dai-cells pinctrl-names pinctrl-0 pinctrl-1 gpio-controller #gpio-cells #power-domain-cells offset mode-normal mode-recovery mode-bootloader mode-loader reg-io-width reg-shift rockchip,system-power-controller wakeup-source vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply regulator-name regulator-min-microvolt regulator-max-microvolt regulator-always-on regulator-boot-on regulator-on-in-suspend regulator-suspend-microvolt #pwm-cells arm,pl330-periph-burst #dma-cells polling-delay-passive polling-delay sustainable-power thermal-sensors temperature hysteresis trip cooling-device contribution assigned-clocks assigned-clock-rates pinctrl-2 resets reset-names rockchip,grf rockchip,hw-tshut-temp #thermal-sensor-cells rockchip,efuse-size bits #io-channel-cells interrupt-names #iommu-cells iommus power-domains remote-endpoint phys phy-names nvmem-cells nvmem-cell-names #phy-cells #reset-cells assigned-clock-parents fifo-depth max-frequency bus-width cap-mmc-highspeed cap-sd-highspeed disable-wp vmmc-supply cap-sdio-irq keep-power-in-suspend mmc-pwrseq non-removable tx-fifo-depth rx-fifo-depth snps,txpbl phy-mode phy-handle clock_in_out phy-supply assigned-clock-rate phy-is-integrated dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size phy_type snps,dis-del-phy-power-chg-quirk snps,dis_enblslpm_quirk snps,dis-tx-ipgap-linecheck-quirk snps,dis-u2-freeclk-exists-quirk snps,dis_u2_susphy_quirk snps,dis_u3_susphy_quirk #interrupt-cells interrupt-controller ranges bias-pull-up bias-pull-down bias-disable drive-strength output-high output-low input-enable rockchip,pins stdout-path reset-gpios gpio vin-supply 