  "   8  $   (            
                               ,    friendlyarm,nanopi-r2s-plus rockchip,rk3328                                  +            7FriendlyElec NanoPi R2S Plus       aliases          =/pinctrl/gpio@ff210000           C/pinctrl/gpio@ff220000           I/pinctrl/gpio@ff230000           O/pinctrl/gpio@ff240000           U/serial@ff110000             ]/serial@ff120000             e/serial@ff130000             m/i2c@ff150000            r/i2c@ff160000            w/i2c@ff170000            |/i2c@ff180000            /ethernet@ff540000           /usb@ff600000/device@2           /mmc@ff500000            /mmc@ff520000         cpus                         +       cpu@0            cpu           arm,cortex-a53                                                                      x         psci                                      @        0           =           J   @        \           i           z              	      cpu@1            cpu           arm,cortex-a53                                                                     x         psci                                      @        0           =           J   @        \           i           z              
      cpu@2            cpu           arm,cortex-a53                                                                     x         psci                                      @        0           =           J   @        \           i           z                    cpu@3            cpu           arm,cortex-a53                                                                     x         psci                                      @        0           =           J   @        \           i           z                    idle-states         psci       cpu-sleep             arm,idle-state                                 x                                         l2-cache              cache                                               @        2                       opp-table-0           operating-points-v2                        opp-408000000               Q           ~        .  @         ?      opp-600000000               #F           ~        .  @      opp-816000000               0,           B@        .  @      opp-1008000000              <                   .  @      opp-1200000000              G           (        .  @      opp-1296000000              M?d                    .  @         analog-sound              simple-audio-card           Ki2s         d           ~Analog        	  disabled       simple-audio-card,cpu                    simple-audio-card,codec                     arm-pmu           arm,cortex-a53-pmu        0         d          e          f          g              	   
            display-subsystem             rockchip,display-subsystem                   	  disabled          hdmi-sound            simple-audio-card           Ki2s         d           ~HDMI          	  disabled       simple-audio-card,cpu                    simple-audio-card,codec                     psci              arm,psci-1.0 arm,psci-0.2            smc       timer             arm,armv8-timer       0                                
        xin24m            fixed-clock                     n6         xin24m             E      i2s@ff000000          (    rockchip,rk3328-i2s rockchip,rk3066-i2s                                                         )     7        i2s_clk i2s_hclk                                tx rx                     	  disabled                     i2s@ff010000          (    rockchip,rk3328-i2s rockchip,rk3066-i2s                                                        *     8        i2s_clk i2s_hclk                                tx rx                     	  disabled                     i2s@ff020000          (    rockchip,rk3328-i2s rockchip,rk3066-i2s                                                        +     9        i2s_clk i2s_hclk                                 tx rx                     	  disabled          spdif@ff030000            rockchip,rk3328-spdif                                                          .     :      
  mclk hclk                 
        tx          &default         4                     	  disabled          pdm@ff040000              rockchip,pdm                                         =     R        pdm_clk pdm_hclk                          rx          &default sleep           4                       >                     	  disabled          syscon@ff100000       &    rockchip,rk3328-grf syscon simple-mfd                                    :   io-domains        "    rockchip,rk3328-io-voltage-domain           okay            H           U           c           q                                          gpio              rockchip,rk3328-grf-gpio                              power-controller          !    rockchip,rk3328-power-controller                                    +               <   power-domain@6                             D                  power-domain@5                                   B      A      B                  power-domain@8                                  F                     reboot-mode           syscon-reboot-mode                    RB         RB        RB	        
RB         serial@ff110000       &    rockchip,rk3328-uart snps,dw-apb-uart                                        7                  &              baudclk apb_pclk                                tx rx           &default         4       !   "                   #         	  disabled          serial@ff120000       &    rockchip,rk3328-uart snps,dw-apb-uart                                        8                  '              baudclk apb_pclk                                tx rx           &default         4   #   $   %                   #         	  disabled          serial@ff130000       &    rockchip,rk3328-uart snps,dw-apb-uart                                        9                  (              baudclk apb_pclk                                tx rx           &default         4   &                   #           okay          i2c@ff150000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c                                      $                        +                   7            	  i2c pclk            &default         4   '      	  disabled          i2c@ff160000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c                                      %                        +                   8            	  i2c pclk            &default         4   (        okay       pmic@18           rockchip,rk805                          )                                 xin32k rk805-clkout2                                4   *        &default          -         N        \   +        h   +        t   +           +                      +   regulators     DCDC_REG1           vdd_log                            
4                  	  0   regulator-state-mem                  6 B@         DCDC_REG2           vdd_arm                            
4                  	  0              regulator-state-mem                  6 ~         DCDC_REG3           vcc_ddr                      regulator-state-mem                   DCDC_REG4         
  vcc_io_33                              2Z         2Z              regulator-state-mem                  6 2Z         LDO_REG1            vcc_18                             w@         w@              regulator-state-mem                  6 w@         LDO_REG2            vcc18_emmc                             w@         w@              regulator-state-mem                  6 w@         LDO_REG3            vdd_10                             B@         B@   regulator-state-mem                  6 B@                  i2c@ff170000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c                                      &                        +                   9            	  i2c pclk            &default         4   ,      	  disabled          i2c@ff180000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c                                      '                        +                   :            	  i2c pclk            &default         4   -      	  disabled          spi@ff190000          (    rockchip,rk3328-spi rockchip,rk3066-spi                                      1                        +                                  spiclk apb_pclk                     	        tx rx           &default         4   .   /   0   1      	  disabled          watchdog@ff1a0000              rockchip,rk3328-wdt snps,dw-wdt                                      (                        pwm@ff1b0000              rockchip,rk3328-pwm                                      <            	  pwm pclk            &default         4   2        R         	  disabled          pwm@ff1b0010              rockchip,rk3328-pwm                                     <            	  pwm pclk            &default         4   3        R         	  disabled          pwm@ff1b0020              rockchip,rk3328-pwm                                      <            	  pwm pclk            &default         4   4        R           okay          pwm@ff1b0030              rockchip,rk3328-pwm               0                      <            	  pwm pclk            &default         4   5        R         	  disabled          dma-controller@ff1f0000           arm,pl330 arm,primecell                      @                                       ]                     	  apb_pclk            t                    thermal-zones      soc-thermal                                           6       trips      trip-point0          p                   passive       trip-point1          L                   passive            7      soc-crit             s                	   critical             cooling-maps       map0               7      0     	   
                                tsadc@ff250000            rockchip,rk3328-tsadc                %                        :                 $          P               $              tsadc apb_pclk          &init default sleep          4   8        >   9        "   8        ,      B      
  3tsadc-apb           ?   :        L         c           okay            y                           6      efuse@ff260000            rockchip,rk3328-efuse                &         P                     +                  >        pclk_efuse                 id@7                         cpu-leakage@17                       logic-leakage@19                         cpu-version@1a                                          F         adc@ff280000          .    rockchip,rk3328-saradc rockchip,rk3399-saradc                (                        P                             %              saradc apb_pclk         ,      V        3saradc-apb        	  disabled          gpu@ff300000          "    rockchip,rk3328-mali arm,mali-450                0               T         Z          W          ]          X          Y          [          \         "  gp gpmmu pp pp0 ppmmu0 pp1 ppmmu1                              	  bus core            ,      f      iommu@ff330200            rockchip,iommu               3                       `                                aclk iface                    	  disabled          iommu@ff340800            rockchip,iommu               4        @               b                       F        aclk iface                    	  disabled          video-codec@ff350000              rockchip,rk3328-vpu              5                        	           vdpu                        F      
  aclk hclk              ;           <         iommu@ff350800            rockchip,iommu               5        @                                      F        aclk iface                         <              ;      video-codec@ff360000          *    rockchip,rk3328-vdec rockchip,rk3399-vdec                6                                               B      A      B        axi ahb cabac core                      A      B        ׄ ׄ             =           <         iommu@ff360480            rockchip,iommu                6       @    6       @               J                       B        aclk iface                         <              =      vop@ff370000              rockchip,rk3328-vop              7        >                                        x     ;        aclk_vop dclk_vop hclk_vop          ,                          3axi ahb dclk               >      	  disabled       port                         +                  endpoint@0                          ?           D            iommu@ff373f00            rockchip,iommu               7?                                               ;        aclk iface                    	  disabled               >      hdmi@ff3c0000             rockchip,rk3328-dw-hdmi              <                                   #                        F              iahb isfr cec              @        hdmi            &default         4   A   B   C        ?   :                  	  disabled                  ports                        +       port@0                  endpoint               D           ?         port@1                          codec@ff410000            rockchip,rk3328-codec                A                              *      
  pclk mclk           ?   :                  	  disabled                     phy@ff430000              rockchip,rk3328-hdmi-phy                 C                        S                     E      y        sysclk refoclk refpclk        	  hdmi_phy                        '   F        3cpu-version         D          	  disabled               @      clock-controller@ff440000         (    rockchip,rk3328-cru rockchip,cru syscon              D                 ?   :                   O                 x      =            &      '      (                                                      A      B      D      C      "      \      5                             H                 4                  $  \      z               E   E   E      |           n6 n6 n6     ׄ     n6 #F L  G рxhxhрxhxh                    syscon@ff450000       .    rockchip,rk3328-usb2phy-grf syscon simple-mfd                E                              +      usb2phy@100           rockchip,rk3328-usb2phy                            E        phyclk          usb480m_phy                           {        \   G        okay               G   otg-port            D          $         ;          <          =           otg-bvalid otg-id linestate         okay               W      host-port           D                   >         
  linestate           okay               X            mmc@ff500000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc              P        @                                  =      !      J      N        biu ciu ciu-drive ciu-sample            s           ~р        ,      m        3reset           okay                                         4   H   I   J   K        &default                                                L                 mmc@ff510000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc              Q        @                                  >      "      K      O        biu ciu ciu-drive ciu-sample            s           ~р        ,      n        3reset         	  disabled          mmc@ff520000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc              R        @                                  ?      #      L      P        biu ciu ciu-drive ciu-sample            s           ~р        ,      o        3reset           okay                                                    !        &default         4   M   N   O      ethernet@ff540000             rockchip,rk3328-gmac                 T                                   macirq        8         d      W      X      Z      Y                  M  stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac            ,      c      
  3stmmaceth           ?   :        /           =           K           okay                  d      f        \   P   P        Vinput           c   Q        nrgmii           w           4   R        &default                                $   mdio              snps,dwmac-mdio                      +       ethernet-phy@1                      4   S        &default           '          P           )                 Q            ethernet@ff550000             rockchip,rk3328-gmac                 U                 ?   :                          macirq        8         T      S      S      U                  V      I  stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref aclk_mac pclk_mac clk_macphy            ,      b      
  3stmmaceth           nrmii            c   T        /           =           K           Voutput        	  disabled       mdio              snps,dwmac-mdio                      +       ethernet-phy@0        4    ethernet-phy-id1234.d400 ethernet-phy-ieee802.3-c22                             V        ,      d        &default         4   U   V                    T            usb@ff580000          2    rockchip,rk3328-usb rockchip,rk3066-usb snps,dwc2                X                                         M        otg         host                                 	            @                  W      	  usb2-phy            okay          usb@ff5c0000              generic-ehci                 \                                         N   G           X        usb         okay          usb@ff5d0000              generic-ohci                 ]                                         N   G           X        usb         okay          mmc@ff5f0000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc              _        @                                  @            M      Q        biu ciu ciu-drive ciu-sample            s           ~р        ,      h        3reset         	  disabled          usb@ff600000              rockchip,rk3328-dwc3 snps,dwc3               `                        C                  `      a              ref_clk suspend_clk bus_clk         host          
  	utmi_wide            	         	?         	W         	y         	         	        okay                         +       device@2              usbbda,8153                      interrupt-controller@ff811000             arm,gic-400         	                         	      @                                 @             `                       	                   crypto@ff060000           rockchip,rk3328-crypto                       @                                 P     Q      ;        hclk_master hclk_slave sclk         ,      D        3crypto-rst        pinctrl           rockchip,rk3328-pinctrl         ?   :                     +            	   gpio@ff210000             rockchip,gpio-bank               !                        3                                               	        	              e      gpio@ff220000             rockchip,gpio-bank               "                        4                                               	        	              )      gpio@ff230000             rockchip,gpio-bank               #                        5                                               	        	              i      gpio@ff240000             rockchip,gpio-bank               $                        6                                               	        	         pcfg-pull-up             	           [      pcfg-pull-down           
           c      pcfg-pull-none           
           Y      pcfg-pull-none-2ma           
        
"              b      pcfg-pull-up-2ma             	        
"         pcfg-pull-up-4ma             	        
"              \      pcfg-pull-none-4ma           
        
"              _      pcfg-pull-down-4ma           
        
"         pcfg-pull-none-8ma           
        
"              ]      pcfg-pull-up-8ma             	        
"              ^      pcfg-pull-none-12ma          
        
"              `      pcfg-pull-up-12ma            	        
"              a      pcfg-output-high             
1      pcfg-output-low          
=      pcfg-input-high          	         
H           Z      pcfg-input           
H      i2c0       i2c0-xfer            
U            Y            Y           '         i2c1       i2c1-xfer            
U            Y            Y           (         i2c2       i2c2-xfer            
U            Y            Y           ,         i2c3       i2c3-xfer            
U             Y             Y           -      i2c3-pins            
U              Y              Y         hdmi_i2c       hdmii2c-xfer             
U             Y             Y           B         pdm-0      pdmm0-clk           
U            Y                 pdmm0-fsync         
U            Y      pdmm0-sdi0          
U            Y                 pdmm0-sdi1          
U            Y                 pdmm0-sdi2          
U            Y                 pdmm0-sdi3          
U            Y                 pdmm0-clk-sleep         
U             Z                 pdmm0-sdi0-sleep            
U             Z                 pdmm0-sdi1-sleep            
U             Z                 pdmm0-sdi2-sleep            
U             Z                 pdmm0-sdi3-sleep            
U             Z                 pdmm0-fsync-sleep           
U             Z         tsadc      otp-pin         
U             Y           8      otp-out         
U            Y           9         uart0      uart0-xfer           
U      	      Y            [                  uart0-cts           
U            Y           !      uart0-rts           
U      
      Y           "      uart0-rts-pin           
U      
       Y         uart1      uart1-xfer           
U            Y            [           #      uart1-cts           
U            Y           $      uart1-rts           
U            Y           %      uart1-rts-pin           
U             Y         uart2-0    uart2m0-xfer             
U             Y            [         uart2-1    uart2m1-xfer             
U             Y            [           &         spi0-0     spi0m0-clk          
U            [      spi0m0-cs0          
U            [      spi0m0-tx           
U      	      [      spi0m0-rx           
U      
      [      spi0m0-cs1          
U            [         spi0-1     spi0m1-clk          
U            [      spi0m1-cs0          
U            [      spi0m1-tx           
U            [      spi0m1-rx           
U            [      spi0m1-cs1          
U            [         spi0-2     spi0m2-clk          
U             [           .      spi0m2-cs0          
U            [           1      spi0m2-tx           
U            [           /      spi0m2-rx           
U            [           0         i2s1       i2s1-mclk           
U            Y      i2s1-sclk           
U            Y      i2s1-lrckrx         
U            Y      i2s1-lrcktx         
U            Y      i2s1-sdi            
U            Y      i2s1-sdo            
U            Y      i2s1-sdio1          
U            Y      i2s1-sdio2          
U            Y      i2s1-sdio3          
U            Y      i2s1-sleep          
U             Z             Z             Z             Z             Z             Z             Z             Z             Z         i2s2-0     i2s2m0-mclk         
U            Y      i2s2m0-sclk         
U            Y      i2s2m0-lrckrx           
U            Y      i2s2m0-lrcktx           
U            Y      i2s2m0-sdi          
U            Y      i2s2m0-sdo          
U            Y      i2s2m0-sleep          `  
U             Z             Z             Z             Z             Z             Z         i2s2-1     i2s2m1-mclk         
U            Y      i2s2m1-sclk         
U             Y      i2sm1-lrckrx            
U            Y      i2s2m1-lrcktx           
U            Y      i2s2m1-sdi          
U            Y      i2s2m1-sdo          
U            Y      i2s2m1-sleep          P  
U             Z              Z             Z             Z             Z         spdif-0    spdifm0-tx          
U             Y         spdif-1    spdifm1-tx          
U            Y         spdif-2    spdifm2-tx          
U             Y                    sdmmc0-0       sdmmc0m0-pwren          
U            \      sdmmc0m0-pin            
U             \         sdmmc0-1       sdmmc0m1-pwren          
U             \      sdmmc0m1-pin            
U              \           k         sdmmc0     sdmmc0-clk          
U            ]           H      sdmmc0-cmd          
U            ^           I      sdmmc0-dectn            
U            \           J      sdmmc0-wrprt            
U            \      sdmmc0-bus1         
U             ^      sdmmc0-bus4       @  
U             ^            ^            ^            ^           K      sdmmc0-pins         
U             \             \             \             \             \             \             \              \         sdmmc0ext      sdmmc0ext-clk           
U            _      sdmmc0ext-cmd           
U             \      sdmmc0ext-wrprt         
U            \      sdmmc0ext-dectn         
U            \      sdmmc0ext-bus1          
U            \      sdmmc0ext-bus4        @  
U            \            \            \            \      sdmmc0ext-pins          
U              \             \             \             \             \             \             \             \         sdmmc1     sdmmc1-clk          
U            ]      sdmmc1-cmd          
U            ^      sdmmc1-pwren            
U            ^      sdmmc1-wrprt            
U            ^      sdmmc1-dectn            
U            ^      sdmmc1-bus1         
U            ^      sdmmc1-bus4       @  
U            ^            ^            ^            ^      sdmmc1-pins         
U             \             \             \             \             \             \             \             \             \         emmc       emmc-clk            
U            `           M      emmc-cmd            
U            a           N      emmc-pwren          
U            Y      emmc-rstnout            
U            Y      emmc-bus1           
U             a      emmc-bus4         @  
U             a            a            a            a      emmc-bus8           
U             a            a            a            a            a            a            a            a           O         pwm0       pwm0-pin            
U            Y           2         pwm1       pwm1-pin            
U            Y           3         pwm2       pwm2-pin            
U            Y           4         pwmir      pwmir-pin           
U            Y           5         gmac-1     rgmiim1-pins         `  
U            ]            _            _            ]            _            _            _      
      _            _            ]      	      ]            _            _            ]            ]             ]             ]             _             ]             ]             ]             ]           R      rmiim1-pins         
U            b            `            b            b            b            b      
      b            b            `      	      `             Y             Y             Y             Y             Y             Y         gmac2phy       fephyled-speed10            
U             Y      fephyled-duplex         
U             Y      fephyled-rxm1           
U            Y           U      fephyled-txm1           
U            Y      fephyled-linkm1         
U            Y           V         tsadc_pin      tsadc-int           
U            Y      tsadc-pin           
U             Y         hdmi_pin       hdmi-cec            
U             Y           A      hdmi-hpd            
U             c           C         cif-0      dvp-d2d9-m0         
U            Y            Y            Y            Y            Y      	      Y      
      Y            Y            Y             Y            Y            Y         cif-1      dvp-d2d9-m1         
U            Y            Y            Y            Y            Y            Y            Y            Y            Y             Y            Y            Y         button     reset-button-pin            
U               Y           d         gmac2io    eth-phy-reset-pin           
U             c           S         leds       lan-led-pin         
U             Y           f      sys-led-pin         
U              Y           g      wan-led-pin         
U             Y           h         lan    lan-vdd-pin         
U             Y           l         pmic       pmic-int-l          
U             [           *         sd     sdio-vcc-pin            
U             [           j            chosen          
cserial2:1500000n8         gmac-clock            fixed-clock         sY@        gmac_clkin                         P      keys          
    gpio-keys           4   d        &default    key-reset           
oreset              e               
u          
   2         leds          
    gpio-leds           4   f   g   h        &default    led-0              i               
onanopi-r2s:green:lan          led-1              e               
onanopi-r2s:red:sys          
on        led-2              i               
onanopi-r2s:green:wan             sdmmcio-regulator             regulator-gpio           
           )               4   j        &default         vcc_io_sdio                   w@         2Z        
          
voltage         
            w@    2Z            
                    sdmmc-regulator           regulator-fixed         
   e              4   k        &default         vcc_sd                    2Z         2Z        
              L      vdd-5v            regulator-fixed         vdd_5v                             LK@         LK@           +      vdd-5v-lan            regulator-fixed          
        
   i               4   l        &default         vdd_5v_lan                            
   +         	compatible interrupt-parent #address-cells #size-cells model gpio0 gpio1 gpio2 gpio3 serial0 serial1 serial2 i2c0 i2c1 i2c2 i2c3 ethernet0 ethernet1 mmc0 mmc1 device_type reg clocks #cooling-cells cpu-idle-states dynamic-power-coefficient enable-method operating-points-v2 i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache cpu-supply phandle entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us cache-level cache-unified opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend simple-audio-card,format simple-audio-card,mclk-fs simple-audio-card,name status sound-dai interrupts interrupt-affinity ports #clock-cells clock-frequency clock-output-names clock-names dmas dma-names #sound-dai-cells pinctrl-names pinctrl-0 pinctrl-1 pmuio-supply vccio1-supply vccio2-supply vccio3-supply vccio4-supply vccio5-supply vccio6-supply gpio-controller #gpio-cells #power-domain-cells offset mode-normal mode-recovery mode-bootloader mode-loader reg-io-width reg-shift rockchip,system-power-controller wakeup-source vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-on-in-suspend regulator-suspend-microvolt #pwm-cells arm,pl330-periph-burst #dma-cells polling-delay-passive polling-delay sustainable-power thermal-sensors temperature hysteresis trip cooling-device contribution assigned-clocks assigned-clock-rates pinctrl-2 resets reset-names rockchip,grf rockchip,hw-tshut-temp #thermal-sensor-cells rockchip,hw-tshut-mode rockchip,hw-tshut-polarity rockchip,efuse-size bits #io-channel-cells interrupt-names #iommu-cells iommus power-domains remote-endpoint phys phy-names nvmem-cells nvmem-cell-names #phy-cells #reset-cells assigned-clock-parents fifo-depth max-frequency bus-width cap-sd-highspeed disable-wp sd-uhs-sdr12 sd-uhs-sdr25 sd-uhs-sdr50 sd-uhs-sdr104 vmmc-supply vqmmc-supply cap-mmc-highspeed mmc-hs200-1_8v non-removable tx-fifo-depth rx-fifo-depth snps,txpbl clock_in_out phy-handle phy-mode phy-supply rx_delay snps,aal tx_delay reset-assert-us reset-deassert-us reset-gpios phy-is-integrated dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size phy_type snps,dis-del-phy-power-chg-quirk snps,dis_enblslpm_quirk snps,dis-tx-ipgap-linecheck-quirk snps,dis-u2-freeclk-exists-quirk snps,dis_u2_susphy_quirk snps,dis_u3_susphy_quirk #interrupt-cells interrupt-controller ranges bias-pull-up bias-pull-down bias-disable drive-strength output-high output-low input-enable rockchip,pins stdout-path label linux,code debounce-interval default-state enable-active-high regulator-settling-time-us regulator-type startup-delay-us vin-supply gpio 