     8     (            7  `                             &    firefly,roc-rk3328-pc rockchip,rk3328                                    +            7Firefly ROC-RK3328-PC      aliases          =/pinctrl/gpio@ff210000           C/pinctrl/gpio@ff220000           I/pinctrl/gpio@ff230000           O/pinctrl/gpio@ff240000           U/serial@ff110000             ]/serial@ff120000             e/serial@ff130000             m/i2c@ff150000            r/i2c@ff160000            w/i2c@ff170000            |/i2c@ff180000            /ethernet@ff540000           /mmc@ff500000            /mmc@ff520000         cpus                         +       cpu@0            cpu           arm,cortex-a53                                                                      x         psci                                      @        &           3           @   @        R           _           p           {   	      cpu@1            cpu           arm,cortex-a53                                                                     x         psci                                      @        &           3           @   @        R           _           p           {   
      cpu@2            cpu           arm,cortex-a53                                                                     x         psci                                      @        &           3           @   @        R           _           p           {         cpu@3            cpu           arm,cortex-a53                                                                     x         psci                                      @        &           3           @   @        R           _           p           {         idle-states         psci       cpu-sleep             arm,idle-state                                 x                             {            l2-cache              cache                               	              @        (           {            opp-table-0           operating-points-v2                  {      opp-408000000               Q          ~        $  @         5      opp-600000000               #F          ~        $  @      opp-816000000               0,          B@        $  @      opp-1008000000              <                  $  @      opp-1200000000              G          (        $  @      opp-1296000000              M?d                   $  @         analog-sound              simple-audio-card           Ai2s         Z           tAnalog          okay       simple-audio-card,cpu                    simple-audio-card,codec                     arm-pmu           arm,cortex-a53-pmu        0         d          e          f          g              	   
            display-subsystem             rockchip,display-subsystem                   hdmi-sound            simple-audio-card           Ai2s         Z           tHDMI            okay       simple-audio-card,cpu                    simple-audio-card,codec                     psci              arm,psci-1.0 arm,psci-0.2            smc       timer             arm,armv8-timer       0                                
        xin24m            fixed-clock                     n6         xin24m          {   G      i2s@ff000000          (    rockchip,rk3328-i2s rockchip,rk3066-i2s                                                         )     7        i2s_clk i2s_hclk                                tx rx                       okay            {         i2s@ff010000          (    rockchip,rk3328-i2s rockchip,rk3066-i2s                                                        *     8        i2s_clk i2s_hclk                                tx rx                       okay            {         i2s@ff020000          (    rockchip,rk3328-i2s rockchip,rk3066-i2s                                                        +     9        i2s_clk i2s_hclk                                 tx rx                     	  disabled          spdif@ff030000            rockchip,rk3328-spdif                                                          .     :      
  mclk hclk                 
        tx          default         *                     	  disabled          pdm@ff040000              rockchip,pdm                                         =     R        pdm_clk pdm_hclk                          rx          default sleep           *                       4                     	  disabled          syscon@ff100000       &    rockchip,rk3328-grf syscon simple-mfd                                 {   :   io-domains        "    rockchip,rk3328-io-voltage-domain           okay            >           L           Z           h           v                               gpio              rockchip,rk3328-grf-gpio                                {   F      power-controller          !    rockchip,rk3328-power-controller                                    +            {   =   power-domain@6                             D                  power-domain@5                                   B      A      B                  power-domain@8                                  F                     reboot-mode           syscon-reboot-mode                    RB         RB        RB	         RB         serial@ff110000       &    rockchip,rk3328-uart snps,dw-apb-uart                                        7                  &              baudclk apb_pclk                                tx rx           default         *       !   "                            	  disabled          serial@ff120000       &    rockchip,rk3328-uart snps,dw-apb-uart                                        8                  '              baudclk apb_pclk                                tx rx           default         *   #   $   %                            	  disabled          serial@ff130000       &    rockchip,rk3328-uart snps,dw-apb-uart                                        9                  (              baudclk apb_pclk                                tx rx           default         *   &                              okay          i2c@ff150000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c                                      $                        +                   7            	  i2c pclk            default         *   '      	  disabled          i2c@ff160000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c                                      %                        +                   8            	  i2c pclk            default         *   (        okay       pmic@18           rockchip,rk805                          )                                 xin32k rk805-clkout2                                default         *   *         #         D        R   +        ^   +        j   +        v   +                              {   j   regulators     DCDC_REG1         
  vdd_logic            
4                                    {   ;   regulator-state-mem                   B@         DCDC_REG2           vdd_arm          
4                                    {      regulator-state-mem                   ~         DCDC_REG3           vcc_ddr                      regulator-state-mem                   DCDC_REG4           vcc_io           2Z         2Z                          {      regulator-state-mem                   2Z         LDO_REG1            vcc_18           w@         w@                          {      regulator-state-mem                   w@         LDO_REG2            vcc18_emmc           w@         w@                          {      regulator-state-mem                   w@         LDO_REG3            vdd_10           B@         B@                     regulator-state-mem                   B@                  i2c@ff170000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c                                      &                        +                   9            	  i2c pclk            default         *   ,      	  disabled          i2c@ff180000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c                                      '                        +                   :            	  i2c pclk            default         *   -      	  disabled          spi@ff190000          (    rockchip,rk3328-spi rockchip,rk3066-spi                                      1                        +                                  spiclk apb_pclk                     	        tx rx           default         *   .   /   0   1      	  disabled          watchdog@ff1a0000              rockchip,rk3328-wdt snps,dw-wdt                                      (                        pwm@ff1b0000              rockchip,rk3328-pwm                                      <            	  pwm pclk            default         *   2        3         	  disabled          pwm@ff1b0010              rockchip,rk3328-pwm                                     <            	  pwm pclk            default         *   3        3         	  disabled          pwm@ff1b0020              rockchip,rk3328-pwm                                      <            	  pwm pclk            default         *   4        3         	  disabled          pwm@ff1b0030              rockchip,rk3328-pwm               0                      <            	  pwm pclk            default         *   5        3         	  disabled          dma-controller@ff1f0000           arm,pl330 arm,primecell                      @                                       >                     	  apb_pclk            U           {         thermal-zones      soc-thermal         `           v                       6       trips      trip-point0          p                   passive       trip-point1          L                   passive         {   7      soc-crit             s                	   critical             cooling-maps       map0               7      0     	   
                                tsadc@ff250000            rockchip,rk3328-tsadc                %                        :                 $          P               $              tsadc apb_pclk          init default sleep          *   8        4   9           8              B      
  tsadc-apb               :        -         D           okay            {   6      efuse@ff260000            rockchip,rk3328-efuse                &         P                     +                  >        pclk_efuse          Z       id@7                         cpu-leakage@17                       logic-leakage@19                         cpu-version@1a                         n              {   H         adc@ff280000          .    rockchip,rk3328-saradc rockchip,rk3399-saradc                (                        P           s                  %              saradc apb_pclk               V        saradc-apb          okay                       {   k      gpu@ff300000          "    rockchip,rk3328-mali arm,mali-450                0               T         Z          W          ]          X          Y          [          \         "  gp gpmmu pp pp0 ppmmu0 pp1 ppmmu1                              	  bus core                  f           ;      iommu@ff330200            rockchip,iommu               3                       `                                aclk iface                    	  disabled          iommu@ff340800            rockchip,iommu               4        @               b                       F        aclk iface                    	  disabled          video-codec@ff350000              rockchip,rk3328-vpu              5                        	           vdpu                        F      
  aclk hclk              <           =         iommu@ff350800            rockchip,iommu               5        @                                      F        aclk iface                         =           {   <      video-codec@ff360000          *    rockchip,rk3328-vdec rockchip,rk3399-vdec                6                                               B      A      B        axi ahb cabac core                      A      B        ׄ ׄ             >           =         iommu@ff360480            rockchip,iommu                6       @    6       @               J                       B        aclk iface                         =           {   >      vop@ff370000              rockchip,rk3328-vop              7        >                                        x     ;        aclk_vop dclk_vop hclk_vop                                    axi ahb dclk               ?        okay       port                         +            {      endpoint@0                          @        {   E            iommu@ff373f00            rockchip,iommu               7?                                               ;        aclk iface                      okay            {   ?      hdmi@ff3c0000             rockchip,rk3328-dw-hdmi              <                                   #                        F              iahb isfr cec              A        hdmi            default         *   B   C   D            :                    okay            {      ports                        +       port@0                  endpoint               E        {   @         port@1                          codec@ff410000            rockchip,rk3328-codec                A                              *      
  pclk mclk               :                    okay               F               {         phy@ff430000              rockchip,rk3328-hdmi-phy                 C                        S                     G      y        sysclk refoclk refpclk        	  hdmi_phy                           H        cpu-version                     okay            {   A      clock-controller@ff440000         (    rockchip,rk3328-cru rockchip,cru syscon              D                     :                   !                 x      =            &      '      (                                                      A      B      D      C      "      \      5                             H                 4                  $  .      z               G   G   G      |           n6 n6 n6     ׄ     n6 #F L  G рxhxhрxhxh           {         syscon@ff450000       .    rockchip,rk3328-usb2phy-grf syscon simple-mfd                E                              +      usb2phy@100           rockchip,rk3328-usb2phy                            G        phyclk          usb480m_phy                           {        .   I        okay            {   I   otg-port                      $         ;          <          =           otg-bvalid otg-id linestate         okay            {   Y      host-port                              >         
  linestate           okay            {   Z            mmc@ff500000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc              P        @                                  =      !      J      N        biu ciu ciu-drive ciu-sample            E           Pр              m        reset           okay            ^            h         z                 default         *   J   K   L   M                                               N                 mmc@ff510000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc              Q        @                                  >      "      K      O        biu ciu ciu-drive ciu-sample            E           Pр              n        reset         	  disabled          mmc@ff520000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc              R        @                                  ?      #      L      P        biu ciu ciu-drive ciu-sample            E           Pр              o        reset           okay            ^            h                                    default         *   O   P   Q                            ethernet@ff540000             rockchip,rk3328-gmac                 T                                   macirq        8         d      W      X      Z      Y                  M  stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac                  c      
  stmmaceth               :                              *           okay                  d      f        .   R   R        5input           B   S        Mrgmii           default         *   T         V        _   U               o              '  P                      $                 ethernet@ff550000             rockchip,rk3328-gmac                 U                     :                          macirq        8         T      S      S      U                  V      I  stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref aclk_mac pclk_mac clk_macphy                  b      
  stmmaceth           Mrmii               V                              *           5output        	  disabled       mdio              snps,dwmac-mdio                      +       ethernet-phy@0        4    ethernet-phy-id1234.d400 ethernet-phy-ieee802.3-c22                             V              d        default         *   W   X                 {   V            usb@ff580000          2    rockchip,rk3328-usb rockchip,rk3066-usb snps,dwc2                X                                         M        otg         host                                             @                  Y      	  usb2-phy            okay          usb@ff5c0000              generic-ehci                 \                                         N   I           Z        usb         okay          usb@ff5d0000              generic-ohci                 ]                                         N   I           Z        usb         okay          mmc@ff5f0000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc              _        @                                  @            M      Q        biu ciu ciu-drive ciu-sample            E           Pр              h        reset         	  disabled          usb@ff600000              rockchip,rk3328-dwc3 snps,dwc3               `                        C                  `      a              ref_clk suspend_clk bus_clk         host          
  	utmi_wide            	         	6         	N         	p         	         	        okay          interrupt-controller@ff811000             arm,gic-400         	                         	      @                                 @             `                       	          {         crypto@ff060000           rockchip,rk3328-crypto                       @                                 P     Q      ;        hclk_master hclk_slave sclk               D        crypto-rst        pinctrl           rockchip,rk3328-pinctrl             :                     +            	   gpio@ff210000             rockchip,gpio-bank               !                        3                                               	        	           {   )      gpio@ff220000             rockchip,gpio-bank               "                        4                                               	        	           {   U      gpio@ff230000             rockchip,gpio-bank               #                        5                                               	        	           {   l      gpio@ff240000             rockchip,gpio-bank               $                        6                                               	        	           {   p      pcfg-pull-up             	        {   ]      pcfg-pull-down           	        {   e      pcfg-pull-none           
        {   [      pcfg-pull-none-2ma           
        
           {   d      pcfg-pull-up-2ma             	        
         pcfg-pull-up-4ma             	        
           {   ^      pcfg-pull-none-4ma           
        
           {   a      pcfg-pull-down-4ma           	        
         pcfg-pull-none-8ma           
        
           {   _      pcfg-pull-up-8ma             	        
           {   `      pcfg-pull-none-12ma          
        
           {   b      pcfg-pull-up-12ma            	        
           {   c      pcfg-output-high             
(      pcfg-output-low          
4      pcfg-input-high          	         
?        {   \      pcfg-input           
?      i2c0       i2c0-xfer            
L            [            [        {   '         i2c1       i2c1-xfer            
L            [            [        {   (         i2c2       i2c2-xfer            
L            [            [        {   ,         i2c3       i2c3-xfer            
L             [             [        {   -      i2c3-pins            
L              [              [         hdmi_i2c       hdmii2c-xfer             
L             [             [        {   C         pdm-0      pdmm0-clk           
L            [        {         pdmm0-fsync         
L            [      pdmm0-sdi0          
L            [        {         pdmm0-sdi1          
L            [        {         pdmm0-sdi2          
L            [        {         pdmm0-sdi3          
L            [        {         pdmm0-clk-sleep         
L             \        {         pdmm0-sdi0-sleep            
L             \        {         pdmm0-sdi1-sleep            
L             \        {         pdmm0-sdi2-sleep            
L             \        {         pdmm0-sdi3-sleep            
L             \        {         pdmm0-fsync-sleep           
L             \         tsadc      otp-pin         
L             [        {   8      otp-out         
L            [        {   9         uart0      uart0-xfer           
L      	      [            ]        {          uart0-cts           
L            [        {   !      uart0-rts           
L      
      [        {   "      uart0-rts-pin           
L      
       [         uart1      uart1-xfer           
L            [            ]        {   #      uart1-cts           
L            [        {   $      uart1-rts           
L            [        {   %      uart1-rts-pin           
L             [         uart2-0    uart2m0-xfer             
L             [            ]         uart2-1    uart2m1-xfer             
L             [            ]        {   &         spi0-0     spi0m0-clk          
L            ]      spi0m0-cs0          
L            ]      spi0m0-tx           
L      	      ]      spi0m0-rx           
L      
      ]      spi0m0-cs1          
L            ]         spi0-1     spi0m1-clk          
L            ]      spi0m1-cs0          
L            ]      spi0m1-tx           
L            ]      spi0m1-rx           
L            ]      spi0m1-cs1          
L            ]         spi0-2     spi0m2-clk          
L             ]        {   .      spi0m2-cs0          
L            ]        {   1      spi0m2-tx           
L            ]        {   /      spi0m2-rx           
L            ]        {   0         i2s1       i2s1-mclk           
L            [      i2s1-sclk           
L            [      i2s1-lrckrx         
L            [      i2s1-lrcktx         
L            [      i2s1-sdi            
L            [      i2s1-sdo            
L            [      i2s1-sdio1          
L            [      i2s1-sdio2          
L            [      i2s1-sdio3          
L            [      i2s1-sleep          
L             \             \             \             \             \             \             \             \             \         i2s2-0     i2s2m0-mclk         
L            [      i2s2m0-sclk         
L            [      i2s2m0-lrckrx           
L            [      i2s2m0-lrcktx           
L            [      i2s2m0-sdi          
L            [      i2s2m0-sdo          
L            [      i2s2m0-sleep          `  
L             \             \             \             \             \             \         i2s2-1     i2s2m1-mclk         
L            [      i2s2m1-sclk         
L             [      i2sm1-lrckrx            
L            [      i2s2m1-lrcktx           
L            [      i2s2m1-sdi          
L            [      i2s2m1-sdo          
L            [      i2s2m1-sleep          P  
L             \              \             \             \             \         spdif-0    spdifm0-tx          
L             [         spdif-1    spdifm1-tx          
L            [         spdif-2    spdifm2-tx          
L             [        {            sdmmc0-0       sdmmc0m0-pwren          
L            ^      sdmmc0m0-pin            
L             ^         sdmmc0-1       sdmmc0m1-pwren          
L             ^      sdmmc0m1-pin            
L              ^        {   f         sdmmc0     sdmmc0-clk          
L            _        {   J      sdmmc0-cmd          
L            `        {   K      sdmmc0-dectn            
L            ^        {   L      sdmmc0-wrprt            
L            ^      sdmmc0-bus1         
L             `      sdmmc0-bus4       @  
L             `            `            `            `        {   M      sdmmc0-pins         
L             ^             ^             ^             ^             ^             ^             ^              ^         sdmmc0ext      sdmmc0ext-clk           
L            a      sdmmc0ext-cmd           
L             ^      sdmmc0ext-wrprt         
L            ^      sdmmc0ext-dectn         
L            ^      sdmmc0ext-bus1          
L            ^      sdmmc0ext-bus4        @  
L            ^            ^            ^            ^      sdmmc0ext-pins          
L              ^             ^             ^             ^             ^             ^             ^             ^         sdmmc1     sdmmc1-clk          
L            _      sdmmc1-cmd          
L            `      sdmmc1-pwren            
L            `      sdmmc1-wrprt            
L            `      sdmmc1-dectn            
L            `      sdmmc1-bus1         
L            `      sdmmc1-bus4       @  
L            `            `            `            `      sdmmc1-pins         
L             ^             ^             ^             ^             ^             ^             ^             ^             ^         emmc       emmc-clk            
L            b        {   O      emmc-cmd            
L            c        {   P      emmc-pwren          
L            [      emmc-rstnout            
L            [      emmc-bus1           
L             c      emmc-bus4         @  
L             c            c            c            c      emmc-bus8           
L             c            c            c            c            c            c            c            c        {   Q         pwm0       pwm0-pin            
L            [        {   2         pwm1       pwm1-pin            
L            [        {   3         pwm2       pwm2-pin            
L            [        {   4         pwmir      pwmir-pin           
L            [        {   5         gmac-1     rgmiim1-pins         `  
L            _            a            a            _            a            a            a      
      a            a            _      	      _            a            a            _            _             _             _             a             _             _             _             _        {   T      rmiim1-pins         
L            d            b            d            d            d            d      
      d            d            b      	      b             [             [             [             [             [             [         gmac2phy       fephyled-speed10            
L             [      fephyled-duplex         
L             [      fephyled-rxm1           
L            [        {   W      fephyled-txm1           
L            [      fephyled-linkm1         
L            [        {   X         tsadc_pin      tsadc-int           
L            [      tsadc-pin           
L             [         hdmi_pin       hdmi-cec            
L             [        {   B      hdmi-hpd            
L             e        {   D         cif-0      dvp-d2d9-m0         
L            [            [            [            [            [      	      [      
      [            [            [             [            [            [         cif-1      dvp-d2d9-m1         
L            [            [            [            [            [            [            [            [            [             [            [            [         pmic       pmic-int-l          
L              ]        {   *         usb2       usb20-host-drv          
L               ]        {   h         ir     ir-int          
L             [        {   m         sdmmcio    sdio-per-pin            
L              e        {   g         wifi       wifi-en         
L             [        {   n      wifi-host-wake          
L             a        {   o      bt-rst          
L             [      bt-en           
L             [            chosen          
Zserial2:1500000n8         external-gmac-clock           fixed-clock         sY@        gmac_clkin                      {   R      dc-12v            regulator-fixed         dc_12v                                                {   i      sdmmc-regulator           regulator-fixed         j   )              default         *   f                 vcc_sd           2Z         2Z        
f           {   N      sdmmcio-regulator             regulator-gpio             )                 w@    2Z          	  vcc_sdio            
qvoltage          w@         2Z                 
f   +        default         *   g        {         vcc-host1-5v-regulator            regulator-fixed          
        j   )                default         *   h        vcc_host1_5v                     
f   +      vcc-sys           regulator-fixed         vcc_sys                            LK@         LK@        
f   i        {   +      vcc-phy-regulator             regulator-fixed         vcc_phy                           {   S      leds          
    gpio-leds      led-0           
firefly:blue:power        
  
heartbeat              j              
on        led-1           
firefly:yellow:user         
mmc1               j               
off          adc-keys          	    adc-keys            
   k            
buttons         
    button-recovery       	  
Recovery            
  h        
  '         ir-receiver           gpio-ir-receiver               l            
  rc-khadas           default         *   m      sdio-pwrseq           mmc-pwrseq-simple           default         *   n   o        +   p               	compatible interrupt-parent #address-cells #size-cells model gpio0 gpio1 gpio2 gpio3 serial0 serial1 serial2 i2c0 i2c1 i2c2 i2c3 ethernet0 mmc0 mmc1 device_type reg clocks #cooling-cells cpu-idle-states dynamic-power-coefficient enable-method operating-points-v2 i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache cpu-supply phandle entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us cache-level cache-unified opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend simple-audio-card,format simple-audio-card,mclk-fs simple-audio-card,name status sound-dai interrupts interrupt-affinity ports #clock-cells clock-frequency clock-output-names clock-names dmas dma-names #sound-dai-cells pinctrl-names pinctrl-0 pinctrl-1 vccio1-supply vccio2-supply vccio3-supply vccio4-supply vccio5-supply vccio6-supply pmuio-supply gpio-controller #gpio-cells #power-domain-cells offset mode-normal mode-recovery mode-bootloader mode-loader reg-io-width reg-shift rockchip,system-power-controller wakeup-source vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply regulator-name regulator-min-microvolt regulator-max-microvolt regulator-always-on regulator-boot-on regulator-on-in-suspend regulator-suspend-microvolt #pwm-cells arm,pl330-periph-burst #dma-cells polling-delay-passive polling-delay sustainable-power thermal-sensors temperature hysteresis trip cooling-device contribution assigned-clocks assigned-clock-rates pinctrl-2 resets reset-names rockchip,grf rockchip,hw-tshut-temp #thermal-sensor-cells rockchip,efuse-size bits #io-channel-cells vref-supply interrupt-names mali-supply #iommu-cells iommus power-domains remote-endpoint phys phy-names mute-gpios nvmem-cells nvmem-cell-names #phy-cells #reset-cells assigned-clock-parents fifo-depth max-frequency bus-width cap-mmc-highspeed cap-sd-highspeed disable-wp sd-uhs-sdr12 sd-uhs-sdr25 sd-uhs-sdr50 sd-uhs-sdr104 vmmc-supply vqmmc-supply mmc-ddr-1_8v mmc-hs200-1_8v non-removable tx-fifo-depth rx-fifo-depth snps,txpbl clock_in_out phy-supply phy-mode snps,aal snps,reset-gpio snps,reset-active-low snps,reset-delays-us snps,rxpbl tx_delay rx_delay phy-handle phy-is-integrated dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size phy_type snps,dis-del-phy-power-chg-quirk snps,dis_enblslpm_quirk snps,dis-tx-ipgap-linecheck-quirk snps,dis-u2-freeclk-exists-quirk snps,dis_u2_susphy_quirk snps,dis_u3_susphy_quirk #interrupt-cells interrupt-controller ranges bias-pull-up bias-pull-down bias-disable drive-strength output-high output-low input-enable rockchip,pins stdout-path vin-supply regulator-type enable-active-high label linux,default-trigger default-state io-channels io-channel-names keyup-threshold-microvolt linux,code press-threshold-microvolt linux,rc-map-name reset-gpios 