  k   8  eh   (              e0                             #    geekbuying,geekbox rockchip,rk3368                                   +            7GeekBox    aliases          =/pinctrl/gpio@ff750000           C/pinctrl/gpio@ff780000           I/pinctrl/gpio@ff790000           O/pinctrl/gpio@ff7a0000           U/i2c@ff650000            Z/i2c@ff660000            _/i2c@ff140000            d/i2c@ff150000            i/i2c@ff160000            n/i2c@ff170000            s/serial@ff180000             {/serial@ff190000             /serial@ff690000             /serial@ff1b0000             /serial@ff1c0000             /spi@ff110000            /spi@ff120000            /spi@ff130000            /ethernet@ff290000           /mmc@ff0f0000         cpus                         +       cpu-map    cluster0       core0                     core1                     core2                     core3                        cluster1       core0                     core1                     core2                     core3               	            cpu@0            cpu           arm,cortex-a53                            psci                                  cpu@1            cpu           arm,cortex-a53                           psci                                  cpu@2            cpu           arm,cortex-a53                           psci                                  cpu@3            cpu           arm,cortex-a53                           psci                            	      cpu@100          cpu           arm,cortex-a53                           psci                                  cpu@101          cpu           arm,cortex-a53                          psci                                  cpu@102          cpu           arm,cortex-a53                          psci                                  cpu@103          cpu           arm,cortex-a53                          psci                                     arm-pmu           arm,cortex-a53-pmu        `          p          q          r          s          t          u          v          w                         	                  psci              arm,psci-0.2             smc       timer             arm,armv8-timer       0                                 
        oscillator            fixed-clock         n6          xin24m          3                A      mmc@ff0c0000          0    rockchip,rk3368-dw-mshc rockchip,rk3288-dw-mshc                      @         @р         N   
     
   D   
   r   
   v        Ubiu ciu ciu-drive ciu-sample            a                               l   
           sreset         	  disabled          mmc@ff0d0000          0    rockchip,rk3368-dw-mshc rockchip,rk3288-dw-mshc                      @         @р         N   
     
   E   
   s   
   w        Ubiu ciu ciu-drive ciu-sample            a                   !           l   
           sreset         	  disabled          mmc@ff0f0000          0    rockchip,rk3368-dw-mshc rockchip,rk3288-dw-mshc                      @         @р         N   
     
   G   
   u   
   y        Ubiu ciu ciu-drive ciu-sample            a                   #           l   
           sreset           okay                                р                                       default                        saradc@ff100000           rockchip,saradc                                       $                      N   
   I   
  [        Usaradc apb_pclk         l   
   W        ssaradc-apb        	  disabled          spi@ff110000          (    rockchip,rk3368-spi rockchip,rk3066-spi                               N   
   A   
  R        Uspiclk apb_pclk                 ,           default                                          +          	  disabled          spi@ff120000          (    rockchip,rk3368-spi rockchip,rk3066-spi                               N   
   B   
  S        Uspiclk apb_pclk                 -           default                                          +          	  disabled          spi@ff130000          (    rockchip,rk3368-spi rockchip,rk3066-spi                               N   
   C   
  T        Uspiclk apb_pclk                 )           default                                          +          	  disabled          i2c@ff140000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c                                       >                        +            Ui2c         N   
  N        default                  	  disabled          i2c@ff150000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c                                       ?                        +            Ui2c         N   
  O        default                  	  disabled          i2c@ff160000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c                                       @                        +            Ui2c         N   
  P        default                  	  disabled          i2c@ff170000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c                                       A                        +            Ui2c         N   
  Q        default                  	  disabled          serial@ff180000       &    rockchip,rk3368-uart snps,dw-apb-uart                                 n6         N   
   M   
  U        Ubaudclk apb_pclk                    7                               	  disabled          serial@ff190000       &    rockchip,rk3368-uart snps,dw-apb-uart                                 n6         N   
   N   
  V        Ubaudclk apb_pclk                    8                               	  disabled          serial@ff1b0000       &    rockchip,rk3368-uart snps,dw-apb-uart                                 n6         N   
   P   
  X        Ubaudclk apb_pclk                    :                               	  disabled          serial@ff1c0000       &    rockchip,rk3368-uart snps,dw-apb-uart                                 n6         N   
   Q   
  Y        Ubaudclk apb_pclk                    ;                               	  disabled          dma-controller@ff250000           arm,pl330 arm,primecell              %        @                                      
                     0        N   
         	  Uapb_pclk          thermal-zones      cpu-thermal         G   d        ]          k           trips      cpu_alert0          { $                   passive             !      cpu_alert1          { 8                   passive             "      cpu_crit            { s                	   critical             cooling-maps       map0               !      0                    map1               "      0              	            gpu-thermal         G   d        ]          k          trips      gpu_alert0          { 8                   passive             #      gpu_crit            { 8                	   critical             cooling-maps       map0               #      0                             tsadc@ff280000            rockchip,rk3368-tsadc                (                         %           N   
   H   
  Z        Utsadc apb_pclk          l   
         
  stsadc-apb           init default sleep             $           %           $                    s        okay                                              ethernet@ff290000             rockchip,rk3368-gmac                 )                                    macirq          )   &      8  N   
      
   f   
   g   
   c   
      
      
  ]      M  Ustmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac            okay            6   '        Argmii           Jinput           W   
           g   (        default            )        ~   0                 usb@ff500000              generic-ehci                 P                                    N   
          okay          usb@ff580000          2    rockchip,rk3368-usb rockchip,rk3066-usb snps,dwc2                X                                    N   
          Uotg         otg                                          @   @            okay          dma-controller@ff600000           arm,pl330 arm,primecell              `        @                                       
                     0        N   
         	  Uapb_pclk                B      i2c@ff650000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c              e                 N   
  L        Ui2c                 <           default            *                     +            okay       pmic@1b           rockchip,rk808                      default            +   ,            -                                   .           .           .           .           .        %   .        1           =   .        I   .        V   .        c            xin32k rk808-clkout2            3      regulators     DCDC_REG1            p                  
`         `        vdd_cpu       DCDC_REG2            p                  
`         `        vdd_log       DCDC_REG3            p                 vcc_ddr       DCDC_REG4            p                  2Z         2Z        vcc_io                    LDO_REG1             p                  w@         w@        vcc18_flash                   LDO_REG2             p                  2Z         2Z      
  vcc33_lcd         LDO_REG3             p                  B@         B@        vdd_10        LDO_REG4                      w@         w@        vcca_18       LDO_REG5             p                  w@         2Z      	  vccio_sd          LDO_REG6             p                  B@         B@      
  vdd10_lcd         LDO_REG7             p                  w@         w@        vcc_18        LDO_REG8             p                  w@         w@      
  vcc18_lcd         SWITCH_REG1         vcc_sd        SWITCH_REG2          p                 vcc_lan             '               i2c@ff660000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c              f                         =                        +            Ui2c         N   
  M        default            /      	  disabled          pwm@ff680000          (    rockchip,rk3368-pwm rockchip,rk3288-pwm              h                            default            0        N   
  _      	  disabled          pwm@ff680010          (    rockchip,rk3368-pwm rockchip,rk3288-pwm              h                           default            1        N   
  _      	  disabled          pwm@ff680020          (    rockchip,rk3368-pwm rockchip,rk3288-pwm              h                            N   
  _      	  disabled          pwm@ff680030          (    rockchip,rk3368-pwm rockchip,rk3288-pwm              h 0                          default            2        N   
  _      	  disabled          serial@ff690000       &    rockchip,rk3368-uart snps,dw-apb-uart                i                 N   
   O   
  W        Ubaudclk apb_pclk                    9           default            3                              okay          mbox@ff6b0000             rockchip,rk3368-mailbox              k               0                                                   N   
  E        Upclk_mailbox                     	  disabled          power-management@ff730000         &    rockchip,rk3368-pmu syscon simple-mfd                s            power-controller          !    rockchip,rk3368-power-controller                                    +                E   power-domain@12                     N   
      
      
      
      
      
      
      
     
     
     
     
     
     
  c   
  h   
  g   
  n   
  o   
  r   
  s   
  f   
  d   
   d   
   h   
   i   
   l   
   k   
   j   
   n   
   m      $      4   5   6   7   8   9   :   ;   <                  power-domain@14                      N   
      
     
   o   
   p            =   >   ?                  power-domain@16                     N   
      
      
   @            @                        syscon@ff738000       )    rockchip,rk3368-pmugrf syscon simple-mfd                 s                    F   io-domains        &    rockchip,rk3368-pmu-io-voltage-domain         	  disabled          reboot-mode           syscon-reboot-mode                     RB         RB        (RB	        8RB         clock-controller@ff760000             rockchip,rk3368-cru              v                 N   A        Uxin24m          )   &        3           D               
      syscon@ff770000       &    rockchip,rk3368-grf syscon simple-mfd                w                     &   io-domains        "    rockchip,rk3368-io-voltage-domain         	  disabled             watchdog@ff800000              rockchip,rk3368-wdt snps,dw-wdt                               N   
  p                O           okay          timer@ff810000        ,    rockchip,rk3368-timer rockchip,rk3288-timer                                        B           N   
  a   
   U        Upclk timer        spdif@ff880000            rockchip,rk3368-spdif                                         6           N   
   S   
        
  Umclk hclk           Q   B           Vtx          default            C        `          	  disabled          i2s-2ch@ff890000          (    rockchip,rk3368-i2s rockchip,rk3066-i2s                                       (           Ui2s_clk i2s_hclk            N   
   T   
          Q   B      B           Vtx rx           `          	  disabled          i2s-8ch@ff898000          (    rockchip,rk3368-i2s rockchip,rk3066-i2s                                      5           Ui2s_clk i2s_hclk            N   
   R   
          Q   B       B           Vtx rx           default            D        `          	  disabled          iommu@ff900800            rockchip,iommu                                                  N   
      
          Uaclk iface          q   E                     	  disabled          iommu@ff914000            rockchip,iommu                @            P                                   N   
      
          Uaclk iface                      q   E                  	  disabled          iommu@ff930300            rockchip,iommu                                                  N   
      
          Uaclk iface          q   E                     	  disabled          iommu@ff9a0440            rockchip,iommu                @       @           @                           N   
      
          Uaclk iface                    	  disabled          iommu@ff9a0800            rockchip,iommu                                       	          
           N   
      
          Uaclk iface                    	  disabled          qos@ffad0000              rockchip,rk3368-qos syscon                                     4      qos@ffad0080              rockchip,rk3368-qos syscon                                    5      qos@ffad0100              rockchip,rk3368-qos syscon                                    6      qos@ffad0180              rockchip,rk3368-qos syscon                                   7      qos@ffad0200              rockchip,rk3368-qos syscon                                    8      qos@ffad0280              rockchip,rk3368-qos syscon                                   9      qos@ffad0300              rockchip,rk3368-qos syscon                                    :      qos@ffad0380              rockchip,rk3368-qos syscon                                   ;      qos@ffad0400              rockchip,rk3368-qos syscon                                    <      qos@ffae0000              rockchip,rk3368-qos syscon                                     =      qos@ffae0100              rockchip,rk3368-qos syscon                                    >      qos@ffae0180              rockchip,rk3368-qos syscon                                   ?      qos@ffaf0000              rockchip,rk3368-qos syscon                                     @      efuse@ffb00000            rockchip,rk3368-efuse                                               +           N   
  q        Upclk_efuse     cpu-leakage@17                       temp-adjust@1f                          interrupt-controller@ffb71000             arm,gic-400                                        @                                 @             `                        	                    pinctrl           rockchip,rk3368-pinctrl         )   &           F                     +               gpio@ff750000             rockchip,gpio-bank               u                 N   
  @                Q                                                       -      gpio@ff780000             rockchip,gpio-bank               x                 N   
  A                R                                                 gpio@ff790000             rockchip,gpio-bank               y                 N   
  B                S                                                       M      gpio@ff7a0000             rockchip,gpio-bank               z                 N   
  C                T                                                       J      pcfg-pull-up                         H      pcfg-pull-down           
      pcfg-pull-none                       G      pcfg-pull-none-12ma                  &               I      emmc       emmc-clk            5            G                  emmc-cmd            5            H                  emmc-pwr            5            H      emmc-bus1           5            H      emmc-bus4         @  5            H            H            H            H      emmc-bus8           5            H            H            H            H            H            H            H            H                     gmac       rgmii-pins          5            G            G            G            I      	      I      
      I            I            I            I            G            G            G            G            G            G            )      rmii-pins           5            G            G            G            I      	      I            I            G            G            G            G         i2c0       i2c0-xfer            5             G             G            *         i2c1       i2c1-xfer            5            G            G            /         i2c2       i2c2-xfer            5       	      G            G                     i2c3       i2c3-xfer            5            G            G                     i2c4       i2c4-xfer            5            G            G                     i2c5       i2c5-xfer            5            G            G                     i2s    i2s-8ch-bus         5            G            G            G            G            G            G            G            G            G            D         pwm0       pwm0-pin            5            G            0         pwm1       pwm1-pin            5             G            1         pwm3       pwm3-pin            5            G            2         sdio0      sdio0-bus1          5            H      sdio0-bus4        @  5            H            H            H            H      sdio0-cmd           5             H      sdio0-clk           5            G      sdio0-cd            5            H      sdio0-wp            5            H      sdio0-pwr           5            H      sdio0-bkpwr         5            H      sdio0-int           5            H         sdmmc      sdmmc-clk           5      	      G      sdmmc-cmd           5      
      H      sdmmc-cd            5            H      sdmmc-bus1          5            H      sdmmc-bus4        @  5            H            H            H            H         spdif      spdif-tx            5            G            C         spi0       spi0-clk            5            H                  spi0-cs0            5            H                  spi0-cs1            5            H      spi0-tx         5            H                  spi0-rx         5            H                     spi1       spi1-clk            5            H                  spi1-cs0            5            H                  spi1-cs1            5            H      spi1-rx         5            H                  spi1-tx         5            H                     spi2       spi2-clk            5             H                  spi2-cs0            5             H                  spi2-rx         5       
      H                  spi2-tx         5             H                     tsadc      otp-pin         5              G            $      otp-out         5             G            %         uart0      uart0-xfer           5            H            G      uart0-cts           5            G      uart0-rts           5            G         uart1      uart1-xfer           5             H             G      uart1-cts           5             G      uart1-rts           5             G         uart2      uart2-xfer           5            H            G            3         uart3      uart3-xfer           5            H            G      uart3-cts           5            G      uart3-rts           5            G         uart4      uart4-xfer           5             H             G      uart4-cts           5             G      uart4-rts           5             G         ir     ir-int          5             G            K         keys       pwr-key         5              G            L         pmic       pmic-sleep          5              G            ,      pmic-int            5              H            +            chosen          Cserial2:115200n8          memory@0             memory                                gmac-clk              fixed-clock         sY@      	   ext_gmac            3                (      ir-receiver           gpio-ir-receiver            O   J              default            K      gpio-keys         
    gpio-keys           default            L   key-power           O   -              UGPIO Power          [   t         f         gpio-leds         
    gpio-leds      led-0           O   M               Ugeekbox:blue:led            ton        led-1           O   M               Ugeekbox:red:led         toff          vcc-sys-regulator             regulator-fixed         vcc_sys          LK@         LK@         p                     .         	compatible interrupt-parent #address-cells #size-cells model gpio0 gpio1 gpio2 gpio3 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 serial0 serial1 serial2 serial3 serial4 spi0 spi1 spi2 ethernet0 mmc0 cpu device_type reg enable-method #cooling-cells phandle interrupts interrupt-affinity clock-frequency clock-output-names #clock-cells max-frequency clocks clock-names fifo-depth resets reset-names status bus-width cap-mmc-highspeed non-removable vmmc-supply vqmmc-supply pinctrl-names pinctrl-0 #io-channel-cells reg-shift reg-io-width #dma-cells arm,pl330-broken-no-flushp arm,pl330-periph-burst polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device pinctrl-1 pinctrl-2 #thermal-sensor-cells rockchip,hw-tshut-temp rockchip,hw-tshut-mode rockchip,hw-tshut-polarity interrupt-names rockchip,grf phy-supply phy-mode clock_in_out assigned-clocks assigned-clock-parents tx_delay rx_delay dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size rockchip,system-power-controller vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply vcc10-supply vcc11-supply vcc12-supply regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-name #pwm-cells #mbox-cells #power-domain-cells pm_qos offset mode-normal mode-recovery mode-bootloader mode-loader #reset-cells dmas dma-names #sound-dai-cells power-domains #iommu-cells rockchip,disable-mmu-reset interrupt-controller #interrupt-cells rockchip,pmu ranges gpio-controller #gpio-cells bias-pull-up bias-pull-down bias-disable drive-strength rockchip,pins stdout-path gpios label linux,code wakeup-source default-state 