  n   8  g   (              gP                                 rockchip,r88 rockchip,rk3368                                     +            7Rockchip R88       aliases          =/pinctrl/gpio@ff750000           C/pinctrl/gpio@ff780000           I/pinctrl/gpio@ff790000           O/pinctrl/gpio@ff7a0000           U/i2c@ff650000            Z/i2c@ff660000            _/i2c@ff140000            d/i2c@ff150000            i/i2c@ff160000            n/i2c@ff170000            s/serial@ff180000             {/serial@ff190000             /serial@ff690000             /serial@ff1b0000             /serial@ff1c0000             /spi@ff110000            /spi@ff120000            /spi@ff130000            /ethernet@ff290000           /mmc@ff0d0000            /mmc@ff0f0000         cpus                         +       cpu-map    cluster0       core0                     core1                     core2                     core3                        cluster1       core0                     core1                     core2                     core3               	            cpu@0            cpu           arm,cortex-a53                            psci                                  cpu@1            cpu           arm,cortex-a53                           psci                                  cpu@2            cpu           arm,cortex-a53                           psci                                  cpu@3            cpu           arm,cortex-a53                           psci                            	      cpu@100          cpu           arm,cortex-a53                           psci                                  cpu@101          cpu           arm,cortex-a53                          psci                                  cpu@102          cpu           arm,cortex-a53                          psci                                  cpu@103          cpu           arm,cortex-a53                          psci                                     arm-pmu           arm,cortex-a53-pmu        `          p          q          r          s          t          u          v          w                        	                  psci              arm,psci-0.2             smc       timer             arm,armv8-timer       0                                 
        oscillator            fixed-clock         n6         %xin24m          8                D      mmc@ff0c0000          0    rockchip,rk3368-dw-mshc rockchip,rk3288-dw-mshc                      @         Eр         S   
     
   D   
   r   
   v        Zbiu ciu ciu-drive ciu-sample            f                               q   
           xreset         	  disabled          mmc@ff0d0000          0    rockchip,rk3368-dw-mshc rockchip,rk3288-dw-mshc                      @         Eр         S   
     
   E   
   s   
   w        Zbiu ciu ciu-drive ciu-sample            f                   !           q   
           xreset           okay               
   E           
                                                                     	default                          !           -         mmc@ff0f0000          0    rockchip,rk3368-dw-mshc rockchip,rk3288-dw-mshc                      @         Eр         S   
     
   G   
   u   
   y        Zbiu ciu ciu-drive ciu-sample            f                   #           q   
           xreset           okay                        :                            	default                        saradc@ff100000           rockchip,saradc                                       $           L           S   
   I   
  [        Zsaradc apb_pclk         q   
   W        xsaradc-apb          okay            ^         spi@ff110000          (    rockchip,rk3368-spi rockchip,rk3066-spi                               S   
   A   
  R        Zspiclk apb_pclk                 ,           	default                                          +          	  disabled          spi@ff120000          (    rockchip,rk3368-spi rockchip,rk3066-spi                               S   
   B   
  S        Zspiclk apb_pclk                 -           	default                                          +          	  disabled          spi@ff130000          (    rockchip,rk3368-spi rockchip,rk3066-spi                               S   
   C   
  T        Zspiclk apb_pclk                 )           	default                      !                     +          	  disabled          i2c@ff140000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c                                       >                        +            Zi2c         S   
  N        	default            "      	  disabled          i2c@ff150000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c                                       ?                        +            Zi2c         S   
  O        	default            #      	  disabled          i2c@ff160000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c                                       @                        +            Zi2c         S   
  P        	default            $      	  disabled          i2c@ff170000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c                                       A                        +            Zi2c         S   
  Q        	default            %      	  disabled          serial@ff180000       &    rockchip,rk3368-uart snps,dw-apb-uart                                 n6         S   
   M   
  U        Zbaudclk apb_pclk                    7           j           t         	  disabled          serial@ff190000       &    rockchip,rk3368-uart snps,dw-apb-uart                                 n6         S   
   N   
  V        Zbaudclk apb_pclk                    8           j           t         	  disabled          serial@ff1b0000       &    rockchip,rk3368-uart snps,dw-apb-uart                                 n6         S   
   P   
  X        Zbaudclk apb_pclk                    :           j           t         	  disabled          serial@ff1c0000       &    rockchip,rk3368-uart snps,dw-apb-uart                                 n6         S   
   Q   
  Y        Zbaudclk apb_pclk                    ;           j           t         	  disabled          dma-controller@ff250000           arm,pl330 arm,primecell              %        @                                                                   S   
         	  Zapb_pclk          thermal-zones      cpu-thermal            d                     &       trips      cpu_alert0           $                   passive             '      cpu_alert1           8                   passive             (      cpu_crit             s                	   critical             cooling-maps       map0            	   '      0                    map1            	   (      0              	            gpu-thermal            d                     &      trips      gpu_alert0           8                   passive             )      gpu_crit             8                	   critical             cooling-maps       map0            	   )      0                             tsadc@ff280000            rockchip,rk3368-tsadc                (                         %           S   
   H   
  Z        Ztsadc apb_pclk          q   
         
  xtsadc-apb           	init default sleep             *           +        '   *        1           G s        okay            ^            u                &      ethernet@ff290000             rockchip,rk3368-gmac                 )                                    macirq             ,      8  S   
      
   f   
   g   
   c   
      
      
  ]      M  Zstmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac            okay               -        rmii            output             .                              ' B@        	default            /        	   0                 usb@ff500000              generic-ehci                 P                                    S   
          okay          usb@ff580000          2    rockchip,rk3368-usb rockchip,rk3066-usb snps,dwc2                X                                    S   
          Zotg         host            #           5          D            @   @            okay          dma-controller@ff600000           arm,pl330 arm,primecell              `        @                                                                    S   
         	  Zapb_pclk                E      i2c@ff650000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c              e                 S   
  L        Zi2c                 <           	default            0                     +            okay       syr827@40             silergy,syr827              @        S           pvdd_cpu           ,         
4         `          @                             1      rtc@51            haoyu,hym8563               Q        8            %xin32k              U         i2c@ff660000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c              f                         =                        +            Zi2c         S   
  M        	default            2      	  disabled          pwm@ff680000          (    rockchip,rk3368-pwm rockchip,rk3288-pwm              h                            	default            3        S   
  _      	  disabled          pwm@ff680010          (    rockchip,rk3368-pwm rockchip,rk3288-pwm              h                           	default            4        S   
  _      	  disabled          pwm@ff680020          (    rockchip,rk3368-pwm rockchip,rk3288-pwm              h                            S   
  _      	  disabled          pwm@ff680030          (    rockchip,rk3368-pwm rockchip,rk3288-pwm              h 0                          	default            5        S   
  _      	  disabled          serial@ff690000       &    rockchip,rk3368-uart snps,dw-apb-uart                i                 S   
   O   
  W        Zbaudclk apb_pclk                    9           	default            6        j           t           okay          mbox@ff6b0000             rockchip,rk3368-mailbox              k               0                                                   S   
  E        Zpclk_mailbox                     	  disabled          power-management@ff730000         &    rockchip,rk3368-pmu syscon simple-mfd                s            power-controller          !    rockchip,rk3368-power-controller            (                        +                H   power-domain@12                     S   
      
      
      
      
      
      
      
     
     
     
     
     
     
  c   
  h   
  g   
  n   
  o   
  r   
  s   
  f   
  d   
   d   
   h   
   i   
   l   
   k   
   j   
   n   
   m      $  <   7   8   9   :   ;   <   =   >   ?        (          power-domain@14                      S   
      
     
   o   
   p        <   @   A   B        (          power-domain@16                     S   
      
      
   @        <   C        (                syscon@ff738000       )    rockchip,rk3368-pmugrf syscon simple-mfd                 s                    I   io-domains        &    rockchip,rk3368-pmu-io-voltage-domain           okay            C           N         reboot-mode           syscon-reboot-mode          Y           `RB         lRB        zRB	        RB         clock-controller@ff760000             rockchip,rk3368-cru              v                 S   D        Zxin24m             ,        8                          
      syscon@ff770000       &    rockchip,rk3368-grf syscon simple-mfd                w                     ,   io-domains        "    rockchip,rk3368-io-voltage-domain           okay                                                         watchdog@ff800000              rockchip,rk3368-wdt snps,dw-wdt                               S   
  p                O           okay          timer@ff810000        ,    rockchip,rk3368-timer rockchip,rk3288-timer                                        B           S   
  a   
   U        Zpclk timer        spdif@ff880000            rockchip,rk3368-spdif                                         6           S   
   S   
        
  Zmclk hclk              E           tx          	default            F                  	  disabled          i2s-2ch@ff890000          (    rockchip,rk3368-i2s rockchip,rk3066-i2s                                       (           Zi2s_clk i2s_hclk            S   
   T   
             E      E           tx rx                     	  disabled          i2s-8ch@ff898000          (    rockchip,rk3368-i2s rockchip,rk3066-i2s                                      5           Zi2s_clk i2s_hclk            S   
   R   
             E       E           tx rx           	default            G                  	  disabled          iommu@ff900800            rockchip,iommu                                                  S   
      
          Zaclk iface             H                     	  disabled          iommu@ff914000            rockchip,iommu                @            P                                   S   
      
          Zaclk iface                         H                  	  disabled          iommu@ff930300            rockchip,iommu                                                  S   
      
          Zaclk iface             H                     	  disabled          iommu@ff9a0440            rockchip,iommu                @       @           @                           S   
      
          Zaclk iface                    	  disabled          iommu@ff9a0800            rockchip,iommu                                       	          
           S   
      
          Zaclk iface                    	  disabled          qos@ffad0000              rockchip,rk3368-qos syscon                                     7      qos@ffad0080              rockchip,rk3368-qos syscon                                    8      qos@ffad0100              rockchip,rk3368-qos syscon                                    9      qos@ffad0180              rockchip,rk3368-qos syscon                                   :      qos@ffad0200              rockchip,rk3368-qos syscon                                    ;      qos@ffad0280              rockchip,rk3368-qos syscon                                   <      qos@ffad0300              rockchip,rk3368-qos syscon                                    =      qos@ffad0380              rockchip,rk3368-qos syscon                                   >      qos@ffad0400              rockchip,rk3368-qos syscon                                    ?      qos@ffae0000              rockchip,rk3368-qos syscon                                     @      qos@ffae0100              rockchip,rk3368-qos syscon                                    A      qos@ffae0180              rockchip,rk3368-qos syscon                                   B      qos@ffaf0000              rockchip,rk3368-qos syscon                                     C      efuse@ffb00000            rockchip,rk3368-efuse                                               +           S   
  q        Zpclk_efuse     cpu-leakage@17                       temp-adjust@1f                          interrupt-controller@ffb71000             arm,gic-400          0        E                      @                                 @             `                        	                    pinctrl           rockchip,rk3368-pinctrl            ,        V   I                     +            c   gpio@ff750000             rockchip,gpio-bank               u                 S   
  @                Q            j        z            0        E               R      gpio@ff780000             rockchip,gpio-bank               x                 S   
  A                R            j        z            0        E         gpio@ff790000             rockchip,gpio-bank               y                 S   
  B                S            j        z            0        E               P      gpio@ff7a0000             rockchip,gpio-bank               z                 S   
  C                T            j        z            0        E               .      pcfg-pull-up                         L      pcfg-pull-down                 pcfg-pull-none                       M      pcfg-pull-none-12ma                                 N      emmc       emmc-clk                        J                  emmc-cmd                        K                  emmc-pwr                        L      emmc-bus1                       L      emmc-bus4         @              L            L            L            L      emmc-bus8                       K            K            K            K            K            K            K            K                  emmc-reset                       M            O         gmac       rgmii-pins                      M            M            M            N      	      N      
      N            N            N            N            M            M            M            M            M            M      rmii-pins                       M            M            M            N      	      N            N            M            M            M            M            /         i2c0       i2c0-xfer                         M             M            0         i2c1       i2c1-xfer                        M            M            2         i2c2       i2c2-xfer                   	      M            M            "         i2c3       i2c3-xfer                        M            M            #         i2c4       i2c4-xfer                        M            M            $         i2c5       i2c5-xfer                        M            M            %         i2s    i2s-8ch-bus                     M            M            M            M            M            M            M            M            M            G         pwm0       pwm0-pin                        M            3         pwm1       pwm1-pin                         M            4         pwm3       pwm3-pin                        M            5         sdio0      sdio0-bus1                      L      sdio0-bus4        @              L            L            L            L                  sdio0-cmd                        L                  sdio0-clk                       M                  sdio0-cd                        L      sdio0-wp                        L      sdio0-pwr                       L      sdio0-bkpwr                     L      sdio0-int                       L         sdmmc      sdmmc-clk                 	      M      sdmmc-cmd                 
      L      sdmmc-cd                        L      sdmmc-bus1                      L      sdmmc-bus4        @              L            L            L            L         spdif      spdif-tx                        M            F         spi0       spi0-clk                        L                  spi0-cs0                        L                  spi0-cs1                        L      spi0-tx                     L                  spi0-rx                     L                     spi1       spi1-clk                        L                  spi1-cs0                        L                  spi1-cs1                        L      spi1-rx                     L                  spi1-tx                     L                     spi2       spi2-clk                         L                  spi2-cs0                         L            !      spi2-rx                
      L                   spi2-tx                      L                     tsadc      otp-pin                       M            *      otp-out                      M            +         uart0      uart0-xfer                       L            M      uart0-cts                       M      uart0-rts                       M         uart1      uart1-xfer                        L             M      uart1-cts                        M      uart1-rts                        M         uart2      uart2-xfer                       L            M            6         uart3      uart3-xfer                       L            M      uart3-cts                       M      uart3-rts                       M         uart4      uart4-xfer                        L             M      uart4-cts                        M      uart4-rts                        M         pcfg-pull-none-drv-8ma                                  J      pcfg-pull-up-drv-8ma                                    K      ir     ir-int                       L            T         keys       pwr-key                       L            Q         leds       stby-pwren                        M      led-ctl                      M            S         sdio       wifi-reg-on                      M            W      bt-rst                       M            V         usb    host-vbus-drv                         M            X            chosen          serial2:115200n8          memory@0             memory                       @         emmc-pwrseq           mmc-pwrseq-emmc            O        	default            P                         gpio-keys         
    gpio-keys           	default            Q   key-power                       R              GPIO Power             t         gpio-leds         
    gpio-leds      led-0              .               r88:green:led           	default            S         ir-receiver           gpio-ir-receiver               .              	default            T      sdio-pwrseq           mmc-pwrseq-simple           S   U      
  Zext_clock           	default            V   W           .         .                        vcc18-regulator           regulator-fixed         pvcc_18           w@         w@                             1                  vcc-host-regulator            regulator-fixed                     R               	default            X      	  pvcc_host                                 1      vcc-io-regulator              regulator-fixed         pvcc_io           2Z         2Z                             1                  vcc-lan-regulator             regulator-fixed         pvcc_lan          2Z         2Z                                         -      vcc-sys-regulator             regulator-fixed         pvcc_sys          LK@         LK@                              1      vccio-wl-regulator            regulator-fixed       	  pvccio_wl             2Z         2Z                                               vdd-10-regulator              regulator-fixed         pvdd_10           B@         B@                             1         	compatible interrupt-parent #address-cells #size-cells model gpio0 gpio1 gpio2 gpio3 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 serial0 serial1 serial2 serial3 serial4 spi0 spi1 spi2 ethernet0 mmc0 mmc1 cpu device_type reg enable-method #cooling-cells phandle interrupts interrupt-affinity clock-frequency clock-output-names #clock-cells max-frequency clocks clock-names fifo-depth resets reset-names status assigned-clocks assigned-clock-parents bus-width cap-sd-highspeed cap-sdio-irq keep-power-in-suspend mmc-pwrseq non-removable pinctrl-names pinctrl-0 vmmc-supply vqmmc-supply cap-mmc-highspeed #io-channel-cells vref-supply reg-shift reg-io-width #dma-cells arm,pl330-broken-no-flushp arm,pl330-periph-burst polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device pinctrl-1 pinctrl-2 #thermal-sensor-cells rockchip,hw-tshut-temp rockchip,hw-tshut-mode rockchip,hw-tshut-polarity interrupt-names rockchip,grf phy-supply phy-mode clock_in_out snps,reset-gpio snps,reset-active-low snps,reset-delays-us tx_delay rx_delay dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size fcs,suspend-voltage-selector regulator-name regulator-enable-ramp-delay regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-always-on regulator-boot-on vin-supply #pwm-cells #mbox-cells #power-domain-cells pm_qos pmu-supply vop-supply offset mode-normal mode-recovery mode-bootloader mode-loader #reset-cells audio-supply gpio30-supply gpio1830-supply wifi-supply dmas dma-names #sound-dai-cells power-domains #iommu-cells rockchip,disable-mmu-reset interrupt-controller #interrupt-cells rockchip,pmu ranges gpio-controller #gpio-cells bias-pull-up bias-pull-down bias-disable drive-strength rockchip,pins stdout-path reset-gpios wakeup-source label linux,code enable-active-high 