  ;   8     (            g  ɜ                                                                      ,radxa,zero-3w rockchip,rk3566            7Radxa ZERO 3W      aliases          =/pinctrl/gpio@fdd60000           C/pinctrl/gpio@fe740000           I/pinctrl/gpio@fe750000           O/pinctrl/gpio@fe760000           U/pinctrl/gpio@fe770000           [/i2c@fdd40000            `/i2c@fe5a0000            e/i2c@fe5b0000            j/i2c@fe5c0000            o/i2c@fe5d0000            t/i2c@fe5e0000            y/serial@fdd50000             /serial@fe650000             /serial@fe660000             /serial@fe670000             /serial@fe680000             /serial@fe690000             /serial@fe6a0000             /serial@fe6b0000             /serial@fe6c0000             /serial@fe6d0000             /spi@fe610000            /spi@fe620000            /spi@fe630000            /spi@fe640000            /mmc@fe310000            /mmc@fe2b0000            /mmc@fe2c0000         cpus                                 cpu@0            cpu          ,arm,cortex-a55                                                      psci                        4           A   @        S           `           m   @                                            
      cpu@100          cpu          ,arm,cortex-a55                                     psci                        4           A   @        S           `           m   @                                                  cpu@200          cpu          ,arm,cortex-a55                                     psci                        4           A   @        S           `           m   @                                                  cpu@300          cpu          ,arm,cortex-a55                                     psci                        4           A   @        S           `           m   @                                                     l3-cache             ,cache                               6           C   @        U                    opp-table-0          ,operating-points-v2                        opp-408000000               Q            0          @      opp-600000000               #F            0      opp-816000000               0,            0               opp-1104000000              Aʹ            0      opp-1416000000              Tfr            0      opp-1608000000              _"            0      opp-1800000000              kI            0         display-subsystem            ,rockchip,display-subsystem                   firmware       scmi             ,arm,scmi-smc                                                      protocol@14                                               opp-table-1          ,operating-points-v2            C   opp-200000000                         P P B@      opp-300000000                         P P B@      opp-400000000               ׄ          P P B@      opp-600000000               #F            B@      opp-700000000               )'          ~ ~ B@      opp-800000000               /          B@ B@ B@         hdmi-sound           ,simple-audio-card           +HDMI            Bi2s         [           uokay       simple-audio-card,codec         |         simple-audio-card,cpu           |   	         pmu          ,arm,cortex-a55-pmu        0                                                     
               psci             ,arm,psci-1.0            smc       timer            ,arm,armv8-timer       0                                   
                  xin24m           ,fixed-clock         n6         xin24m                               xin32k           ,fixed-clock                    xin32k                     default                   sram@10f000       
   ,mmio-sram                                                                          sram@0           ,arm,scmi-shmem                                      sata@fc400000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci               @                                            sata pmalive rxoob                 _           	            	  sata-phy                       *            	  udisabled          sata@fc800000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci                                                           sata pmalive rxoob                 `           	            	  sata-phy                       *            	  udisabled          usb@fcc00000             ,rockchip,rk3568-dwc3 snps,dwc3                      @                                                       ref_clk suspend_clk bus_clk         8otg       
  @utmi_wide           *              I               P        uokay            	         	  usb2-phy            i           phigh-speed        usb@fd000000             ,rockchip,rk3568-dwc3 snps,dwc3                       @                                                       ref_clk suspend_clk bus_clk         8host            	                 usb2-phy usb3-phy         
  @utmi_wide           *              I               P        uokay          interrupt-controller@fd400000            ,arm,gic-v3                @             F                       	            ~                       A            (                             usb@fd800000             ,generic-ehci                                                                               	           usb       	  udisabled          usb@fd840000             ,generic-ohci                                                                               	           usb       	  udisabled          usb@fd880000             ,generic-ehci                                                                               	           usb       	  udisabled          usb@fd8c0000             ,generic-ohci                                                                               	           usb       	  udisabled          syscon@fdc20000       )   ,rockchip,rk3568-pmugrf syscon simple-mfd                                     U   io-domains        &   ,rockchip,rk3568-pmu-io-voltage-domain           uokay                                                                                          *           8            syscon@fdc50000                                 ,rockchip,rk3566-pipe-grf syscon                  syscon@fdc60000       &   ,rockchip,rk3568-grf syscon simple-mfd                                           syscon@fdc80000       $   ,rockchip,rk3568-pipe-phy-grf syscon                                        syscon@fdc90000       $   ,rockchip,rk3568-pipe-phy-grf syscon                                        syscon@fdca0000       #   ,rockchip,rk3568-usb2phy-grf syscon                                         syscon@fdca8000       #   ,rockchip,rk3568-usb2phy-grf syscon               ʀ                         clock-controller@fdd00000            ,rockchip,rk3568-pmucru                                           F                    clock-controller@fdd20000            ,rockchip,rk3568-cru                                           xin24m                     F           S                          c   G          x                                   i2c@fdd40000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c                                      .                        -      	  i2c pclk               !        default                                   uokay       pmic@20          ,rockchip,rk817                                  rk817-clkout1 rk817-clkout2              "                      default            #                             $           $           $           $           $           $        
   $           $        "   %              regulators     DCDC_REG1         
  .vdd_logic            =         Q        c           z           p          q   regulator-state-mem                            DCDC_REG2           .vdd_gpu_npu          =         Q        c           z           p          q           D   regulator-state-mem                   DCDC_REG3           .vcc_ddr          =         Q        c      regulator-state-mem                   DCDC_REG4           .vcc3v3_sys           =         Q        c           z 2Z         2Z           [   regulator-state-mem                   2Z         LDO_REG1            .vcca1v8_pmu          =         Q        z w@         w@              regulator-state-mem                   w@         LDO_REG2          	  .vdda_0v9             =         Q        z                     Q   regulator-state-mem                   LDO_REG3            .vdda0v9_pmu          =         Q        z             regulator-state-mem                            LDO_REG4            .vccio_acodec             =         Q        z 2Z         2Z              regulator-state-mem                   LDO_REG5          	  .vccio_sd             =         Q        z w@         2Z              regulator-state-mem                   LDO_REG6            .vcc3v3_pmu           =         Q        z 2Z         2Z              regulator-state-mem                   2Z         LDO_REG7          
  .vcc_1v8_p            =         Q        z w@         w@              regulator-state-mem                   LDO_REG8            .vcc1v8_dvp           =         Q        z w@         w@   regulator-state-mem                   LDO_REG9            .vcc2v8_dvp           =         Q        z *         *   regulator-state-mem                   BOOST           .vcc5v_midu           =         Q        z LK@         LK@           %   regulator-state-mem                   OTG_SWITCH          .vbus       regulator-state-mem                         regulator@40             ,rockchip,rk8600             @                   .vdd_cpu          =         Q        z 
4         5                  )   $              regulator-state-mem                      serial@fdd50000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                                        t                        ,        baudclk apb_pclk            4   &       &              '        default         9           F         	  udisabled          pwm@fdd70000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                            0      	  pwm pclk               (        default         P         	  udisabled          pwm@fdd70010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                           0      	  pwm pclk               )        default         P         	  udisabled          pwm@fdd70020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                            0      	  pwm pclk               *        default         P         	  udisabled          pwm@fdd70030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm               0                            0      	  pwm pclk               +        default         P         	  udisabled          power-management@fdd90000         &   ,rockchip,rk3568-pmu syscon simple-mfd                            power-controller          !   ,rockchip,rk3568-power-controller            [                                           power-domain@7                                           o   ,        [          power-domain@8                                           o   -   .   /        [          power-domain@9              	                                   o   0   1   2        [          power-domain@10             
                             o   3   4   5   6   7   8        [          power-domain@11                                    o   9        [          power-domain@13                                   o   :        [          power-domain@14                                   o   ;   <   =        [          power-domain@15                                    o   >   ?   @   A   B        [                gpu@fde60000          &   ,rockchip,rk3568-mali arm,mali-bifrost                        @       $         (          )          '           vjob mmu gpu                              gpu bus                        C        *              uokay               D                 video-codec@fdea0400             ,rockchip,rk3568-vpu                                                 vvdpu                               
  aclk hclk              E        *            iommu@fdea0800           ,rockchip,rk3568-iommu                        @                          aclk iface                               *                             E      rga@fdeb0000          (   ,rockchip,rk3568-rga rockchip,rk3288-rga                                     Z                                      aclk hclk sclk          I     &     $     %        core axi ahb            *      
      video-codec@fdee0000             ,rockchip,rk3568-vepu                                         @                              
  aclk hclk              F        *      
      iommu@fdee0800           ,rockchip,rk3568-iommu                        @               ?                                aclk iface          *      
                       F      mmc@fe000000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc                       @                d                                           biu ciu ciu-drive ciu-sample                       р        I              reset         	  udisabled          ethernet@fe010000         &   ,rockchip,rk3568-gmac snps,dwmac-4.20a                                                              vmacirq eth_wake_irq       @                                                     W  stmmaceth mac_clk_rx mac_clk_tx clk_mac_refout aclk_mac pclk_mac clk_mac_speed ptp_ref          I            
  stmmaceth                          G                    H           I               	  udisabled       mdio             ,snps,dwmac-mdio                                 stmmac-axi-config                                            %           5              G      rx-queues-config            E              H   queue0           tx-queues-config            [              I   queue0              vop@fe040000                          0     @                qvop gamma-lut                           (                                       %  aclk hclk dclk_vp0 dclk_vp1 dclk_vp2               J        *      	                    uokay             ,rockchip,rk3566-vop         S                    x               ports                                           port@0                                            endpoint@2                      {   K           S         port@1                                              port@2                                                    iommu@fe043e00           ,rockchip,rk3568-iommu                 >            ?                                                       aclk iface                      *      	        uokay               J      dsi@fe060000          *   ,rockchip,rk3568-mipi-dsi snps,dw-mipi-dsi                                        D           pclk                           dphy            	   L        *      	        apb         I                       	  udisabled       ports                                port@0                     port@1                          dsi@fe070000          *   ,rockchip,rk3568-mipi-dsi snps,dw-mipi-dsi                                        E           pclk                           dphy            	   M        *      	        apb         I                       	  udisabled       ports                                port@0                     port@1                          hdmi@fe0a0000            ,rockchip,rk3568-dw-hdmi              
                        -         (                          (              iahb isfr cec ref           default            N   O   P        *      	        9                                   uokay               Q           R              ports                                port@0                  endpoint            {   S           K         port@1                 endpoint            {   T                          qos@fe128000             ,rockchip,rk3568-qos syscon                                   ,      qos@fe138080             ,rockchip,rk3568-qos syscon                                  ;      qos@fe138100             ,rockchip,rk3568-qos syscon                                   <      qos@fe138180             ,rockchip,rk3568-qos syscon                                  =      qos@fe148000             ,rockchip,rk3568-qos syscon                                   -      qos@fe148080             ,rockchip,rk3568-qos syscon                                  .      qos@fe148100             ,rockchip,rk3568-qos syscon                                   /      qos@fe150000             ,rockchip,rk3568-qos syscon                                    9      qos@fe158000             ,rockchip,rk3568-qos syscon                                   3      qos@fe158100             ,rockchip,rk3568-qos syscon                                   4      qos@fe158180             ,rockchip,rk3568-qos syscon                                  5      qos@fe158200             ,rockchip,rk3568-qos syscon                                   6      qos@fe158280             ,rockchip,rk3568-qos syscon                                  7      qos@fe158300             ,rockchip,rk3568-qos syscon                                   8      qos@fe180000             ,rockchip,rk3568-qos syscon                               qos@fe190000             ,rockchip,rk3568-qos syscon                                    >      qos@fe190280             ,rockchip,rk3568-qos syscon                                  ?      qos@fe190300             ,rockchip,rk3568-qos syscon                                   @      qos@fe190380             ,rockchip,rk3568-qos syscon                                  A      qos@fe190400             ,rockchip,rk3568-qos syscon                                   B      qos@fe198000             ,rockchip,rk3568-qos syscon                                   :      qos@fe1a8000             ,rockchip,rk3568-qos syscon                                   0      qos@fe1a8080             ,rockchip,rk3568-qos syscon                                  1      qos@fe1a8100             ,rockchip,rk3568-qos syscon                                   2      dfi@fe230000             ,rockchip,rk3568-dfi              #                                      U      pcie@fe260000            ,rockchip,rk3568-pcie          0              @      &                               qdbi apb config        <         K          J          I          H          G           vsys pmc msg legacy err                       (                                       $  aclk_mst aclk_slv aclk_dbi pclk aux          pci                                         `                    V                      V                     V                     V                                             #           2                      :           	            	  pcie-phy            *            T                                                      @              @           I              pipe                                   	  udisabled       legacy-interrupt-controller                                  ~                            H              V         mmc@fe2b0000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc              +        @                b                                           biu ciu ciu-drive ciu-sample                       р        I              reset           uokay            D            N         _        default            W   X   Y   Z        j   [        v         mmc@fe2c0000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc              ,        @                c                                           biu ciu ciu-drive ciu-sample                       р        I              reset           uokay            D            N                             \                                   default            ]   ^   _                 j           v         spi@fe300000             ,rockchip,sfc                 0        @                e                  x      v        clk_sfc hclk_sfc               `        default       	  udisabled          mmc@fe310000             ,rockchip,rk3568-dwcmshc              1                                   S      {      }        c n6       (         |      z      y      {      }        core bus axi block timer            uokay            D                                                                 default            a   b   c   d        j           v         rng@fe388000             ,rockchip,rk3568-rng              8       @                p      o      	  core ahb            I      m      	  udisabled          i2s@fe400000             ,rockchip,rk3568-i2s-tdm              @                        4           S      =      A        cFq Fq                ?      C      9        mclk_tx mclk_rx hclk            4   e            	tx          I      P      Q      
  tx-m rx-m                                   uokay               	      i2s@fe410000             ,rockchip,rk3568-i2s-tdm              A                        5           S      E      I        cFq Fq                G      K      :        mclk_tx mclk_rx hclk            4   e      e           	rx tx           I      R      S      
  tx-m rx-m                       default       0     f   g   h   i   j   k   l   m   n   o   p   q                  	  udisabled          i2s@fe420000             ,rockchip,rk3568-i2s-tdm              B                        6           S      M        cFq                O      O      ;        mclk_tx mclk_rx hclk            4   e      e           	tx rx           I      T        tx-m                        default            r   s   t   u                  	  udisabled          i2s@fe430000             ,rockchip,rk3568-i2s-tdm              C                        7                  S      W      <        mclk_tx mclk_rx hclk            4   e      e           	tx rx           I      U      V      
  tx-m rx-m                                 	  udisabled          pdm@fe440000             ,rockchip,rk3568-pdm              D                        L                  Z      Y        pdm_clk pdm_hclk            4   e   	        	rx             v   w   x   y   z   {        default         I      X        pdm-m                     	  udisabled          spdif@fe460000           ,rockchip,rk3568-spdif                F                        f         
  mclk hclk                  _      \        4   e           	tx          default            |                  	  udisabled          dma-controller@fe530000          ,arm,pl330 arm,primecell              S        @                                      	                    	  apb_pclk            	$              &      dma-controller@fe550000          ,arm,pl330 arm,primecell              U        @                                      	                    	  apb_pclk            	$              e      i2c@fe5a0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              Z                        /                 H     G      	  i2c pclk               }        default                                 	  udisabled          i2c@fe5b0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              [                        0                 J     I      	  i2c pclk               ~        default                                 	  udisabled          i2c@fe5c0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              \                        1                 L     K      	  i2c pclk                       default                                 	  udisabled          i2c@fe5d0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              ]                        2                 N     M      	  i2c pclk                       default                                 	  udisabled          i2c@fe5e0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              ^                        3                 P     O      	  i2c pclk                       default                                 	  udisabled          watchdog@fe600000             ,rockchip,rk3568-wdt snps,dw-wdt              `                                                    
  tclk pclk         spi@fe610000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi              a                        g                 R     Q        spiclk apb_pclk         4   &      &           	tx rx           default                                                  	  udisabled          spi@fe620000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi              b                        h                 T     S        spiclk apb_pclk         4   &      &           	tx rx           default                                                  	  udisabled          spi@fe630000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi              c                        i                 V     U        spiclk apb_pclk         4   &      &           	tx rx           default                                                  	  udisabled          spi@fe640000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi              d                        j                 X     W        spiclk apb_pclk         4   &      &           	tx rx           default                                                  	  udisabled          serial@fe650000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                e                        u                              baudclk apb_pclk            4   &      &                            default         9           F           uokay             	/      serial@fe660000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                f                        v                 #              baudclk apb_pclk            4   &      &                      default         9           F           uokay          serial@fe670000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                g                        w                 '     $        baudclk apb_pclk            4   &      &                      default         9           F         	  udisabled          serial@fe680000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                h                        x                 +     (        baudclk apb_pclk            4   &      &   	                   default         9           F         	  udisabled          serial@fe690000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                i                        y                 /     ,        baudclk apb_pclk            4   &   
   &                      default         9           F         	  udisabled          serial@fe6a0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                j                        z                 3     0        baudclk apb_pclk            4   &      &                      default         9           F         	  udisabled          serial@fe6b0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                k                        {                 7     4        baudclk apb_pclk            4   &      &                      default         9           F         	  udisabled          serial@fe6c0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                l                        |                 ;     8        baudclk apb_pclk            4   &      &                      default         9           F         	  udisabled          serial@fe6d0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                m                        }                 ?     <        baudclk apb_pclk            4   &      &                      default         9           F         	  udisabled          thermal-zones      cpu-thermal         	?   d        	U          	c          trips      cpu_alert0          	s p        	           passive                  cpu_alert1          	s $        	           passive       cpu_crit            	s s        	        	   critical             cooling-maps       map0            	         0  	   
                     gpu-thermal         	?           	U          	c         trips      gpu-threshold           	s p        	           passive       gpu-target          	s $        	           passive                  gpu-crit            	s s        	        	   critical             cooling-maps       map0            	           	                  tsadc@fe710000           ,rockchip,rk3568-tsadc                q                        s           S                  cf@ 
`                           tsadc apb_pclk          I                                   	 s        default sleep                      	           	           uokay            	           	                     saradc@fe720000       .   ,rockchip,rk3568-saradc rockchip,rk3399-saradc                r                        ]                              saradc apb_pclk         I             saradc-apb          
           uokay            
         pwm@fe6e0000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              n                       Z     Y      	  pwm pclk                       default         P         	  udisabled          pwm@fe6e0010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              n                      Z     Y      	  pwm pclk                       default         P         	  udisabled          pwm@fe6e0020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              n                       Z     Y      	  pwm pclk                       default         P         	  udisabled          pwm@fe6e0030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              n 0                     Z     Y      	  pwm pclk                       default         P         	  udisabled          pwm@fe6f0000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              o                       ]     \      	  pwm pclk                       default         P         	  udisabled          pwm@fe6f0010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              o                      ]     \      	  pwm pclk                       default         P         	  udisabled          pwm@fe6f0020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              o                       ]     \      	  pwm pclk                       default         P         	  udisabled          pwm@fe6f0030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              o 0                     ]     \      	  pwm pclk                       default         P         	  udisabled          pwm@fe700000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              p                       `     _      	  pwm pclk                       default         P         	  udisabled          pwm@fe700010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              p                      `     _      	  pwm pclk                       default         P         	  udisabled          pwm@fe700020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              p                       `     _      	  pwm pclk                       default         P         	  udisabled          pwm@fe700030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              p 0                     `     _      	  pwm pclk                       default         P         	  udisabled          phy@fe830000             ,rockchip,rk3568-naneng-combphy                                       "     }              ref apb pipe            S      "        c         I             phy         
%           
7           
M           uokay                     phy@fe840000             ,rockchip,rk3568-naneng-combphy                                       %     ~              ref apb pipe            S      %        c         I             phy         
%           
7           
M         	  udisabled                     phy@fe870000             ,rockchip,rk3568-csi-dphy                                        y        pclk            
M            I             apb                   	  udisabled          mipi-dphy@fe850000           ,rockchip,rk3568-dsi-dphy                                	  ref pclk                        z        
M            *      	        apb         I           	  udisabled               L      mipi-dphy@fe860000           ,rockchip,rk3568-dsi-dphy                                	  ref pclk                        {        
M            *      	        apb         I           	  udisabled               M      usb2phy@fe8a0000             ,rockchip,rk3568-usb2phy                                              phyclk          clk_usbphy0_480m                              
X                       uokay                  host-port           
M            uokay                     otg-port            
M            uokay                        usb2phy@fe8b0000             ,rockchip,rk3568-usb2phy                                              phyclk          clk_usbphy1_480m                              
X                     	  udisabled       host-port           
M          	  udisabled                     otg-port            
M          	  udisabled                        pinctrl          ,rockchip,rk3568-pinctrl                        U                                                gpio@fdd60000            ,rockchip,gpio-bank                                       !                  .               
h        
x                       
            ~                 B  
                        pin-10 [GPIO0_D0] pin-08 [GPIO0_D1]                    "      gpio@fe740000            ,rockchip,gpio-bank               t                        "                 c     d         
h        
x                       
            ~                 S  
pin-03 [GPIO1_A0] pin-05 [GPIO1_A1]   pin-37 [GPIO1_A4]                                   gpio@fe750000            ,rockchip,gpio-bank               u                        #                 e     f         
h        
x          @            
            ~                    
                                      gpio@fe760000            ,rockchip,gpio-bank               v                        $                 g     h         
h        
x          `            
            ~                0  
 pin-11 [GPIO3_A1] pin-13 [GPIO3_A2] pin-12 [GPIO3_A3] pin-35 [GPIO3_A4] pin-40 [GPIO3_A5] pin-38 [GPIO3_A6] pin-36 [GPIO3_A7] pin-15 [GPIO3_B0] pin-16 [GPIO3_B1] pin-18 [GPIO3_B2] pin-29 [GPIO3_B3] pin-31 [GPIO3_B4]     pin-22 [GPIO3_C1] pin-32 [GPIO3_C2] pin-33 [GPIO3_C3] pin-07 [GPIO3_C4]                  gpio@fe770000            ,rockchip,gpio-bank               w                        %                 i     j         
h        
x                      
            ~                   
          pin-27 [GPIO4_B2] pin-28 [GPIO4_B3]       pin-23 [GPIO4_C2] pin-19 [GPIO4_C3]  pin-21 [GPIO4_C5] pin-24 [GPIO4_C6]                  pcfg-pull-up             
                 pcfg-pull-none           
                 pcfg-pull-none-drv-level-1           
        
                    pcfg-pull-none-drv-level-2           
        
                    pcfg-pull-none-drv-level-3           
        
                    pcfg-pull-up-drv-level-1             
        
                    pcfg-pull-up-drv-level-2             
        
                    pcfg-pull-none-smt           
         
                 acodec        audiopwm          bt656         bt1120        cam       can0          can1          can2          cif       clk32k     clk32k-out0         
                                 cpu       ebc       edpdp         emmc       emmc-bus8           
                                                                                                           a      emmc-clk            
                       b      emmc-cmd            
                       c      emmc-datastrobe         
                       d         eth0          eth1          flash         fspi       fspi-pins         `  
                                                                                   `         gmac0         gmac1         gpu       hdmitx     hdmitxm0-cec            
                       P      hdmitx-scl          
                       N      hdmitx-sda          
                       O         i2c0       i2c0-xfer            
       	             
                 !         i2c1       i2c1-xfer            
                                     }         i2c2       i2c2m0-xfer          
                                     ~         i2c3       i2c3m0-xfer          
                                             i2c4       i2c4m0-xfer          
                  
                          i2c5       i2c5m0-xfer          
                                            i2s1       i2s1m0-lrckrx           
                       i      i2s1m0-lrcktx           
                       h      i2s1m0-sclkrx           
                       g      i2s1m0-sclktx           
                       f      i2s1m0-sdi0         
                       j      i2s1m0-sdi1         
      
                 k      i2s1m0-sdi2         
      	                 l      i2s1m0-sdi3         
                       m      i2s1m0-sdo0         
                       n      i2s1m0-sdo1         
                       o      i2s1m0-sdo2         
      	                 p      i2s1m0-sdo3         
      
                 q         i2s2       i2s2m0-lrcktx           
                       s      i2s2m0-sclktx           
                       r      i2s2m0-sdi          
                       t      i2s2m0-sdo          
                       u         i2s3          isp       jtag          lcdc          mcu       npu       pcie20        pcie30x1          pcie30x2          pdm    pdmm0-clk           
                       v      pdmm0-clk1          
                       w      pdmm0-sdi0          
                       x      pdmm0-sdi1          
      
                 y      pdmm0-sdi2          
      	                 z      pdmm0-sdi3          
                       {         pmic       pmic-int-l          
                         #         pmu       pwm0       pwm0m0-pins         
                        (         pwm1       pwm1m0-pins         
                        )         pwm2       pwm2m0-pins         
                        *         pwm3       pwm3-pins           
                        +         pwm4       pwm4-pins           
                                 pwm5       pwm5-pins           
                                 pwm6       pwm6-pins           
                                 pwm7       pwm7-pins           
                                 pwm8       pwm8m0-pins         
      	                          pwm9       pwm9m0-pins         
      
                          pwm10      pwm10m0-pins            
                                pwm11      pwm11m0-pins            
                                pwm12      pwm12m0-pins            
                                pwm13      pwm13m0-pins            
                                pwm14      pwm14m0-pins            
                                pwm15      pwm15m0-pins            
                                refclk        sata          sata0         sata1         sata2         scr       sdmmc0     sdmmc0-bus4       @  
                                                            W      sdmmc0-clk          
                       X      sdmmc0-cmd          
                       Y      sdmmc0-det          
                        Z         sdmmc1     sdmmc1-bus4       @  
                                                           ]      sdmmc1-clk          
                       ^      sdmmc1-cmd          
                       _         sdmmc2        spdif      spdifm0-tx          
                       |         spi0       spi0m0-pins       0  
                                                        spi0m0-cs0          
                              spi0m0-cs1          
                                 spi1       spi1m0-pins       0  
                                                     spi1m0-cs0          
                             spi1m0-cs1          
                                spi2       spi2m0-pins       0  
                                                     spi2m0-cs0          
                             spi2m0-cs1          
                                spi3       spi3m0-pins       0  
                              
                       spi3m0-cs0          
                             spi3m0-cs1          
                                tsadc      tsadc-shutorg           
                              tsadc-pin           
                                  uart0      uart0-xfer           
                                     '         uart1      uart1m0-xfer             
                                         uart1m0-ctsn            
                             uart1m0-rtsn            
                                uart2      uart2m0-xfer             
                                              uart3      uart3m0-xfer             
                                             uart4      uart4m0-xfer             
                                            uart5      uart5m0-xfer             
                                            uart6      uart6m0-xfer             
                                            uart7      uart7m0-xfer             
                                            uart8      uart8m0-xfer             
                                            uart9      uart9m0-xfer             
                                            vop       spi0-hs       spi1-hs       spi2-hs       spi3-hs       gmac-txd-level3       gmac-txc-level2       leds       user-led2           
                                   bluetooth      bt-reg-on-h         
                    bt-wake-host-h          
                    host-wake-bt-h          
                       wifi       wifi-reg-on-h           
                               wifi-wake-host-h            
                          chosen          
serial2:1500000n8         hdmi-con             ,hdmi-connector           d      port       endpoint            {              T            leds          
   ,gpio-leds           default               led-green           
           
on        
  heartbeat              "              
  heartbeat            regulator-1v8-vcc            ,regulator-fixed         .vcc_1v8          =         Q        z w@         w@        )                    regulator-1v8-vcca           ,regulator-fixed       	  .vcca_1v8             =         Q        z w@         w@        )                    regulator-1v8-vcca-image             ,regulator-fixed         .vcca1v8_image            =         Q        z w@         w@        )              R      regulator-3v3-vcc            ,regulator-fixed         .vcc_3v3          =         Q        z 2Z         2Z        )   [                 regulator-5v0-vcc-sys            ,regulator-fixed         .vcc_sys          =         Q        z LK@         LK@           $      sdio-pwrseq          ,mmc-pwrseq-simple                        
  ext_clock           default                    1   d        H LK@        [   "                 \         	interrupt-parent #address-cells #size-cells compatible model gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 serial0 serial1 serial2 serial3 serial4 serial5 serial6 serial7 serial8 serial9 spi0 spi1 spi2 spi3 mmc0 mmc1 mmc2 device_type reg clocks #cooling-cells enable-method operating-points-v2 i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache cpu-supply phandle cache-level cache-unified opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend ports arm,smc-id shmem #clock-cells simple-audio-card,name simple-audio-card,format simple-audio-card,mclk-fs status sound-dai interrupts interrupt-affinity arm,no-tick-in-suspend clock-frequency clock-output-names pinctrl-0 pinctrl-names ranges clock-names phys phy-names ports-implemented power-domains dr_mode phy_type resets snps,dis_u2_susphy_quirk extcon maximum-speed interrupt-controller #interrupt-cells mbi-alias mbi-ranges msi-controller pmuio1-supply pmuio2-supply vccio1-supply vccio2-supply vccio3-supply vccio4-supply vccio5-supply vccio6-supply vccio7-supply #reset-cells assigned-clocks assigned-clock-rates assigned-clock-parents rockchip,grf system-power-controller wakeup-source vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply regulator-name regulator-always-on regulator-boot-on regulator-initial-mode regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-off-in-suspend regulator-suspend-microvolt regulator-on-in-suspend fcs,suspend-voltage-selector vin-supply dmas reg-io-width reg-shift #pwm-cells #power-domain-cells pm_qos interrupt-names mali-supply iommus #iommu-cells reset-names fifo-depth max-frequency snps,axi-config snps,mixed-burst snps,mtl-rx-config snps,mtl-tx-config snps,tso snps,blen snps,rd_osr_lmt snps,wr_osr_lmt snps,rx-queues-to-use snps,tx-queues-to-use reg-names remote-endpoint #sound-dai-cells avdd-0v9-supply avdd-1v8-supply rockchip,pmu bus-range interrupt-map-mask interrupt-map linux,pci-domain num-ib-windows num-ob-windows max-link-speed msi-map num-lanes bus-width cap-sd-highspeed disable-wp vmmc-supply vqmmc-supply cap-sdio-irq keep-power-in-suspend mmc-pwrseq no-mmc no-sd non-removable sd-uhs-sdr104 cap-mmc-highspeed mmc-hs200-1_8v no-sdio dma-names arm,pl330-periph-burst #dma-cells uart-has-rtscts polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device rockchip,hw-tshut-temp pinctrl-1 #thermal-sensor-cells rockchip,hw-tshut-mode rockchip,hw-tshut-polarity #io-channel-cells vref-supply rockchip,pipe-grf rockchip,pipe-phy-grf #phy-cells rockchip,usbgrf gpio-controller gpio-ranges #gpio-cells gpio-line-names bias-pull-up bias-disable drive-strength input-schmitt-enable rockchip,pins stdout-path color default-state function gpios linux,default-trigger post-power-on-delay-ms power-off-delay-us reset-gpios 