     8     (              Ϡ                                                                      ,radxa,rock-3c rockchip,rk3566            7Radxa ROCK 3C      aliases          =/pinctrl/gpio@fdd60000           C/pinctrl/gpio@fe740000           I/pinctrl/gpio@fe750000           O/pinctrl/gpio@fe760000           U/pinctrl/gpio@fe770000           [/i2c@fdd40000            `/i2c@fe5a0000            e/i2c@fe5b0000            j/i2c@fe5c0000            o/i2c@fe5d0000            t/i2c@fe5e0000            y/serial@fdd50000             /serial@fe650000             /serial@fe660000             /serial@fe670000             /serial@fe680000             /serial@fe690000             /serial@fe6a0000             /serial@fe6b0000             /serial@fe6c0000             /serial@fe6d0000             /spi@fe610000            /spi@fe620000            /spi@fe630000            /spi@fe640000            /ethernet@fe010000           /mmc@fe310000            /mmc@fe2b0000            /mmc@fe2c0000         cpus                                 cpu@0            cpu          ,arm,cortex-a55                                                    psci            *           >           K   @        ]           j           w   @                                            
      cpu@100          cpu          ,arm,cortex-a55                                    psci            *           >           K   @        ]           j           w   @                                                  cpu@200          cpu          ,arm,cortex-a55                                    psci            *           >           K   @        ]           j           w   @                                                  cpu@300          cpu          ,arm,cortex-a55                                    psci            *           >           K   @        ]           j           w   @                                                     l3-cache             ,cache                               @           M   @        _                    opp-table-0          ,operating-points-v2                        opp-408000000               Q            0          @      opp-600000000               #F            0      opp-816000000               0,            0               opp-1104000000              Aʹ            0      opp-1416000000              Tfr            0      opp-1608000000              _"            0      opp-1800000000              kI            0         display-subsystem            ,rockchip,display-subsystem                   firmware       scmi             ,arm,scmi-smc                      "                                protocol@14                    (                          opp-table-1          ,operating-points-v2            D   opp-200000000                         P P B@      opp-300000000                         P P B@      opp-400000000               ׄ          P P B@      opp-600000000               #F            B@      opp-700000000               )'          ~ ~ B@      opp-800000000               /          B@ B@ B@         hdmi-sound           ,simple-audio-card           5HDMI            Li2s         e           okay       simple-audio-card,codec                  simple-audio-card,cpu              	         pmu          ,arm,cortex-a55-pmu        0                                                     
               psci             ,arm,psci-1.0            #smc       timer            ,arm,armv8-timer       0                                   
                  xin24m           ,fixed-clock         n6         xin24m          (                     xin32k           ,fixed-clock                    xin32k                     default         (          sram@10f000       
   ,mmio-sram                                                                          sram@0           ,arm,scmi-shmem                                     sata@fc400000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci              @                                           sata pmalive rxoob                 _                       	  sata-phy            "           4            	  disabled          sata@fc800000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci                                                         sata pmalive rxoob                 `                       	  sata-phy            "           4            	  disabled          usb@fcc00000             ,rockchip,rk3568-dwc3 snps,dwc3                     @                                                      ref_clk suspend_clk bus_clk         Bhost          
  Jutmi_wide           4              S               Z        okay                     	  usb2-phy            s           zhigh-speed        usb@fd000000             ,rockchip,rk3568-dwc3 snps,dwc3                      @                                                      ref_clk suspend_clk bus_clk         Bhost                             usb2-phy usb3-phy         
  Jutmi_wide           4              S               Z        okay          interrupt-controller@fd400000            ,arm,gic-v3               @             F                       	                                   A            (                             usb@fd800000             ,generic-ehci                                                                                        usb         okay          usb@fd840000             ,generic-ohci                                                                                        usb         okay          usb@fd880000             ,generic-ehci                                                                                        usb         okay          usb@fd8c0000             ,generic-ohci                                                                                        usb         okay          syscon@fdc20000       )   ,rockchip,rk3568-pmugrf syscon simple-mfd                                    _   io-domains        &   ,rockchip,rk3568-pmu-io-voltage-domain           okay                                                        
                      &           4           B            syscon@fdc50000                                ,rockchip,rk3566-pipe-grf syscon                  syscon@fdc60000       &   ,rockchip,rk3568-grf syscon simple-mfd                                          syscon@fdc80000       $   ,rockchip,rk3568-pipe-phy-grf syscon                                       syscon@fdc90000       $   ,rockchip,rk3568-pipe-phy-grf syscon                                       syscon@fdca0000       #   ,rockchip,rk3568-usb2phy-grf syscon                                        syscon@fdca8000       #   ,rockchip,rk3568-usb2phy-grf syscon              ʀ                         clock-controller@fdd00000            ,rockchip,rk3568-pmucru                               (           P                    clock-controller@fdd20000            ,rockchip,rk3568-cru                                         xin24m          (           P           ]                          m   G                                             i2c@fdd40000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c                                     .                       -      	  i2c pclk               !        default                                   okay       regulator@1c             ,tcs,tcs4525                               vdd_cpu                            5          0        (          =   "              regulator-state-mem          H         pmic@20          ,rockchip,rk809                           #                      rk808-clkout1 rk808-clkout2         default            $   %         a        y   &           &           &           &           &           &           &           &           &                 (                 regulators     DCDC_REG1         
  vdd_logic                                                   p        (  q   regulator-state-mem          H        
          DCDC_REG2           vdd_gpu                                                 p        (  q           E   regulator-state-mem          H        
          DCDC_REG3           vcc_ddr                                 regulator-state-mem          &         DCDC_REG4           vdd_npu                               p        (  q   regulator-state-mem          H         DCDC_REG5           vcc_1v8                            w@         w@              regulator-state-mem          H         LDO_REG1            vdda0v9_image                                [   regulator-state-mem          H         LDO_REG2          	  vdda_0v9                                           regulator-state-mem          H         LDO_REG3            vdda0v9_pmu                                        regulator-state-mem          &        
          LDO_REG4            vccio_acodec                               2Z         2Z              regulator-state-mem          H         LDO_REG5          	  vccio_sd             w@         2Z              regulator-state-mem          H         LDO_REG6            vcc3v3_pmu                             2Z         2Z              regulator-state-mem          &        
 2Z         LDO_REG7          	  vcca_1v8                               w@         w@              regulator-state-mem          H         LDO_REG8            vcca1v8_pmu                            w@         w@              regulator-state-mem          &        
 w@         LDO_REG9            vcca1v8_image            w@         w@           \   regulator-state-mem          H         SWITCH_REG1         vcc_3v3                                 regulator-state-mem          H         SWITCH_REG2       
  vcc3v3_sd      regulator-state-mem          H               eeprom@50            ,belling,bl24c16a atmel,24c16               P        >           G            serial@fdd50000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                                       t                       ,        baudclk apb_pclk            R   '       '              (        default         W           d         	  disabled          pwm@fdd70000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                          0      	  pwm pclk               )        default         n         	  disabled          pwm@fdd70010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                         0      	  pwm pclk               *        default         n         	  disabled          pwm@fdd70020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                          0      	  pwm pclk               +        default         n         	  disabled          pwm@fdd70030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              0                           0      	  pwm pclk               ,        default         n         	  disabled          power-management@fdd90000         &   ,rockchip,rk3568-pmu syscon simple-mfd                           power-controller          !   ,rockchip,rk3568-power-controller            y                                           power-domain@7                                            -        y          power-domain@8                                            .   /   0        y          power-domain@9             	                                     1   2   3        y          power-domain@10            
                               4   5   6   7   8   9        y          power-domain@11                                     :        y          power-domain@13                                    ;        y          power-domain@14                                    <   =   >        y          power-domain@15                                     ?   @   A   B   C        y                gpu@fde60000          &   ,rockchip,rk3568-mali arm,mali-bifrost                       @       $         (          )          '           job mmu gpu                             gpu bus                    *   D        4              okay               E                 video-codec@fdea0400             ,rockchip,rk3568-vpu                                                vdpu                              
  aclk hclk              F        4            iommu@fdea0800           ,rockchip,rk3568-iommu                       @                          aclk iface                              4                             F      rga@fdeb0000          (   ,rockchip,rk3568-rga rockchip,rk3288-rga                                    Z                                     aclk hclk sclk          S     &     $     %        core axi ahb            4      
      video-codec@fdee0000             ,rockchip,rk3568-vepu                                        @                             
  aclk hclk              G        4      
      iommu@fdee0800           ,rockchip,rk3568-iommu                       @               ?                               aclk iface          4      
                       G      mmc@fe000000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc                      @                d                                          biu ciu ciu-drive ciu-sample                       р        S              reset         	  disabled          ethernet@fe010000         &   ,rockchip,rk3568-gmac snps,dwmac-4.20a                                                             macirq eth_wake_irq       @                                                    W  stmmaceth mac_clk_rx mac_clk_tx clk_mac_refout aclk_mac pclk_mac clk_mac_speed ptp_ref          S            
  stmmaceth                          H                 
   I           J         0        okay            ]                          K        9input           F   L      	  Qrgmii-id            Z           default            M   N   O   P   Q   R   mdio             ,snps,dwmac-mdio                              ethernet-phy@1           ,ethernet-phy-ieee802.3-c22                     e  N         u            S                 L         stmmac-axi-config                                                                     H      rx-queues-config                          I   queue0           tx-queues-config                          J   queue0              vop@fe040000                         0     @                vop gamma-lut                           (                                      %  aclk hclk dclk_vp0 dclk_vp1 dclk_vp2               T        4      	                    okay             ,rockchip,rk3566-vop         ]                                   ports                                           port@0                                           endpoint@2                        U           ]         port@1                                             port@2                                                   iommu@fe043e00           ,rockchip,rk3568-iommu                >            ?                                                      aclk iface                      4      	        okay               T      dsi@fe060000          *   ,rockchip,rk3568-mipi-dsi snps,dw-mipi-dsi                                       D           pclk                          dphy               V        4      	        apb         S                       	  disabled       ports                                port@0                    port@1                         dsi@fe070000          *   ,rockchip,rk3568-mipi-dsi snps,dw-mipi-dsi                                       E           pclk                          dphy               W        4      	        apb         S                       	  disabled       ports                                port@0                    port@1                         hdmi@fe0a0000            ,rockchip,rk3568-dw-hdmi             
                        -         (                         (              iahb isfr cec ref           default            X   Y   Z        4      	        W                                   okay               [        $   \              ports                                port@0                 endpoint               ]           U         port@1                endpoint               ^                          qos@fe128000             ,rockchip,rk3568-qos syscon                                  -      qos@fe138080             ,rockchip,rk3568-qos syscon                                 <      qos@fe138100             ,rockchip,rk3568-qos syscon                                  =      qos@fe138180             ,rockchip,rk3568-qos syscon                                 >      qos@fe148000             ,rockchip,rk3568-qos syscon                                  .      qos@fe148080             ,rockchip,rk3568-qos syscon                                 /      qos@fe148100             ,rockchip,rk3568-qos syscon                                  0      qos@fe150000             ,rockchip,rk3568-qos syscon                                   :      qos@fe158000             ,rockchip,rk3568-qos syscon                                  4      qos@fe158100             ,rockchip,rk3568-qos syscon                                  5      qos@fe158180             ,rockchip,rk3568-qos syscon                                 6      qos@fe158200             ,rockchip,rk3568-qos syscon                                  7      qos@fe158280             ,rockchip,rk3568-qos syscon                                 8      qos@fe158300             ,rockchip,rk3568-qos syscon                                  9      qos@fe180000             ,rockchip,rk3568-qos syscon                              qos@fe190000             ,rockchip,rk3568-qos syscon                                   ?      qos@fe190280             ,rockchip,rk3568-qos syscon                                 @      qos@fe190300             ,rockchip,rk3568-qos syscon                                  A      qos@fe190380             ,rockchip,rk3568-qos syscon                                 B      qos@fe190400             ,rockchip,rk3568-qos syscon                                  C      qos@fe198000             ,rockchip,rk3568-qos syscon                                  ;      qos@fe1a8000             ,rockchip,rk3568-qos syscon                                  1      qos@fe1a8080             ,rockchip,rk3568-qos syscon                                 2      qos@fe1a8100             ,rockchip,rk3568-qos syscon                                  3      dfi@fe230000             ,rockchip,rk3568-dfi             #                                   4   _      pcie@fe260000            ,rockchip,rk3568-pcie          0             @      &                               dbi apb config        <         K          J          I          H          G           sys pmc msg legacy err          A             (                                      $  aclk_mst aclk_slv aclk_dbi pclk aux          pci                    K                     `  ^                  `                      `                     `                     `           l            }                                                                              	  pcie-phy            4            T                                                       @              @           S              pipe                                     okay            default            a           b   
               c   legacy-interrupt-controller                                                              H              `         mmc@fe2b0000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc             +        @                b                                          biu ciu ciu-drive ciu-sample                       р        S              reset           okay                                         default            d   e   f   g                    &        	         mmc@fe2c0000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc             ,        @                c                                          biu ciu ciu-drive ciu-sample                       р        S              reset           okay                                 	         	%        	;   h         	F        default            i   j   k         	T           &        	         spi@fe300000             ,rockchip,sfc                0        @                e                 x      v        clk_sfc hclk_sfc               l        default         okay                                 flash@0          ,jedec,spi-nor                       	b2         	t           	           G            mmc@fe310000             ,rockchip,rk3568-dwcmshc             1                                   ]      {      }        m n6       (        |      z      y      {      }        core bus axi block timer            okay                                 	         	F        default            m   n   o   p                   	         rng@fe388000             ,rockchip,rk3568-rng             8       @               p      o      	  core ahb            S      m      	  disabled          i2s@fe400000             ,rockchip,rk3568-i2s-tdm             @                        4           ]      =      A        mFq Fq               ?      C      9        mclk_tx mclk_rx hclk            R   q            	tx          S      P      Q      
  tx-m rx-m                                   okay               	      i2s@fe410000             ,rockchip,rk3568-i2s-tdm             A                        5           ]      E      I        mFq Fq               G      K      :        mclk_tx mclk_rx hclk            R   q      q           	rx tx           S      R      S      
  tx-m rx-m                       default            r   s   t   u                    okay             	      i2s@fe420000             ,rockchip,rk3568-i2s-tdm             B                        6           ]      M        mFq               O      O      ;        mclk_tx mclk_rx hclk            R   q      q           	tx rx           S      T        tx-m                        default            v   w   x   y                  	  disabled          i2s@fe430000             ,rockchip,rk3568-i2s-tdm             C                        7                 S      W      <        mclk_tx mclk_rx hclk            R   q      q           	tx rx           S      U      V      
  tx-m rx-m                                 	  disabled          pdm@fe440000             ,rockchip,rk3568-pdm             D                        L                 Z      Y        pdm_clk pdm_hclk            R   q   	        	rx             z   {   |   }   ~           default         S      X        pdm-m                     	  disabled          spdif@fe460000           ,rockchip,rk3568-spdif               F                        f         
  mclk hclk                 _      \        R   q           	tx          default                              	  disabled          dma-controller@fe530000          ,arm,pl330 arm,primecell             S        @                                      	                   	  apb_pclk            	              '      dma-controller@fe550000          ,arm,pl330 arm,primecell             U        @                                      	                   	  apb_pclk            	              q      i2c@fe5a0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c             Z                        /                H     G      	  i2c pclk                       default                                 	  disabled          i2c@fe5b0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c             [                        0                J     I      	  i2c pclk                       default                                 	  disabled          i2c@fe5c0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c             \                        1                L     K      	  i2c pclk                       default                                 	  disabled          i2c@fe5d0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c             ]                        2                N     M      	  i2c pclk                       default                                 	  disabled          i2c@fe5e0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c             ^                        3                P     O      	  i2c pclk                       default                                 	  disabled          watchdog@fe600000             ,rockchip,rk3568-wdt snps,dw-wdt             `                                                   
  tclk pclk         spi@fe610000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi             a                        g                R     Q        spiclk apb_pclk         R   '      '           	tx rx           default                                                  	  disabled          spi@fe620000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi             b                        h                T     S        spiclk apb_pclk         R   '      '           	tx rx           default                                                  	  disabled          spi@fe630000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi             c                        i                V     U        spiclk apb_pclk         R   '      '           	tx rx           default                                                  	  disabled          spi@fe640000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi             d                        j                X     W        spiclk apb_pclk         R   '      '           	tx rx           default                                                  	  disabled          serial@fe650000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               e                        u                             baudclk apb_pclk            R   '      '                            default         W           d           okay          serial@fe660000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               f                        v                #              baudclk apb_pclk            R   '      '                      default         W           d           okay          serial@fe670000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               g                        w                '     $        baudclk apb_pclk            R   '      '                      default         W           d         	  disabled          serial@fe680000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               h                        x                +     (        baudclk apb_pclk            R   '      '   	                   default         W           d         	  disabled          serial@fe690000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               i                        y                /     ,        baudclk apb_pclk            R   '   
   '                      default         W           d         	  disabled          serial@fe6a0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               j                        z                3     0        baudclk apb_pclk            R   '      '                      default         W           d         	  disabled          serial@fe6b0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               k                        {                7     4        baudclk apb_pclk            R   '      '                      default         W           d         	  disabled          serial@fe6c0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               l                        |                ;     8        baudclk apb_pclk            R   '      '                      default         W           d         	  disabled          serial@fe6d0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               m                        }                ?     <        baudclk apb_pclk            R   '      '                      default         W           d         	  disabled          thermal-zones      cpu-thermal         	   d        
          
          trips      cpu_alert0          
  p        
,           passive                  cpu_alert1          
  $        
,           passive       cpu_crit            
  s        
,        	   critical             cooling-maps       map0            
7         0  
<   
                     gpu-thermal         	           
          
         trips      gpu-threshold           
  p        
,           passive       gpu-target          
  $        
,           passive                  gpu-crit            
  s        
,        	   critical             cooling-maps       map0            
7           
<                  tsadc@fe710000           ,rockchip,rk3568-tsadc               q                        s           ]                  mf@ 
`                          tsadc apb_pclk          S                                   
K s        default sleep                      
b           
l           okay            
           
                     saradc@fe720000       .   ,rockchip,rk3568-saradc rockchip,rk3399-saradc               r                        ]                             saradc apb_pclk         S             saradc-apb          
           okay            
         pwm@fe6e0000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             n                      Z     Y      	  pwm pclk                       default         n         	  disabled          pwm@fe6e0010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             n                     Z     Y      	  pwm pclk                       default         n         	  disabled          pwm@fe6e0020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             n                      Z     Y      	  pwm pclk                       default         n         	  disabled          pwm@fe6e0030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             n 0                    Z     Y      	  pwm pclk                       default         n         	  disabled          pwm@fe6f0000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             o                      ]     \      	  pwm pclk                       default         n         	  disabled          pwm@fe6f0010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             o                     ]     \      	  pwm pclk                       default         n         	  disabled          pwm@fe6f0020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             o                      ]     \      	  pwm pclk                       default         n         	  disabled          pwm@fe6f0030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             o 0                    ]     \      	  pwm pclk                       default         n         	  disabled          pwm@fe700000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             p                      `     _      	  pwm pclk                       default         n         	  disabled          pwm@fe700010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             p                     `     _      	  pwm pclk                       default         n         	  disabled          pwm@fe700020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             p                      `     _      	  pwm pclk                       default         n         	  disabled          pwm@fe700030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             p 0                    `     _      	  pwm pclk                       default         n         	  disabled          phy@fe830000             ,rockchip,rk3568-naneng-combphy                                     "     }              ref apb pipe            ]      "        m         S             phy         
           
           
           okay                     phy@fe840000             ,rockchip,rk3568-naneng-combphy                                     %     ~              ref apb pipe            ]      %        m         S             phy         
           
           
           okay                     phy@fe870000             ,rockchip,rk3568-csi-dphy                                      y        pclk            
            S             apb                   	  disabled          mipi-dphy@fe850000           ,rockchip,rk3568-dsi-dphy                               	  ref pclk                       z        
            4      	        apb         S           	  disabled               V      mipi-dphy@fe860000           ,rockchip,rk3568-dsi-dphy                               	  ref pclk                       {        
            4      	        apb         S           	  disabled               W      usb2phy@fe8a0000             ,rockchip,rk3568-usb2phy                                            phyclk          clk_usbphy0_480m                                         (            okay                  host-port           
            okay            Z                    otg-port            
            okay            Z                       usb2phy@fe8b0000             ,rockchip,rk3568-usb2phy                                            phyclk          clk_usbphy1_480m                                         (            okay       host-port           
            okay            Z                    otg-port            
            okay            Z                       pinctrl          ,rockchip,rk3568-pinctrl                     4   _                                                 gpio@fdd60000            ,rockchip,gpio-bank                                      !                 .                       %                       1                                  #      gpio@fe740000            ,rockchip,gpio-bank              t                        "                c     d                 %                       1                                  b      gpio@fe750000            ,rockchip,gpio-bank              u                        #                e     f                 %          @            1                             gpio@fe760000            ,rockchip,gpio-bank              v                        $                g     h                 %          `            1                                  S      gpio@fe770000            ,rockchip,gpio-bank              w                        %                i     j                 %                      1                             pcfg-pull-up             =                 pcfg-pull-none           J                 pcfg-pull-none-drv-level-1           J        W                    pcfg-pull-none-drv-level-2           J        W                    pcfg-pull-none-drv-level-3           J        W                    pcfg-pull-up-drv-level-1             =        W                    pcfg-pull-up-drv-level-2             =        W                    pcfg-pull-none-smt           J         f                 acodec        audiopwm          bt656         bt1120        cam    vcc_cam_en          {                                  can0          can1          can2          cif       clk32k     clk32k-out0         {                                 cpu       ebc       edpdp         emmc       emmc-bus8           {                                                                                                           m      emmc-clk            {                       n      emmc-cmd            {                       o      emmc-datastrobe         {                       p         eth0          eth1          flash         fspi       fspi-pins         `  {                                                                                   l         gmac0         gmac1      gmac1m1-miim             {                                   M      gmac1m1-clkinout            {                       R      gmac1m1-rx-bus2       0  {                              	                 O      gmac1m1-tx-bus2       0  {                                               N      gmac1m1-rgmii-clk            {                                    P      gmac1m1-rgmii-bus         @  {                                                           Q         gpu       hdmitx     hdmitxm0-cec            {                       Z      hdmitx-scl          {                       X      hdmitx-sda          {                       Y         i2c0       i2c0-xfer            {       	             
                 !         i2c1       i2c1-xfer            {                                              i2c2       i2c2m0-xfer          {                                              i2c3       i2c3m0-xfer          {                                             i2c4       i2c4m0-xfer          {                  
                          i2c5       i2c5m0-xfer          {                                            i2s1       i2s1m0-lrcktx           {                       s      i2s1m0-mclk         {                       %      i2s1m0-sclktx           {                       r      i2s1m0-sdi0         {                       t      i2s1m0-sdo0         {                       u         i2s2       i2s2m0-lrcktx           {                       w      i2s2m0-sclktx           {                       v      i2s2m0-sdi          {                       x      i2s2m0-sdo          {                       y         i2s3          isp       jtag          lcdc          mcu       npu       pcie20        pcie30x1          pcie30x2          pdm    pdmm0-clk           {                       z      pdmm0-clk1          {                       {      pdmm0-sdi0          {                       |      pdmm0-sdi1          {      
                 }      pdmm0-sdi2          {      	                 ~      pdmm0-sdi3          {                                pmic       pmic-int-l          {                         $         pmu       pwm0       pwm0m0-pins         {                        )         pwm1       pwm1m0-pins         {                        *         pwm2       pwm2m0-pins         {                        +         pwm3       pwm3-pins           {                        ,         pwm4       pwm4-pins           {                                 pwm5       pwm5-pins           {                                 pwm6       pwm6-pins           {                                 pwm7       pwm7-pins           {                                 pwm8       pwm8m0-pins         {      	                          pwm9       pwm9m0-pins         {      
                          pwm10      pwm10m0-pins            {                                pwm11      pwm11m0-pins            {                                pwm12      pwm12m0-pins            {                                pwm13      pwm13m0-pins            {                                pwm14      pwm14m0-pins            {                                pwm15      pwm15m0-pins            {                                refclk        sata          sata0         sata1         sata2         scr       sdmmc0     sdmmc0-bus4       @  {                                                            d      sdmmc0-clk          {                       e      sdmmc0-cmd          {                       f      sdmmc0-det          {                        g         sdmmc1     sdmmc1-bus4       @  {                                                           i      sdmmc1-clk          {                       j      sdmmc1-cmd          {                       k         sdmmc2        spdif      spdifm0-tx          {                                spi0       spi0m0-pins       0  {                                                        spi0m0-cs0          {                              spi0m0-cs1          {                                 spi1       spi1m0-pins       0  {                                                     spi1m0-cs0          {                             spi1m0-cs1          {                                spi2       spi2m0-pins       0  {                                                     spi2m0-cs0          {                             spi2m0-cs1          {                                spi3       spi3m0-pins       0  {                              
                       spi3m0-cs0          {                             spi3m0-cs1          {                                tsadc      tsadc-shutorg           {                              tsadc-pin           {                                  uart0      uart0-xfer           {                                     (         uart1      uart1m0-xfer             {                                         uart1m0-ctsn            {                             uart1m0-rtsn            {                                uart2      uart2m0-xfer             {                                              uart3      uart3m0-xfer             {                                             uart4      uart4m0-xfer             {                                            uart5      uart5m0-xfer             {                                            uart6      uart6m0-xfer             {                                            uart7      uart7m0-xfer             {                                            uart8      uart8m0-xfer             {                                            uart9      uart9m0-xfer             {                                            vop       spi0-hs       spi1-hs       spi2-hs       spi3-hs       gmac-txd-level3       gmac-txc-level2       bluetooth      bt-reg-on-h         {                    bt-wake-host-h          {                    bt-host-wake-h          {                       display    vcc_mipi_en         {                                  leds       user-led2           {                                   pcie       pcie-pwr-en         {                               pcie-reset-h            {      
                  a         usb    vcc5v0-usb30-host-en            {                               vcc5v0-usb-otg-en           {                                  wifi       wifi-host-wake-h            {                    wifi-reg-on-h           {                                     chosen          serial2:1500000n8         external-gmac1-clock             ,fixed-clock         sY@        gmac1_clkin         (               K      hdmi-con             ,hdmi-connector           a      port       endpoint                          ^            leds          
   ,gpio-leds      led-0              #              
  heartbeat                    
  heartbeat           default                     sdio-pwrseq          ,mmc-pwrseq-simple                       
  ext_clock           default                       d         LK@           #                 h      vcc5v-dcin-regulator             ,regulator-fixed         vcc5v_dcin                             LK@         LK@                 vcc3v3-pcie-regulator            ,regulator-fixed                     #               default                    vcc3v3_pcie          2Z         2Z        =   &           c      vcc3v3-sys-regulator             ,regulator-fixed         vcc3v3_sys                             2Z         2Z        =   "           &      vcc5v0-sys-regulator             ,regulator-fixed         vcc5v0_sys                             LK@         LK@        =              "      vcc5v0-usb30-host-regulator          ,regulator-fixed                     #               default                    vcc5v0_usb30_host            LK@         LK@        =   "                 vcc5v0-usb-otg-regulator             ,regulator-fixed                     #               default                    vcc5v0_usb_otg           LK@         LK@        =   "                 vcc-cam-regulator            ,regulator-fixed                     #               default                    vcc_cam          2Z         2Z        =   &   regulator-state-mem          H         vcc-mipi-regulator           ,regulator-fixed                     #               default                  	  vcc_mipi             2Z         2Z        =   &   regulator-state-mem          H            	interrupt-parent #address-cells #size-cells compatible model gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 serial0 serial1 serial2 serial3 serial4 serial5 serial6 serial7 serial8 serial9 spi0 spi1 spi2 spi3 ethernet0 mmc0 mmc1 mmc2 device_type reg clocks #cooling-cells enable-method operating-points-v2 i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache cpu-supply phandle cache-level cache-unified opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend ports arm,smc-id shmem #clock-cells simple-audio-card,name simple-audio-card,format simple-audio-card,mclk-fs status sound-dai interrupts interrupt-affinity arm,no-tick-in-suspend clock-frequency clock-output-names pinctrl-0 pinctrl-names ranges clock-names phys phy-names ports-implemented power-domains dr_mode phy_type resets snps,dis_u2_susphy_quirk extcon maximum-speed interrupt-controller #interrupt-cells mbi-alias mbi-ranges msi-controller pmuio1-supply pmuio2-supply vccio1-supply vccio2-supply vccio3-supply vccio4-supply vccio5-supply vccio6-supply vccio7-supply #reset-cells assigned-clocks assigned-clock-rates assigned-clock-parents rockchip,grf fcs,suspend-voltage-selector regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay vin-supply regulator-off-in-suspend system-power-controller vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply wakeup-source regulator-initial-mode regulator-suspend-microvolt regulator-on-in-suspend pagesize vcc-supply dmas reg-io-width reg-shift #pwm-cells #power-domain-cells pm_qos interrupt-names mali-supply iommus #iommu-cells reset-names fifo-depth max-frequency snps,axi-config snps,mixed-burst snps,mtl-rx-config snps,mtl-tx-config snps,tso clock_in_out phy-handle phy-mode phy-supply reset-assert-us reset-deassert-us reset-gpios snps,blen snps,rd_osr_lmt snps,wr_osr_lmt snps,rx-queues-to-use snps,tx-queues-to-use reg-names remote-endpoint #sound-dai-cells avdd-0v9-supply avdd-1v8-supply rockchip,pmu bus-range interrupt-map-mask interrupt-map linux,pci-domain num-ib-windows num-ob-windows max-link-speed msi-map num-lanes vpcie3v3-supply bus-width cap-sd-highspeed disable-wp sd-uhs-sdr50 vmmc-supply vqmmc-supply cap-sdio-irq keep-power-in-suspend mmc-pwrseq non-removable sd-uhs-sdr104 spi-max-frequency spi-rx-bus-width spi-tx-bus-width mmc-hs200-1_8v dma-names rockchip,trcm-sync-tx-only arm,pl330-periph-burst #dma-cells polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device rockchip,hw-tshut-temp pinctrl-1 #thermal-sensor-cells rockchip,hw-tshut-mode rockchip,hw-tshut-polarity #io-channel-cells vref-supply rockchip,pipe-grf rockchip,pipe-phy-grf #phy-cells rockchip,usbgrf gpio-controller gpio-ranges #gpio-cells bias-pull-up bias-disable drive-strength input-schmitt-enable rockchip,pins stdout-path function color linux,default-trigger post-power-on-delay-ms power-off-delay-us enable-active-high gpio 