     8     (                                                                                 8   ,pine64,soquartz-model-a pine64,soquartz rockchip,rk3566       )   7Pine64 SOQuartz on Model A carrier board       aliases          =/pinctrl/gpio@fdd60000           C/pinctrl/gpio@fe740000           I/pinctrl/gpio@fe750000           O/pinctrl/gpio@fe760000           U/pinctrl/gpio@fe770000           [/i2c@fdd40000            `/i2c@fe5a0000            e/i2c@fe5b0000            j/i2c@fe5c0000            o/i2c@fe5d0000            t/i2c@fe5e0000            y/serial@fdd50000             /serial@fe650000             /serial@fe660000             /serial@fe670000             /serial@fe680000             /serial@fe690000             /serial@fe6a0000             /serial@fe6b0000             /serial@fe6c0000             /serial@fe6d0000             /spi@fe610000            /spi@fe620000            /spi@fe630000            /spi@fe640000            /mmc@fe2b0000            /mmc@fe310000            /mmc@fe2c0000            /ethernet@fe010000        cpus                                 cpu@0            cpu          ,arm,cortex-a55                                                    psci            *           >           K   @        ]           j           w   @                                            
      cpu@100          cpu          ,arm,cortex-a55                                    psci            *           >           K   @        ]           j           w   @                                                  cpu@200          cpu          ,arm,cortex-a55                                    psci            *           >           K   @        ]           j           w   @                                                  cpu@300          cpu          ,arm,cortex-a55                                    psci            *           >           K   @        ]           j           w   @                                                     l3-cache             ,cache                               @           M   @        _                    opp-table-0          ,operating-points-v2                        opp-408000000               Q            0          @      opp-600000000               #F            0      opp-816000000               0,            0               opp-1104000000              Aʹ            0      opp-1416000000              Tfr            0      opp-1608000000              _"            0      opp-1800000000              kI            0         display-subsystem            ,rockchip,display-subsystem                   firmware       scmi             ,arm,scmi-smc                      "                                protocol@14                    (                          opp-table-1          ,operating-points-v2            A   opp-200000000                         P P B@      opp-300000000                         P P B@      opp-400000000               ׄ          P P B@      opp-600000000               #F            B@      opp-700000000               )'          ~ ~ B@      opp-800000000               /          B@ B@ B@         hdmi-sound           ,simple-audio-card           5HDMI            Li2s         e           okay       simple-audio-card,codec                  simple-audio-card,cpu              	         pmu          ,arm,cortex-a55-pmu        0                                                     
               psci             ,arm,psci-1.0            #smc       timer            ,arm,armv8-timer       0                                   
                  xin24m           ,fixed-clock         n6         xin24m          (                     xin32k           ,fixed-clock                    xin32k                     default         (          sram@10f000       
   ,mmio-sram                                                                          sram@0           ,arm,scmi-shmem                                     sata@fc400000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci              @                                           sata pmalive rxoob                 _                       	  sata-phy            "           4            	  disabled          sata@fc800000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci                                                         sata pmalive rxoob                 `                       	  sata-phy            "           4            	  disabled          usb@fcc00000             ,rockchip,rk3568-dwc3 snps,dwc3                     @                                                      ref_clk suspend_clk bus_clk         Botg       
  Jutmi_wide           4              S               Z        okay                     	  usb2-phy            s           zhigh-speed        usb@fd000000             ,rockchip,rk3568-dwc3 snps,dwc3                      @                                                      ref_clk suspend_clk bus_clk         Bhost                             usb2-phy usb3-phy         
  Jutmi_wide           4              S               Z      	  disabled          interrupt-controller@fd400000            ,arm,gic-v3               @             F                       	                                   A            (                             usb@fd800000             ,generic-ehci                                                                                        usb       	  disabled          usb@fd840000             ,generic-ohci                                                                                        usb       	  disabled          usb@fd880000             ,generic-ehci                                                                                        usb       	  disabled          usb@fd8c0000             ,generic-ohci                                                                                        usb       	  disabled          syscon@fdc20000       )   ,rockchip,rk3568-pmugrf syscon simple-mfd                                    [   io-domains        &   ,rockchip,rk3568-pmu-io-voltage-domain           okay                                                        
                      &           4           B            syscon@fdc50000                                ,rockchip,rk3566-pipe-grf syscon                  syscon@fdc60000       &   ,rockchip,rk3568-grf syscon simple-mfd                                         syscon@fdc80000       $   ,rockchip,rk3568-pipe-phy-grf syscon                                       syscon@fdc90000       $   ,rockchip,rk3568-pipe-phy-grf syscon                                       syscon@fdca0000       #   ,rockchip,rk3568-usb2phy-grf syscon                                        syscon@fdca8000       #   ,rockchip,rk3568-usb2phy-grf syscon              ʀ                         clock-controller@fdd00000            ,rockchip,rk3568-pmucru                               (           P                    clock-controller@fdd20000            ,rockchip,rk3568-cru                                         xin24m          (           P           ]                          m   G                                            i2c@fdd40000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c                                     .                       -      	  i2c pclk                       default                                   okay       regulator@1c             ,tcs,tcs4525                               vdd_cpu          5          0                            +        =                  regulator-state-mem          H         pmic@20          ,rockchip,rk809                           !                      (           rk808-clkout1 rk808-clkout2         default            "         a                    #           #           #           #           #           #           #           #           #              regulators     DCDC_REG1         
  vdd_logic                     +                   p          q              regulator-state-mem                  +          DCDC_REG2           vdd_gpu                   +                   p          q                      B   regulator-state-mem          H         DCDC_REG3                     +                   vcc_ddr    regulator-state-mem                   DCDC_REG4                     +                   p                   vdd_npu    regulator-state-mem          H         DCDC_REG5           vcc_1v8                   +         w@         w@              regulator-state-mem                  + w@         LDO_REG1                      +                          vdda0v9_image              W   regulator-state-mem                  +          LDO_REG2                      +                        	  vdda_0v9       regulator-state-mem          H         LDO_REG3                      +                          vdda0v9_pmu    regulator-state-mem                  +          LDO_REG4                      +         2Z         2Z        vccio_acodec       regulator-state-mem          H         LDO_REG5                      +         w@         2Z      	  vccio_sd                  regulator-state-mem          H         LDO_REG6                      +         2Z         2Z        vcc3v3_pmu                regulator-state-mem                  + 2Z         LDO_REG7                      +         w@         w@      	  vcca_1v8                  regulator-state-mem          H         LDO_REG8                      +         w@         w@        vcca1v8_pmu               regulator-state-mem          H         LDO_REG9                      +         w@         w@        vcca1v8_image              X   regulator-state-mem          H         SWITCH_REG1         vcc_3v3               regulator-state-mem          H         SWITCH_REG2       
  vcc3v3_sd           okay                      +         2Z         2Z           d   regulator-state-mem                            serial@fdd50000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                                       t                       ,        baudclk apb_pclk            G   $       $              %        default         L           Y         	  disabled          pwm@fdd70000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                          0      	  pwm pclk               &        default         c         	  disabled          pwm@fdd70010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                         0      	  pwm pclk               '        default         c         	  disabled          pwm@fdd70020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                          0      	  pwm pclk               (        default         c         	  disabled          pwm@fdd70030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              0                           0      	  pwm pclk               )        default         c         	  disabled          power-management@fdd90000         &   ,rockchip,rk3568-pmu syscon simple-mfd                           power-controller          !   ,rockchip,rk3568-power-controller            n                                           power-domain@7                                            *        n          power-domain@8                                            +   ,   -        n          power-domain@9             	                                     .   /   0        n          power-domain@10            
                               1   2   3   4   5   6        n          power-domain@11                                     7        n          power-domain@13                                    8        n          power-domain@14                                    9   :   ;        n          power-domain@15                                     <   =   >   ?   @        n                gpu@fde60000          &   ,rockchip,rk3568-mali arm,mali-bifrost                       @       $         (          )          '           job mmu gpu                             gpu bus                    *   A        4              okay               B                 video-codec@fdea0400             ,rockchip,rk3568-vpu                                                vdpu                              
  aclk hclk              C        4            iommu@fdea0800           ,rockchip,rk3568-iommu                       @                          aclk iface                              4                             C      rga@fdeb0000          (   ,rockchip,rk3568-rga rockchip,rk3288-rga                                    Z                                     aclk hclk sclk          S     &     $     %        core axi ahb            4      
      video-codec@fdee0000             ,rockchip,rk3568-vepu                                        @                             
  aclk hclk              D        4      
      iommu@fdee0800           ,rockchip,rk3568-iommu                       @               ?                               aclk iface          4      
                       D      mmc@fe000000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc                      @                d                                          biu ciu ciu-drive ciu-sample                       р        S              reset         	  disabled          ethernet@fe010000         &   ,rockchip,rk3568-gmac snps,dwmac-4.20a                                                             macirq eth_wake_irq       @                                                    W  stmmaceth mac_clk_rx mac_clk_tx clk_mac_refout aclk_mac pclk_mac clk_mac_speed ptp_ref          S            
  stmmaceth                         E                    F           G         %        okay            ]                                    H        .input           ;           Frgmii           default            I   J   K   L   M   N        O   !               _        u      N             0                      O   mdio             ,snps,dwmac-mdio                              ethernet-phy@0           ,ethernet-phy-ieee802.3-c22                      okay               O         stmmac-axi-config                                                                     E      rx-queues-config                          F   queue0           tx-queues-config                          G   queue0              vop@fe040000                         0     @                vop gamma-lut                           (                                      %  aclk hclk dclk_vp0 dclk_vp1 dclk_vp2               P        4      	                   okay             ,rockchip,rk3566-vop         ]                                   ports                                           port@0                                           endpoint@2                        Q           Y         port@1                                             port@2                                                   iommu@fe043e00           ,rockchip,rk3568-iommu                >            ?                                                      aclk iface                      4      	        okay               P      dsi@fe060000          *   ,rockchip,rk3568-mipi-dsi snps,dw-mipi-dsi                                       D           pclk                          dphy               R        4      	        apb         S                      	  disabled       ports                                port@0                    port@1                         dsi@fe070000          *   ,rockchip,rk3568-mipi-dsi snps,dw-mipi-dsi                                       E           pclk                          dphy               S        4      	        apb         S                      	  disabled       ports                                port@0                    port@1                         hdmi@fe0a0000            ,rockchip,rk3568-dw-hdmi             
                        -         (                         (              iahb isfr cec ref           default            T   U   V        4      	        L                                  okay            (   W        8   X              ports                                port@0                 endpoint               Y           Q         port@1                endpoint               Z                          qos@fe128000             ,rockchip,rk3568-qos syscon                                  *      qos@fe138080             ,rockchip,rk3568-qos syscon                                 9      qos@fe138100             ,rockchip,rk3568-qos syscon                                  :      qos@fe138180             ,rockchip,rk3568-qos syscon                                 ;      qos@fe148000             ,rockchip,rk3568-qos syscon                                  +      qos@fe148080             ,rockchip,rk3568-qos syscon                                 ,      qos@fe148100             ,rockchip,rk3568-qos syscon                                  -      qos@fe150000             ,rockchip,rk3568-qos syscon                                   7      qos@fe158000             ,rockchip,rk3568-qos syscon                                  1      qos@fe158100             ,rockchip,rk3568-qos syscon                                  2      qos@fe158180             ,rockchip,rk3568-qos syscon                                 3      qos@fe158200             ,rockchip,rk3568-qos syscon                                  4      qos@fe158280             ,rockchip,rk3568-qos syscon                                 5      qos@fe158300             ,rockchip,rk3568-qos syscon                                  6      qos@fe180000             ,rockchip,rk3568-qos syscon                              qos@fe190000             ,rockchip,rk3568-qos syscon                                   <      qos@fe190280             ,rockchip,rk3568-qos syscon                                 =      qos@fe190300             ,rockchip,rk3568-qos syscon                                  >      qos@fe190380             ,rockchip,rk3568-qos syscon                                 ?      qos@fe190400             ,rockchip,rk3568-qos syscon                                  @      qos@fe198000             ,rockchip,rk3568-qos syscon                                  8      qos@fe1a8000             ,rockchip,rk3568-qos syscon                                  .      qos@fe1a8080             ,rockchip,rk3568-qos syscon                                 /      qos@fe1a8100             ,rockchip,rk3568-qos syscon                                  0      dfi@fe230000             ,rockchip,rk3568-dfi             #                                   H   [      pcie@fe260000            ,rockchip,rk3568-pcie          0             @      &                               dbi apb config        <         K          J          I          H          G           sys pmc msg legacy err          U             (                                      $  aclk_mst aclk_slv aclk_dbi pclk aux          pci                    _                     `  r                  \                      \                     \                     \                                                                                                     	  pcie-phy            4            T                                                       @              @           S              pipe                                     okay            default            ]           ^   
               _   legacy-interrupt-controller                                                              H              \         mmc@fe2b0000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc             +        @                b                                          biu ciu ciu-drive ciu-sample                       р        S              reset           okay                                 	          	        default            `   a   b   c        	           	)   d      mmc@fe2c0000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc             ,        @                c                                          biu ciu ciu-drive ciu-sample                       р        S              reset           okay                        	          	5         	B        	X   e         	c        default            f   g   h         	q        	)   #        	         spi@fe300000             ,rockchip,sfc                0        @                e                 x      v        clk_sfc hclk_sfc               i        default       	  disabled          mmc@fe310000             ,rockchip,rk3568-dwcmshc             1                                   ]      {      }        m n6       (        |      z      y      {      }        core bus axi block timer            okay                        	~         	c        	)           	         rng@fe388000             ,rockchip,rk3568-rng             8       @               p      o      	  core ahb            S      m      	  disabled          i2s@fe400000             ,rockchip,rk3568-i2s-tdm             @                        4           ]      =      A        mFq Fq               ?      C      9        mclk_tx mclk_rx hclk            G   j            	tx          S      P      Q      
  tx-m rx-m                                  okay               	      i2s@fe410000             ,rockchip,rk3568-i2s-tdm             A                        5           ]      E      I        mFq Fq               G      K      :        mclk_tx mclk_rx hclk            G   j      j           	rx tx           S      R      S      
  tx-m rx-m                      default       0     k   l   m   n   o   p   q   r   s   t   u   v                  	  disabled          i2s@fe420000             ,rockchip,rk3568-i2s-tdm             B                        6           ]      M        mFq               O      O      ;        mclk_tx mclk_rx hclk            G   j      j           	tx rx           S      T        tx-m                       default            w   x   y   z                  	  disabled          i2s@fe430000             ,rockchip,rk3568-i2s-tdm             C                        7                 S      W      <        mclk_tx mclk_rx hclk            G   j      j           	tx rx           S      U      V      
  tx-m rx-m                                	  disabled          pdm@fe440000             ,rockchip,rk3568-pdm             D                        L                 Z      Y        pdm_clk pdm_hclk            G   j   	        	rx             {   |   }   ~              default         S      X        pdm-m                     	  disabled          spdif@fe460000           ,rockchip,rk3568-spdif               F                        f         
  mclk hclk                 _      \        G   j           	tx          default                              	  disabled          dma-controller@fe530000          ,arm,pl330 arm,primecell             S        @                                      	                   	  apb_pclk            	              $      dma-controller@fe550000          ,arm,pl330 arm,primecell             U        @                                      	                   	  apb_pclk            	              j      i2c@fe5a0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c             Z                        /                H     G      	  i2c pclk                       default                                   okay       rtc@51           ,nxp,pcf85063               Q         i2c@fe5b0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c             [                        0                J     I      	  i2c pclk                       default                                 	  disabled          i2c@fe5c0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c             \                        1                L     K      	  i2c pclk                       default                                 	  disabled          i2c@fe5d0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c             ]                        2                N     M      	  i2c pclk                       default                                 	  disabled          i2c@fe5e0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c             ^                        3                P     O      	  i2c pclk                       default                                 	  disabled          watchdog@fe600000             ,rockchip,rk3568-wdt snps,dw-wdt             `                                                   
  tclk pclk         spi@fe610000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi             a                        g                R     Q        spiclk apb_pclk         G   $      $           	tx rx           default                                                  	  disabled          spi@fe620000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi             b                        h                T     S        spiclk apb_pclk         G   $      $           	tx rx           default                                                  	  disabled          spi@fe630000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi             c                        i                V     U        spiclk apb_pclk         G   $      $           	tx rx           default                                                  	  disabled          spi@fe640000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi             d                        j                X     W        spiclk apb_pclk         G   $      $           	tx rx           default                                                  	  disabled          serial@fe650000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               e                        u                             baudclk apb_pclk            G   $      $                            default         L           Y           okay            	tx rx            	   bluetooth            ,brcm,bcm43438-bt                          lpo         	                  	                  	                  default                          	   #        

            serial@fe660000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               f                        v                #              baudclk apb_pclk            G   $      $                      default         L           Y           okay          serial@fe670000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               g                        w                '     $        baudclk apb_pclk            G   $      $                      default         L           Y         	  disabled          serial@fe680000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               h                        x                +     (        baudclk apb_pclk            G   $      $   	                   default         L           Y         	  disabled          serial@fe690000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               i                        y                /     ,        baudclk apb_pclk            G   $   
   $                      default         L           Y         	  disabled          serial@fe6a0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               j                        z                3     0        baudclk apb_pclk            G   $      $                      default         L           Y         	  disabled          serial@fe6b0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               k                        {                7     4        baudclk apb_pclk            G   $      $                      default         L           Y           okay          serial@fe6c0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               l                        |                ;     8        baudclk apb_pclk            G   $      $                      default         L           Y         	  disabled          serial@fe6d0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               m                        }                ?     <        baudclk apb_pclk            G   $      $                      default         L           Y         	  disabled          thermal-zones      cpu-thermal         
   d        
-          
;          trips      cpu_alert0          
K p        
W           passive                  cpu_alert1          
K $        
W           passive       cpu_crit            
K s        
W        	   critical             cooling-maps       map0            
b         0  
g   
                     gpu-thermal         
           
-          
;         trips      gpu-threshold           
K p        
W           passive       gpu-target          
K $        
W           passive                  gpu-crit            
K s        
W        	   critical             cooling-maps       map0            
b           
g                  tsadc@fe710000           ,rockchip,rk3568-tsadc               q                        s           ]                  mf@ 
`                          tsadc apb_pclk          S                                  
v s        default sleep                      
           
           okay                     saradc@fe720000       .   ,rockchip,rk3568-saradc rockchip,rk3399-saradc               r                        ]                             saradc apb_pclk         S             saradc-apb          
         	  disabled            
         pwm@fe6e0000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             n                      Z     Y      	  pwm pclk                       default         c         	  disabled          pwm@fe6e0010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             n                     Z     Y      	  pwm pclk                       default         c         	  disabled          pwm@fe6e0020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             n                      Z     Y      	  pwm pclk                       default         c         	  disabled          pwm@fe6e0030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             n 0                    Z     Y      	  pwm pclk                       default         c         	  disabled          pwm@fe6f0000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             o                      ]     \      	  pwm pclk                       default         c         	  disabled          pwm@fe6f0010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             o                     ]     \      	  pwm pclk                       default         c         	  disabled          pwm@fe6f0020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             o                      ]     \      	  pwm pclk                       default         c         	  disabled          pwm@fe6f0030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             o 0                    ]     \      	  pwm pclk                       default         c         	  disabled          pwm@fe700000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             p                      `     _      	  pwm pclk                       default         c         	  disabled          pwm@fe700010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             p                     `     _      	  pwm pclk                       default         c         	  disabled          pwm@fe700020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             p                      `     _      	  pwm pclk                       default         c         	  disabled          pwm@fe700030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             p 0                    `     _      	  pwm pclk                       default         c         	  disabled          phy@fe830000             ,rockchip,rk3568-naneng-combphy                                     "     }              ref apb pipe            ]      "        m         S             phy         
           
           
         	  disabled                     phy@fe840000             ,rockchip,rk3568-naneng-combphy                                     %     ~              ref apb pipe            ]      %        m         S             phy         
           
           
           okay            ;   #                 phy@fe870000             ,rockchip,rk3568-csi-dphy                                      y        pclk            
            S             apb                  	  disabled          mipi-dphy@fe850000           ,rockchip,rk3568-dsi-dphy                               	  ref pclk                       z        
            4      	        apb         S           	  disabled               R      mipi-dphy@fe860000           ,rockchip,rk3568-dsi-dphy                               	  ref pclk                       {        
            4      	        apb         S           	  disabled               S      usb2phy@fe8a0000             ,rockchip,rk3568-usb2phy                                            phyclk          clk_usbphy0_480m                              
           (            okay                  host-port           
          	  disabled                     otg-port            
            okay            ;                       usb2phy@fe8b0000             ,rockchip,rk3568-usb2phy                                            phyclk          clk_usbphy1_480m                              
           (          	  disabled       host-port           
          	  disabled                     otg-port            
          	  disabled                        pinctrl          ,rockchip,rk3568-pinctrl                    H   [                                                 gpio@fdd60000            ,rockchip,gpio-bank                                      !                 .                                              *                                  !   nextrst-hog          6                      ?nEXTRST          I         gpio@fe740000            ,rockchip,gpio-bank              t                        "                c     d                                        *                                  ^      gpio@fe750000            ,rockchip,gpio-bank              u                        #                e     f                           @            *                                        gpio@fe760000            ,rockchip,gpio-bank              v                        $                g     h                           `            *                             gpio@fe770000            ,rockchip,gpio-bank              w                        %                i     j                                       *                             pcfg-pull-up             T                 pcfg-pull-down           a                 pcfg-pull-none           p                 pcfg-pull-none-drv-level-1           p        }                    pcfg-pull-none-drv-level-2           p        }                    pcfg-pull-none-drv-level-3           p        }                    pcfg-pull-up-drv-level-1             T        }                    pcfg-pull-up-drv-level-2             T        }                    pcfg-pull-none-smt           p                          acodec        audiopwm          bt656         bt1120        cam       can0          can1          can2          cif       clk32k     clk32k-out0                                          cpu       ebc       edpdp         emmc          eth0          eth1          flash         fspi       fspi-pins         `                                                                                     i         gmac0         gmac1      gmac1m0-miim                                                I      gmac1m0-clkinout                                   M      gmac1m0-rx-bus2       0        	            
                             K      gmac1m0-tx-bus2       0                                                 J      gmac1m0-rgmii-clk                                               L      gmac1m0-rgmii-bus         @                                                             N         gpu       hdmitx     hdmitxm0-cec                                   V      hdmitx-scl                                 T      hdmitx-sda                                 U         i2c0       i2c0-xfer                   	             
                          i2c1       i2c1-xfer                                                          i2c2       i2c2m1-xfer                                                      i2c3       i2c3m0-xfer                                                       i2c4       i2c4m1-xfer                
            	                          i2c5       i2c5m0-xfer                                                      i2s1       i2s1m1-lrckrx                                  n      i2s1m1-lrcktx                                  m      i2s1m1-sclkrx                                  l      i2s1m1-sclktx                                  k      i2s1m1-sdi0                                o      i2s1m1-sdi1                                p      i2s1m1-sdi2                                q      i2s1m1-sdi3                                r      i2s1m1-sdo0                                s      i2s1m1-sdo1                                t      i2s1m1-sdo2               	                 u      i2s1m1-sdo3                                v         i2s2       i2s2m0-lrcktx                                  x      i2s2m0-sclktx                                  w      i2s2m0-sdi                                 y      i2s2m0-sdo                                 z         i2s3          isp       jtag          lcdc          mcu       npu       pcie20        pcie30x1          pcie30x2          pdm    pdmm0-clk                                  {      pdmm0-clk1                                 |      pdmm0-sdi0                                 }      pdmm0-sdi1                
                 ~      pdmm0-sdi2                	                       pdmm0-sdi3                                          pmic       pmic-int-l                                   "         pmu       pwm0       pwm0m0-pins                                 &         pwm1       pwm1m0-pins                                 '         pwm2       pwm2m0-pins                                 (         pwm3       pwm3-pins                                   )         pwm4       pwm4-pins                                            pwm5       pwm5-pins                                            pwm6       pwm6-pins                                            pwm7       pwm7-pins                                            pwm8       pwm8m0-pins               	                          pwm9       pwm9m0-pins               
                          pwm10      pwm10m0-pins                                            pwm11      pwm11m0-pins                                            pwm12      pwm12m0-pins                                            pwm13      pwm13m0-pins                                            pwm14      pwm14m0-pins                                            pwm15      pwm15m0-pins                                            refclk        sata          sata0         sata1         sata2         scr       sdmmc0     sdmmc0-bus4       @                                                              `      sdmmc0-clk                                 a      sdmmc0-cmd                                 b      sdmmc0-det                                  c         sdmmc1     sdmmc1-bus4       @                                                             f      sdmmc1-clk                                 h      sdmmc1-cmd                                 g         sdmmc2        spdif      spdifm0-tx                                          spi0       spi0m0-pins       0                                                          spi0m0-cs0                                        spi0m0-cs1                                           spi1       spi1m0-pins       0                                                       spi1m0-cs0                                       spi1m0-cs1                                          spi2       spi2m0-pins       0                                                       spi2m0-cs0                                       spi2m0-cs1                                          spi3       spi3m0-pins       0                                
                       spi3m0-cs0                                       spi3m0-cs1                                          tsadc      tsadc-shutorg                                         tsadc-pin                                             uart0      uart0-xfer                                                %         uart1      uart1m0-xfer                                                      uart1m0-ctsn                                         uart1m0-rtsn                                            uart2      uart2m0-xfer                                                           uart3      uart3m0-xfer                                                          uart4      uart4m0-xfer                                                         uart5      uart5m0-xfer                                                         uart6      uart6m0-xfer                                                         uart7      uart7m2-xfer                                                         uart8      uart8m0-xfer                                                         uart9      uart9m0-xfer                                                         vop       spi0-hs       spi1-hs       spi2-hs       spi3-hs       gmac-txd-level3       gmac-txc-level2       bt     bt-enable-h                                       bt-host-wake-l                                        bt-wake-l                                            leds       work-led-enable-h                                          diy-led-enable-h                                              pcie       pcie-clkreq-h                              pcie-reset-h                  
                  ]         sdio-pwrseq    wifi-enable-h                                               chosen          serial2:1500000n8         external-gmac1-clock             ,fixed-clock         sY@        gmac1_clkin         (               H      hdmi-con             ,hdmi-connector           a      port       endpoint                          Z            leds          
   ,gpio-leds      led-diy         diy-led         on             !            
  heartbeat           default                             okay          led-work          	  work-led            off            !              default                             okay             sdio-pwrseq         okay             ,mmc-pwrseq-simple                       
  ext_clock           default                                        e      vbus-regulator           ,regulator-fixed         vbus                      +         LK@         LK@        =                    vcc5v0-sys-regulator             ,regulator-fixed         vcc5v0_sys                    +         LK@         LK@        =                     vcc3v3-sys-regulator             ,regulator-fixed         vcc3v3_sys                    +         2Z         2Z        =               #      vcc12v-dcin-regulator            ,regulator-fixed         vcc12v_dcin                   +                                     vcc5v0-usb-regulator             ,regulator-fixed         vcc5v0_usb                    +         LK@         LK@        =                    vcc3v0-sd-regulator          ,regulator-fixed       
  vcc3v0_sd                     +         2Z         2Z        =   #      vcc3v3-pcie-regulator            ,regulator-fixed         vcc3v3_pcie                   +         2Z         2Z        =              _      vcc12v-pcie-regulator            ,regulator-fixed         vcc12v_pcie                   +                            =            	interrupt-parent #address-cells #size-cells compatible model gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 serial0 serial1 serial2 serial3 serial4 serial5 serial6 serial7 serial8 serial9 spi0 spi1 spi2 spi3 mmc0 mmc1 mmc2 ethernet0 device_type reg clocks #cooling-cells enable-method operating-points-v2 i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache cpu-supply phandle cache-level cache-unified opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend ports arm,smc-id shmem #clock-cells simple-audio-card,name simple-audio-card,format simple-audio-card,mclk-fs status sound-dai interrupts interrupt-affinity arm,no-tick-in-suspend clock-frequency clock-output-names pinctrl-0 pinctrl-names ranges clock-names phys phy-names ports-implemented power-domains dr_mode phy_type resets snps,dis_u2_susphy_quirk extcon maximum-speed interrupt-controller #interrupt-cells mbi-alias mbi-ranges msi-controller pmuio1-supply pmuio2-supply vccio1-supply vccio2-supply vccio3-supply vccio4-supply vccio5-supply vccio6-supply vccio7-supply #reset-cells assigned-clocks assigned-clock-rates assigned-clock-parents rockchip,grf fcs,suspend-voltage-selector regulator-name regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-always-on regulator-boot-on vin-supply regulator-off-in-suspend rockchip,system-power-controller wakeup-source vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply regulator-initial-mode regulator-on-in-suspend regulator-suspend-microvolt dmas reg-io-width reg-shift #pwm-cells #power-domain-cells pm_qos interrupt-names mali-supply iommus #iommu-cells reset-names fifo-depth max-frequency snps,axi-config snps,mixed-burst snps,mtl-rx-config snps,mtl-tx-config snps,tso clock_in_out phy-supply phy-mode snps,reset-gpio snps,reset-active-low snps,reset-delays-us tx_delay rx_delay phy-handle snps,blen snps,rd_osr_lmt snps,wr_osr_lmt snps,rx-queues-to-use snps,tx-queues-to-use reg-names remote-endpoint #sound-dai-cells avdd-0v9-supply avdd-1v8-supply rockchip,pmu bus-range interrupt-map-mask interrupt-map linux,pci-domain num-ib-windows num-ob-windows max-link-speed msi-map num-lanes reset-gpios vpcie3v3-supply broken-cd bus-width cap-sd-highspeed disable-wp vqmmc-supply vmmc-supply cap-sdio-irq keep-power-in-suspend mmc-pwrseq non-removable sd-uhs-sdr50 mmc-hs200-1_8v dma-names arm,pl330-periph-burst #dma-cells uart-has-rtscts device-wakeup-gpios host-wakeup-gpios shutdown-gpios vbat-supply vddio-supply polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device rockchip,hw-tshut-temp pinctrl-1 #thermal-sensor-cells #io-channel-cells vref-supply rockchip,pipe-grf rockchip,pipe-phy-grf #phy-cells rockchip,usbgrf gpio-controller gpio-ranges #gpio-cells gpio-hog line-name output-low bias-pull-up bias-pull-down bias-disable drive-strength input-schmitt-enable rockchip,pins stdout-path label default-state linux,default-trigger retain-state-suspended 