  _   8     (              x                                                                   %   ,embedfire,lubancat-2 rockchip,rk3568             7EmbedFire LubanCat 2       aliases          =/pinctrl/gpio@fdd60000           C/pinctrl/gpio@fe740000           I/pinctrl/gpio@fe750000           O/pinctrl/gpio@fe760000           U/pinctrl/gpio@fe770000           [/i2c@fdd40000            `/i2c@fe5a0000            e/i2c@fe5b0000            j/i2c@fe5c0000            o/i2c@fe5d0000            t/i2c@fe5e0000            y/serial@fdd50000             /serial@fe650000             /serial@fe660000             /serial@fe670000             /serial@fe680000             /serial@fe690000             /serial@fe6a0000             /serial@fe6b0000             /serial@fe6c0000             /serial@fe6d0000             /spi@fe610000            /spi@fe620000            /spi@fe630000            /spi@fe640000            /ethernet@fe2a0000           /ethernet@fe010000           /mmc@fe2b0000            /mmc@fe310000         cpus                                 cpu@0            cpu          ,arm,cortex-a55                                                    !psci            /           C           P   @        b           o           |   @                                            
      cpu@100          cpu          ,arm,cortex-a55                                    !psci            /           C           P   @        b           o           |   @                                                  cpu@200          cpu          ,arm,cortex-a55                                    !psci            /           C           P   @        b           o           |   @                                                  cpu@300          cpu          ,arm,cortex-a55                                    !psci            /           C           P   @        b           o           |   @                                                     l3-cache             ,cache                               E           R   @        d                    opp-table-0          ,operating-points-v2                        opp-408000000               Q            0          @      opp-600000000               #F            0      opp-816000000               0,            0         
      opp-1104000000              Aʹ            0      opp-1416000000              Tfr            0      opp-1608000000              _"            0      opp-1800000000              kI            0      opp-1992000000              v          0 0 0         display-subsystem            ,rockchip,display-subsystem                   firmware       scmi             ,arm,scmi-smc                      '                                protocol@14                    -                          opp-table-1          ,operating-points-v2            E   opp-200000000                         P P B@      opp-300000000                         P P B@      opp-400000000               ׄ          P P B@      opp-600000000               #F            B@      opp-700000000               )'          ~ ~ B@      opp-800000000               /          B@ B@ B@         hdmi-sound           ,simple-audio-card           :HDMI            Qi2s         j           okay       simple-audio-card,codec                  simple-audio-card,cpu              	         pmu          ,arm,cortex-a55-pmu        0                                                     
               psci             ,arm,psci-1.0            (smc       timer            ,arm,armv8-timer       0                                   
                  xin24m           ,fixed-clock         n6         xin24m          -                     xin32k           ,fixed-clock                    xin32k                     default         -          sram@10f000       
   ,mmio-sram                                                                         sram@0           ,arm,scmi-shmem                                     sata@fc400000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci              @                                           sata pmalive rxoob                 _                       	  sata-phy            '           9            	  disabled          sata@fc800000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci                                                         sata pmalive rxoob                 `                       	  sata-phy            '           9            	  disabled          usb@fcc00000             ,rockchip,rk3568-dwc3 snps,dwc3                     @                                                      ref_clk suspend_clk bus_clk         Ghost          
  Outmi_wide           9              X               _        okay                     	  usb2-phy            x           high-speed        usb@fd000000             ,rockchip,rk3568-dwc3 snps,dwc3                      @                                                      ref_clk suspend_clk bus_clk         Ghost                             usb2-phy usb3-phy         
  Outmi_wide           9              X               _        okay          interrupt-controller@fd400000            ,arm,gic-v3               @             F                       	                                   A             ^           !                             usb@fd800000             ,generic-ehci                                                                                        usb         okay          usb@fd840000             ,generic-ohci                                                                                        usb         okay          usb@fd880000             ,generic-ehci                                                                                        usb         okay          usb@fd8c0000             ,generic-ohci                                                                                        usb         okay          syscon@fdc20000       )   ,rockchip,rk3568-pmugrf syscon simple-mfd                                    ^   io-domains        &   ,rockchip,rk3568-pmu-io-voltage-domain           okay                                                                              +            syscon@fdc50000                                ,rockchip,rk3568-pipe-grf syscon                  syscon@fdc60000       &   ,rockchip,rk3568-grf syscon simple-mfd                                         syscon@fdc80000       $   ,rockchip,rk3568-pipe-phy-grf syscon                                       syscon@fdc90000       $   ,rockchip,rk3568-pipe-phy-grf syscon                                       syscon@fdca0000       #   ,rockchip,rk3568-usb2phy-grf syscon                                        syscon@fdca8000       #   ,rockchip,rk3568-usb2phy-grf syscon              ʀ                         clock-controller@fdd00000            ,rockchip,rk3568-pmucru                               -           9                    clock-controller@fdd20000            ,rockchip,rk3568-cru                                         xin24m          -           9           F                          V   G          k                                  i2c@fdd40000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c                                     .                       -      	  i2c pclk                        default                                   okay       regulator@1c             ,tcs,tcs4525                               vdd_cpu                            5          0                  &   !              regulator-state-mem          1         pmic@20          ,rockchip,rk809                           "                      F      H        k             -           mclk                  H        default            #         J        k            |   $           $           $           $           $           $           $           $           $            regulators     DCDC_REG1         
  vdd_logic                                        p          q              regulator-state-mem          1         DCDC_REG2           vdd_gpu                                      p          q                      F   regulator-state-mem          1         DCDC_REG3           vcc_ddr                                 regulator-state-mem                   DCDC_REG4           vdd_npu                                      p          q              regulator-state-mem          1         DCDC_REG5           vcc_1v8                            w@         w@              regulator-state-mem          1         LDO_REG1            vdda0v9_image                                                  Z   regulator-state-mem          1         LDO_REG2          	  vdda_0v9                                           regulator-state-mem          1         LDO_REG3            vdda0v9_pmu                                        regulator-state-mem                  %          LDO_REG4            vccio_acodec                               2Z         2Z              regulator-state-mem          1         LDO_REG5          	  vccio_sd                               w@         2Z              regulator-state-mem          1         LDO_REG6            vcc3v3_pmu                             2Z         2Z              regulator-state-mem                  % 2Z         LDO_REG7          	  vcca_1v8                               w@         w@              regulator-state-mem          1         LDO_REG8            vcca1v8_pmu                            w@         w@   regulator-state-mem                  % w@         LDO_REG9            vcca1v8_image                              w@         w@           [   regulator-state-mem          1         SWITCH_REG1         vcc_3v3                                 regulator-state-mem          1         SWITCH_REG2       
  vcc3v3_sd                                a   regulator-state-mem          1                  serial@fdd50000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                                       t                       ,        baudclk apb_pclk            A   %       %              &        default         F           S         	  disabled          pwm@fdd70000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                          0      	  pwm pclk               '        default         ]         	  disabled          pwm@fdd70010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                         0      	  pwm pclk               (        default         ]         	  disabled          pwm@fdd70020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                          0      	  pwm pclk               )        default         ]         	  disabled          pwm@fdd70030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              0                           0      	  pwm pclk               *        default         ]         	  disabled          power-management@fdd90000         &   ,rockchip,rk3568-pmu syscon simple-mfd                           power-controller          !   ,rockchip,rk3568-power-controller            h                                           power-domain@7                                         |   +        h          power-domain@8                                         |   ,   -   .        h          power-domain@9             	                                  |   /   0   1        h          power-domain@10            
                            |   2   3   4   5   6   7        h          power-domain@11                                  |   8        h          power-domain@13                                 |   9        h          power-domain@14                                 |   :   ;   <        h          power-domain@15                                   |   =   >   ?   @   A   B   C   D        h                gpu@fde60000          &   ,rockchip,rk3568-mali arm,mali-bifrost                       @       $         (          )          '           job mmu gpu                             gpu bus                    /   E        9              okay               F                 video-codec@fdea0400             ,rockchip,rk3568-vpu                                                vdpu                              
  aclk hclk              G        9            iommu@fdea0800           ,rockchip,rk3568-iommu                       @                          aclk iface                              9                             G      rga@fdeb0000          (   ,rockchip,rk3568-rga rockchip,rk3288-rga                                    Z                                     aclk hclk sclk          X     &     $     %        core axi ahb            9      
      video-codec@fdee0000             ,rockchip,rk3568-vepu                                        @                             
  aclk hclk              H        9      
      iommu@fdee0800           ,rockchip,rk3568-iommu                       @               ?                               aclk iface          9      
                       H      mmc@fe000000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc                      @                d                                          biu ciu ciu-drive ciu-sample                       р        X              reset         	  disabled          ethernet@fe010000         &   ,rockchip,rk3568-gmac snps,dwmac-4.20a                                                             macirq eth_wake_irq       @                                                    W  stmmaceth mac_clk_rx mac_clk_tx clk_mac_refout aclk_mac pclk_mac clk_mac_speed ptp_ref          X            
  stmmaceth                         I                    J           K                 okay            (rgmii           1output          >   L               N        d      N          F                  k                   default            M   N   O   P   Q        y   !                      R   mdio             ,snps,dwmac-mdio                              phy@0            ,ethernet-phy-ieee802.3-c22                         R         stmmac-axi-config                                                                     I      rx-queues-config                          J   queue0           tx-queues-config                          K   queue0              vop@fe040000                         0     @                vop gamma-lut                           (                                      %  aclk hclk dclk_vp0 dclk_vp1 dclk_vp2               S        9      	                   okay             ,rockchip,rk3568-vop         F                    k               ports                                           port@0                                           endpoint@2                        T           \         port@1                                             port@2                                                   iommu@fe043e00           ,rockchip,rk3568-iommu                >            ?                                                      aclk iface                      9      	        okay               S      dsi@fe060000          *   ,rockchip,rk3568-mipi-dsi snps,dw-mipi-dsi                                       D           pclk                          dphy               U        9      	        apb         X                      	  disabled       ports                                port@0                    port@1                         dsi@fe070000          *   ,rockchip,rk3568-mipi-dsi snps,dw-mipi-dsi                                       E           pclk                          dphy               V        9      	        apb         X                      	  disabled       ports                                port@0                    port@1                         hdmi@fe0a0000            ,rockchip,rk3568-dw-hdmi             
                        -         (                         (              iahb isfr cec ref           default            W   X   Y        9      	        F                      k            okay               Z           [              ports                                port@0                 endpoint               \           T         port@1                endpoint               ]                          qos@fe128000             ,rockchip,rk3568-qos syscon                                  +      qos@fe138080             ,rockchip,rk3568-qos syscon                                 :      qos@fe138100             ,rockchip,rk3568-qos syscon                                  ;      qos@fe138180             ,rockchip,rk3568-qos syscon                                 <      qos@fe148000             ,rockchip,rk3568-qos syscon                                  ,      qos@fe148080             ,rockchip,rk3568-qos syscon                                 -      qos@fe148100             ,rockchip,rk3568-qos syscon                                  .      qos@fe150000             ,rockchip,rk3568-qos syscon                                   8      qos@fe158000             ,rockchip,rk3568-qos syscon                                  2      qos@fe158100             ,rockchip,rk3568-qos syscon                                  3      qos@fe158180             ,rockchip,rk3568-qos syscon                                 4      qos@fe158200             ,rockchip,rk3568-qos syscon                                  5      qos@fe158280             ,rockchip,rk3568-qos syscon                                 6      qos@fe158300             ,rockchip,rk3568-qos syscon                                  7      qos@fe180000             ,rockchip,rk3568-qos syscon                              qos@fe190000             ,rockchip,rk3568-qos syscon                                   =      qos@fe190280             ,rockchip,rk3568-qos syscon                                 A      qos@fe190300             ,rockchip,rk3568-qos syscon                                  B      qos@fe190380             ,rockchip,rk3568-qos syscon                                 C      qos@fe190400             ,rockchip,rk3568-qos syscon                                  D      qos@fe198000             ,rockchip,rk3568-qos syscon                                  9      qos@fe1a8000             ,rockchip,rk3568-qos syscon                                  /      qos@fe1a8080             ,rockchip,rk3568-qos syscon                                 0      qos@fe1a8100             ,rockchip,rk3568-qos syscon                                  1      dfi@fe230000             ,rockchip,rk3568-dfi             #                                   &   ^      pcie@fe260000            ,rockchip,rk3568-pcie          0             @      &                               dbi apb config        <         K          J          I          H          G           sys pmc msg legacy err          3             (                                      $  aclk_mst aclk_slv aclk_dbi pclk aux          pci                    =                     `  P                  _                      _                     _                     _           ^            o           ~                                                                   	  pcie-phy            9            T                                                      @              @           X              pipe                                     okay               L                  `   legacy-interrupt-controller                                                              H              _         mmc@fe2b0000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc             +        @                b                                          biu ciu ciu-drive ciu-sample                       р        X              reset           okay                                                            	         	        	   a        	+           default            b   c   d   e      mmc@fe2c0000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc             ,        @                c                                          biu ciu ciu-drive ciu-sample                       р        X              reset         	  disabled          spi@fe300000             ,rockchip,sfc                0        @                e                 x      v        clk_sfc hclk_sfc               f        default       	  disabled          mmc@fe310000             ,rockchip,rk3568-dwcmshc             1                                   F      {      }      |        V n6        (        |      z      y      {      }        core bus axi block timer            okay                                 	8         	G        default            g   h   i      rng@fe388000             ,rockchip,rk3568-rng             8       @               p      o      	  core ahb            X      m        okay          i2s@fe400000             ,rockchip,rk3568-i2s-tdm             @                        4           F      =      A        VFq Fq               ?      C      9        mclk_tx mclk_rx hclk            A   j            	Utx          X      P      Q      
  tx-m rx-m                      k          	  disabled               	      i2s@fe410000             ,rockchip,rk3568-i2s-tdm             A                        5           F      E      I        VFq Fq               G      K      :        mclk_tx mclk_rx hclk            A   j      j           	Urx tx           X      R      S      
  tx-m rx-m                      default       0     k   l   m   n   o   p   q   r   s   t   u   v        k            okay             	_      i2s@fe420000             ,rockchip,rk3568-i2s-tdm             B                        6           F      M        VFq               O      O      ;        mclk_tx mclk_rx hclk            A   j      j           	Utx rx           X      T        tx-m                       default            w   x   y   z        k          	  disabled          i2s@fe430000             ,rockchip,rk3568-i2s-tdm             C                        7                 S      W      <        mclk_tx mclk_rx hclk            A   j      j           	Utx rx           X      U      V      
  tx-m rx-m                      k          	  disabled          pdm@fe440000             ,rockchip,rk3568-pdm             D                        L                 Z      Y        pdm_clk pdm_hclk            A   j   	        	Urx             {   |   }   ~              default         X      X        pdm-m           k          	  disabled          spdif@fe460000           ,rockchip,rk3568-spdif               F                        f         
  mclk hclk                 _      \        A   j           	Utx          default                    k          	  disabled          dma-controller@fe530000          ,arm,pl330 arm,primecell             S        @                                      	z                   	  apb_pclk            	              %      dma-controller@fe550000          ,arm,pl330 arm,primecell             U        @                                      	z                   	  apb_pclk            	              j      i2c@fe5a0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c             Z                        /                H     G      	  i2c pclk                       default                                 	  disabled          i2c@fe5b0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c             [                        0                J     I      	  i2c pclk                       default                                 	  disabled          i2c@fe5c0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c             \                        1                L     K      	  i2c pclk                       default                                 	  disabled          i2c@fe5d0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c             ]                        2                N     M      	  i2c pclk                       default                                 	  disabled          i2c@fe5e0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c             ^                        3                P     O      	  i2c pclk                       default                                 	  disabled          watchdog@fe600000             ,rockchip,rk3568-wdt snps,dw-wdt             `                                                   
  tclk pclk         spi@fe610000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi             a                        g                R     Q        spiclk apb_pclk         A   %      %           	Utx rx           default                                                  	  disabled          spi@fe620000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi             b                        h                T     S        spiclk apb_pclk         A   %      %           	Utx rx           default                                                  	  disabled          spi@fe630000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi             c                        i                V     U        spiclk apb_pclk         A   %      %           	Utx rx           default                                                  	  disabled          spi@fe640000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi             d                        j                X     W        spiclk apb_pclk         A   %      %           	Utx rx           default                                            	  disabled          serial@fe650000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               e                        u                             baudclk apb_pclk            A   %      %                      default         F           S         	  disabled          serial@fe660000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               f                        v                #              baudclk apb_pclk            A   %      %                      default         F           S           okay          serial@fe670000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               g                        w                '     $        baudclk apb_pclk            A   %      %                      default         F           S         	  disabled          serial@fe680000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               h                        x                +     (        baudclk apb_pclk            A   %      %   	                   default         F           S         	  disabled          serial@fe690000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               i                        y                /     ,        baudclk apb_pclk            A   %   
   %                      default         F           S         	  disabled          serial@fe6a0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               j                        z                3     0        baudclk apb_pclk            A   %      %                      default         F           S         	  disabled          serial@fe6b0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               k                        {                7     4        baudclk apb_pclk            A   %      %                      default         F           S         	  disabled          serial@fe6c0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               l                        |                ;     8        baudclk apb_pclk            A   %      %                      default         F           S         	  disabled          serial@fe6d0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               m                        }                ?     <        baudclk apb_pclk            A   %      %                      default         F           S         	  disabled          thermal-zones      cpu-thermal         	   d        	          	          trips      cpu_alert0          	 p        	          passive                  cpu_alert1          	 $        	          passive       cpu_crit            	 s        	        	  critical             cooling-maps       map0            	         0  	   
                     gpu-thermal         	           	          	         trips      gpu-threshold           	 p        	          passive       gpu-target          	 $        	          passive                  gpu-crit            	 s        	        	  critical             cooling-maps       map0            	           	                  tsadc@fe710000           ,rockchip,rk3568-tsadc               q                        s           F                  Vf@ 
`                          tsadc apb_pclk          X                                  	 s        default sleep                      
           
           okay            
2           
I                     saradc@fe720000       .   ,rockchip,rk3568-saradc rockchip,rk3399-saradc               r                        ]                             saradc apb_pclk         X             saradc-apb          
d           okay            
v         pwm@fe6e0000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             n                      Z     Y      	  pwm pclk                       default         ]         	  disabled          pwm@fe6e0010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             n                     Z     Y      	  pwm pclk                       default         ]         	  disabled          pwm@fe6e0020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             n                      Z     Y      	  pwm pclk                       default         ]         	  disabled          pwm@fe6e0030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             n 0                    Z     Y      	  pwm pclk                       default         ]         	  disabled          pwm@fe6f0000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             o                      ]     \      	  pwm pclk                       default         ]           okay          pwm@fe6f0010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             o                     ]     \      	  pwm pclk                       default         ]         	  disabled          pwm@fe6f0020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             o                      ]     \      	  pwm pclk                       default         ]         	  disabled          pwm@fe6f0030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             o 0                    ]     \      	  pwm pclk                       default         ]         	  disabled          pwm@fe700000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             p                      `     _      	  pwm pclk                       default         ]         	  disabled          pwm@fe700010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             p                     `     _      	  pwm pclk                       default         ]         	  disabled          pwm@fe700020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             p                      `     _      	  pwm pclk                       default         ]         	  disabled          pwm@fe700030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             p 0                    `     _      	  pwm pclk                       default         ]         	  disabled          phy@fe830000             ,rockchip,rk3568-naneng-combphy                                     "     }              ref apb pipe            F      "        V         X             phy         
           
           
           okay                     phy@fe840000             ,rockchip,rk3568-naneng-combphy                                     %     ~              ref apb pipe            F      %        V         X             phy         
           
           
           okay                     phy@fe870000             ,rockchip,rk3568-csi-dphy                                      y        pclk            
            X             apb                  	  disabled          mipi-dphy@fe850000           ,rockchip,rk3568-dsi-dphy                               	  ref pclk                       z        
            9      	        apb         X           	  disabled               U      mipi-dphy@fe860000           ,rockchip,rk3568-dsi-dphy                               	  ref pclk                       {        
            9      	        apb         X           	  disabled               V      usb2phy@fe8a0000             ,rockchip,rk3568-usb2phy                                            phyclk          clk_usbphy0_480m                              
           -            okay                  host-port           
            okay            
                    otg-port            
            okay            
                       usb2phy@fe8b0000             ,rockchip,rk3568-usb2phy                                            phyclk          clk_usbphy1_480m                              
           -            okay       host-port           
            okay                     otg-port            
            okay            
                       pinctrl          ,rockchip,rk3568-pinctrl                    &   ^                                                gpio@fdd60000            ,rockchip,gpio-bank                                      !                 .               
        
                       
                                  "      gpio@fe740000            ,rockchip,gpio-bank              t                        "                c     d         
        
                       
                             gpio@fe750000            ,rockchip,gpio-bank              u                        #                e     f         
        
          @            
                                        gpio@fe760000            ,rockchip,gpio-bank              v                        $                g     h         
        
          `            
                                  L      gpio@fe770000            ,rockchip,gpio-bank              w                        %                i     j         
        
                      
                             pcfg-pull-up             
                 pcfg-pull-none                            pcfg-pull-none-drv-level-1                                       pcfg-pull-none-drv-level-2                                       pcfg-pull-none-drv-level-3                                       pcfg-pull-up-drv-level-1             
                            pcfg-pull-up-drv-level-2             
                            pcfg-pull-none-smt                    !                 acodec        audiopwm          bt656         bt1120        cam       can0       can0m0-pins          6                                              can1       can1m0-pins          6                                             can2       can2m0-pins          6                                            cif       clk32k     clk32k-out0         6                                 cpu       ebc       edpdp         emmc       emmc-bus8           6                                                                                                           g      emmc-clk            6                       h      emmc-cmd            6                       i         eth0          eth1          flash         fspi       fspi-pins         `  6                                                                                   f         gmac0      gmac0-miim           6                                         gmac0-rx-bus2         0  6                                                     gmac0-tx-bus2         0  6                                                     gmac0-rgmii-clk          6                                         gmac0-rgmii-bus       @  6                                                                    gmac1      gmac1m1-miim             6                                   M      gmac1m1-rx-bus2       0  6                              	                 O      gmac1m1-tx-bus2       0  6                                               N      gmac1m1-rgmii-clk            6                                    P      gmac1m1-rgmii-bus         @  6                                                           Q         gpu       hdmitx     hdmitxm0-cec            6                       Y      hdmitx-scl          6                       W      hdmitx-sda          6                       X         i2c0       i2c0-xfer            6       	             
                           i2c1       i2c1-xfer            6                                              i2c2       i2c2m0-xfer          6                                              i2c3       i2c3m0-xfer          6                                             i2c4       i2c4m0-xfer          6                  
                          i2c5       i2c5m0-xfer          6                                            i2s1       i2s1m0-lrckrx           6                       n      i2s1m0-lrcktx           6                       m      i2s1m0-sclkrx           6                       l      i2s1m0-sclktx           6                       k      i2s1m0-sdi0         6                       o      i2s1m0-sdi1         6      
                 p      i2s1m0-sdi2         6      	                 q      i2s1m0-sdi3         6                       r      i2s1m0-sdo0         6                       s      i2s1m0-sdo1         6                       t      i2s1m0-sdo2         6      	                 u      i2s1m0-sdo3         6      
                 v         i2s2       i2s2m0-lrcktx           6                       x      i2s2m0-sclktx           6                       w      i2s2m0-sdi          6                       y      i2s2m0-sdo          6                       z         i2s3          isp       jtag          lcdc          mcu       npu       pcie20        pcie30x1          pcie30x2          pdm    pdmm0-clk           6                       {      pdmm0-clk1          6                       |      pdmm0-sdi0          6                       }      pdmm0-sdi1          6      
                 ~      pdmm0-sdi2          6      	                       pdmm0-sdi3          6                                pmic       pmic-int            6                         #         pmu       pwm0       pwm0m0-pins         6                        '         pwm1       pwm1m0-pins         6                        (         pwm2       pwm2m0-pins         6                        )         pwm3       pwm3-pins           6                        *         pwm4       pwm4-pins           6                                 pwm5       pwm5-pins           6                                 pwm6       pwm6-pins           6                                 pwm7       pwm7-pins           6                                 pwm8       pwm8m0-pins         6      	                          pwm9       pwm9m0-pins         6      
                          pwm10      pwm10m0-pins            6                                pwm11      pwm11m0-pins            6                                pwm12      pwm12m0-pins            6                                pwm13      pwm13m0-pins            6                                pwm14      pwm14m0-pins            6                                pwm15      pwm15m0-pins            6                                refclk        sata          sata0         sata1         sata2         scr       sdmmc0     sdmmc0-bus4       @  6                                                            b      sdmmc0-clk          6                       c      sdmmc0-cmd          6                       d      sdmmc0-det          6                        e         sdmmc1        sdmmc2        spdif      spdifm0-tx          6                                spi0       spi0m0-pins       0  6                                                        spi0m0-cs0          6                              spi0m0-cs1          6                                 spi1       spi1m0-pins       0  6                                                     spi1m0-cs0          6                             spi1m0-cs1          6                                spi2       spi2m0-pins       0  6                                                     spi2m0-cs0          6                             spi2m0-cs1          6                                spi3       spi3m1-pins       0  6                                                        tsadc      tsadc-shutorg           6                              tsadc-pin           6                                  uart0      uart0-xfer           6                                     &         uart1      uart1m0-xfer             6                                            uart2      uart2m0-xfer             6                                              uart3      uart3m1-xfer             6                                            uart4      uart4m0-xfer             6                                            uart5      uart5m0-xfer             6                                            uart6      uart6m0-xfer             6                                            uart7      uart7m0-xfer             6                                            uart8      uart8m0-xfer             6                                            uart9      uart9m0-xfer             6                                            vop       spi0-hs       spi1-hs       spi2-hs       spi3-hs       gmac-txd-level3       gmac-txc-level2       leds       user-status-led-pin         6                                  usb    vcc5v0-usb20-host-en            6                               vcc5v0-usb30-host-en            6                               vcc5v0-otg-vbus-en          6                                  pcie       vcc3v3-m2-pcie-en           6                               vcc3v3-mini-pcie-en         6                                    sata@fc000000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci                                                          sata pmalive rxoob                 ^                       	  sata-phy            '           9              okay          syscon@fdc70000       $   ,rockchip,rk3568-pipe-phy-grf syscon                                       qos@fe190080             ,rockchip,rk3568-qos syscon                                  >      qos@fe190100             ,rockchip,rk3568-qos syscon                                  ?      qos@fe190200             ,rockchip,rk3568-qos syscon                                  @      syscon@fdcb8000       %   ,rockchip,rk3568-pcie3-phy-grf syscon                ˀ                         phy@fe8c0000             ,rockchip,rk3568-pcie3-phy                                
                  &      '     w        refclk_m refclk_n pclk          X             phy         D           okay                     pcie@fe270000            ,rockchip,rk3568-pcie                                     3             (                                      $  aclk_mst aclk_slv aclk_dbi pclk aux          pci       <                                                            sys pmc msg legacy err                     =                     `  P                                                                                             ^           o           ~                                                               	  pcie-phy            9            0     @       @      '                             T                                                      @      @       @           dbi apb config          X              pipe          	  disabled       legacy-interrupt-controller                                                                                     pcie@fe280000            ,rockchip,rk3568-pcie                                     3             (                                      $  aclk_mst aclk_slv aclk_dbi pclk aux          pci       <                                                            sys pmc msg legacy err                     =                     `  P                                                                                             ^           o           ~                                                                	  pcie-phy            9            0            @      (                             T                                                      @             @           dbi apb config          X              pipe            okay                                    legacy-interrupt-controller                                                                                     ethernet@fe2a0000         &   ,rockchip,rk3568-gmac snps,dwmac-4.20a               *                                             macirq eth_wake_irq       @                                                    W  stmmaceth mac_clk_rx mac_clk_tx clk_mac_refout aclk_mac pclk_mac clk_mac_speed ptp_ref          X            
  stmmaceth                                                                         okay            (rgmii           1output          >                  N        d      N          F                  k                   default                                y   "                         mdio             ,snps,dwmac-mdio                              phy@0            ,ethernet-phy-ieee802.3-c22                                  stmmac-axi-config                                                                           rx-queues-config                             queue0           tx-queues-config                             queue0              can@fe570000             ,rockchip,rk3568v2-canfd             W                                        A     @      
  baud pclk           X     U     T      	  core apb            default                  	  disabled          can@fe580000             ,rockchip,rk3568v2-canfd             X                                        C     B      
  baud pclk           X     W     V      	  core apb            default                  	  disabled          can@fe590000             ,rockchip,rk3568v2-canfd             Y                                        E     D      
  baud pclk           X     Y     X      	  core apb            default                  	  disabled          phy@fe820000             ,rockchip,rk3568-naneng-combphy                                          |              ref apb pipe            F              V         X             phy         
           
           
           okay                     chosen          Userial2:1500000n8         leds          
   ,gpio-leds      user-led          	  auser_led          
  gheartbeat           }on             "              default                     hdmi-con             ,hdmi-connector          a      port       endpoint                          ]            dc-5v-regulator          ,regulator-fixed         dc_5v                              LK@         LK@                 vcc3v3-sys-regulator             ,regulator-fixed         vcc3v3_sys                             2Z         2Z        &   !           $      vcc5v0-sys-regulator             ,regulator-fixed         vcc5v0_sys                             LK@         LK@        &              !      vcc3v3-m2-pcie-regulator             ,regulator-fixed         m2_pcie_3v3                   2Z         2Z           "                          default          @        &   !                 vcc3v3-mini-pcie-regulator           ,regulator-fixed         minipcie_3v3                      2Z         2Z        I   L                          default                   &   !           `      vcc5v0-usb20-host-regulator          ,regulator-fixed         vcc5v0_usb20_host                    I   "                          default                  vcc5v0-usb30-host-regulator          ,regulator-fixed         vcc5v0_usb30_host                    I   "                          default                  vcc5v0-otg-vbus-regulator            ,regulator-fixed         vcc5v0_otg_vbus                   LK@         LK@        I   "                          default                     	interrupt-parent #address-cells #size-cells compatible model gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 serial0 serial1 serial2 serial3 serial4 serial5 serial6 serial7 serial8 serial9 spi0 spi1 spi2 spi3 ethernet0 ethernet1 mmc0 mmc1 device_type reg clocks #cooling-cells enable-method operating-points-v2 i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache cpu-supply phandle cache-level cache-unified opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend ports arm,smc-id shmem #clock-cells simple-audio-card,name simple-audio-card,format simple-audio-card,mclk-fs status sound-dai interrupts interrupt-affinity arm,no-tick-in-suspend clock-frequency clock-output-names pinctrl-0 pinctrl-names ranges clock-names phys phy-names ports-implemented power-domains dr_mode phy_type resets snps,dis_u2_susphy_quirk extcon maximum-speed interrupt-controller #interrupt-cells mbi-alias mbi-ranges msi-controller pmuio2-supply vccio1-supply vccio3-supply vccio4-supply vccio5-supply vccio6-supply vccio7-supply #reset-cells assigned-clocks assigned-clock-rates assigned-clock-parents rockchip,grf fcs,suspend-voltage-selector regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay vin-supply regulator-off-in-suspend rockchip,system-power-controller #sound-dai-cells vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply wakeup-source regulator-initial-mode regulator-on-in-suspend regulator-suspend-microvolt dmas reg-io-width reg-shift #pwm-cells #power-domain-cells pm_qos interrupt-names mali-supply iommus #iommu-cells reset-names fifo-depth max-frequency snps,axi-config snps,mixed-burst snps,mtl-rx-config snps,mtl-tx-config snps,tso phy-mode clock_in_out snps,reset-gpio snps,reset-active-low snps,reset-delays-us tx_delay rx_delay phy-handle snps,blen snps,rd_osr_lmt snps,wr_osr_lmt snps,rx-queues-to-use snps,tx-queues-to-use reg-names remote-endpoint avdd-0v9-supply avdd-1v8-supply rockchip,pmu bus-range interrupt-map-mask interrupt-map linux,pci-domain num-ib-windows num-ob-windows max-link-speed msi-map num-lanes reset-gpios vpcie3v3-supply no-sdio no-mmc bus-width cap-mmc-highspeed cap-sd-highspeed disable-wp sd-uhs-sdr104 vmmc-supply vqmmc-supply mmc-hs200-1_8v non-removable dma-names rockchip,trcm-sync-tx-only arm,pl330-periph-burst #dma-cells polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device rockchip,hw-tshut-temp pinctrl-1 #thermal-sensor-cells rockchip,hw-tshut-mode rockchip,hw-tshut-polarity #io-channel-cells vref-supply rockchip,pipe-grf rockchip,pipe-phy-grf #phy-cells rockchip,usbgrf phy-supply gpio-controller gpio-ranges #gpio-cells bias-pull-up bias-disable drive-strength input-schmitt-enable rockchip,pins rockchip,phy-grf stdout-path label linux,default-trigger default-state enable-active-high startup-delay-us 