  c   8  ߌ   (            
  T                                                                   %   ,radxa,e25 radxa,cm3i rockchip,rk3568             7Radxa E25 Carrier Board    aliases          =/pinctrl/gpio@fdd60000           C/pinctrl/gpio@fe740000           I/pinctrl/gpio@fe750000           O/pinctrl/gpio@fe760000           U/pinctrl/gpio@fe770000           [/i2c@fdd40000            `/i2c@fe5a0000            e/i2c@fe5b0000            j/i2c@fe5c0000            o/i2c@fe5d0000            t/i2c@fe5e0000            y/serial@fdd50000             /serial@fe650000             /serial@fe660000             /serial@fe670000             /serial@fe680000             /serial@fe690000             /serial@fe6a0000             /serial@fe6b0000             /serial@fe6c0000             /serial@fe6d0000             /spi@fe610000            /spi@fe620000            /spi@fe630000            /spi@fe640000            /mmc@fe310000            /mmc@fe2b0000         cpus                                 cpu@0            cpu          ,arm,cortex-a55                                                       psci                       /           <   @        N           [           h   @        z                                    
      cpu@100          cpu          ,arm,cortex-a55                                      psci                       /           <   @        N           [           h   @        z                                          cpu@200          cpu          ,arm,cortex-a55                                      psci                       /           <   @        N           [           h   @        z                                          cpu@300          cpu          ,arm,cortex-a55                                      psci                       /           <   @        N           [           h   @        z                                             l3-cache             ,cache                               1           >   @        P                    opp-table-0          ,operating-points-v2                        opp-408000000               Q            0          @      opp-600000000               #F            0      opp-816000000               0,            0               opp-1104000000              Aʹ            0      opp-1416000000              Tfr            0      opp-1608000000              _"            0      opp-1800000000              kI            0      opp-1992000000              v          0 0 0         display-subsystem            ,rockchip,display-subsystem                   	  disabled          firmware       scmi             ,arm,scmi-smc                                                      protocol@14                                                opp-table-1          ,operating-points-v2            F   opp-200000000                         P P B@      opp-300000000                         P P B@      opp-400000000               ׄ          P P B@      opp-600000000               #F            B@      opp-700000000               )'          ~ ~ B@      opp-800000000               /          B@ B@ B@         hdmi-sound           ,simple-audio-card           -HDMI            Di2s         ]         	  disabled       simple-audio-card,codec         w         simple-audio-card,cpu           w   	         pmu          ,arm,cortex-a55-pmu        0                                                     
               psci             ,arm,psci-1.0            smc       timer            ,arm,armv8-timer       0                                   
                  xin24m           ,fixed-clock         n6         xin24m                                xin32k           ,fixed-clock                    xin32k                     default                    sram@10f000       
   ,mmio-sram                                                                          sram@0           ,arm,scmi-shmem                                      sata@fc400000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci               @                                            sata pmalive rxoob                 _                       	  	sata-phy                       %              okay          sata@fc800000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci                                                           sata pmalive rxoob                 `                       	  	sata-phy                       %            	  disabled          usb@fcc00000             ,rockchip,rk3568-dwc3 snps,dwc3                      @                                                       ref_clk suspend_clk bus_clk         3otg       
  ;utmi_wide           %              D               K        okay                             	usb2-phy usb3-phy           d         usb@fd000000             ,rockchip,rk3568-dwc3 snps,dwc3                       @                                                       ref_clk suspend_clk bus_clk         3host                             	usb2-phy usb3-phy         
  ;utmi_wide           %              D               K      	  disabled          interrupt-controller@fd400000            ,arm,gic-v3                @             F                       	            k                       A            (                             usb@fd800000             ,generic-ehci                                                                                          	usb         okay          usb@fd840000             ,generic-ohci                                                                                          	usb         okay          usb@fd880000             ,generic-ehci                                                                                          	usb         okay          usb@fd8c0000             ,generic-ohci                                                                                          	usb         okay          syscon@fdc20000       )   ,rockchip,rk3568-pmugrf syscon simple-mfd                                     S   io-domains        &   ,rockchip,rk3568-pmu-io-voltage-domain           okay                                                                              	                      %            syscon@fdc50000                                 ,rockchip,rk3568-pipe-grf syscon                  syscon@fdc60000       &   ,rockchip,rk3568-grf syscon simple-mfd                                           syscon@fdc80000       $   ,rockchip,rk3568-pipe-phy-grf syscon                                        syscon@fdc90000       $   ,rockchip,rk3568-pipe-phy-grf syscon                                        syscon@fdca0000       #   ,rockchip,rk3568-usb2phy-grf syscon                                         syscon@fdca8000       #   ,rockchip,rk3568-usb2phy-grf syscon               ʀ                         clock-controller@fdd00000            ,rockchip,rk3568-pmucru                                            3                    clock-controller@fdd20000            ,rockchip,rk3568-cru                                           xin24m                      3           @                          P   G          e              |                     i2c@fdd40000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c                                      .                        -      	  i2c pclk               !        default                                   okay       regulator@1c             ,tcs,tcs4525                                vdd_cpu                            5          0                      "              regulator-state-mem          +         pmic@20          ,rockchip,rk809                            #                                  default            $         D         e        s   %           %           %           %           %           %           %           %           %   regulators     DCDC_REG1         
  vdd_logic                                                   p          q   regulator-state-mem          +         DCDC_REG2           vdd_gpu                                        p          q           G   regulator-state-mem          +         DCDC_REG3           vcc_ddr                                 regulator-state-mem                   DCDC_REG4           vdd_npu                               p          q   regulator-state-mem          +         DCDC_REG5           vcc_1v8                            w@         w@              regulator-state-mem          +         LDO_REG1            vdda0v9_image                        regulator-state-mem          +         LDO_REG2          	  vdda_0v9                                           regulator-state-mem          +         LDO_REG3            vdda0v9_pmu                                        regulator-state-mem                            LDO_REG4            vccio_acodec                      2Z         2Z              regulator-state-mem          +         LDO_REG5          	  vccio_sd             w@         2Z              regulator-state-mem          +         LDO_REG6            vcc3v3_pmu                             2Z         2Z              regulator-state-mem                   2Z         LDO_REG7          	  vcca_1v8                               w@         w@              regulator-state-mem          +         LDO_REG8            vcca1v8_pmu                            w@         w@   regulator-state-mem                   w@         LDO_REG9            vcca1v8_image            w@         w@   regulator-state-mem          +         SWITCH_REG1         vcc_3v3                                 regulator-state-mem          +         SWITCH_REG2       
  vcc3v3_sd              [   regulator-state-mem          +                  serial@fdd50000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                                        t                        ,        baudclk apb_pclk            *   &       &              '        default         /           <         	  disabled          pwm@fdd70000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                            0      	  pwm pclk               (        default         F         	  disabled          pwm@fdd70010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                           0      	  pwm pclk               )        default         F           okay                     pwm@fdd70020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                            0      	  pwm pclk               *        default         F           okay                     pwm@fdd70030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm               0                            0      	  pwm pclk               +        default         F         	  disabled          power-management@fdd90000         &   ,rockchip,rk3568-pmu syscon simple-mfd                            power-controller          !   ,rockchip,rk3568-power-controller            Q                                           power-domain@7                                           e   ,        Q          power-domain@8                                           e   -   .   /        Q          power-domain@9              	                                   e   0   1   2        Q          power-domain@10             
                             e   3   4   5   6   7   8        Q          power-domain@11                                    e   9        Q          power-domain@13                                   e   :        Q          power-domain@14                                   e   ;   <   =        Q          power-domain@15                                     e   >   ?   @   A   B   C   D   E        Q                gpu@fde60000          &   ,rockchip,rk3568-mali arm,mali-bifrost                        @       $         (          )          '           ljob mmu gpu                              gpu bus                        F        %              okay            |   G                 video-codec@fdea0400             ,rockchip,rk3568-vpu                                                 lvdpu                               
  aclk hclk              H        %            iommu@fdea0800           ,rockchip,rk3568-iommu                        @                          aclk iface                               %                             H      rga@fdeb0000          (   ,rockchip,rk3568-rga rockchip,rk3288-rga                                     Z                                      aclk hclk sclk          D     &     $     %        core axi ahb            %      
      video-codec@fdee0000             ,rockchip,rk3568-vepu                                         @                              
  aclk hclk              I        %      
      iommu@fdee0800           ,rockchip,rk3568-iommu                        @               ?                                aclk iface          %      
                       I      mmc@fe000000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc                       @                d                                           biu ciu ciu-drive ciu-sample                       р        D              reset         	  disabled          ethernet@fe010000         &   ,rockchip,rk3568-gmac snps,dwmac-4.20a                                                              lmacirq eth_wake_irq       @                                                     W  stmmaceth mac_clk_rx mac_clk_tx clk_mac_refout aclk_mac pclk_mac clk_mac_speed ptp_ref          D            
  stmmaceth           |               J                    K           L               	  disabled       mdio             ,snps,dwmac-mdio                                 stmmac-axi-config                                                       +              J      rx-queues-config            ;              K   queue0           tx-queues-config            Q              L   queue0              vop@fe040000                          0     @                gvop gamma-lut                           (                                       %  aclk hclk dclk_vp0 dclk_vp1 dclk_vp2               M        %      	        |          	  disabled             ,rockchip,rk3568-vop    ports                                           port@0                                               port@1                                              port@2                                                    iommu@fe043e00           ,rockchip,rk3568-iommu                 >            ?                                                       aclk iface                      %      	      	  disabled               M      dsi@fe060000          *   ,rockchip,rk3568-mipi-dsi snps,dw-mipi-dsi                                        D           pclk                           	dphy               N        %      	        apb         D             |          	  disabled       ports                                port@0                     port@1                          dsi@fe070000          *   ,rockchip,rk3568-mipi-dsi snps,dw-mipi-dsi                                        E           pclk                           	dphy               O        %      	        apb         D             |          	  disabled       ports                                port@0                     port@1                          hdmi@fe0a0000            ,rockchip,rk3568-dw-hdmi              
                        -         (                          (              iahb isfr cec ref           default            P   Q   R        %      	        /           |            q          	  disabled                  ports                                port@0                     port@1                          qos@fe128000             ,rockchip,rk3568-qos syscon                                   ,      qos@fe138080             ,rockchip,rk3568-qos syscon                                  ;      qos@fe138100             ,rockchip,rk3568-qos syscon                                   <      qos@fe138180             ,rockchip,rk3568-qos syscon                                  =      qos@fe148000             ,rockchip,rk3568-qos syscon                                   -      qos@fe148080             ,rockchip,rk3568-qos syscon                                  .      qos@fe148100             ,rockchip,rk3568-qos syscon                                   /      qos@fe150000             ,rockchip,rk3568-qos syscon                                    9      qos@fe158000             ,rockchip,rk3568-qos syscon                                   3      qos@fe158100             ,rockchip,rk3568-qos syscon                                   4      qos@fe158180             ,rockchip,rk3568-qos syscon                                  5      qos@fe158200             ,rockchip,rk3568-qos syscon                                   6      qos@fe158280             ,rockchip,rk3568-qos syscon                                  7      qos@fe158300             ,rockchip,rk3568-qos syscon                                   8      qos@fe180000             ,rockchip,rk3568-qos syscon                               qos@fe190000             ,rockchip,rk3568-qos syscon                                    >      qos@fe190280             ,rockchip,rk3568-qos syscon                                  B      qos@fe190300             ,rockchip,rk3568-qos syscon                                   C      qos@fe190380             ,rockchip,rk3568-qos syscon                                  D      qos@fe190400             ,rockchip,rk3568-qos syscon                                   E      qos@fe198000             ,rockchip,rk3568-qos syscon                                   :      qos@fe1a8000             ,rockchip,rk3568-qos syscon                                   0      qos@fe1a8080             ,rockchip,rk3568-qos syscon                                  1      qos@fe1a8100             ,rockchip,rk3568-qos syscon                                   2      dfi@fe230000             ,rockchip,rk3568-dfi              #                                      S      pcie@fe260000            ,rockchip,rk3568-pcie          0              @      &                               gdbi apb config        <         K          J          I          H          G           lsys pmc msg legacy err                       (                                       $  aclk_mst aclk_slv aclk_dbi pclk aux          pci                                         `                    T                      T                     T                     T                                                                                                      	  	pcie-phy            %            T                                                      @              @           D              pipe                                     okay            default            U        
   V   
               W   legacy-interrupt-controller                                  k                            H              T         mmc@fe2b0000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc              +        @                b                                           biu ciu ciu-drive ciu-sample                       р        D              reset           okay            &            0        A   #               J        default            X   Y   Z         U        c   [        o         mmc@fe2c0000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc              ,        @                c                                           biu ciu ciu-drive ciu-sample                       р        D              reset         	  disabled          spi@fe300000             ,rockchip,sfc                 0        @                e                  x      v        clk_sfc hclk_sfc               \        default       	  disabled          mmc@fe310000             ,rockchip,rk3568-dwcmshc              1                                   @      {      }        P n6       (         |      z      y      {      }        core bus axi block timer            okay            &                     |        default            ]   ^   _   `        c           o         rng@fe388000             ,rockchip,rk3568-rng              8       @                p      o      	  core ahb            D      m        okay          i2s@fe400000             ,rockchip,rk3568-i2s-tdm              @                        4           @      =      A        PFq Fq                ?      C      9        mclk_tx mclk_rx hclk            *   a            tx          D      P      Q      
  tx-m rx-m           |            q          	  disabled               	      i2s@fe410000             ,rockchip,rk3568-i2s-tdm              A                        5           @      E      I        PFq Fq                G      K      :        mclk_tx mclk_rx hclk            *   a      a           rx tx           D      R      S      
  tx-m rx-m           |            default       0     b   c   d   e   f   g   h   i   j   k   l   m        q          	  disabled          i2s@fe420000             ,rockchip,rk3568-i2s-tdm              B                        6           @      M        PFq                O      O      ;        mclk_tx mclk_rx hclk            *   a      a           tx rx           D      T        tx-m            |            default            n   o   p   q        q          	  disabled          i2s@fe430000             ,rockchip,rk3568-i2s-tdm              C                        7                  S      W      <        mclk_tx mclk_rx hclk            *   a      a           tx rx           D      U      V      
  tx-m rx-m           |            q          	  disabled          pdm@fe440000             ,rockchip,rk3568-pdm              D                        L                  Z      Y        pdm_clk pdm_hclk            *   a   	        rx             r   s   t   u   v   w        default         D      X        pdm-m           q          	  disabled          spdif@fe460000           ,rockchip,rk3568-spdif                F                        f         
  mclk hclk                  _      \        *   a           tx          default            x        q          	  disabled          dma-controller@fe530000          ,arm,pl330 arm,primecell              S        @                                                          	  apb_pclk                          &      dma-controller@fe550000          ,arm,pl330 arm,primecell              U        @                                                          	  apb_pclk                          a      i2c@fe5a0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              Z                        /                 H     G      	  i2c pclk               y        default                                 	  disabled          i2c@fe5b0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              [                        0                 J     I      	  i2c pclk               z        default                                 	  disabled          i2c@fe5c0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              \                        1                 L     K      	  i2c pclk               {        default                                 	  disabled          i2c@fe5d0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              ]                        2                 N     M      	  i2c pclk               |        default                                 	  disabled          i2c@fe5e0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              ^                        3                 P     O      	  i2c pclk               }        default                                 	  disabled          watchdog@fe600000             ,rockchip,rk3568-wdt snps,dw-wdt              `                                                    
  tclk pclk         spi@fe610000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi              a                        g                 R     Q        spiclk apb_pclk         *   &      &           tx rx           default            ~                                      	  disabled          spi@fe620000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi              b                        h                 T     S        spiclk apb_pclk         *   &      &           tx rx           default                                                  	  disabled          spi@fe630000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi              c                        i                 V     U        spiclk apb_pclk         *   &      &           tx rx           default                                                  	  disabled          spi@fe640000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi              d                        j                 X     W        spiclk apb_pclk         *   &      &           tx rx           default                                                  	  disabled          serial@fe650000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                e                        u                              baudclk apb_pclk            *   &      &                      default         /           <         	  disabled          serial@fe660000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                f                        v                 #              baudclk apb_pclk            *   &      &                      default         /           <           okay          serial@fe670000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                g                        w                 '     $        baudclk apb_pclk            *   &      &                      default         /           <         	  disabled          serial@fe680000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                h                        x                 +     (        baudclk apb_pclk            *   &      &   	                   default         /           <         	  disabled          serial@fe690000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                i                        y                 /     ,        baudclk apb_pclk            *   &   
   &                      default         /           <         	  disabled          serial@fe6a0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                j                        z                 3     0        baudclk apb_pclk            *   &      &                      default         /           <         	  disabled          serial@fe6b0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                k                        {                 7     4        baudclk apb_pclk            *   &      &                      default         /           <         	  disabled          serial@fe6c0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                l                        |                 ;     8        baudclk apb_pclk            *   &      &                      default         /           <         	  disabled          serial@fe6d0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                m                        }                 ?     <        baudclk apb_pclk            *   &      &                      default         /           <         	  disabled          thermal-zones      cpu-thermal            d                            trips      cpu_alert0           p                   passive                  cpu_alert1           $                   passive       cpu_crit             s                	   critical             cooling-maps       map0            	         0  	   
                     gpu-thermal                                       trips      gpu-threshold            p                   passive       gpu-target           $                   passive                  gpu-crit             s                	   critical             cooling-maps       map0            	           	                  tsadc@fe710000           ,rockchip,rk3568-tsadc                q                        s           @                  Pf@ 
`                           tsadc apb_pclk          D                       |            	 s        default sleep                      	,           	6           okay            	L           	c                     saradc@fe720000       .   ,rockchip,rk3568-saradc rockchip,rk3399-saradc                r                        ]                              saradc apb_pclk         D             saradc-apb          	~           okay            	         pwm@fe6e0000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              n                       Z     Y      	  pwm pclk                       default         F         	  disabled          pwm@fe6e0010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              n                      Z     Y      	  pwm pclk                       default         F         	  disabled          pwm@fe6e0020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              n                       Z     Y      	  pwm pclk                       default         F         	  disabled          pwm@fe6e0030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              n 0                     Z     Y      	  pwm pclk                       default         F         	  disabled          pwm@fe6f0000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              o                       ]     \      	  pwm pclk                       default         F         	  disabled          pwm@fe6f0010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              o                      ]     \      	  pwm pclk                       default         F         	  disabled          pwm@fe6f0020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              o                       ]     \      	  pwm pclk                       default         F         	  disabled          pwm@fe6f0030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              o 0                     ]     \      	  pwm pclk                       default         F         	  disabled          pwm@fe700000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              p                       `     _      	  pwm pclk                       default         F           okay                     pwm@fe700010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              p                      `     _      	  pwm pclk                       default         F         	  disabled          pwm@fe700020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              p                       `     _      	  pwm pclk                       default         F         	  disabled          pwm@fe700030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              p 0                     `     _      	  pwm pclk                       default         F         	  disabled          phy@fe830000             ,rockchip,rk3568-naneng-combphy                                       "     }              ref apb pipe            @      "        P         D             phy         	           	           	           okay            	                    phy@fe840000             ,rockchip,rk3568-naneng-combphy                                       %     ~              ref apb pipe            @      %        P         D             phy         	           	           	           okay                     phy@fe870000             ,rockchip,rk3568-csi-dphy                                        y        pclk            	            D             apb         |          	  disabled          mipi-dphy@fe850000           ,rockchip,rk3568-dsi-dphy                                	  ref pclk                        z        	            %      	        apb         D           	  disabled               N      mipi-dphy@fe860000           ,rockchip,rk3568-dsi-dphy                                	  ref pclk                        {        	            %      	        apb         D           	  disabled               O      usb2phy@fe8a0000             ,rockchip,rk3568-usb2phy                                              phyclk          clk_usbphy0_480m                              	                        okay                  host-port           	          	  disabled                     otg-port            	            okay            	                       usb2phy@fe8b0000             ,rockchip,rk3568-usb2phy                                              phyclk          clk_usbphy1_480m                              	                        okay       host-port           	            okay            	                    otg-port            	            okay            	                       pinctrl          ,rockchip,rk3568-pinctrl         |               S                                                gpio@fdd60000            ,rockchip,gpio-bank                                       !                  .               	        	                       
            k                      #      gpio@fe740000            ,rockchip,gpio-bank               t                        "                 c     d         	        	                       
            k                      V      gpio@fe750000            ,rockchip,gpio-bank               u                        #                 e     f         	        	          @            
            k                            gpio@fe760000            ,rockchip,gpio-bank               v                        $                 g     h         	        	          `            
            k                            gpio@fe770000            ,rockchip,gpio-bank               w                        %                 i     j         	        	                      
            k                 pcfg-pull-up             
                 pcfg-pull-none           
                 pcfg-pull-none-drv-level-1           
        
,                    pcfg-pull-none-drv-level-2           
        
,                    pcfg-pull-none-drv-level-3           
        
,                    pcfg-pull-up-drv-level-1             
        
,                    pcfg-pull-up-drv-level-2             
        
,                    pcfg-pull-none-smt           
         
;                 acodec        audiopwm          bt656         bt1120        cam       can0       can0m0-pins          
P                                              can1       can1m0-pins          
P                                             can2       can2m0-pins          
P                                            cif       clk32k     clk32k-out0         
P                                 cpu       ebc       edpdp         emmc       emmc-bus8           
P                                                                                                           ]      emmc-clk            
P                       ^      emmc-cmd            
P                       _      emmc-datastrobe         
P                       `         eth0          eth1          flash         fspi       fspi-pins         `  
P                                                                                   \         gmac0         gmac1         gpu       hdmitx     hdmitxm0-cec            
P                       R      hdmitx-scl          
P                       P      hdmitx-sda          
P                       Q         i2c0       i2c0-xfer            
P       	             
                 !         i2c1       i2c1-xfer            
P                                     y         i2c2       i2c2m0-xfer          
P                                     z         i2c3       i2c3m0-xfer          
P                                    {         i2c4       i2c4m0-xfer          
P                  
                 |         i2c5       i2c5m0-xfer          
P                                   }         i2s1       i2s1m0-lrckrx           
P                       e      i2s1m0-lrcktx           
P                       d      i2s1m0-sclkrx           
P                       c      i2s1m0-sclktx           
P                       b      i2s1m0-sdi0         
P                       f      i2s1m0-sdi1         
P      
                 g      i2s1m0-sdi2         
P      	                 h      i2s1m0-sdi3         
P                       i      i2s1m0-sdo0         
P                       j      i2s1m0-sdo1         
P                       k      i2s1m0-sdo2         
P      	                 l      i2s1m0-sdo3         
P      
                 m         i2s2       i2s2m0-lrcktx           
P                       o      i2s2m0-sclktx           
P                       n      i2s2m0-sdi          
P                       p      i2s2m0-sdo          
P                       q         i2s3          isp       jtag          lcdc          mcu       npu       pcie20        pcie30x1       pcie30x1m0-pins       0  
P                                                           pcie30x2          pdm    pdmm0-clk           
P                       r      pdmm0-clk1          
P                       s      pdmm0-sdi0          
P                       t      pdmm0-sdi1          
P      
                 u      pdmm0-sdi2          
P      	                 v      pdmm0-sdi3          
P                       w         pmic       pmic_int            
P                         $         pmu       pwm0       pwm0m0-pins         
P                        (         pwm1       pwm1m0-pins         
P                        )         pwm2       pwm2m0-pins         
P                        *         pwm3       pwm3-pins           
P                        +         pwm4       pwm4-pins           
P                                 pwm5       pwm5-pins           
P                                 pwm6       pwm6-pins           
P                                 pwm7       pwm7-pins           
P                                 pwm8       pwm8m0-pins         
P      	                          pwm9       pwm9m0-pins         
P      
                          pwm10      pwm10m0-pins            
P                                pwm11      pwm11m0-pins            
P                                pwm12      pwm12m1-pins            
P                                pwm13      pwm13m0-pins            
P                                pwm14      pwm14m0-pins            
P                                pwm15      pwm15m0-pins            
P                                refclk        sata          sata0         sata1         sata2         scr       sdmmc0     sdmmc0-bus4       @  
P                                                            X      sdmmc0-clk          
P                       Y      sdmmc0-cmd          
P                       Z         sdmmc1        sdmmc2        spdif      spdifm0-tx          
P                       x         spi0       spi0m0-pins       0  
P                                                        spi0m0-cs0          
P                        ~      spi0m0-cs1          
P                                 spi1       spi1m0-pins       0  
P                                                     spi1m0-cs0          
P                             spi1m0-cs1          
P                                spi2       spi2m0-pins       0  
P                                                     spi2m0-cs0          
P                             spi2m0-cs1          
P                                spi3       spi3m0-pins       0  
P                              
                       spi3m0-cs0          
P                             spi3m0-cs1          
P                                tsadc      tsadc-shutorg           
P                              tsadc-pin           
P                                  uart0      uart0-xfer           
P                                     '         uart1      uart1m0-xfer             
P                                            uart2      uart2m0-xfer             
P                                              uart3      uart3m0-xfer             
P                                             uart4      uart4m0-xfer             
P                                            uart5      uart5m0-xfer             
P                                            uart6      uart6m0-xfer             
P                                            uart7      uart7m0-xfer             
P                                            uart8      uart8m0-xfer             
P                                            uart9      uart9m0-xfer             
P                                            vop       spi0-hs       spi1-hs       spi2-hs       spi3-hs       gmac-txd-level3       gmac-txc-level2       leds       led_user_en         
P                                  pcie       pcie20-reset-h          
P      
                  U      pcie30x1-enable-h           
P                               pcie30x2-reset-h            
P                              pcie-enable-h           
P                                  usb    minipcie-enable-h           
P                              ngffpcie-enable-h           
P                               vbus_typec_en           
P                                     sata@fc000000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci                                                            sata pmalive rxoob                 ^                       	  	sata-phy                       %            	  disabled          syscon@fdc70000       $   ,rockchip,rk3568-pipe-phy-grf syscon                                        qos@fe190080             ,rockchip,rk3568-qos syscon                                   ?      qos@fe190100             ,rockchip,rk3568-qos syscon                                   @      qos@fe190200             ,rockchip,rk3568-qos syscon                                   A      syscon@fdcb8000       %   ,rockchip,rk3568-pcie3-phy-grf syscon                 ˀ                         phy@fe8c0000             ,rockchip,rk3568-pcie3-phy                                 	                   &      '     w        refclk_m refclk_n pclk          D             phy         
^           okay            
o                       pcie@fe270000            ,rockchip,rk3568-pcie                                                  (                                       $  aclk_mst aclk_slv aclk_dbi pclk aux          pci       <                                                            lsys pmc msg legacy err                                          `                                                                                                                                                                                     	  	pcie-phy            %            0      @       @      '                             T                                                      @      @       @           gdbi apb config          D              pipe            okay            default                    
   #                     legacy-interrupt-controller          k                                                                           pcie@fe280000            ,rockchip,rk3568-pcie                                                  (                                       $  aclk_mst aclk_slv aclk_dbi pclk aux          pci       <                                                            lsys pmc msg legacy err                                          `                                                                                                                                                                                      	  	pcie-phy            %            0             @      (                             T                                                      @             @           gdbi apb config          D              pipe            okay            default                    
                     W   legacy-interrupt-controller          k                                                                           ethernet@fe2a0000         &   ,rockchip,rk3568-gmac snps,dwmac-4.20a                *                                             lmacirq eth_wake_irq       @                                                     W  stmmaceth mac_clk_rx mac_clk_tx clk_mac_refout aclk_mac pclk_mac clk_mac_speed ptp_ref          D            
  stmmaceth           |                                                             	  disabled       mdio             ,snps,dwmac-mdio                                 stmmac-axi-config                                                       +                    rx-queues-config            ;                 queue0           tx-queues-config            Q                 queue0              can@fe570000             ,rockchip,rk3568v2-canfd              W                                         A     @      
  baud pclk           D     U     T      	  core apb            default                  	  disabled          can@fe580000             ,rockchip,rk3568v2-canfd              X                                         C     B      
  baud pclk           D     W     V      	  core apb            default                  	  disabled          can@fe590000             ,rockchip,rk3568v2-canfd              Y                                         E     D      
  baud pclk           D     Y     X      	  core apb            default                  	  disabled          phy@fe820000             ,rockchip,rk3568-naneng-combphy                                            |              ref apb pipe            @              P         D             phy         	           	           	           okay                     chosen          
zserial2:115200n8          gpio-leds         
   ,gpio-leds      led-0              #             
  
heartbeat           
         
  
heartbeat           default                     pcie30-avdd0v9-regulator             ,regulator-fixed         pcie30_avdd0v9                                                  %      pcie30-avdd1v8-regulator             ,regulator-fixed         pcie30_avdd1v8                             w@         w@            %      vcc3v3-sys-regulator             ,regulator-fixed         vcc3v3_sys                             2Z         2Z            "           %      vcc5v0-sys-regulator             ,regulator-fixed         vcc5v0_sys                             LK@         LK@            "                 vcc5v-input-regulator            ,regulator-fixed         vcc5v_input                            LK@         LK@           "      pwm-leds             ,pwm-leds-multicolor    multi-led           
   	        
      led-red         
           
        B@          led-green           
           
        B@          led-blue            
           
        B@                vbus-typec-regulator             ,regulator-fixed          
        
   #               default                    vbus_typec           LK@         LK@                             vcc3v3-minipcie-regulator            ,regulator-fixed          
        
                  default                    vcc3v3_minipcie          2Z         2Z            W                 vcc3v3-ngff-regulator            ,regulator-fixed          
        
   #               default                    vcc3v3_ngff          2Z         2Z                             vcc3v3-pcie30x1-regulator            ,regulator-fixed          
        
   #               default                    vcc3v3_pcie30x1          2Z         2Z                             vcc3v3-pi6c-05-regulator             ,regulator-fixed          
           #               default                    vcc3v3_pcie          2Z         2Z                       W         	interrupt-parent #address-cells #size-cells compatible model gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 serial0 serial1 serial2 serial3 serial4 serial5 serial6 serial7 serial8 serial9 spi0 spi1 spi2 spi3 mmc0 mmc1 device_type reg clocks #cooling-cells enable-method operating-points-v2 i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache cpu-supply phandle cache-level cache-unified opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend ports status arm,smc-id shmem #clock-cells simple-audio-card,name simple-audio-card,format simple-audio-card,mclk-fs sound-dai interrupts interrupt-affinity arm,no-tick-in-suspend clock-frequency clock-output-names pinctrl-0 pinctrl-names ranges clock-names phys phy-names ports-implemented power-domains dr_mode phy_type resets snps,dis_u2_susphy_quirk extcon interrupt-controller #interrupt-cells mbi-alias mbi-ranges msi-controller pmuio1-supply pmuio2-supply vccio1-supply vccio2-supply vccio3-supply vccio4-supply vccio5-supply vccio6-supply vccio7-supply #reset-cells assigned-clocks assigned-clock-rates assigned-clock-parents rockchip,grf fcs,suspend-voltage-selector regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay vin-supply regulator-off-in-suspend rockchip,system-power-controller wakeup-source vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply regulator-initial-mode regulator-on-in-suspend regulator-suspend-microvolt dmas reg-io-width reg-shift #pwm-cells #power-domain-cells pm_qos interrupt-names mali-supply iommus #iommu-cells reset-names fifo-depth max-frequency snps,axi-config snps,mixed-burst snps,mtl-rx-config snps,mtl-tx-config snps,tso snps,blen snps,rd_osr_lmt snps,wr_osr_lmt snps,rx-queues-to-use snps,tx-queues-to-use reg-names #sound-dai-cells rockchip,pmu bus-range interrupt-map-mask interrupt-map linux,pci-domain num-ib-windows num-ob-windows max-link-speed msi-map num-lanes reset-gpios vpcie3v3-supply bus-width cap-sd-highspeed cd-gpios disable-wp sd-uhs-sdr104 vmmc-supply vqmmc-supply non-removable dma-names arm,pl330-periph-burst #dma-cells polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device rockchip,hw-tshut-temp pinctrl-1 #thermal-sensor-cells rockchip,hw-tshut-mode rockchip,hw-tshut-polarity #io-channel-cells vref-supply rockchip,pipe-grf rockchip,pipe-phy-grf #phy-cells phy-supply rockchip,usbgrf gpio-controller gpio-ranges #gpio-cells bias-pull-up bias-disable drive-strength input-schmitt-enable rockchip,pins rockchip,phy-grf data-lanes stdout-path function color linux,default-trigger max-brightness pwms enable-active-high gpio 