     8  \   (            1  $                                                                   &   ,firefly,rk3568-roc-pc rockchip,rk3568            7Firefly Station P2     aliases          =/pinctrl/gpio@fdd60000           C/pinctrl/gpio@fe740000           I/pinctrl/gpio@fe750000           O/pinctrl/gpio@fe760000           U/pinctrl/gpio@fe770000           [/i2c@fdd40000            `/i2c@fe5a0000            e/i2c@fe5b0000            j/i2c@fe5c0000            o/i2c@fe5d0000            t/i2c@fe5e0000            y/serial@fdd50000             /serial@fe650000             /serial@fe660000             /serial@fe670000             /serial@fe680000             /serial@fe690000             /serial@fe6a0000             /serial@fe6b0000             /serial@fe6c0000             /serial@fe6d0000             /spi@fe610000            /spi@fe620000            /spi@fe630000            /spi@fe640000            /ethernet@fe2a0000           /ethernet@fe010000           /mmc@fe2b0000            /mmc@fe310000         cpus                                 cpu@0            cpu          ,arm,cortex-a55                                                    !psci            /           C           P   @        b           o           |   @                                 	      cpu@100          cpu          ,arm,cortex-a55                                    !psci            /           C           P   @        b           o           |   @                                 
      cpu@200          cpu          ,arm,cortex-a55                                    !psci            /           C           P   @        b           o           |   @                                       cpu@300          cpu          ,arm,cortex-a55                                    !psci            /           C           P   @        b           o           |   @                                          l3-cache             ,cache                               E           R   @        d                    opp-table-0          ,operating-points-v2                        opp-408000000               Q            0          @      opp-600000000               #F            0      opp-816000000               0,            0               opp-1104000000              Aʹ            0      opp-1416000000              Tfr            0      opp-1608000000              _"            0      opp-1800000000              kI            0      opp-1992000000              v          0 0 0         display-subsystem            ,rockchip,display-subsystem                   firmware       scmi             ,arm,scmi-smc                                                      protocol@14                    "                          opp-table-1          ,operating-points-v2            C   opp-200000000                         P P B@      opp-300000000                         P P B@      opp-400000000               ׄ          P P B@      opp-600000000               #F            B@      opp-700000000               )'          ~ ~ B@      opp-800000000               /          B@ B@ B@         hdmi-sound           ,simple-audio-card           /HDMI            Fi2s         _           yokay       simple-audio-card,codec                  simple-audio-card,cpu                       pmu          ,arm,cortex-a55-pmu        0                                                     	   
            psci             ,arm,psci-1.0            (smc       timer            ,arm,armv8-timer       0                                   
                  xin24m           ,fixed-clock         n6         xin24m          "                     xin32k           ,fixed-clock                    xin32k                     default         "          sram@10f000       
   ,mmio-sram                                                                         sram@0           ,arm,scmi-shmem                                     sata@fc400000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci              @                                           sata pmalive rxoob                 _                       	  sata-phy                       .            	  ydisabled          sata@fc800000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci                                                         sata pmalive rxoob                 `                       	  sata-phy                       .              yokay          usb@fcc00000             ,rockchip,rk3568-dwc3 snps,dwc3                     @                                                      ref_clk suspend_clk bus_clk         <otg       
  Dutmi_wide           .              M               T        yokay                             usb2-phy usb3-phy         usb@fd000000             ,rockchip,rk3568-dwc3 snps,dwc3                      @                                                      ref_clk suspend_clk bus_clk         <host                             usb2-phy usb3-phy         
  Dutmi_wide           .              M               T        yokay          interrupt-controller@fd400000            ,arm,gic-v3               @             F                       	            m                       A            (                             usb@fd800000             ,generic-ehci                                                                                        usb         yokay          usb@fd840000             ,generic-ohci                                                                                        usb         yokay          usb@fd880000             ,generic-ehci                                                                                        usb         yokay          usb@fd8c0000             ,generic-ohci                                                                                        usb         yokay          syscon@fdc20000       )   ,rockchip,rk3568-pmugrf syscon simple-mfd                                    ^   io-domains        &   ,rockchip,rk3568-pmu-io-voltage-domain           yokay                                                                                                    '            syscon@fdc50000                                ,rockchip,rk3568-pipe-grf syscon                  syscon@fdc60000       &   ,rockchip,rk3568-grf syscon simple-mfd                                         syscon@fdc80000       $   ,rockchip,rk3568-pipe-phy-grf syscon                                       syscon@fdc90000       $   ,rockchip,rk3568-pipe-phy-grf syscon                                       syscon@fdca0000       #   ,rockchip,rk3568-usb2phy-grf syscon                                        syscon@fdca8000       #   ,rockchip,rk3568-usb2phy-grf syscon              ʀ                         clock-controller@fdd00000            ,rockchip,rk3568-pmucru                               "           5                    clock-controller@fdd20000            ,rockchip,rk3568-cru                                         xin24m          "           5           B                          R   G          g              ~                    i2c@fdd40000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c                                     .                       -      	  i2c pclk                       default                                   yokay       pmic@20          ,rockchip,rk809                                                  "           default            !                    "           "           "           "           "           "           "            "           "            regulators     DCDC_REG1         
  &vdd_logic            5         I        [           r           p          q   regulator-state-mem                   DCDC_REG2           &vdd_gpu         [           r           p          q           D   regulator-state-mem                   DCDC_REG3           &vcc_ddr          5         I        [      regulator-state-mem                   DCDC_REG4           &vdd_npu         [           r           p          q   regulator-state-mem                   DCDC_REG5           &vcc_1v8          5         I        r w@         w@              regulator-state-mem                   LDO_REG1            &vdda0v9_image           r                     Z   regulator-state-mem                   LDO_REG2          	  &vdda_0v9             5         I        r             regulator-state-mem                   LDO_REG3            &vdda0v9_pmu          5         I        r             regulator-state-mem                            LDO_REG4            &vccio_acodec            r 2Z         2Z              regulator-state-mem                   LDO_REG5          	  &vccio_sd            r w@         2Z              regulator-state-mem                   LDO_REG6            &vcc3v3_pmu           5         I        r 2Z         2Z              regulator-state-mem                   2Z         LDO_REG7          	  &vcca_1v8             5         I        r w@         w@              regulator-state-mem                   LDO_REG8            &vcca1v8_pmu          5         I        r w@         w@   regulator-state-mem                   w@         LDO_REG9            &vcca1v8_image           r w@         w@           [   regulator-state-mem                   SWITCH_REG1         &vcc_3v3          5         I              regulator-state-mem                   SWITCH_REG2       
  &vcc3v3_sd            5         I           d   regulator-state-mem                            serial@fdd50000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                                       t                       ,        baudclk apb_pclk               #       #              $        default         	                    	  ydisabled          pwm@fdd70000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                          0      	  pwm pclk               %        default                   	  ydisabled          pwm@fdd70010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                         0      	  pwm pclk               &        default                   	  ydisabled          pwm@fdd70020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                          0      	  pwm pclk               '        default                   	  ydisabled          pwm@fdd70030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              0                           0      	  pwm pclk               (        default                   	  ydisabled          power-management@fdd90000         &   ,rockchip,rk3568-pmu syscon simple-mfd                           power-controller          !   ,rockchip,rk3568-power-controller            +                                           power-domain@7                                         ?   )        +          power-domain@8                                         ?   *   +   ,        +          power-domain@9             	                                  ?   -   .   /        +          power-domain@10            
                            ?   0   1   2   3   4   5        +          power-domain@11                                  ?   6        +          power-domain@13                                 ?   7        +          power-domain@14                                 ?   8   9   :        +          power-domain@15                                   ?   ;   <   =   >   ?   @   A   B        +                gpu@fde60000          &   ,rockchip,rk3568-mali arm,mali-bifrost                       @       $         (          )          '           Fjob mmu gpu                             gpu bus                    /   C        .              yokay            V   D                 video-codec@fdea0400             ,rockchip,rk3568-vpu                                                Fvdpu                              
  aclk hclk           b   E        .            iommu@fdea0800           ,rockchip,rk3568-iommu                       @                          aclk iface                              .              i               E      rga@fdeb0000          (   ,rockchip,rk3568-rga rockchip,rk3288-rga                                    Z                                     aclk hclk sclk          M     &     $     %        vcore axi ahb            .      
      video-codec@fdee0000             ,rockchip,rk3568-vepu                                        @                             
  aclk hclk           b   F        .      
      iommu@fdee0800           ,rockchip,rk3568-iommu                       @               ?                               aclk iface          .      
        i               F      mmc@fe000000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc                      @                d                                          biu ciu ciu-drive ciu-sample                       р        M              vreset         	  ydisabled          ethernet@fe010000         &   ,rockchip,rk3568-gmac snps,dwmac-4.20a                                                             Fmacirq eth_wake_irq       @                                                    W  stmmaceth mac_clk_rx mac_clk_tx clk_mac_refout aclk_mac pclk_mac clk_mac_speed ptp_ref          M            
  vstmmaceth           ~              G                    H           I                 yokay            B                  g        J        input           default            K   L   M   N   O   P           Q        rgmii              R                       2      N          G   O        P   &   mdio             ,snps,dwmac-mdio                              phy@0            ,ethernet-phy-ieee802.3-c22                         Q         stmmac-axi-config           Y                                 c           s              G      rx-queues-config                          H   queue0           tx-queues-config                          I   queue0              vop@fe040000                         0     @                vop gamma-lut                           (                                      %  aclk hclk dclk_vp0 dclk_vp1 dclk_vp2            b   S        .      	        ~           yokay             ,rockchip,rk3568-vop         B                    g               ports                                           port@0                                           endpoint@2                        T           \         port@1                                             port@2                                                   iommu@fe043e00           ,rockchip,rk3568-iommu                >            ?                                                      aclk iface          i            .      	        yokay               S      dsi@fe060000          *   ,rockchip,rk3568-mipi-dsi snps,dw-mipi-dsi                                       D           pclk                          dphy               U        .      	        vapb         M             ~         	  ydisabled       ports                                port@0                    port@1                         dsi@fe070000          *   ,rockchip,rk3568-mipi-dsi snps,dw-mipi-dsi                                       E           pclk                          dphy               V        .      	        vapb         M             ~         	  ydisabled       ports                                port@0                    port@1                         hdmi@fe0a0000            ,rockchip,rk3568-dw-hdmi             
                        -         (                         (              iahb isfr cec ref           default            W   X   Y        .      	        	           ~                       yokay               Z           [              ports                                port@0                 endpoint               \           T         port@1                endpoint               ]                          qos@fe128000             ,rockchip,rk3568-qos syscon                                  )      qos@fe138080             ,rockchip,rk3568-qos syscon                                 8      qos@fe138100             ,rockchip,rk3568-qos syscon                                  9      qos@fe138180             ,rockchip,rk3568-qos syscon                                 :      qos@fe148000             ,rockchip,rk3568-qos syscon                                  *      qos@fe148080             ,rockchip,rk3568-qos syscon                                 +      qos@fe148100             ,rockchip,rk3568-qos syscon                                  ,      qos@fe150000             ,rockchip,rk3568-qos syscon                                   6      qos@fe158000             ,rockchip,rk3568-qos syscon                                  0      qos@fe158100             ,rockchip,rk3568-qos syscon                                  1      qos@fe158180             ,rockchip,rk3568-qos syscon                                 2      qos@fe158200             ,rockchip,rk3568-qos syscon                                  3      qos@fe158280             ,rockchip,rk3568-qos syscon                                 4      qos@fe158300             ,rockchip,rk3568-qos syscon                                  5      qos@fe180000             ,rockchip,rk3568-qos syscon                              qos@fe190000             ,rockchip,rk3568-qos syscon                                   ;      qos@fe190280             ,rockchip,rk3568-qos syscon                                 ?      qos@fe190300             ,rockchip,rk3568-qos syscon                                  @      qos@fe190380             ,rockchip,rk3568-qos syscon                                 A      qos@fe190400             ,rockchip,rk3568-qos syscon                                  B      qos@fe198000             ,rockchip,rk3568-qos syscon                                  7      qos@fe1a8000             ,rockchip,rk3568-qos syscon                                  -      qos@fe1a8080             ,rockchip,rk3568-qos syscon                                 .      qos@fe1a8100             ,rockchip,rk3568-qos syscon                                  /      dfi@fe230000             ,rockchip,rk3568-dfi             #                                      ^      pcie@fe260000            ,rockchip,rk3568-pcie          0             @      &                               dbi apb config        <         K          J          I          H          G           Fsys pmc msg legacy err                       (                                      $  aclk_mst aclk_slv aclk_dbi pclk aux          pci                                         `  $                  _                      _                     _                     _           2            C           R           a           p                      x                       	  pcie-phy            .            T                                                      @              @           M              vpipe                                   	  ydisabled       legacy-interrupt-controller                                  m                            H              _         mmc@fe2b0000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc             +        @                b                                          biu ciu ciu-drive ciu-sample                       р        M              vreset           yokay                                                           default            `   a   b   c                    d                 mmc@fe2c0000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc             ,        @                c                                          biu ciu ciu-drive ciu-sample                       р        M              vreset         	  ydisabled          spi@fe300000             ,rockchip,sfc                0        @                e                 x      v        clk_sfc hclk_sfc               e        default       	  ydisabled          mmc@fe310000             ,rockchip,rk3568-dwcmshc             1                                   B      {      }        R n6       (        |      z      y      {      }        core bus axi block timer            yokay                                         default            f   g   h   i      rng@fe388000             ,rockchip,rk3568-rng             8       @               p      o      	  core ahb            M      m        yokay          i2s@fe400000             ,rockchip,rk3568-i2s-tdm             @                        4           B      =      A        RFq Fq               ?      C      9        mclk_tx mclk_rx hclk               j            tx          M      P      Q      
  vtx-m rx-m           ~                       yokay                     i2s@fe410000             ,rockchip,rk3568-i2s-tdm             A                        5           B      E      I        RFq Fq               G      K      :        mclk_tx mclk_rx hclk               j      j           rx tx           M      R      S      
  vtx-m rx-m           ~           default       0     k   l   m   n   o   p   q   r   s   t   u   v                  	  ydisabled          i2s@fe420000             ,rockchip,rk3568-i2s-tdm             B                        6           B      M        RFq               O      O      ;        mclk_tx mclk_rx hclk               j      j           tx rx           M      T        vtx-m            ~           default            w   x   y   z                  	  ydisabled          i2s@fe430000             ,rockchip,rk3568-i2s-tdm             C                        7                 S      W      <        mclk_tx mclk_rx hclk               j      j           tx rx           M      U      V      
  vtx-m rx-m           ~                     	  ydisabled          pdm@fe440000             ,rockchip,rk3568-pdm             D                        L                 Z      Y        pdm_clk pdm_hclk               j   	        rx             {   |   }   ~              default         M      X        vpdm-m                     	  ydisabled          spdif@fe460000           ,rockchip,rk3568-spdif               F                        f         
  mclk hclk                 _      \           j           tx          default                              	  ydisabled          dma-controller@fe530000          ,arm,pl330 arm,primecell             S        @                                                         	  apb_pclk            	              #      dma-controller@fe550000          ,arm,pl330 arm,primecell             U        @                                                         	  apb_pclk            	              j      i2c@fe5a0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c             Z                        /                H     G      	  i2c pclk                       default                                 	  ydisabled          i2c@fe5b0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c             [                        0                J     I      	  i2c pclk                       default                                 	  ydisabled          i2c@fe5c0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c             \                        1                L     K      	  i2c pclk                       default                                 	  ydisabled          i2c@fe5d0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c             ]                        2                N     M      	  i2c pclk                       default                                 	  ydisabled          i2c@fe5e0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c             ^                        3                P     O      	  i2c pclk                       default                                 	  ydisabled          watchdog@fe600000             ,rockchip,rk3568-wdt snps,dw-wdt             `                                                   
  tclk pclk         spi@fe610000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi             a                        g                R     Q        spiclk apb_pclk            #      #           tx rx           default                                                  	  ydisabled          spi@fe620000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi             b                        h                T     S        spiclk apb_pclk            #      #           tx rx           default                                                  	  ydisabled          spi@fe630000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi             c                        i                V     U        spiclk apb_pclk            #      #           tx rx           default                                                  	  ydisabled          spi@fe640000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi             d                        j                X     W        spiclk apb_pclk            #      #           tx rx           default                                                  	  ydisabled          serial@fe650000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               e                        u                             baudclk apb_pclk               #      #                      default         	                    	  ydisabled          serial@fe660000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               f                        v                #              baudclk apb_pclk               #      #                      default         	                      yokay          serial@fe670000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               g                        w                '     $        baudclk apb_pclk               #      #                      default         	                    	  ydisabled          serial@fe680000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               h                        x                +     (        baudclk apb_pclk               #      #   	                   default         	                    	  ydisabled          serial@fe690000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               i                        y                /     ,        baudclk apb_pclk               #   
   #                      default         	                    	  ydisabled          serial@fe6a0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               j                        z                3     0        baudclk apb_pclk               #      #                      default         	                    	  ydisabled          serial@fe6b0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               k                        {                7     4        baudclk apb_pclk               #      #                      default         	                    	  ydisabled          serial@fe6c0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               l                        |                ;     8        baudclk apb_pclk               #      #                      default         	                    	  ydisabled          serial@fe6d0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               m                        }                ?     <        baudclk apb_pclk               #      #                      default         	                    	  ydisabled          thermal-zones      cpu-thermal         	   d        	(          	6          trips      cpu_alert0          	F p        	R          passive                  cpu_alert1          	F $        	R          passive       cpu_crit            	F s        	R        	  critical             cooling-maps       map0            	]         0  	b   	   
                  gpu-thermal         	           	(          	6         trips      gpu-threshold           	F p        	R          passive       gpu-target          	F $        	R          passive                  gpu-crit            	F s        	R        	  critical             cooling-maps       map0            	]           	b                  tsadc@fe710000           ,rockchip,rk3568-tsadc               q                        s           B                  Rf@ 
`                          tsadc apb_pclk          M                       ~           	q s        default sleep                      	           	           yokay                     saradc@fe720000       .   ,rockchip,rk3568-saradc rockchip,rk3399-saradc               r                        ]                             saradc apb_pclk         M             vsaradc-apb          	           yokay            	         pwm@fe6e0000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             n                      Z     Y      	  pwm pclk                       default                   	  ydisabled          pwm@fe6e0010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             n                     Z     Y      	  pwm pclk                       default                   	  ydisabled          pwm@fe6e0020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             n                      Z     Y      	  pwm pclk                       default                   	  ydisabled          pwm@fe6e0030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             n 0                    Z     Y      	  pwm pclk                       default                   	  ydisabled          pwm@fe6f0000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             o                      ]     \      	  pwm pclk                       default                   	  ydisabled          pwm@fe6f0010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             o                     ]     \      	  pwm pclk                       default                   	  ydisabled          pwm@fe6f0020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             o                      ]     \      	  pwm pclk                       default                   	  ydisabled          pwm@fe6f0030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             o 0                    ]     \      	  pwm pclk                       default                   	  ydisabled          pwm@fe700000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             p                      `     _      	  pwm pclk                       default                   	  ydisabled          pwm@fe700010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             p                     `     _      	  pwm pclk                       default                   	  ydisabled          pwm@fe700020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             p                      `     _      	  pwm pclk                       default                   	  ydisabled          pwm@fe700030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             p 0                    `     _      	  pwm pclk                       default                   	  ydisabled          phy@fe830000             ,rockchip,rk3568-naneng-combphy                                     "     }              ref apb pipe            B      "        R         M             vphy         	           	           	           yokay                     phy@fe840000             ,rockchip,rk3568-naneng-combphy                                     %     ~              ref apb pipe            B      %        R         M             vphy         	           	           	           yokay                     phy@fe870000             ,rockchip,rk3568-csi-dphy                                      y        pclk            	            M             vapb         ~         	  ydisabled          mipi-dphy@fe850000           ,rockchip,rk3568-dsi-dphy                               	  ref pclk                       z        	            .      	        vapb         M           	  ydisabled               U      mipi-dphy@fe860000           ,rockchip,rk3568-dsi-dphy                               	  ref pclk                       {        	            .      	        vapb         M           	  ydisabled               V      usb2phy@fe8a0000             ,rockchip,rk3568-usb2phy                                            phyclk          clk_usbphy0_480m                              	           "            yokay       host-port           	            yokay            
	                    otg-port            	            yokay                        usb2phy@fe8b0000             ,rockchip,rk3568-usb2phy                                            phyclk          clk_usbphy1_480m                              	           "            yokay       host-port           	            yokay            
	                    otg-port            	            yokay            
	                       pinctrl          ,rockchip,rk3568-pinctrl         ~              ^                                                gpio@fdd60000            ,rockchip,gpio-bank                                      !                 .               
        
$                       
0            m                             gpio@fe740000            ,rockchip,gpio-bank              t                        "                c     d         
        
$                       
0            m                            gpio@fe750000            ,rockchip,gpio-bank              u                        #                e     f         
        
$          @            
0            m                      R      gpio@fe760000            ,rockchip,gpio-bank              v                        $                g     h         
        
$          `            
0            m                 gpio@fe770000            ,rockchip,gpio-bank              w                        %                i     j         
        
$                      
0            m                 pcfg-pull-up             
<                 pcfg-pull-none           
I                 pcfg-pull-none-drv-level-1           
I        
V                    pcfg-pull-none-drv-level-2           
I        
V                    pcfg-pull-none-drv-level-3           
I        
V                    pcfg-pull-up-drv-level-1             
<        
V                    pcfg-pull-up-drv-level-2             
<        
V                    pcfg-pull-none-smt           
I         
e                 acodec        audiopwm          bt656         bt1120        cam       can0       can0m0-pins          
z                                              can1       can1m0-pins          
z                                             can2       can2m0-pins          
z                                            cif       clk32k     clk32k-out0         
z                                 cpu       ebc       edpdp         emmc       emmc-bus8           
z                                                                                                           f      emmc-clk            
z                       g      emmc-cmd            
z                       h      emmc-datastrobe         
z                       i         eth0          eth1          flash         fspi       fspi-pins         `  
z                                                                                   e         gmac0      gmac0-miim           
z                                         gmac0-clkinout          
z                             gmac0-rx-bus2         0  
z                                                     gmac0-tx-bus2         0  
z                                                     gmac0-rgmii-clk          
z                                         gmac0-rgmii-bus       @  
z                                                                    gmac1      gmac1m1-miim             
z                                   K      gmac1m1-clkinout            
z                       P      gmac1m1-rx-bus2       0  
z                              	                 M      gmac1m1-tx-bus2       0  
z                                               L      gmac1m1-rgmii-clk            
z                                    N      gmac1m1-rgmii-bus         @  
z                                                           O         gpu       hdmitx     hdmitxm0-cec            
z                       Y      hdmitx-scl          
z                       W      hdmitx-sda          
z                       X         i2c0       i2c0-xfer            
z       	             
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z                                              i2c2       i2c2m0-xfer          
z                                              i2c3       i2c3m0-xfer          
z                                             i2c4       i2c4m0-xfer          
z                  
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z                                            i2s1       i2s1m0-lrckrx           
z                       n      i2s1m0-lrcktx           
z                       m      i2s1m0-sclkrx           
z                       l      i2s1m0-sclktx           
z                       k      i2s1m0-sdi0         
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z      
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z      
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z                       x      i2s2m0-sclktx           
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z                         !         pmu       pwm0       pwm0m0-pins         
z                        %         pwm1       pwm1m0-pins         
z                        &         pwm2       pwm2m0-pins         
z                        '         pwm3       pwm3-pins           
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z                                 pwm5       pwm5-pins           
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z                                 pwm7       pwm7-pins           
z                                 pwm8       pwm8m0-pins         
z      	                          pwm9       pwm9m0-pins         
z      
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z                                pwm11      pwm11m0-pins            
z                                pwm12      pwm12m0-pins            
z                                pwm13      pwm13m0-pins            
z                                pwm14      pwm14m0-pins            
z                                pwm15      pwm15m0-pins            
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z                                            vop       spi0-hs       spi1-hs       spi2-hs       spi3-hs       gmac-txd-level3       gmac-txc-level2       leds       user-led-enable-h           
z      
                           usb    vcc5v0-host-en          
z                               vcc5v0-otg-en           
z                                  pcie       pcie-reset-pin          
z                              vcc3v3-pcie-en-pin          
z                                     sata@fc000000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci                                                          sata pmalive rxoob                 ^                       	  sata-phy                       .            	  ydisabled          syscon@fdc70000       $   ,rockchip,rk3568-pipe-phy-grf syscon                                       qos@fe190080             ,rockchip,rk3568-qos syscon                                  <      qos@fe190100             ,rockchip,rk3568-qos syscon                                  =      qos@fe190200             ,rockchip,rk3568-qos syscon                                  >      syscon@fdcb8000       %   ,rockchip,rk3568-pcie3-phy-grf syscon                ˀ                         phy@fe8c0000             ,rockchip,rk3568-pcie3-phy                                	                  &      '     w        refclk_m refclk_n pclk          M             vphy         
           yokay                     pcie@fe270000            ,rockchip,rk3568-pcie                                                  (                                      $  aclk_mst aclk_slv aclk_dbi pclk aux          pci       <                                                            Fsys pmc msg legacy err                                          `  $                                                                                             2           C           R           a           p                     x                    	  pcie-phy            .            0     @       @      '                             T                                                      @      @       @           dbi apb config          M              vpipe          	  ydisabled       legacy-interrupt-controller          m                                                                           pcie@fe280000            ,rockchip,rk3568-pcie                                                  (                                      $  aclk_mst aclk_slv aclk_dbi pclk aux          pci       <                                                            Fsys pmc msg legacy err                                          `  $                                                                                             2           C           R           a           p                      x                    	  pcie-phy            .            0            @      (                             T                                                      @             @           dbi apb config          M              vpipe            yokay            default                    
   R               
      legacy-interrupt-controller          m                                                                           ethernet@fe2a0000         &   ,rockchip,rk3568-gmac snps,dwmac-4.20a               *                                             Fmacirq eth_wake_irq       @                                                    W  stmmaceth mac_clk_rx mac_clk_tx clk_mac_refout aclk_mac pclk_mac clk_mac_speed ptp_ref          M            
  vstmmaceth           ~                                                              yokay            B                  g                input           default                                              rgmii              R                       2      N          G   <        P   /   mdio             ,snps,dwmac-mdio                              phy@0            ,ethernet-phy-ieee802.3-c22                                  stmmac-axi-config           Y                                 c           s                    rx-queues-config                             queue0           tx-queues-config                             queue0              can@fe570000             ,rockchip,rk3568v2-canfd             W                                        A     @      
  baud pclk           M     U     T      	  vcore apb            default                  	  ydisabled          can@fe580000             ,rockchip,rk3568v2-canfd             X                                        C     B      
  baud pclk           M     W     V      	  vcore apb            default                  	  ydisabled          can@fe590000             ,rockchip,rk3568v2-canfd             Y                                        E     D      
  baud pclk           M     Y     X      	  vcore apb            default                  	  ydisabled          phy@fe820000             ,rockchip,rk3568-naneng-combphy                                          |              ref apb pipe            B              R         M             vphy         	           	           	           yokay                     chosen          
serial2:1500000n8         dc-12v-regulator             ,regulator-fixed         &dc_12v           5         I        r                             external-gmac0-clock             ,fixed-clock         sY@        gmac0_clkin         "                     external-gmac1-clock             ,fixed-clock         sY@        gmac1_clkin         "               J      leds          
   ,gpio-leds      led-user          	  
user-led            
on                
          
  
heartbeat           default                     
         hdmi-con             ,hdmi-connector          a      port       endpoint                          ]            pcie30-avdd0v9-regulator             ,regulator-fixed         &pcie30_avdd0v9           5         I        r                     "      pcie30-avdd1v8-regulator             ,regulator-fixed         &pcie30_avdd1v8           5         I        r w@         w@           "      vcc3v3-sys-regulator             ,regulator-fixed         &vcc3v3_sys           5         I        r 2Z         2Z                      "      vcc3v3-pcie-regulator            ,regulator-fixed         &vcc3v3_pcie                  r 2Z         2Z        default                                                                      vcc5v0-sys-regulator             ,regulator-fixed         &vcc5v0_sys           5         I        r LK@         LK@                            vcc5v0-usb-regulator             ,regulator-fixed         &vcc5v0_usb           5         I        r LK@         LK@                            vcc5v0-host-regulator            ,regulator-fixed         &vcc5v0_host                                     default                     5                            vcc5v0-otg-regulator             ,regulator-fixed         &vcc5v0_otg                                      default                                	interrupt-parent #address-cells #size-cells compatible model gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 serial0 serial1 serial2 serial3 serial4 serial5 serial6 serial7 serial8 serial9 spi0 spi1 spi2 spi3 ethernet0 ethernet1 mmc0 mmc1 device_type reg clocks #cooling-cells enable-method operating-points-v2 i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache phandle cache-level cache-unified opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend ports arm,smc-id shmem #clock-cells simple-audio-card,name simple-audio-card,format simple-audio-card,mclk-fs status sound-dai interrupts interrupt-affinity arm,no-tick-in-suspend clock-frequency clock-output-names pinctrl-0 pinctrl-names ranges clock-names phys phy-names ports-implemented power-domains dr_mode phy_type resets snps,dis_u2_susphy_quirk interrupt-controller #interrupt-cells mbi-alias mbi-ranges msi-controller pmuio1-supply pmuio2-supply vccio1-supply vccio2-supply vccio3-supply vccio4-supply vccio5-supply vccio6-supply vccio7-supply #reset-cells assigned-clocks assigned-clock-rates assigned-clock-parents rockchip,grf rockchip,system-power-controller vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply wakeup-source regulator-name regulator-always-on regulator-boot-on regulator-initial-mode regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-off-in-suspend regulator-on-in-suspend regulator-suspend-microvolt dmas reg-io-width reg-shift #pwm-cells #power-domain-cells pm_qos interrupt-names mali-supply iommus #iommu-cells reset-names fifo-depth max-frequency snps,axi-config snps,mixed-burst snps,mtl-rx-config snps,mtl-tx-config snps,tso clock_in_out phy-handle phy-mode snps,reset-gpio snps,reset-active-low snps,reset-delays-us tx_delay rx_delay snps,blen snps,rd_osr_lmt snps,wr_osr_lmt snps,rx-queues-to-use snps,tx-queues-to-use reg-names remote-endpoint #sound-dai-cells avdd-0v9-supply avdd-1v8-supply rockchip,pmu bus-range interrupt-map-mask interrupt-map linux,pci-domain num-ib-windows num-ob-windows max-link-speed msi-map num-lanes bus-width cap-sd-highspeed cd-gpios disable-wp sd-uhs-sdr104 vmmc-supply vqmmc-supply non-removable dma-names arm,pl330-periph-burst #dma-cells polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device rockchip,hw-tshut-temp pinctrl-1 #thermal-sensor-cells #io-channel-cells vref-supply rockchip,pipe-grf rockchip,pipe-phy-grf #phy-cells rockchip,usbgrf phy-supply gpio-controller gpio-ranges #gpio-cells bias-pull-up bias-disable drive-strength input-schmitt-enable rockchip,pins rockchip,phy-grf reset-gpios vpcie3v3-supply stdout-path label default-state linux,default-trigger retain-state-suspended vin-supply enable-active-high startup-delay-us 