 k   8 \\   (            g \$                             )    rockchip,rk3588-evb1-v10 rockchip,rk3588                                     +            7Rockchip RK3588 EVB1 V10 Board     aliases          =/pinctrl/gpio@fd8a0000           C/pinctrl/gpio@fec20000           I/pinctrl/gpio@fec30000           O/pinctrl/gpio@fec40000           U/pinctrl/gpio@fec50000           [/i2c@fd880000            `/i2c@fea90000            e/i2c@feaa0000            j/i2c@feab0000            o/i2c@feac0000            t/i2c@fead0000            y/i2c@fec80000            ~/i2c@fec90000            /i2c@feca0000            /serial@fd890000             /serial@feb40000             /serial@feb50000             /serial@feb60000             /serial@feb70000             /serial@feb80000             /serial@feb90000             /serial@feba0000             /serial@febb0000             /serial@febc0000             /spi@feb00000            /spi@feb10000            /spi@feb20000            /spi@feb30000            /spi@fecb0000            /ethernet@fe1b0000           /mmc@fe2e0000         cpus                         +       cpu-map    cluster0       core0                     core1                     core2                     core3                        cluster1       core0                     core1                        cluster2       core0                     core1               	            cpu@0           cpu           arm,cortex-a55                      psci            "          5   
            <   
            L0,         a           q           ~   @                                 @                                                                          "         cpu@100         cpu           arm,cortex-a55                     psci            "          5   
            a           q           ~   @                                 @                                                                          "         cpu@200         cpu           arm,cortex-a55                     psci            "          5   
            a           q           ~   @                                 @                                                                          "         cpu@300         cpu           arm,cortex-a55                     psci            "          5   
            a           q           ~   @                                 @                                                                          "         cpu@400         cpu           arm,cortex-a76                     psci            "           5   
           <   
           L0,         a           q           ~   @                                 @                                                                         "         cpu@500         cpu           arm,cortex-a76                     psci            "           5   
           a           q           ~   @                                 @                                                                         "         cpu@600         cpu           arm,cortex-a76                     psci            "           5   
           <   
           L0,         a           q           ~   @                                 @                                                                         "         cpu@700         cpu           arm,cortex-a76                     psci            "           5   
           a           q           ~   @                                 @                                                                         "   	      idle-states         *psci       cpu-sleep             arm,idle-state           7        H           _   d        p   x                  "            l2-cache-l0           cache           s              @                                                  "         l2-cache-l1           cache           s              @                                                  "         l2-cache-l2           cache           s              @                                                  "         l2-cache-l3           cache           s              @                                                  "         l2-cache-b0           cache           s              @                                                  "         l2-cache-b1           cache           s              @                                                  "         l2-cache-b2           cache           s              @                                                  "         l2-cache-b3           cache           s              @                                                  "            l3-cache              cache           s 0             @                                       "         display-subsystem             rockchip,display-subsystem                   firmware       optee             linaro,optee-tz         smc       scmi              arm,scmi-smc                                              +       protocol@14                               "   
      protocol@16                                   pmu-a55           arm,cortex-a55-pmu                            pmu-a76           arm,cortex-a76-pmu                            psci              arm,psci-1.0            smc       clock-0           fixed-clock         )׫        spll                      timer             arm,armv8-timer       P                                               
                          %  
sec-phys phys virt hyp-phys hyp-virt          clock-1           fixed-clock         n6         xin24m                    clock-2           fixed-clock                    xin32k                    reserved-memory                      +               shmem@10f000              arm,scmi-shmem                                !        "            gpu@fb000000          *    rockchip,rk3588-mali arm,mali-valhall-csf                                             <   
           L         5                       (core coregroup stacks                   0         \              ]              ^               
job mmu gpu         4               Bokay               !        I   "        U   #        "         usb@fc000000              rockchip,rk3588-dwc3 snps,dwc3                      @                                5                       (ref_clk suspend_clk bus_clk         aotg         i   $   %           nusb2-phy usb3-phy         
  xutmi_wide           4                    R                                                              Bokay             4   port                         +       endpoint@0                      D   &        "               usb@fc800000          "    rockchip,rk3588-ehci generic-ehci                                                      5                  '        i   (        nusb         4               Bokay          usb@fc840000          "    rockchip,rk3588-ohci generic-ohci                                                      5                  '        i   (        nusb         4               Bokay          usb@fc880000          "    rockchip,rk3588-ehci generic-ehci                                                      5                  )        i   *        nusb         4               Bokay          usb@fc8c0000          "    rockchip,rk3588-ohci generic-ohci                                                      5                  )        i   *        nusb         4               Bokay          usb@fcd00000              rockchip,rk3588-dwc3 snps,dwc3                     @                              (  5     j     i     h     k     r      &  (ref_clk suspend_clk bus_clk utmi pipe           ahost            i   +         	  nusb3-phy          
  xutmi_wide                4                                             T      	  Bdisabled          iommu@fc900000            arm,smmu-v3                             @        q             s             v             o               
eventq gerror priq cmdq-sync            n         	  Bdisabled          iommu@fcb00000            arm,smmu-v3                             @        }                                       {               
eventq gerror priq cmdq-sync            n         	  Bdisabled          syscon@fd58a000       )    rockchip,rk3588-pmugrf syscon simple-mfd                X                "   o      syscon@fd58c000           rockchip,rk3588-sys-grf syscon              X                "   j      syscon@fd5a4000           rockchip,rk3588-vop-grf syscon              Z@                 "   k      syscon@fd5a6000           rockchip,rk3588-vo0-grf syscon              Z`                 5             "         syscon@fd5a8000           rockchip,rk3588-vo1-grf syscon              Z       @         5             "   l      syscon@fd5ac000           rockchip,rk3588-usb-grf syscon              Z       @         "         syscon@fd5b0000           rockchip,rk3588-php-grf syscon              [                 "   -      syscon@fd5bc000       $    rockchip,rk3588-pipe-phy-grf syscon             [                "         syscon@fd5c4000       $    rockchip,rk3588-pipe-phy-grf syscon             \@                "         syscon@fd5c8000       $    rockchip,rk3588-usbdpphy-grf syscon             \       @         "         syscon@fd5d0000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd               ]        @                      +           "      usb2phy@0             rockchip,rk3588-usb2phy                                    5             (phyclk          usb480m_phy0                                      m             {phy apb         Bokay            "      otg-port                        Bokay            "   $            syscon@fd5d8000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd               ]       @                      +      usb2phy@8000              rockchip,rk3588-usb2phy                                   5             (phyclk          usb480m_phy2                                      o             {phy apb         Bokay            "   '   host-port                       Bokay               ,        "   (            syscon@fd5dc000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd               ]       @                      +      usb2phy@c000              rockchip,rk3588-usb2phy                                   5             (phyclk          usb480m_phy3                                      p              {phy apb         Bokay            "   )   host-port                       Bokay               ,        "   *            syscon@fd5e0000       $    rockchip,rk3588-hdptxphy-grf syscon             ^                 "         syscon@fd5f0000           rockchip,rk3588-ioc syscon              _                 "         sram@fd600000         
    mmio-sram               `                         `                          +         clock-controller@fd7c0000             rockchip,rk3588-cru             |                <                                                                         ]      q                 @  LA .  2Fq )׫ׄ e /  ׄ   e Zр            -                              "         i2c@fd880000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                                    =               5     t     s      	  (i2c pclk               .        default                      +          	  Bdisabled          serial@fd890000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      K               5                  (baudclk apb_pclk               /      /           tx rx              0        default                             	  Bdisabled          pwm@fd8b0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              5                	  (pwm pclk               1        default                  	  Bdisabled          pwm@fd8b0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                             5                	  (pwm pclk               2        default                  	  Bdisabled          pwm@fd8b0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              5                	  (pwm pclk               3        default                    Bokay            "        pwm@fd8b0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm              0               5                	  (pwm pclk               4        default                  	  Bdisabled          power-management@fd8d8000         &    rockchip,rk3588-pmu syscon simple-mfd                               "   m   power-controller          !    rockchip,rk3588-power-controller                                    +            Bokay            "       power-domain@8                                              +       power-domain@9             	         5     !     #     "                5   6   7                                 +       power-domain@10            
        5     !     #     "           8                  power-domain@11                    5     !     #     "           9                        power-domain@12                    5                          :   ;   <   =                  power-domain@13                                 +                   power-domain@14                  (  5                                    >                  power-domain@15                     5                               ?                  power-domain@16                    5                     @   A   B                     +                   power-domain@17                     5                               C   D   E                        power-domain@21                    5                                                                                                      F   G   H   I   J   K   L   M                     +                   power-domain@23                    5      C      A                N                  power-domain@14                     5                               >                  power-domain@15                    5                          ?                  power-domain@22                    5                     O                     power-domain@24                    5     [     Z     ]           P   Q                     +                   power-domain@25                  8  5                                   Z           R                     power-domain@26                  8  5                                   Q           S   T                  power-domain@27                  0  5                                         U   V   W   X                     +                   power-domain@28                     5                               Y   Z                  power-domain@29                  (  5                                    [   \                     power-domain@30                    5     z     {           ]                  power-domain@31                  @  5     W                                              ^   _   `   a                  power-domain@33            !        5     W     Z     [                  power-domain@34            "        5     W     Z     [                  power-domain@37            %        5          2           b                  power-domain@38            &        5      4      5                  power-domain@40            (           c                        video-codec@fdb50000          +    rockchip,rk3588-vpu121 rockchip,rk3568-vpu                                      w               
vdpu            5                
  (aclk hclk              d        4             iommu@fdb50800        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu                     @               v               (aclk iface          5                  4               n            "   d      rga@fdb80000          (    rockchip,rk3588-rga rockchip,rk3288-rga                                    t               5                       (aclk hclk sclk               r     q     p        {core axi ahb            4             video-codec@fdba0000              rockchip,rk3588-vepu121                                     z               5                
  (aclk hclk              e        4             iommu@fdba0800        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu                     @               y               5                  (aclk iface          4               n            "   e      video-codec@fdba4000              rockchip,rk3588-vepu121             @                       |               5                
  (aclk hclk              f        4             iommu@fdba4800        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu             H        @               {               5                  (aclk iface          4               n            "   f      video-codec@fdba8000              rockchip,rk3588-vepu121                                    ~               5                
  (aclk hclk              g        4             iommu@fdba8800        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu                     @               }               5                  (aclk iface          4               n            "   g      video-codec@fdbac000              rockchip,rk3588-vepu121                                                   5                
  (aclk hclk              h        4             iommu@fdbac800        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu                     @                              5                  (aclk iface          4               n            "   h      video-codec@fdc70000              rockchip,rk3588-av1-vpu                                     l               
vdpu            <      A      C        Lׄ ׄ         5      A      C      
  (aclk hclk           4                                           vop@fdd90000              rockchip,rk3588-vop                      B     P                vop gamma-lut                               8  5     ]     \     a     b     c     d     [      7  (aclk hclk dclk_vp0 dclk_vp1 dclk_vp2 dclk_vp3 pclk_vop             i        4                  j           k        0   l        A   m      	  Bdisabled       ports                        +            "      port@0                       +                      port@1                       +                     port@2                       +                     port@3                       +                           iommu@fdd97e00        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu              ~                                                  5     ]     \        (aclk iface          n            4             	  Bdisabled            "   i      i2s@fddc0000              rockchip,rk3588-i2s-tdm                                                    5                       (mclk_tx mclk_rx hclk            <             N                 n            tx          4                            {tx-m            e          	  Bdisabled          i2s@fddf0000              rockchip,rk3588-i2s-tdm                                                    5     4     4     5        (mclk_tx mclk_rx hclk            <     1        N                 n           tx          4                            {tx-m            e          	  Bdisabled          i2s@fddfc000              rockchip,rk3588-i2s-tdm                                                   5     0     0     ,        (mclk_tx mclk_rx hclk            <     -        N                 n           rx          4                            {rx-m            e          	  Bdisabled          qos@fdf35000              rockchip,rk3588-qos syscon              P                 "   :      qos@fdf35200              rockchip,rk3588-qos syscon              R                 "   ;      qos@fdf35400              rockchip,rk3588-qos syscon              T                 "   <      qos@fdf35600              rockchip,rk3588-qos syscon              V                 "   =      qos@fdf36000              rockchip,rk3588-qos syscon              `                 "   ]      qos@fdf39000              rockchip,rk3588-qos syscon                               "   b      qos@fdf3d800              rockchip,rk3588-qos syscon                               "   c      qos@fdf3e000              rockchip,rk3588-qos syscon                               "   _      qos@fdf3e200              rockchip,rk3588-qos syscon                               "   ^      qos@fdf3e400              rockchip,rk3588-qos syscon                               "   `      qos@fdf3e600              rockchip,rk3588-qos syscon                               "   a      qos@fdf40000              rockchip,rk3588-qos syscon                                "   [      qos@fdf40200              rockchip,rk3588-qos syscon                               "   \      qos@fdf40400              rockchip,rk3588-qos syscon                               "   U      qos@fdf40500              rockchip,rk3588-qos syscon                               "   V      qos@fdf40600              rockchip,rk3588-qos syscon                               "   W      qos@fdf40800              rockchip,rk3588-qos syscon                               "   X      qos@fdf41000              rockchip,rk3588-qos syscon                               "   Y      qos@fdf41100              rockchip,rk3588-qos syscon                               "   Z      qos@fdf60000              rockchip,rk3588-qos syscon                                "   @      qos@fdf60200              rockchip,rk3588-qos syscon                               "   A      qos@fdf60400              rockchip,rk3588-qos syscon                               "   B      qos@fdf61000              rockchip,rk3588-qos syscon                               "   C      qos@fdf61200              rockchip,rk3588-qos syscon                               "   D      qos@fdf61400              rockchip,rk3588-qos syscon                               "   E      qos@fdf62000              rockchip,rk3588-qos syscon                                "   >      qos@fdf63000              rockchip,rk3588-qos syscon              0                 "   ?      qos@fdf64000              rockchip,rk3588-qos syscon              @                 "   N      qos@fdf66000              rockchip,rk3588-qos syscon              `                 "   F      qos@fdf66200              rockchip,rk3588-qos syscon              b                 "   G      qos@fdf66400              rockchip,rk3588-qos syscon              d                 "   H      qos@fdf66600              rockchip,rk3588-qos syscon              f                 "   I      qos@fdf66800              rockchip,rk3588-qos syscon              h                 "   J      qos@fdf66a00              rockchip,rk3588-qos syscon              j                 "   K      qos@fdf66c00              rockchip,rk3588-qos syscon              l                 "   L      qos@fdf66e00              rockchip,rk3588-qos syscon              n                 "   M      qos@fdf67000              rockchip,rk3588-qos syscon              p                 "   O      qos@fdf67200              rockchip,rk3588-qos syscon              r               qos@fdf70000              rockchip,rk3588-qos syscon                                "   8      qos@fdf71000              rockchip,rk3588-qos syscon                               "   9      qos@fdf72000              rockchip,rk3588-qos syscon                                "   5      qos@fdf72200              rockchip,rk3588-qos syscon              "                 "   6      qos@fdf72400              rockchip,rk3588-qos syscon              $                 "   7      qos@fdf80000              rockchip,rk3588-qos syscon                                "   R      qos@fdf81000              rockchip,rk3588-qos syscon                               "   S      qos@fdf81200              rockchip,rk3588-qos syscon                               "   T      qos@fdf82000              rockchip,rk3588-qos syscon                                "   P      qos@fdf82200              rockchip,rk3588-qos syscon              "                 "   Q      dfi@fe060000                                   rockchip,rk3588-dfi       @                       &              0              :               A   o      pcie@fe180000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie           v   0   ?      0  5     C     H     >     M     R           )  (aclk_mst aclk_slv aclk_dbi pclk aux pipe            pci       P                                                                                
sys pmc msg legacy err                                          `                    p                      p                     p                     p                                   0    q  0                       i   +         	  npcie-phy            4       "      T                                                       @      	       @         0     
@       @                                     dbi apb config               )     .      	  {pwr pipe                         +           Bokay               r               default            s   t   legacy-interrupt-controller                                                                            "   p         pcie@fe190000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie           v   @   O      0  5     D     I     ?     N     S     s      )  (aclk_mst aclk_slv aclk_dbi pclk aux pipe            pci       P                                                                                
sys pmc msg legacy err                                          `                    u                      u                     u                     u                                   @    q  @                       i   v         	  npcie-phy            4       "      T                                                       @      
        @         0     
A        @                                     dbi apb config               *     /      	  {pwr pipe                         +         	  Bdisabled       legacy-interrupt-controller                                                                            "   u         ethernet@fe1c0000         &    rockchip,rk3588-gmac snps,dwmac-4.20a                                                                     
macirq eth_wake_irq       (  5     6     7     Y     ^     5      0  (stmmaceth clk_mac_ref pclk_mac aclk_mac ptp_ref         4       !             $      
  {stmmaceth              j           -           w         &        7   x        J   y         ]      	  Bdisabled       mdio              snps,dwmac-mdio                      +          stmmac-axi-config           f                                 p                      "   w      rx-queues-config                       "   x   queue0        queue1           tx-queues-config                       "   y   queue0        queue1              sata@fe210000         '    rockchip,rk3588-dwc-ahci snps,dwc-ahci              !                                    (  5     b     _     e     T     o        (sata pmalive rxoob ref asic                                 +            Bokay       sata-port@0                      @          i   v         	  nsata-phy                                     sata@fe230000         '    rockchip,rk3588-dwc-ahci snps,dwc-ahci              #                                    (  5     d     a     g     V     q        (sata pmalive rxoob ref asic                                 +          	  Bdisabled       sata-port@0                      @          i   +         	  nsata-phy                                     spi@fe2b0000              rockchip,sfc                +        @                               5     /     0        (clk_sfc hclk_sfc                         +          	  Bdisabled          mmc@fe2c0000          0    rockchip,rk3588-dw-mshc rockchip,rk3288-dw-mshc             ,        @                                5   
      
   	                  (biu ciu ciu-drive ciu-sample                                default            z   {   |   }        4       (      	  Bdisabled          mmc@fe2d0000          0    rockchip,rk3588-dw-mshc rockchip,rk3288-dw-mshc             -        @                                5                            (biu ciu ciu-drive ciu-sample                                default            ~        4       %      	  Bdisabled          mmc@fe2e0000              rockchip,rk3588-dwcmshc             .                                       <     -     .     ,        L n6        (  5     ,     *     +     -     .        (core bus axi block timer                                            default       (                                   {core bus axi block timer            Bokay                                 $         *         8         G      i2s@fe470000              rockchip,rk3588-i2s-tdm             G                                       5      +      /      (        (mclk_tx mclk_rx hclk            <      )      -        N                       /       /           tx rx           4       &              *      +      
  {tx-m rx-m            a        default                                e            Bokay            "        i2s@fe480000              rockchip,rk3588-i2s-tdm             H                                       5     y     }     u        (mclk_tx mclk_rx hclk               /      /           tx rx                ^     _      
  {tx-m rx-m            a        default       (                                        e          	  Bdisabled          i2s@fe490000          (    rockchip,rk3588-i2s rockchip,rk3066-i2s             I                                       5                    (i2s_clk i2s_hclk            <              N                                   tx rx           4       &        default                             e          	  Bdisabled          i2s@fe4a0000          (    rockchip,rk3588-i2s rockchip,rk3066-i2s             J                                       5      %              (i2s_clk i2s_hclk            <      "        N                                  tx rx           4       &        default                             e          	  Bdisabled          interrupt-controller@fe600000             arm,gic-v3               `             h                       	                        |    a               8                                                  +           "      msi-controller@fe640000           arm,gic-v3-its              d                                     "   q      msi-controller@fe660000           arm,gic-v3-its              f                                     "         ppi-partitions     interrupt-partition-0                               "         interrupt-partition-1                       	        "               dma-controller@fea10000           arm,pl330 arm,primecell                     @                 V              W                        5      n      	  (apb_pclk                       "   /      dma-controller@fea30000           arm,pl330 arm,primecell                     @                 X              Y                        5      o      	  (apb_pclk                       "         i2c@fea90000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              5            {      	  (i2c pclk                  >                          default                      +          	  Bdisabled          i2c@feaa0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              5            |      	  (i2c pclk                  ?                          default                      +            Bokay       usb-typec@22              fcs,fusb302            "                                  default                               Bokay       connector             usb-c-connector         USB-C           dual             B@        dual            d        ,        %source     ports                        +       port@0                 endpoint            D           "            port@1                endpoint            D           "   &         port@2                endpoint            D           "                     rtc@51            haoyu,hym8563              Q                    hym8563         default                                               4         i2c@feab0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              5            }      	  (i2c pclk                  @                          default                      +          	  Bdisabled          i2c@feac0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              5            ~      	  (i2c pclk                  A                          default                      +          	  Bdisabled          i2c@fead0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              5                  	  (i2c pclk                  B                          default                      +          	  Bdisabled          timer@feae0000        ,    rockchip,rk3588-timer rockchip,rk3288-timer                                     !               5      T      W        (pclk timer        watchdog@feaf0000              rockchip,rk3588-wdt snps,dw-wdt                              5      d      c      
  (tclk pclk                 ;             spi@feb00000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    F               5                    (spiclk apb_pclk            /      /           tx rx           B                            default                      +          	  Bdisabled          spi@feb10000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    G               5                    (spiclk apb_pclk            /      /           tx rx           B                            default                      +          	  Bdisabled          spi@feb20000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    H               5                    (spiclk apb_pclk                             tx rx           B                            default                      +            Bokay            <              L    pmic@0            rockchip,rk806                      I            U                                                      default         e B@         w                                                                                                                      	           	           	"           	/           	<      dvs1-null-pins          	Hgpio_pwrctrl1         	  	Mpin_fun0            "         dvs2-null-pins          	Hgpio_pwrctrl2         	  	Mpin_fun0            "         dvs3-null-pins          	Hgpio_pwrctrl3         	  	Mpin_fun0            "         regulators     dcdc-reg1            	V         	j        	| dp        	 ~        	  0        	vdd_gpu_s0          	          	   #        
  '        "   "   regulator-state-mem          
          dcdc-reg2            	V         	j        	| dp        	 ~        	  0        	vdd_npu_s0     regulator-state-mem          
          dcdc-reg3            	V         	j        	| 
L        	 q        	  0        	vdd_log_s0     regulator-state-mem          
         
9 q         dcdc-reg4            	V         	j        	| dp        	 ~        	  0        	vdd_vdenc_s0       regulator-state-mem          
          dcdc-reg5            	V         	j        	| 
L        	 ~        	  0        	          	vdd_gpu_mem_s0          	   "        
  '        "   #   regulator-state-mem          
          dcdc-reg6            	V         	j        	| 
L        	 ~        	  0        	vdd_npu_mem_s0     regulator-state-mem          
          dcdc-reg7            	V         	j        	|         	         	  0        	vdd_2v0_pldo_s3         "      regulator-state-mem          
U        
9          dcdc-reg8            	V         	j        	| 
L        	 ~        	  0        	vdd_vdenc_mem_s0       regulator-state-mem          
          dcdc-reg9            	V         	j        	vdd2_ddr_s3    regulator-state-mem          
U         dcdc-reg10           	V         	j        	|         	         	  0        	vcc_1v1_nldo_s3         "      regulator-state-mem          
U        
9          pldo-reg1            	V         	j        	| w@        	 w@        	  0        	avcc_1v8_s0         "  !   regulator-state-mem          
          pldo-reg2            	V         	j        	| w@        	 w@        	  0        	vdd1_1v8_ddr_s3    regulator-state-mem          
U        
9 w@         pldo-reg3            	V         	j        	| w@        	 w@        	  0        	avcc_1v8_codec_s0           "      regulator-state-mem          
          pldo-reg4            	V         	j        	| 2Z        	 2Z        	  0        	vcc_3v3_s3     regulator-state-mem          
U        
9 2Z         pldo-reg5            	V         	j        	| w@        	 2Z        	  0        	vccio_sd_s0    regulator-state-mem          
          pldo-reg6            	V         	j        	| w@        	 w@        	  0        	vccio_1v8_s3       regulator-state-mem          
U        
9 w@         nldo-reg1            	V         	j        	| q        	 q        	  0        	vdd_0v75_s3    regulator-state-mem          
U        
9 q         nldo-reg2            	V         	j        	|         	         	vdd2l_0v9_ddr_s3       regulator-state-mem          
U        
9          nldo-reg3            	V         	j        	| q        	 q        	vdd_0v75_hdmi_edp_s0       regulator-state-mem          
          nldo-reg4            	V         	j        	| q        	 q        	avdd_0v75_s0            "  "   regulator-state-mem          
          nldo-reg5            	V         	j        	| P        	 P        	vdd_0v85_s0    regulator-state-mem          
                pmic@1            rockchip,rk806                     I            U                                                   default         e B@                                                                                                                      	           	           	"           	/           	<      dvs1-null-pins          	Hgpio_pwrctrl1         	  	Mpin_fun0            "         dvs2-null-pins          	Hgpio_pwrctrl2         	  	Mpin_fun0            "         dvs3-null-pins          	Hgpio_pwrctrl3         	  	Mpin_fun0            "         regulators     dcdc-reg1            	V         	j        	           
  '        	| dp        	         	  0        	vdd_cpu_big1_s0         "      regulator-state-mem          
          dcdc-reg2            	V         	j        	           
  '        	| dp        	         	  0        	vdd_cpu_big0_s0         "      regulator-state-mem          
          dcdc-reg3            	V         	j        	           
  '        	| dp        	 ~        	  0        	vdd_cpu_lit_s0          "      regulator-state-mem          
          dcdc-reg4            	V         	j        	| 2Z        	 2Z        	  0        	vcc_3v3_s0          "      regulator-state-mem          
          dcdc-reg5            	V         	j        	           
  '        	| 
L        	         	  0        	vdd_cpu_big1_mem_s0         "      regulator-state-mem          
          dcdc-reg6            	V         	j        	           
  '        	| 
L        	         	  0        	vdd_cpu_big0_mem_s0         "      regulator-state-mem          
          dcdc-reg7            	V         	j        	| w@        	 w@        	  0        	vcc_1v8_s0          "      regulator-state-mem          
          dcdc-reg8            	V         	j        	           
  '        	| 
L        	 ~        	  0        	vdd_cpu_lit_mem_s0          "      regulator-state-mem          
          dcdc-reg9            	V         	j        	vddq_ddr_s0    regulator-state-mem          
          dcdc-reg10           	V         	j        	| 
L        	         	  0        	vdd_ddr_s0     regulator-state-mem          
          pldo-reg1            	V         	j        	| w@        	 w@        	  0        	vcc_1v8_cam_s0     regulator-state-mem          
          pldo-reg2            	V         	j        	| w@        	 w@        	  0        	avdd1v8_ddr_pll_s0     regulator-state-mem          
          pldo-reg3            	V         	j        	| w@        	 w@        	  0        	vdd_1v8_pll_s0     regulator-state-mem          
          pldo-reg4            	V         	j        	| 2Z        	 2Z        	  0        	vcc_3v3_sd_s0      regulator-state-mem          
          pldo-reg5            	V         	j        	| *        	 *        	  0        	vcc_2v8_cam_s0     regulator-state-mem          
          pldo-reg6            	V         	j        	| w@        	 w@      	  	pldo6_s3       regulator-state-mem          
U        
9 w@         nldo-reg1            	V         	j        	| q        	 q        	  0        	vdd_0v75_pll_s0    regulator-state-mem          
          nldo-reg2            	V         	j        	| P        	 P        	vdd_ddr_pll_s0     regulator-state-mem          
          nldo-reg3            	V         	j        	| P        	 P        	  0        	avdd_0v85_s0            "      regulator-state-mem          
          nldo-reg4            	V         	j        	| O        	 O        	  0        	avdd_1v2_cam_s0    regulator-state-mem          
          nldo-reg5            	V         	j        	| O        	 O        	  0        	avdd_1v2_s0    regulator-state-mem          
                   spi@feb30000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    I               5                    (spiclk apb_pclk                             tx rx           B                            default                      +          	  Bdisabled          serial@feb40000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      L               5                    (baudclk apb_pclk               /      /   	        tx rx                      default                             	  Bdisabled          serial@feb50000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      M               5                    (baudclk apb_pclk               /   
   /           tx rx                      default                               Bokay          serial@feb60000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      N               5                    (baudclk apb_pclk               /      /           tx rx                      default                             	  Bdisabled          serial@feb70000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      O               5                    (baudclk apb_pclk                  	      
        tx rx                      default                             	  Bdisabled          serial@feb80000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      P               5                    (baudclk apb_pclk                                tx rx                      default                             	  Bdisabled          serial@feb90000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      Q               5                    (baudclk apb_pclk                                tx rx                      default                             	  Bdisabled          serial@feba0000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      R               5                    (baudclk apb_pclk               n      n           tx rx                      default                             	  Bdisabled          serial@febb0000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      S               5                    (baudclk apb_pclk               n   	   n   
        tx rx                      default                             	  Bdisabled          serial@febc0000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      T               5                    (baudclk apb_pclk               n      n           tx rx                      default                             	  Bdisabled          pwm@febd0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              5      L      K      	  (pwm pclk                       default                  	  Bdisabled          pwm@febd0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                             5      L      K      	  (pwm pclk                       default                  	  Bdisabled          pwm@febd0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              5      L      K      	  (pwm pclk                       default                  	  Bdisabled          pwm@febd0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm              0               5      L      K      	  (pwm pclk                       default                  	  Bdisabled          pwm@febe0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              5      O      N      	  (pwm pclk                       default                  	  Bdisabled          pwm@febe0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                             5      O      N      	  (pwm pclk                       default                  	  Bdisabled          pwm@febe0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              5      O      N      	  (pwm pclk                       default                  	  Bdisabled          pwm@febe0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm              0               5      O      N      	  (pwm pclk                       default                  	  Bdisabled          pwm@febf0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              5      R      Q      	  (pwm pclk                       default                  	  Bdisabled          pwm@febf0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                             5      R      Q      	  (pwm pclk                       default                  	  Bdisabled          pwm@febf0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              5      R      Q      	  (pwm pclk                       default                  	  Bdisabled          pwm@febf0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm              0               5      R      Q      	  (pwm pclk                       default                  	  Bdisabled          thermal-zones      package-thermal         
m            
            
          trips      package-crit            
 8        
          	  critical                bigcore0-thermal            
m   d        
            
         trips      bigcore0-alert          
 L        
          passive         "         bigcore0-crit           
 8        
          	  critical             cooling-maps       map0            
           
                  bigcore2-thermal            
m   d        
            
         trips      bigcore2-alert          
 L        
          passive         "         bigcore2-crit           
 8        
          	  critical             cooling-maps       map0            
           
      	            littlecore-thermal          
m   d        
            
         trips      littlecore-alert            
 L        
          passive         "         littlecore-crit         
 8        
          	  critical             cooling-maps       map0            
         0  
                        center-thermal          
m            
            
         trips      center-crit         
 8        
          	  critical                gpu-thermal         
m   d        
            
         trips      gpu-alert           
 L        
          passive         "         gpu-crit            
 8        
          	  critical             cooling-maps       map0            
           
               npu-thermal         
m            
            
         trips      npu-crit            
 8        
          	  critical                   tsadc@fec00000            rockchip,rk3588-tsadc                                                     5                    (tsadc apb_pclk          <              L               V      W        {tsadc-apb tsadc         
         
            
                                  default sleep                      Bokay            "         adc@fec10000              rockchip,rk3588-saradc                                                    5           5                    (saradc apb_pclk               U        {saradc-apb          Bokay            G           "        i2c@fec80000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              5                  	  (i2c pclk                  C                          default                      +          	  Bdisabled          i2c@fec90000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              5                  	  (i2c pclk                  D                          default                      +            Bokay       audio-codec@11            everest,es8388                     5      1        <      1        L          S           _           k           l           e            "           i2c@feca0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              5                  	  (i2c pclk                  E                          default                      +          	  Bdisabled          spi@fecb0000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    J               5                    (spiclk apb_pclk            n      n           tx rx           B                            default                      +          	  Bdisabled          efuse@fecc0000            rockchip,rk3588-otp                               5                                (otp apb_pclk phy arb                                      {otp apb arb                      +      cpu-code@2                      id@7                        cpu-leakage@17                      cpu-leakage@18                      cpu-leakage@19                      log-leakage@1a                      gpu-leakage@1b                      cpu-version@1c                        x            npu-leakage@28             (         codec-leakage@29               )            dma-controller@fed10000           arm,pl330 arm,primecell                     @                 Z              [                        5      p      	  (apb_pclk                       "   n      phy@fed60000              rockchip,rk3588-hdptx-phy                                 5          T        (ref apb                   8       #          c     d     e     !     "      "  {phy apb init cmn lane ropll lcpll                    	  Bdisabled          phy@fed80000              rockchip,rk3588-usbdp-phy                                           5          l     V           (refclk immortal pclk utmi         (                                       {init cmn lane pcs_apb pma_apb           }                                            Bokay                                 r                  r               "   %   port                         +       endpoint@0                      D           "         endpoint@1                     D           "               phy@fee00000              rockchip,rk3588-naneng-combphy                               5          v     W        (ref apb pipe            <             L                         <     C        {phy apb            -                   Bokay            "   v      phy@fee20000              rockchip,rk3588-naneng-combphy                               5          x     W        (ref apb pipe            <             L                         >     E        {phy apb            -                   Bokay            "   +      sram@ff001000         
    mmio-sram                                                                +         pinctrl           rockchip,rk3588-pinctrl                                          +           "      gpio@fd8a0000             rockchip,gpio-bank                                                    5     q     r         U        *                                I                      "         gpio@fec20000             rockchip,gpio-bank                                                    5      s      t         U        *                                I                      "        gpio@fec30000             rockchip,gpio-bank                                                    5      u      v         U        *          @                     I                    gpio@fec40000             rockchip,gpio-bank                                                    5      w      x         U        *          `                     I                      "         gpio@fec50000             rockchip,gpio-bank                                                    5      y      z         U        *                               I                      "   r      pcfg-pull-up             6        "         pcfg-pull-down           C        "         pcfg-pull-none           R        "         pcfg-pull-none-drv-level-2           R        _           "         pcfg-pull-up-drv-level-1             6        _           "         pcfg-pull-up-drv-level-2             6        _           "         pcfg-pull-none-smt           R         n        "         auddsm        bt1120        can0          can1          can2          cif       clk32k        cpu       ddrphych0         ddrphych1         ddrphych2         ddrphych3         dp0       dp1       emmc       emmc-rstnout                                "         emmc-bus8                                                                                                                   "         emmc-clk                                "         emmc-cmd                                 "         emmc-data-strobe                                "            eth1          fspi          gmac1         gpu       hdmi          i2c0       i2c0m0-xfer                                            "   .         i2c1       i2c1m0-xfer                    	             	           "            i2c2       i2c2m0-xfer                    	             	           "            i2c3       i2c3m0-xfer                   	            	           "            i2c4       i2c4m0-xfer                   	            	           "            i2c5       i2c5m0-xfer                   	            	           "            i2c6       i2c6m0-xfer                    	             	           "            i2c7       i2c7m0-xfer                   	            	           "            i2c8       i2c8m0-xfer                   	            	           "            i2s0       i2s0-lrck                               "         i2s0-mclk                               "         i2s0-sclk                               "         i2s0-sdi0                               "         i2s0-sdo0                               "            i2s1       i2s1m0-lrck                             "         i2s1m0-sclk                             "         i2s1m0-sdi0                             "         i2s1m0-sdi1                             "         i2s1m0-sdi2                             "         i2s1m0-sdi3                             "         i2s1m0-sdo0               	              "         i2s1m0-sdo1               
              "         i2s1m0-sdo2                             "         i2s1m0-sdo3                             "            i2s2       i2s2m1-lrck                             "         i2s2m1-sclk                             "         i2s2m1-sdi                
              "         i2s2m1-sdo                              "            i2s3       i2s3-lrck                               "         i2s3-sclk                               "         i2s3-sdi                                "         i2s3-sdo                                "            jtag          litcpu        mcu       mipi          npu       pcie20x1          pcie30phy         pcie30x1          pcie30x2          pcie30x4          pdm0          pdm1          pmic       pmic-pins         p                                                                                                      "            pmu       pwm0       pwm0m0-pins                              "   1         pwm1       pwm1m0-pins                              "   2         pwm2       pwm2m0-pins                              "   3         pwm3       pwm3m0-pins                              "   4         pwm4       pwm4m0-pins                              "            pwm5       pwm5m0-pins                	              "            pwm6       pwm6m0-pins                              "            pwm7       pwm7m0-pins                              "            pwm8       pwm8m0-pins                             "            pwm9       pwm9m0-pins                             "            pwm10      pwm10m0-pins                                 "            pwm11      pwm11m0-pins                                "            pwm12      pwm12m0-pins                                "            pwm13      pwm13m0-pins                                "            pwm14      pwm14m0-pins                                "            pwm15      pwm15m0-pins                                "            refclk        sata          sata0         sata1         sata2         sdio       sdiom1-pins       `                                                                                   "   ~         sdmmc      sdmmc-bus4        @                                                          "   }      sdmmc-clk                               "   z      sdmmc-cmd                               "   {      sdmmc-det                                "   |         spdif0        spdif1        spi0       spi0m0-pins       0                                                 "         spi0m0-cs0                               "         spi0m0-cs1                               "            spi1       spi1m1-pins       0                                              "         spi1m1-cs0                              "         spi1m1-cs1                              "            spi2       spi2m2-pins       0                                                 "         spi2m2-cs0                 	              "         spi2m2-cs1                               "            spi3       spi3m1-pins       0                                              "         spi3m1-cs0                              "         spi3m1-cs1                              "            spi4       spi4m0-pins       0                                              "         spi4m0-cs0                              "         spi4m0-cs1                              "            tsadc      tsadc-shut-org                               "            uart0      uart0m1-xfer                                 	              "   0         uart1      uart1m1-xfer                      
            
           "            uart2      uart2m0-xfer                       
             
           "            uart3      uart3m1-xfer                      
            
           "            uart4      uart4m1-xfer                      
            
           "            uart5      uart5m1-xfer                      
            
           "            uart6      uart6m1-xfer                       
            
           "            uart7      uart7m1-xfer                      
            
           "            uart8      uart8m1-xfer                      
            
           "            uart9      uart9m1-xfer                      
            
           "            vop       bt656         gpio-func      tsadc-gpio-func                               "            eth0          gmac0      gmac0-miim                                           "  	      gmac0-rx-bus2         0                                              "        gmac0-tx-bus2         0                                              "  
      gmac0-rgmii-clk                                          "        gmac0-rgmii-bus       @                                	            
              "           audio      headphone-detect                                 "        headphone-amplifier-en                               "        speaker-amplifier-en                                 "           rtl8111    rtl8111-isolate                              "   t         rtl8211f       rtl8211f-rst                                 "           hym8563    hym8563-int                               "            pcie2      pcie2-1-rst                              "   s         pcie3      pcie3-reset                              "         vcc3v3-pcie30-en                                 "  %         usb    vcc5v0-host-en                               "  &         usb-typec      typec5v-pwren                                "  #      usbc0-int                                "               usb@fc400000              rockchip,rk3588-dwc3 snps,dwc3              @       @                                5                       (ref_clk suspend_clk bus_clk         ahost            i                 nusb2-phy usb3-phy         
  xutmi_wide           4                    S                                            Bokay          syscon@fd5b8000       %    rockchip,rk3588-pcie3-phy-grf syscon                [                "        syscon@fd5c0000       $    rockchip,rk3588-pipe-phy-grf syscon             \                 "        syscon@fd5cc000       $    rockchip,rk3588-usbdpphy-grf syscon             \       @         "        syscon@fd5d4000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd               ]@       @                      +           "     usb2phy@4000              rockchip,rk3588-usb2phy           @                        5             (phyclk          usb480m_phy1                                      n             {phy apb         Bokay            "     otg-port                        Bokay            "               i2s@fddc8000              rockchip,rk3588-i2s-tdm             ܀                                      5                       (mclk_tx mclk_rx hclk            <             N                 n           tx          4                            {tx-m            e          	  Bdisabled          i2s@fddf4000              rockchip,rk3588-i2s-tdm             @                                      5     9     9     ?        (mclk_tx mclk_rx hclk            <     6        N                 n           tx          4                            {tx-m            e          	  Bdisabled          i2s@fddf8000              rockchip,rk3588-i2s-tdm             ߀                                      5     +     +     '        (mclk_tx mclk_rx hclk            <     (        N                 n           rx          4                            {rx-m            e          	  Bdisabled          i2s@fde00000              rockchip,rk3588-i2s-tdm                                                    5     &     &     "        (mclk_tx mclk_rx hclk            <     #        N                 n           rx          4                            {rx-m            e          	  Bdisabled          pcie@fe150000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie                        +           v             0  5     @     E     ;     J     O     t      )  (aclk_mst aclk_slv aclk_dbi pclk aux pipe            pci       P                                                                           
sys pmc msg legacy err                                          `                                                                                                                                                       i         	  npcie-phy            4       "      T                                                       @      	        @         0     
@        @                                     dbi apb config               &     +      	  {pwr pipe            Bokay            default                       r                    legacy-interrupt-controller                                                                           "            pcie-ep@fe150000              rockchip,rk3588-pcie-ep       P     
@             
@                         	        @      
@0                 dbi dbi2 apb addr_space atu       0  5     @     E     ;     J     O     t      )  (aclk_mst aclk_slv aclk_dbi pclk aux pipe                                                                                                                                       +  
sys pmc msg legacy err dma0 dma1 dma2 dma3                                i         	  npcie-phy            4       "             &     +      	  {pwr pipe          	  Bdisabled          pcie@fe160000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie                        +           v            0  5     A     F     <     K     P     u      )  (aclk_mst aclk_slv aclk_dbi pclk aux pipe            pci       P                                                                              
sys pmc msg legacy err                                          `                                                                                                                                                i         	  npcie-phy            4       "      T                                                       @      	@       @         0     
@@       @                                     dbi apb config               '     ,      	  {pwr pipe          	  Bdisabled       legacy-interrupt-controller                                                                            "           pcie@fe170000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie           v       /      0  5     B     G     =     L     Q           )  (aclk_mst aclk_slv aclk_dbi pclk aux pipe            pci       P                                                                                
sys pmc msg legacy err                                          `                                                                                                                        q                          i           	  npcie-phy            4       "      T                                                       @      	       @         0     
@       @                                     dbi apb config               (     -      	  {pwr pipe                         +         	  Bdisabled       legacy-interrupt-controller                                                                            "           ethernet@fe1b0000         &    rockchip,rk3588-gmac snps,dwmac-4.20a                                                                     
macirq eth_wake_irq       (  5     6     7     X     ]     4      0  (stmmaceth clk_mac_ref pclk_mac aclk_mac ptp_ref         4       !             #      
  {stmmaceth              j           -                   &        7          J           ]        Bokay            output                    rgmii-rxid            	  
              default                        C   mdio              snps,dwmac-mdio                      +       ethernet-phy@1            ethernet-phy-id001c.c916                       default                     N                     r              "           stmmac-axi-config           f                                 p                      "        rx-queues-config                       "     queue0        queue1           tx-queues-config                       "     queue0        queue1              sata@fe220000         '    rockchip,rk3588-dwc-ahci snps,dwc-ahci              "                                    (  5     c     `     f     U     p        (sata pmalive rxoob ref asic                                 +          	  Bdisabled       sata-port@0                      @          i           	  nsata-phy                                     phy@fed90000              rockchip,rk3588-usbdp-phy                                           5          m     W          (refclk immortal pclk utmi         (                                       {init cmn lane pcs_apb pma_apb           }                                          Bokay                          "         phy@fee10000              rockchip,rk3588-naneng-combphy                               5          w     W        (ref apb pipe            <             L                         =     D        {phy apb            -                	  Bdisabled            "        phy@fee80000              rockchip,rk3588-pcie3-phy                                            5     y        (pclk                 H        {phy            -                  Bokay            "         opp-table-cluster0            operating-points-v2                  "      opp-1008000000          '    <         . 
L 
L ~        <  @      opp-1200000000          '    G         . 
4 
4 ~        <  @      opp-1416000000          '    Tfr         .   ~        <  @         M      opp-1608000000          '    _"         . P P ~        <  @      opp-1800000000          '    kI         . ~ ~ ~        <  @         opp-table-cluster1            operating-points-v2                  "      opp-1200000000          '    G         . 
L 
L B@        <  @      opp-1416000000          '    Tfr         .   B@        <  @      opp-1608000000          '    _"         .   B@        <  @      opp-1800000000          '    kI         . P P B@        <  @      opp-2016000000          '    x)         . H H B@        <  @      opp-2208000000          '    h         . l l B@        <  @      opp-2400000000          '             . B@ B@ B@        <  @         opp-table-cluster2            operating-points-v2                  "      opp-1200000000          '    G         . 
L 
L B@        <  @      opp-1416000000          '    Tfr         .   B@        <  @      opp-1608000000          '    _"         .   B@        <  @      opp-1800000000          '    kI         . P P B@        <  @      opp-2016000000          '    x)         . H H B@        <  @      opp-2208000000          '    h         . l l B@        <  @      opp-2400000000          '             . B@ B@ B@        <  @         opp-table-gpu             operating-points-v2         "   !   opp-300000000           '             . 
L 
L P      opp-400000000           '    ׄ         . 
L 
L P      opp-500000000           '    e         . 
L 
L P      opp-600000000           '    #F         . 
L 
L P      opp-700000000           '    )'         . 
` 
` P      opp-800000000           '    /         . q q P      opp-900000000           '    5         . 5  5  P      opp-1000000000          '    ;         . P P P         chosen          Yserial2:1500000n8         adc-keys          	    adc-keys            e             qbuttons          w@           d   button-vol-up         
  Volume Up              s          Bh      button-vol-down         Volume Down            r         \      button-menu         Menu                              button-escape           Escape                      8         analog-sound              simple-audio-card           default                   RK3588 EVB1 Audio                                 #i2s         <          [                y           Headphones Speaker       d  Speaker Amplifier INL LOUT2 Speaker Amplifier INR ROUT2 Speaker Speaker Amplifier OUTL Speaker Speaker Amplifier OUTR Headphones Amplifier INL LOUT1 Headphones Amplifier INR ROUT1 Headphones Headphones Amplifier OUTL Headphones Headphones Amplifier OUTR LINPUT1 Onboard Microphone RINPUT1 Onboard Microphone LINPUT2 Microphone Jack RINPUT2 Microphone Jack       ^  Microphone Microphone Jack Microphone Onboard Microphone Headphone Headphones Speaker Speaker      simple-audio-card,cpu                   simple-audio-card,codec                             "           headphone-amplifier           simple-audio-amplifier                           default                   Headphones Amplifier            "        speaker-amplifier             simple-audio-amplifier                           default                   Speaker Amplifier           "        backlight             pwm-backlight           &          3        a          pcie20-avdd0v85-regulator             regulator-fixed         	pcie20_avdd0v85          	V         	j        	| P        	 P        8         pcie20-avdd1v8-regulator              regulator-fixed         	pcie20_avdd1v8           	V         	j        	| w@        	 w@        8  !      pcie30-avdd0v75-regulator             regulator-fixed         	pcie30_avdd0v75          	V         	j        	| q        	 q        8  "      pcie30-avdd1v8-regulator              regulator-fixed         	pcie30_avdd1v8           	V         	j        	| w@        	 w@        8  !      vbus5v0-typec-regulator           regulator-fixed          C        t   r               default           #        	vbus5v0_typec           	| LK@        	 LK@        8  $        "         vcc12v-dcin-regulator             regulator-fixed         	vcc12v_dcin          	V         	j        	|          	          "        vcc3v3-pcie30-regulator           regulator-fixed         	vcc3v3_pcie30           	| 2Z        	 2Z         C                          V          8          default           %        "        vcc5v0-host-regulator             regulator-fixed         	vcc5v0_host          	j         	V        	| LK@        	 LK@         C        t   r               default           &        8  $        "   ,      vcc5v0-sys-regulator              regulator-fixed         	vcc5v0_sys           	V         	j        	| LK@        	 LK@        8          "         vcc5v0-usbdcin-regulator              regulator-fixed         	vcc5v0_usbdcin           	V         	j        	| LK@        	 LK@        8          "  '      vcc5v0-usb-regulator              regulator-fixed         	vcc5v0_usb           	V         	j        	| LK@        	 LK@        8  '        "  $         	compatible interrupt-parent #address-cells #size-cells model gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 i2c6 i2c7 i2c8 serial0 serial1 serial2 serial3 serial4 serial5 serial6 serial7 serial8 serial9 spi0 spi1 spi2 spi3 spi4 ethernet0 mmc0 cpu device_type reg enable-method capacity-dmips-mhz clocks assigned-clocks assigned-clock-rates cpu-idle-states i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache dynamic-power-coefficient #cooling-cells operating-points-v2 cpu-supply phandle entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us cache-level cache-unified ports arm,smc-id shmem #clock-cells #reset-cells interrupts clock-frequency clock-output-names interrupt-names ranges no-map clock-names power-domains status mali-supply sram-supply dr_mode phys phy-names phy_type resets snps,dis_enblslpm_quirk snps,dis-u1-entry-quirk snps,dis-u2-entry-quirk snps,dis-u2-freeclk-exists-quirk snps,dis-del-phy-power-chg-quirk snps,dis-tx-ipgap-linecheck-quirk usb-role-switch remote-endpoint snps,dis_rxdet_inp3_quirk #iommu-cells reset-names #phy-cells phy-supply rockchip,grf pinctrl-0 pinctrl-names dmas dma-names reg-shift reg-io-width #pwm-cells #power-domain-cells pm_qos iommus reg-names rockchip,vop-grf rockchip,vo1-grf rockchip,pmu assigned-clock-parents #sound-dai-cells bus-range #interrupt-cells interrupt-map-mask interrupt-map linux,pci-domain max-link-speed msi-map num-lanes reset-gpios interrupt-controller rockchip,php-grf snps,axi-config snps,mixed-burst snps,mtl-rx-config snps,mtl-tx-config snps,tso snps,blen snps,wr_osr_lmt snps,rd_osr_lmt snps,rx-queues-to-use snps,tx-queues-to-use ports-implemented hba-port-cap snps,rx-ts-max snps,tx-ts-max fifo-depth max-frequency bus-width no-sdio no-sd non-removable mmc-hs400-1_8v mmc-hs400-enhanced-strobe rockchip,trcm-sync-tx-only mbi-alias mbi-ranges msi-controller #msi-cells affinity arm,pl330-periph-burst #dma-cells vbus-supply label data-role op-sink-microwatt power-role sink-pdos source-pdos try-power-role wakeup-source num-cs #gpio-cells gpio-controller spi-max-frequency system-power-controller vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply vcc10-supply vcc11-supply vcc12-supply vcc13-supply vcc14-supply vcca-supply pins function regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-name regulator-enable-ramp-delay regulator-coupled-with regulator-coupled-max-spread regulator-off-in-suspend regulator-suspend-microvolt regulator-on-in-suspend polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device rockchip,hw-tshut-temp rockchip,hw-tshut-mode rockchip,hw-tshut-polarity pinctrl-1 #thermal-sensor-cells #io-channel-cells vref-supply AVDD-supply DVDD-supply HPVDD-supply bits rockchip,u2phy-grf rockchip,usb-grf rockchip,usbdpphy-grf rockchip,vo-grf mode-switch orientation-switch sbu1-dc-gpios sbu2-dc-gpios rockchip,pipe-grf rockchip,pipe-phy-grf gpio-ranges bias-pull-up bias-pull-down bias-disable drive-strength input-schmitt-enable rockchip,pins vpcie3v3-supply clock_in_out phy-handle phy-mode rx_delay tx_delay reset-assert-us reset-deassert-us rockchip,dp-lane-mux rockchip,phy-grf opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend stdout-path io-channels io-channel-names keyup-threshold-microvolt poll-interval linux,code press-threshold-microvolt simple-audio-card,name simple-audio-card,aux-devs simple-audio-card,bitclock-master simple-audio-card,format simple-audio-card,frame-master simple-audio-card,hp-det-gpio simple-audio-card,mclk-fs simple-audio-card,pin-switches simple-audio-card,routing simple-audio-card,widgets sound-dai system-clock-frequency enable-gpios sound-name-prefix power-supply pwms vin-supply enable-active-high startup-delay-us 