 +    8    (                                              coolpi,pi-4b rockchip,rk3588s                                    +            7RK3588S CoolPi 4 Model B       aliases          =/pinctrl/gpio@fd8a0000           C/pinctrl/gpio@fec20000           I/pinctrl/gpio@fec30000           O/pinctrl/gpio@fec40000           U/pinctrl/gpio@fec50000           [/i2c@fd880000            `/i2c@fea90000            e/i2c@feaa0000            j/i2c@feab0000            o/i2c@feac0000            t/i2c@fead0000            y/i2c@fec80000            ~/i2c@fec90000            /i2c@feca0000            /serial@fd890000             /serial@feb40000             /serial@feb50000             /serial@feb60000             /serial@feb70000             /serial@feb80000             /serial@feb90000             /serial@feba0000             /serial@febb0000             /serial@febc0000             /spi@feb00000            /spi@feb10000            /spi@feb20000            /spi@feb30000            /spi@fecb0000            /mmc@fe2e0000            /mmc@fe2c0000            /mmc@fe2d0000         cpus                         +       cpu-map    cluster0       core0                     core1                     core2                     core3                        cluster1       core0                     core1                        cluster2       core0                     core1               	            cpu@0           cpu           arm,cortex-a55                      psci            "          5   
            <   
            L0,         a           q           ~   @                                 @                                                                          "         cpu@100         cpu           arm,cortex-a55                     psci            "          5   
            a           q           ~   @                                 @                                                               "         cpu@200         cpu           arm,cortex-a55                     psci            "          5   
            a           q           ~   @                                 @                                                               "         cpu@300         cpu           arm,cortex-a55                     psci            "          5   
            a           q           ~   @                                 @                                                               "         cpu@400         cpu           arm,cortex-a76                     psci            "           5   
           <   
           L0,         a           q           ~   @                                 @                                                                         "         cpu@500         cpu           arm,cortex-a76                     psci            "           5   
           a           q           ~   @                                 @                                                              "         cpu@600         cpu           arm,cortex-a76                     psci            "           5   
           <   
           L0,         a           q           ~   @                                 @                                                                         "         cpu@700         cpu           arm,cortex-a76                     psci            "           5   
           a           q           ~   @                                 @                                                              "   	      idle-states         *psci       cpu-sleep             arm,idle-state           7        H           _   d        p   x                  "            l2-cache-l0           cache           s              @                                                  "         l2-cache-l1           cache           s              @                                                  "         l2-cache-l2           cache           s              @                                                  "         l2-cache-l3           cache           s              @                                                  "         l2-cache-b0           cache           s              @                                                  "         l2-cache-b1           cache           s              @                                                  "         l2-cache-b2           cache           s              @                                                  "         l2-cache-b3           cache           s              @                                                  "            l3-cache              cache           s 0             @                                       "         display-subsystem             rockchip,display-subsystem                   firmware       optee             linaro,optee-tz         smc       scmi              arm,scmi-smc                                              +       protocol@14                               "   
      protocol@16                                   pmu-a55           arm,cortex-a55-pmu                            pmu-a76           arm,cortex-a76-pmu                            psci              arm,psci-1.0            smc       clock-0           fixed-clock         )׫        spll                      timer             arm,armv8-timer       P                                               
                          %  
sec-phys phys virt hyp-phys hyp-virt          clock-1           fixed-clock         n6         xin24m                    clock-2           fixed-clock                    xin32k                    reserved-memory                      +               shmem@10f000              arm,scmi-shmem                                !        "            gpu@fb000000          *    rockchip,rk3588-mali arm,mali-valhall-csf                                             <   
           L         5                       (core coregroup stacks                   0         \              ]              ^               
job mmu gpu         4               Bokay               !        I   "        "         usb@fc000000              rockchip,rk3588-dwc3 snps,dwc3                      @                                5                       (ref_clk suspend_clk bus_clk         Uotg         ]   #   $           busb2-phy usb3-phy         
  lutmi_wide           4               u     R         |                                                   	  Bdisabled          usb@fc800000          "    rockchip,rk3588-ehci generic-ehci                                                      5                  %        ]   &        busb         4               Bokay          usb@fc840000          "    rockchip,rk3588-ohci generic-ohci                                                      5                  %        ]   &        busb         4               Bokay          usb@fc880000          "    rockchip,rk3588-ehci generic-ehci                                                      5                  '        ]   (        busb         4               Bokay          usb@fc8c0000          "    rockchip,rk3588-ohci generic-ohci                                                      5                  '        ]   (        busb         4               Bokay          usb@fcd00000              rockchip,rk3588-dwc3 snps,dwc3                     @                              (  5     j     i     h     k     r      &  (ref_clk suspend_clk bus_clk utmi pipe           Uhost            ]   )         	  busb3-phy          
  lutmi_wide           u     4         |                                    (      	  Bdisabled          iommu@fc900000            arm,smmu-v3                             @        q             s             v             o               
eventq gerror priq cmdq-sync            B         	  Bdisabled          iommu@fcb00000            arm,smmu-v3                             @        }                                       {               
eventq gerror priq cmdq-sync            B         	  Bdisabled          syscon@fd58a000       )    rockchip,rk3588-pmugrf syscon simple-mfd                X                "   n      syscon@fd58c000           rockchip,rk3588-sys-grf syscon              X                "   i      syscon@fd5a4000           rockchip,rk3588-vop-grf syscon              Z@                 "   j      syscon@fd5a6000           rockchip,rk3588-vo0-grf syscon              Z`                 5             "         syscon@fd5a8000           rockchip,rk3588-vo1-grf syscon              Z       @         5             "   k      syscon@fd5ac000           rockchip,rk3588-usb-grf syscon              Z       @         "         syscon@fd5b0000           rockchip,rk3588-php-grf syscon              [                 "   +      syscon@fd5bc000       $    rockchip,rk3588-pipe-phy-grf syscon             [                "         syscon@fd5c4000       $    rockchip,rk3588-pipe-phy-grf syscon             \@                "         syscon@fd5c8000       $    rockchip,rk3588-usbdpphy-grf syscon             \       @         "         syscon@fd5d0000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd               ]        @                      +           "      usb2phy@0             rockchip,rk3588-usb2phy                                    5             (phyclk          usb480m_phy0                                 u     m             Ophy apb       	  Bdisabled            "      otg-port            [          	  Bdisabled            "   #            syscon@fd5d8000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd               ]       @                      +      usb2phy@8000              rockchip,rk3588-usb2phy                                   5             (phyclk          usb480m_phy2                                 u     o             Ophy apb         Bokay            "   %   host-port           [            Bokay            f   *        "   &            syscon@fd5dc000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd               ]       @                      +      usb2phy@c000              rockchip,rk3588-usb2phy                                   5             (phyclk          usb480m_phy3                                 u     p              Ophy apb         Bokay            "   '   host-port           [            Bokay            "   (            syscon@fd5e0000       $    rockchip,rk3588-hdptxphy-grf syscon             ^                 "         syscon@fd5f0000           rockchip,rk3588-ioc syscon              _                 "         sram@fd600000         
    mmio-sram               `                         `                          +         clock-controller@fd7c0000             rockchip,rk3588-cru             |                <                                                                         ]      q                 @  LA .  2Fq )׫ׄ e /  ׄ   e Zр         q   +                              "         i2c@fd880000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                                    =               5     t     s      	  (i2c pclk            ~   ,        default                      +            Bokay       regulator@42              rockchip,rk8602            B                   vdd_cpu_big0_s0                            dp                            -   -        "      regulator-state-mem          8         regulator@43               rockchip,rk8603 rockchip,rk8602            C                   vdd_cpu_big1_s0                            dp                            -   -        "      regulator-state-mem          8            serial@fd890000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      K               5                  (baudclk apb_pclk            Q   .      .           Vtx rx           ~   /        default         `           j         	  Bdisabled          pwm@fd8b0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              5                	  (pwm pclk            ~   0        default         w         	  Bdisabled          pwm@fd8b0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                             5                	  (pwm pclk            ~   1        default         w         	  Bdisabled          pwm@fd8b0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              5                	  (pwm pclk            ~   2        default         w           Bokay          pwm@fd8b0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm              0               5                	  (pwm pclk            ~   3        default         w         	  Bdisabled          power-management@fd8d8000         &    rockchip,rk3588-pmu syscon simple-mfd                               "   l   power-controller          !    rockchip,rk3588-power-controller                                    +            Bokay            "       power-domain@8                                              +       power-domain@9             	         5     !     #     "                4   5   6                                 +       power-domain@10            
        5     !     #     "           7                  power-domain@11                    5     !     #     "           8                        power-domain@12                    5                          9   :   ;   <                  power-domain@13                                 +                   power-domain@14                  (  5                                    =                  power-domain@15                     5                               >                  power-domain@16                    5                     ?   @   A                     +                   power-domain@17                     5                               B   C   D                        power-domain@21                    5                                                                                                      E   F   G   H   I   J   K   L                     +                   power-domain@23                    5      C      A                M                  power-domain@14                     5                               =                  power-domain@15                    5                          >                  power-domain@22                    5                     N                     power-domain@24                    5     [     Z     ]           O   P                     +                   power-domain@25                  8  5                                   Z           Q                     power-domain@26                  8  5                                   Q           R   S                  power-domain@27                  0  5                                         T   U   V   W                     +                   power-domain@28                     5                               X   Y                  power-domain@29                  (  5                                    Z   [                     power-domain@30                    5     z     {           \                  power-domain@31                  @  5     W                                              ]   ^   _   `                  power-domain@33            !        5     W     Z     [                  power-domain@34            "        5     W     Z     [                  power-domain@37            %        5          2           a                  power-domain@38            &        5      4      5                  power-domain@40            (           b                        video-codec@fdb50000          +    rockchip,rk3588-vpu121 rockchip,rk3568-vpu                                      w               
vdpu            5                
  (aclk hclk              c        4             iommu@fdb50800        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu                     @               v               (aclk iface          5                  4               B            "   c      rga@fdb80000          (    rockchip,rk3588-rga rockchip,rk3288-rga                                    t               5                       (aclk hclk sclk          u     r     q     p        Ocore axi ahb            4             video-codec@fdba0000              rockchip,rk3588-vepu121                                     z               5                
  (aclk hclk              d        4             iommu@fdba0800        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu                     @               y               5                  (aclk iface          4               B            "   d      video-codec@fdba4000              rockchip,rk3588-vepu121             @                       |               5                
  (aclk hclk              e        4             iommu@fdba4800        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu             H        @               {               5                  (aclk iface          4               B            "   e      video-codec@fdba8000              rockchip,rk3588-vepu121                                    ~               5                
  (aclk hclk              f        4             iommu@fdba8800        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu                     @               }               5                  (aclk iface          4               B            "   f      video-codec@fdbac000              rockchip,rk3588-vepu121                                                   5                
  (aclk hclk              g        4             iommu@fdbac800        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu                     @                              5                  (aclk iface          4               B            "   g      video-codec@fdc70000              rockchip,rk3588-av1-vpu                                     l               
vdpu            <      A      C        Lׄ ׄ         5      A      C      
  (aclk hclk           4                u                           vop@fdd90000              rockchip,rk3588-vop                      B     P                vop gamma-lut                               8  5     ]     \     a     b     c     d     [      7  (aclk hclk dclk_vp0 dclk_vp1 dclk_vp2 dclk_vp3 pclk_vop             h        4               q   i           j           k           l      	  Bdisabled       ports                        +            "      port@0                       +                      port@1                       +                     port@2                       +                     port@3                       +                           iommu@fdd97e00        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu              ~                                                  5     ]     \        (aclk iface          B            4             	  Bdisabled            "   h      i2s@fddc0000              rockchip,rk3588-i2s-tdm                                                    5                       (mclk_tx mclk_rx hclk            <                           Q   m            Vtx          4               u             Otx-m                      	  Bdisabled          i2s@fddf0000              rockchip,rk3588-i2s-tdm                                                    5     4     4     5        (mclk_tx mclk_rx hclk            <     1                      Q   m           Vtx          4               u             Otx-m                      	  Bdisabled          i2s@fddfc000              rockchip,rk3588-i2s-tdm                                                   5     0     0     ,        (mclk_tx mclk_rx hclk            <     -                      Q   m           Vrx          4               u             Orx-m                      	  Bdisabled          qos@fdf35000              rockchip,rk3588-qos syscon              P                 "   9      qos@fdf35200              rockchip,rk3588-qos syscon              R                 "   :      qos@fdf35400              rockchip,rk3588-qos syscon              T                 "   ;      qos@fdf35600              rockchip,rk3588-qos syscon              V                 "   <      qos@fdf36000              rockchip,rk3588-qos syscon              `                 "   \      qos@fdf39000              rockchip,rk3588-qos syscon                               "   a      qos@fdf3d800              rockchip,rk3588-qos syscon                               "   b      qos@fdf3e000              rockchip,rk3588-qos syscon                               "   ^      qos@fdf3e200              rockchip,rk3588-qos syscon                               "   ]      qos@fdf3e400              rockchip,rk3588-qos syscon                               "   _      qos@fdf3e600              rockchip,rk3588-qos syscon                               "   `      qos@fdf40000              rockchip,rk3588-qos syscon                                "   Z      qos@fdf40200              rockchip,rk3588-qos syscon                               "   [      qos@fdf40400              rockchip,rk3588-qos syscon                               "   T      qos@fdf40500              rockchip,rk3588-qos syscon                               "   U      qos@fdf40600              rockchip,rk3588-qos syscon                               "   V      qos@fdf40800              rockchip,rk3588-qos syscon                               "   W      qos@fdf41000              rockchip,rk3588-qos syscon                               "   X      qos@fdf41100              rockchip,rk3588-qos syscon                               "   Y      qos@fdf60000              rockchip,rk3588-qos syscon                                "   ?      qos@fdf60200              rockchip,rk3588-qos syscon                               "   @      qos@fdf60400              rockchip,rk3588-qos syscon                               "   A      qos@fdf61000              rockchip,rk3588-qos syscon                               "   B      qos@fdf61200              rockchip,rk3588-qos syscon                               "   C      qos@fdf61400              rockchip,rk3588-qos syscon                               "   D      qos@fdf62000              rockchip,rk3588-qos syscon                                "   =      qos@fdf63000              rockchip,rk3588-qos syscon              0                 "   >      qos@fdf64000              rockchip,rk3588-qos syscon              @                 "   M      qos@fdf66000              rockchip,rk3588-qos syscon              `                 "   E      qos@fdf66200              rockchip,rk3588-qos syscon              b                 "   F      qos@fdf66400              rockchip,rk3588-qos syscon              d                 "   G      qos@fdf66600              rockchip,rk3588-qos syscon              f                 "   H      qos@fdf66800              rockchip,rk3588-qos syscon              h                 "   I      qos@fdf66a00              rockchip,rk3588-qos syscon              j                 "   J      qos@fdf66c00              rockchip,rk3588-qos syscon              l                 "   K      qos@fdf66e00              rockchip,rk3588-qos syscon              n                 "   L      qos@fdf67000              rockchip,rk3588-qos syscon              p                 "   N      qos@fdf67200              rockchip,rk3588-qos syscon              r               qos@fdf70000              rockchip,rk3588-qos syscon                                "   7      qos@fdf71000              rockchip,rk3588-qos syscon                               "   8      qos@fdf72000              rockchip,rk3588-qos syscon                                "   4      qos@fdf72200              rockchip,rk3588-qos syscon              "                 "   5      qos@fdf72400              rockchip,rk3588-qos syscon              $                 "   6      qos@fdf80000              rockchip,rk3588-qos syscon                                "   Q      qos@fdf81000              rockchip,rk3588-qos syscon                               "   R      qos@fdf81200              rockchip,rk3588-qos syscon                               "   S      qos@fdf82000              rockchip,rk3588-qos syscon                                "   O      qos@fdf82200              rockchip,rk3588-qos syscon              "                 "   P      dfi@fe060000                                   rockchip,rk3588-dfi       @                       &              0              :                  n      pcie@fe180000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie              0   ?      0  5     C     H     >     M     R           )  (aclk_mst aclk_slv aclk_dbi pclk aux pipe            pci       P                                                                                
sys pmc msg legacy err                                           `  3                  o                      o                     o                     o           A           R           a  0    p  0            i           ]   )         	  bpcie-phy            4       "      T                                                       @      	       @         0     
@       @                                     dbi apb config          u     )     .      	  Opwr pipe                         +         	  Bdisabled       legacy-interrupt-controller          s                                                                  "   o         pcie@fe190000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie              @   O      0  5     D     I     ?     N     S     s      )  (aclk_mst aclk_slv aclk_dbi pclk aux pipe            pci       P                                                                                
sys pmc msg legacy err                                           `  3                  q                      q                     q                     q           A           R           a  @    p  @            i           ]   r         	  bpcie-phy            4       "      T                                                       @      
        @         0     
A        @                                     dbi apb config          u     *     /      	  Opwr pipe                         +           Bokay            default         ~   s           t          legacy-interrupt-controller          s                                                                  "   q         ethernet@fe1c0000         &    rockchip,rk3588-gmac snps,dwmac-4.20a                                                                     
macirq eth_wake_irq       (  5     6     7     Y     ^     5      0  (stmmaceth clk_mac_ref pclk_mac aclk_mac ptp_ref         4       !        u     $      
  Ostmmaceth           q   i           +           u                    v           w               	  Bdisabled       mdio              snps,dwmac-mdio                      +          stmmac-axi-config                                                                  "   u      rx-queues-config                       "   v   queue0        queue1           tx-queues-config            5           "   w   queue0        queue1              sata@fe210000         '    rockchip,rk3588-dwc-ahci snps,dwc-ahci              !                                    (  5     b     _     e     T     o        (sata pmalive rxoob ref asic         K                        +          	  Bdisabled       sata-port@0                     ] @          ]   r         	  bsata-phy            j            y             sata@fe230000         '    rockchip,rk3588-dwc-ahci snps,dwc-ahci              #                                    (  5     d     a     g     V     q        (sata pmalive rxoob ref asic         K                        +          	  Bdisabled       sata-port@0                     ] @          ]   )         	  bsata-phy            j            y             spi@fe2b0000              rockchip,sfc                +        @                               5     /     0        (clk_sfc hclk_sfc                         +          	  Bdisabled          mmc@fe2c0000          0    rockchip,rk3588-dw-mshc rockchip,rk3288-dw-mshc             ,        @                                5   
      
   	                  (biu ciu ciu-drive ciu-sample                       р        default         ~   x   y   z   {        4       (        Bokay                                            |                                                     }           ~      mmc@fe2d0000          0    rockchip,rk3588-dw-mshc rockchip,rk3288-dw-mshc             -        @                                5                            (biu ciu ciu-drive ciu-sample                       р        default         ~              4       %        Bokay                                                   %        ;            F                  L      mmc@fe2e0000              rockchip,rk3588-dwcmshc             .                                       <     -     .     ,        L n6        (  5     ,     *     +     -     .        (core bus axi block timer                     ~                       default       (  u                                 Ocore bus axi block timer            Bokay                        Z         i                  F         L      i2s@fe470000              rockchip,rk3588-i2s-tdm             G                                       5      +      /      (        (mclk_tx mclk_rx hclk            <      )      -                            Q   .       .           Vtx rx           4       &        u      *      +      
  Otx-m rx-m                    default         ~                                   Bokay       port            "      endpoint            i2s                               "               i2s@fe480000              rockchip,rk3588-i2s-tdm             H                                       5     y     }     u        (mclk_tx mclk_rx hclk            Q   .      .           Vtx rx           u     ^     _      
  Otx-m rx-m                    default       (  ~                                                	  Bdisabled          i2s@fe490000          (    rockchip,rk3588-i2s rockchip,rk3066-i2s             I                                       5                    (i2s_clk i2s_hclk            <                            Q                     Vtx rx           4       &        default         ~                              	  Bdisabled          i2s@fe4a0000          (    rockchip,rk3588-i2s rockchip,rk3066-i2s             J                                       5      %              (i2s_clk i2s_hclk            <      "                      Q                    Vtx rx           4       &        default         ~                              	  Bdisabled          interrupt-controller@fe600000             arm,gic-v3               `             h                       	                s            a               8                                                  +           "      msi-controller@fe640000           arm,gic-v3-its              d                                     "   p      msi-controller@fe660000           arm,gic-v3-its              f                                   ppi-partitions     interrupt-partition-0                               "         interrupt-partition-1                       	        "               dma-controller@fea10000           arm,pl330 arm,primecell                     @                 V              W                        5      n      	  (apb_pclk            	           "   .      dma-controller@fea30000           arm,pl330 arm,primecell                     @                 X              Y                        5      o      	  (apb_pclk            	           "         i2c@fea90000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              5            {      	  (i2c pclk                  >               ~           default                      +          	  Bdisabled          i2c@feaa0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              5            |      	  (i2c pclk                  ?               ~           default                      +            Bokay       regulator@42              rockchip,rk8602            B                   vdd_npu_s0                             dp          ~                  -   -   regulator-state-mem          8            i2c@feab0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              5            }      	  (i2c pclk                  @               ~           default                      +          	  Bdisabled          i2c@feac0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              5            ~      	  (i2c pclk                  A               ~           default                      +          	  Bdisabled          i2c@fead0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              5                  	  (i2c pclk                  B               ~           default                      +          	  Bdisabled          timer@feae0000        ,    rockchip,rk3588-timer rockchip,rk3288-timer                                     !               5      T      W        (pclk timer        watchdog@feaf0000              rockchip,rk3588-wdt snps,dw-wdt                              5      d      c      
  (tclk pclk                 ;             spi@feb00000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    F               5                    (spiclk apb_pclk         Q   .      .           Vtx rx           	           ~                 default                      +          	  Bdisabled          spi@feb10000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    G               5                    (spiclk apb_pclk         Q   .      .           Vtx rx           	           ~                 default                      +          	  Bdisabled          spi@feb20000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    H               5                    (spiclk apb_pclk         Q                    Vtx rx           	           ~              default                      +            Bokay            <              L    pmic@0            rockchip,rk806                          |                       	"        	2           default         ~                    	> B@        	P   -        	\   -        	h   -        	t   -        	   -        	   -        	   -        	   -        	   -        	   -        	           	   -        	           	           	   -   dvs1-null-pins          
	gpio_pwrctrl1         	  
pin_fun0            "         dvs2-null-pins          
	gpio_pwrctrl2         	  
pin_fun0            "         dvs3-null-pins          
	gpio_pwrctrl3         	  
pin_fun0            "         regulators     dcdc-reg1           vdd_gpu_s0                    dp          ~          0        
          "   "   regulator-state-mem          8         dcdc-reg2           vdd_cpu_lit_s0                             dp          ~          0        "      regulator-state-mem          8         dcdc-reg3           vdd_log_s0                             
L          q          0   regulator-state-mem          8        
3 q         dcdc-reg4           vdd_vdenc_s0                               dp          ~          0   regulator-state-mem          8         dcdc-reg5           vdd_ddr_s0                             
L                    0   regulator-state-mem          8        
3 P         dcdc-reg6           vdd2_ddr_s3                      regulator-state-mem          
O         dcdc-reg7           vdd_2v0_pldo_s3                                                0        "      regulator-state-mem          
O        
3          dcdc-reg8           vcc_3v3_s3                             2Z          2Z        "   }   regulator-state-mem          
O        
3 2Z         dcdc-reg9           vddq_ddr_s0                      regulator-state-mem          8         dcdc-reg10          vcc_1v8_s3                             w@          w@   regulator-state-mem          
O        
3 w@         pldo-reg1           avcc_1v8_s0                            w@          w@        "      regulator-state-mem          8         pldo-reg2           vcc_1v8_s0                             w@          w@        "      regulator-state-mem          8        
3 w@         pldo-reg3           avdd_1v2_s0                            O          O   regulator-state-mem          8         pldo-reg4           vcc_3v3_s0                             2Z          2Z          0   regulator-state-mem          8         pldo-reg5           vccio_sd_s0                            w@          2Z          0        "   ~   regulator-state-mem          8         pldo-reg6         	  pldo6_s3                               w@          w@   regulator-state-mem          
O        
3 w@         nldo-reg1           vdd_0v75_s3                            q          q   regulator-state-mem          
O        
3 q         nldo-reg2           vdd_ddr_pll_s0                             P          P   regulator-state-mem          8        
3 P         nldo-reg3           avdd_0v75_s0                               q          q   regulator-state-mem          8         nldo-reg4           vdd_0v85_s0                            P          P        "      regulator-state-mem          8         nldo-reg5           vdd_0v75_s0                            q          q   regulator-state-mem          8                  spi@feb30000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    I               5                    (spiclk apb_pclk         Q                    Vtx rx           	           ~                 default                      +          	  Bdisabled          serial@feb40000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      L               5                    (baudclk apb_pclk            Q   .      .   	        Vtx rx           ~           default         j           `         	  Bdisabled          serial@feb50000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      M               5                    (baudclk apb_pclk            Q   .   
   .           Vtx rx           ~           default         j           `           Bokay          serial@feb60000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      N               5                    (baudclk apb_pclk            Q   .      .           Vtx rx           ~           default         j           `         	  Bdisabled          serial@feb70000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      O               5                    (baudclk apb_pclk            Q      	      
        Vtx rx           ~           default         j           `         	  Bdisabled          serial@feb80000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      P               5                    (baudclk apb_pclk            Q                    Vtx rx           ~           default         j           `         	  Bdisabled          serial@feb90000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      Q               5                    (baudclk apb_pclk            Q                    Vtx rx           ~           default         j           `         	  Bdisabled          serial@feba0000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      R               5                    (baudclk apb_pclk            Q   m      m           Vtx rx           ~           default         j           `         	  Bdisabled          serial@febb0000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      S               5                    (baudclk apb_pclk            Q   m   	   m   
        Vtx rx           ~           default         j           `         	  Bdisabled          serial@febc0000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      T               5                    (baudclk apb_pclk            Q   m      m           Vtx rx           ~              default         j           `           Bokay          pwm@febd0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              5      L      K      	  (pwm pclk            ~           default         w         	  Bdisabled          pwm@febd0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                             5      L      K      	  (pwm pclk            ~           default         w         	  Bdisabled          pwm@febd0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              5      L      K      	  (pwm pclk            ~           default         w         	  Bdisabled          pwm@febd0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm              0               5      L      K      	  (pwm pclk            ~           default         w         	  Bdisabled          pwm@febe0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              5      O      N      	  (pwm pclk            ~           default         w         	  Bdisabled          pwm@febe0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                             5      O      N      	  (pwm pclk            ~           default         w         	  Bdisabled          pwm@febe0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              5      O      N      	  (pwm pclk            ~           default         w         	  Bdisabled          pwm@febe0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm              0               5      O      N      	  (pwm pclk            ~           default         w         	  Bdisabled          pwm@febf0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              5      R      Q      	  (pwm pclk            ~           default         w         	  Bdisabled          pwm@febf0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                             5      R      Q      	  (pwm pclk            ~           active          w           Bokay          pwm@febf0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              5      R      Q      	  (pwm pclk            ~           default         w         	  Bdisabled          pwm@febf0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm              0               5      R      Q      	  (pwm pclk            ~           default         w         	  Bdisabled          thermal-zones      package-thermal         
g            
}            
          trips      package-crit            
 8        
          	  critical                bigcore0-thermal            
g   d        
}            
         trips      bigcore0-alert          
 L        
          passive         "         bigcore0-crit           
 8        
          	  critical             cooling-maps       map0            
           
                  bigcore2-thermal            
g   d        
}            
         trips      bigcore2-alert          
 L        
          passive         "         bigcore2-crit           
 8        
          	  critical             cooling-maps       map0            
           
      	            littlecore-thermal          
g   d        
}            
         trips      littlecore-alert            
 L        
          passive         "         littlecore-crit         
 8        
          	  critical             cooling-maps       map0            
         0  
                        center-thermal          
g            
}            
         trips      center-crit         
 8        
          	  critical                gpu-thermal         
g   d        
}            
         trips      gpu-alert           
 L        
          passive         "         gpu-crit            
 8        
          	  critical             cooling-maps       map0            
           
               npu-thermal         
g            
}            
         trips      npu-crit            
 8        
          	  critical                   tsadc@fec00000            rockchip,rk3588-tsadc                                                     5                    (tsadc apb_pclk          <              L         u      V      W        Otsadc-apb tsadc         
         
            
            ~                      default sleep                      Bokay            "         adc@fec10000              rockchip,rk3588-saradc                                                    /           5                    (saradc apb_pclk         u      U        Osaradc-apb          Bokay            A         i2c@fec80000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              5                  	  (i2c pclk                  C               ~           default                      +            Bokay       rtc@51            haoyu,hym8563              Q            |                                  hym8563         default         ~           "            i2c@fec90000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              5                  	  (i2c pclk                  D               ~           default                      +            Bokay       audio-codec@10            everest,es8316                     <      1        L          5      1        (mclk                   port       endpoint                       "                  i2c@feca0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              5                  	  (i2c pclk                  E               ~           default                      +          	  Bdisabled          spi@fecb0000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    J               5                    (spiclk apb_pclk         Q   m      m           Vtx rx           	           ~                 default                      +          	  Bdisabled          efuse@fecc0000            rockchip,rk3588-otp                               5                                (otp apb_pclk phy arb            u                          Ootp apb arb                      +      cpu-code@2                      id@7                        cpu-leakage@17                      cpu-leakage@18                      cpu-leakage@19                      log-leakage@1a                      gpu-leakage@1b                      cpu-version@1c                        M            npu-leakage@28             (         codec-leakage@29               )            dma-controller@fed10000           arm,pl330 arm,primecell                     @                 Z              [                        5      p      	  (apb_pclk            	           "   m      phy@fed60000              rockchip,rk3588-hdptx-phy                                 5          T        (ref apb         [          8  u     #          c     d     e     !     "      "  Ophy apb init cmn lane ropll lcpll           q         	  Bdisabled          phy@fed80000              rockchip,rk3588-usbdp-phy                                [           5          l     V           (refclk immortal pclk utmi         (  u                                     Oinit cmn lane pcs_apb pma_apb           R           e           v                    	  Bdisabled            "   $      phy@fee00000              rockchip,rk3588-naneng-combphy                               5          v     W        (ref apb pipe            <             L         [           u     <     C        Ophy apb            +                   Bokay            "   r      phy@fee20000              rockchip,rk3588-naneng-combphy                               5          x     W        (ref apb pipe            <             L         [           u     >     E        Ophy apb            +                   Bokay            "   )      sram@ff001000         
    mmio-sram                                                                +         pinctrl           rockchip,rk3588-pinctrl                  q                        +           "      gpio@fd8a0000             rockchip,gpio-bank                                                    5     q     r         	"                                s        	2                      "   |      gpio@fec20000             rockchip,gpio-bank                                                    5      s      t         	"                                s        	2                    gpio@fec30000             rockchip,gpio-bank                                                    5      u      v         	"                  @             s        	2                    gpio@fec40000             rockchip,gpio-bank                                                    5      w      x         	"                  `             s        	2                      "   t      gpio@fec50000             rockchip,gpio-bank                                                    5      y      z         	"                               s        	2                    pcfg-pull-up                     "         pcfg-pull-down                   "         pcfg-pull-none                   "         pcfg-pull-none-drv-level-2                              "         pcfg-pull-up-drv-level-1                                "         pcfg-pull-up-drv-level-2                                "         pcfg-pull-none-smt                            "         auddsm        bt1120        can0          can1          can2          cif       clk32k        cpu       ddrphych0         ddrphych1         ddrphych2         ddrphych3         dp0       dp1       emmc       emmc-rstnout                                "         emmc-bus8                                                                                                                   "         emmc-clk                                "         emmc-cmd                                 "         emmc-data-strobe                                "            eth1          fspi          gmac1         gpu       hdmi          i2c0       i2c0m2-xfer                                            "   ,         i2c1       i2c1m0-xfer                    	             	           "            i2c2       i2c2m0-xfer                    	             	           "            i2c3       i2c3m0-xfer                   	            	           "            i2c4       i2c4m0-xfer                   	            	           "            i2c5       i2c5m0-xfer                   	            	           "            i2c6       i2c6m3-xfer                	   	            	           "            i2c7       i2c7m0-xfer                   	            	           "            i2c8       i2c8m0-xfer                   	            	           "            i2s0       i2s0-lrck                               "         i2s0-mclk                               "         i2s0-sclk                               "         i2s0-sdi0                               "         i2s0-sdo0                               "            i2s1       i2s1m0-lrck                             "         i2s1m0-sclk                             "         i2s1m0-sdi0                             "         i2s1m0-sdi1                             "         i2s1m0-sdi2                             "         i2s1m0-sdi3                             "         i2s1m0-sdo0               	              "         i2s1m0-sdo1               
              "         i2s1m0-sdo2                             "         i2s1m0-sdo3                             "            i2s2       i2s2m1-lrck                             "         i2s2m1-sclk                             "         i2s2m1-sdi                
              "         i2s2m1-sdo                              "            i2s3       i2s3-lrck                               "         i2s3-sclk                               "         i2s3-sdi                                "         i2s3-sdo                                "            jtag          litcpu        mcu       mipi          npu       pcie20x1          pcie30phy         pcie30x1          pcie30x2          pcie30x4          pdm0          pdm1          pmic       pmic-pins         p                                                                                                      "            pmu       pwm0       pwm0m0-pins                              "   0         pwm1       pwm1m0-pins                              "   1         pwm2       pwm2m1-pins               	              "   2         pwm3       pwm3m0-pins                              "   3         pwm4       pwm4m0-pins                              "            pwm5       pwm5m0-pins                	              "            pwm6       pwm6m0-pins                              "            pwm7       pwm7m0-pins                              "            pwm8       pwm8m0-pins                             "            pwm9       pwm9m0-pins                             "            pwm10      pwm10m0-pins                                 "            pwm11      pwm11m0-pins                                "            pwm12      pwm12m0-pins                                "            pwm13      pwm13m2-pins                                "            pwm14      pwm14m0-pins                                "            pwm15      pwm15m0-pins                                "            refclk        sata          sata0         sata1         sata2         sdio       sdiom1-pins       `                                                                                   "            sdmmc      sdmmc-bus4        @                                                          "   {      sdmmc-clk                               "   x      sdmmc-cmd                               "   y      sdmmc-det                                "   z         spdif0        spdif1        spi0       spi0m0-pins       0                                                 "         spi0m0-cs0                               "         spi0m0-cs1                               "            spi1       spi1m1-pins       0                                              "         spi1m1-cs0                              "         spi1m1-cs1                              "            spi2       spi2m2-pins       0                                                 "         spi2m2-cs0                 	              "            spi3       spi3m1-pins       0                                              "         spi3m1-cs0                              "         spi3m1-cs1                              "            spi4       spi4m0-pins       0                                              "         spi4m0-cs0                              "         spi4m0-cs1                              "            tsadc      tsadc-shut-org                               "            uart0      uart0m1-xfer                                 	              "   /         uart1      uart1m1-xfer                      
            
           "            uart2      uart2m0-xfer                       
             
           "            uart3      uart3m1-xfer                      
            
           "            uart4      uart4m1-xfer                      
            
           "            uart5      uart5m1-xfer                      
            
           "            uart6      uart6m1-xfer                       
            
           "            uart7      uart7m1-xfer                      
            
           "            uart8      uart8m1-xfer                      
            
           "            uart9      uart9m2-xfer                      
            
           "         uart9m2-ctsn                     
           "            vop       bt656         gpio-func      tsadc-gpio-func                               "            hym8563    hym8563-int                               "            led    gpio-leds                                                "            rtl8111    rtl8111-isolate                              "   s         sdio-pwrseq    wifi-enable-h                                 "            usb    vcc5v0-host-en                                             "         vcc5v0-u3host-en                                 "            wireless-bluetooth     bt-reset-pin                                bt-wake-pin                             bt-wake-host-irq                                   wireless-wlan      wifi-host-wake-irq                               wifi-poweren-pin                                 "               opp-table-cluster0            operating-points-v2          +        "      opp-1008000000          6    <         = 
L 
L ~        K  @      opp-1200000000          6    G         = 
4 
4 ~        K  @      opp-1416000000          6    Tfr         =   ~        K  @         \      opp-1608000000          6    _"         = P P ~        K  @      opp-1800000000          6    kI         = ~ ~ ~        K  @         opp-table-cluster1            operating-points-v2          +        "      opp-1200000000          6    G         = 
L 
L B@        K  @      opp-1416000000          6    Tfr         =   B@        K  @      opp-1608000000          6    _"         =   B@        K  @      opp-1800000000          6    kI         = P P B@        K  @      opp-2016000000          6    x)         = H H B@        K  @      opp-2208000000          6    h         = l l B@        K  @      opp-2400000000          6             = B@ B@ B@        K  @         opp-table-cluster2            operating-points-v2          +        "      opp-1200000000          6    G         = 
L 
L B@        K  @      opp-1416000000          6    Tfr         =   B@        K  @      opp-1608000000          6    _"         =   B@        K  @      opp-1800000000          6    kI         = P P B@        K  @      opp-2016000000          6    x)         = H H B@        K  @      opp-2208000000          6    h         = l l B@        K  @      opp-2400000000          6             = B@ B@ B@        K  @         opp-table-gpu             operating-points-v2         "   !   opp-300000000           6             = 
L 
L P      opp-400000000           6    ׄ         = 
L 
L P      opp-500000000           6    e         = 
L 
L P      opp-600000000           6    #F         = 
L 
L P      opp-700000000           6    )'         = 
` 
` P      opp-800000000           6    /         = q q P      opp-900000000           6    5         = 5  5  P      opp-1000000000          6    ;         = P P P         analog-sound              audio-graph-card            h           mrk3588-es8316         .  sMIC2 Mic Jack Headphones HPOL Headphones HPOR         )  {Microphone Mic Jack Headphone Headphones          chosen          serial2:1500000n8         leds          
    gpio-leds           default         ~      led-green                      
status             |             
  heartbeat         led-red                    off         
wlan               |               phy0tx           sdio-pwrseq           mmc-pwrseq-simple           5         
  (ext_clock           default         ~                         |              "         vcc12v-dcin-regulator             regulator-fixed         vcc12v_dcin                                                "         vcc5v0-sys-regulator              regulator-fixed         vcc5v0_sys                             LK@          LK@        -           "   -      vcc5v0-usbdcin-regulator              regulator-fixed         vcc5v0_usbdcin                             LK@          LK@        -           "         vcc5v0-usb-regulator              regulator-fixed         vcc5v0_usb                             LK@          LK@        -         avdd0v85-pcie20-regulator             regulator-fixed         avdd0v85_pcie20                            P          P        -         avdd1v8-pcie20-regulator              regulator-fixed         avdd1v8_pcie20                             w@          w@        -         vcc3v3-mipi-regulator             regulator-fixed                     t               vcc3v3_mipi                           -   }      vcc5v0-host-regulator             regulator-fixed                     t               default         ~           vcc5v0_host                            LK@          LK@        -   -        "   *      vcc5v0-otg-regulator              regulator-fixed                     t               default         ~           vcc5v0_otg                             LK@          LK@        -   -      vcc-1v1-nldo-s3-regulator             regulator-fixed         vcc_1v1_nldo_s3                                              -   -        "            	compatible interrupt-parent #address-cells #size-cells model gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 i2c6 i2c7 i2c8 serial0 serial1 serial2 serial3 serial4 serial5 serial6 serial7 serial8 serial9 spi0 spi1 spi2 spi3 spi4 mmc0 mmc1 mmc2 cpu device_type reg enable-method capacity-dmips-mhz clocks assigned-clocks assigned-clock-rates cpu-idle-states i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache dynamic-power-coefficient #cooling-cells operating-points-v2 cpu-supply phandle entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us cache-level cache-unified ports arm,smc-id shmem #clock-cells #reset-cells interrupts clock-frequency clock-output-names interrupt-names ranges no-map clock-names power-domains status mali-supply dr_mode phys phy-names phy_type resets snps,dis_enblslpm_quirk snps,dis-u1-entry-quirk snps,dis-u2-entry-quirk snps,dis-u2-freeclk-exists-quirk snps,dis-del-phy-power-chg-quirk snps,dis-tx-ipgap-linecheck-quirk snps,dis_rxdet_inp3_quirk #iommu-cells reset-names #phy-cells phy-supply rockchip,grf pinctrl-0 pinctrl-names fcs,suspend-voltage-selector regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay vin-supply regulator-off-in-suspend dmas dma-names reg-shift reg-io-width #pwm-cells #power-domain-cells pm_qos iommus reg-names rockchip,vop-grf rockchip,vo1-grf rockchip,pmu assigned-clock-parents #sound-dai-cells bus-range #interrupt-cells interrupt-map-mask interrupt-map linux,pci-domain max-link-speed msi-map num-lanes interrupt-controller reset-gpios rockchip,php-grf snps,axi-config snps,mixed-burst snps,mtl-rx-config snps,mtl-tx-config snps,tso snps,blen snps,wr_osr_lmt snps,rd_osr_lmt snps,rx-queues-to-use snps,tx-queues-to-use ports-implemented hba-port-cap snps,rx-ts-max snps,tx-ts-max fifo-depth max-frequency bus-width cap-mmc-highspeed cap-sd-highspeed cd-gpios disable-wp no-sdio no-mmc sd-uhs-sdr104 vmmc-supply vqmmc-supply cap-sdio-irq keep-power-in-suspend mmc-pwrseq no-sd non-removable mmc-hs400-1_8v mmc-hs400-enhanced-strobe rockchip,trcm-sync-tx-only dai-format mclk-fs remote-endpoint mbi-alias mbi-ranges msi-controller #msi-cells affinity arm,pl330-periph-burst #dma-cells num-cs gpio-controller #gpio-cells spi-max-frequency vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply vcc10-supply vcc11-supply vcc12-supply vcc13-supply vcc14-supply vcca-supply pins function regulator-enable-ramp-delay regulator-suspend-microvolt regulator-on-in-suspend polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device rockchip,hw-tshut-temp rockchip,hw-tshut-mode rockchip,hw-tshut-polarity pinctrl-1 #thermal-sensor-cells #io-channel-cells vref-supply bits rockchip,u2phy-grf rockchip,usb-grf rockchip,usbdpphy-grf rockchip,vo-grf rockchip,pipe-grf rockchip,pipe-phy-grf gpio-ranges bias-pull-up bias-pull-down bias-disable drive-strength input-schmitt-enable rockchip,pins opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend dais label routing widgets stdout-path color linux,default-trigger default-state post-power-on-delay-ms enable-active-high gpio 