 '   8 t   (             <                                 khadas,edge2 rockchip,rk3588s                                    +            7Khadas Edge2       aliases          =/pinctrl/gpio@fd8a0000           C/pinctrl/gpio@fec20000           I/pinctrl/gpio@fec30000           O/pinctrl/gpio@fec40000           U/pinctrl/gpio@fec50000           [/i2c@fd880000            `/i2c@fea90000            e/i2c@feaa0000            j/i2c@feab0000            o/i2c@feac0000            t/i2c@fead0000            y/i2c@fec80000            ~/i2c@fec90000            /i2c@feca0000            /serial@fd890000             /serial@feb40000             /serial@feb50000             /serial@feb60000             /serial@feb70000             /serial@feb80000             /serial@feb90000             /serial@feba0000             /serial@febb0000             /serial@febc0000             /spi@feb00000            /spi@feb10000            /spi@feb20000            /spi@feb30000            /spi@fecb0000            /mmc@fe2e0000            /mmc@fe2c0000         cpus                         +       cpu-map    cluster0       core0                     core1                     core2                     core3                        cluster1       core0                     core1                        cluster2       core0                     core1               	            cpu@0            cpu           arm,cortex-a55                      psci                      0   
            7   
            G0,         \           l           y   @                                 @                                                                                   cpu@100          cpu           arm,cortex-a55                     psci                      0   
            \           l           y   @                                 @                                                                                   cpu@200          cpu           arm,cortex-a55                     psci                      0   
            \           l           y   @                                 @                                                                                   cpu@300          cpu           arm,cortex-a55                     psci                      0   
            \           l           y   @                                 @                                                                                   cpu@400          cpu           arm,cortex-a76                     psci                       0   
           7   
           G0,         \           l           y   @                                 @                                                                                  cpu@500          cpu           arm,cortex-a76                     psci                       0   
           \           l           y   @                                 @                                                                                  cpu@600          cpu           arm,cortex-a76                     psci                       0   
           7   
           G0,         \           l           y   @                                 @                                                                                  cpu@700          cpu           arm,cortex-a76                     psci                       0   
           \           l           y   @                                 @                                                                            	      idle-states         %psci       cpu-sleep             arm,idle-state           2        C           Z   d        k   x        {                      l2-cache-l0           cache           n           {   @                                                           l2-cache-l1           cache           n           {   @                                                           l2-cache-l2           cache           n           {   @                                                           l2-cache-l3           cache           n           {   @                                                           l2-cache-b0           cache           n           {   @                                                           l2-cache-b1           cache           n           {   @                                                           l2-cache-b2           cache           n           {   @                                                           l2-cache-b3           cache           n           {   @                                                              l3-cache              cache           n 0          {   @                                                display-subsystem             rockchip,display-subsystem                   firmware       optee             linaro,optee-tz         smc       scmi              arm,scmi-smc                                              +       protocol@14                                  
      protocol@16                                   pmu-a55           arm,cortex-a55-pmu                            pmu-a76           arm,cortex-a76-pmu                            psci              arm,psci-1.0            smc       clock-0           fixed-clock         )׫        spll                      timer             arm,armv8-timer       P                                               
                          %  sec-phys phys virt hyp-phys hyp-virt          clock-1           fixed-clock         n6         xin24m                    clock-2           fixed-clock                    xin32k                    reserved-memory                      +               shmem@10f000              arm,scmi-shmem                                                    gpu@fb000000          *    rockchip,rk3588-mali arm,mali-valhall-csf                                             7   
           G         0                       #core coregroup stacks                   0         \              ]              ^               job mmu gpu         /               =okay               !        D   "                 usb@fc000000              rockchip,rk3588-dwc3 snps,dwc3                      @                                0                       #ref_clk suspend_clk bus_clk         Potg         X   #   $           ]usb2-phy usb3-phy         
  gutmi_wide           /               p     R         w                                                   	  =disabled          usb@fc800000          "    rockchip,rk3588-ehci generic-ehci                                                      0                  %        X   &        ]usb         /               =okay          usb@fc840000          "    rockchip,rk3588-ohci generic-ohci                                                      0                  %        X   &        ]usb         /               =okay          usb@fc880000          "    rockchip,rk3588-ehci generic-ehci                                                      0                  '        X   (        ]usb         /               =okay          usb@fc8c0000          "    rockchip,rk3588-ohci generic-ohci                                                      0                  '        X   (        ]usb         /               =okay          usb@fcd00000              rockchip,rk3588-dwc3 snps,dwc3                     @                              (  0     j     i     h     k     r      &  #ref_clk suspend_clk bus_clk utmi pipe           Phost            X   )         	  ]usb3-phy          
  gutmi_wide           p     4         w                                    #        =okay          iommu@fc900000            arm,smmu-v3                             @        q             s             v             o               eventq gerror priq cmdq-sync            =         	  =disabled          iommu@fcb00000            arm,smmu-v3                             @        }                                       {               eventq gerror priq cmdq-sync            =         	  =disabled          syscon@fd58a000       )    rockchip,rk3588-pmugrf syscon simple-mfd                X                   n      syscon@fd58c000           rockchip,rk3588-sys-grf syscon              X                   i      syscon@fd5a4000           rockchip,rk3588-vop-grf syscon              Z@                    j      syscon@fd5a6000           rockchip,rk3588-vo0-grf syscon              Z`                 0                      syscon@fd5a8000           rockchip,rk3588-vo1-grf syscon              Z       @         0                k      syscon@fd5ac000           rockchip,rk3588-usb-grf syscon              Z       @                  syscon@fd5b0000           rockchip,rk3588-php-grf syscon              [                    +      syscon@fd5bc000       $    rockchip,rk3588-pipe-phy-grf syscon             [                         syscon@fd5c4000       $    rockchip,rk3588-pipe-phy-grf syscon             \@                         syscon@fd5c8000       $    rockchip,rk3588-usbdpphy-grf syscon             \       @                  syscon@fd5d0000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd               ]        @                      +                 usb2phy@0             rockchip,rk3588-usb2phy                                    0             #phyclk          usb480m_phy0                                 p     m             Jphy apb       	  =disabled                  otg-port            V          	  =disabled               #            syscon@fd5d8000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd               ]       @                      +      usb2phy@8000              rockchip,rk3588-usb2phy                                   0             #phyclk          usb480m_phy2                                 p     o             Jphy apb         =okay               %   host-port           V            =okay            a   *           &            syscon@fd5dc000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd               ]       @                      +      usb2phy@c000              rockchip,rk3588-usb2phy                                   0             #phyclk          usb480m_phy3                                 p     p              Jphy apb         =okay               '   host-port           V            =okay            a   *           (            syscon@fd5e0000       $    rockchip,rk3588-hdptxphy-grf syscon             ^                          syscon@fd5f0000           rockchip,rk3588-ioc syscon              _                          sram@fd600000         
    mmio-sram               `                         `                          +         clock-controller@fd7c0000             rockchip,rk3588-cru             |                7                                                                         ]      q                 @  GA .  2Fq )׫ׄ e /  ׄ   e Zр         l   +                                       i2c@fd880000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                                    =               0     t     s      	  #i2c pclk            y   ,        default                      +            =okay       regulator@42              rockchip,rk8602            B                   vdd_cpu_big0_s0                            dp                           (   -              regulator-state-mem          3         regulator@43               rockchip,rk8603 rockchip,rk8602            C                   vdd_cpu_big1_s0                            dp                           (   -              regulator-state-mem          3            serial@fd890000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      K               0                  #baudclk apb_pclk            L   .      .           Qtx rx           y   /        default         [           e         	  =disabled          pwm@fd8b0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              0                	  #pwm pclk            y   0        default         r         	  =disabled          pwm@fd8b0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                             0                	  #pwm pclk            y   1        default         r         	  =disabled          pwm@fd8b0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              0                	  #pwm pclk            y   2        default         r         	  =disabled          pwm@fd8b0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm              0               0                	  #pwm pclk            y   3        default         r         	  =disabled          power-management@fd8d8000         &    rockchip,rk3588-pmu syscon simple-mfd                                  l   power-controller          !    rockchip,rk3588-power-controller                        }            +            =okay                   power-domain@8                     }                         +       power-domain@9             	         0     !     #     "                4   5   6        }                         +       power-domain@10            
        0     !     #     "           7        }          power-domain@11                    0     !     #     "           8        }                power-domain@12                    0                          9   :   ;   <        }          power-domain@13                                 +            }       power-domain@14                  (  0                                    =        }          power-domain@15                     0                               >        }          power-domain@16                    0                     ?   @   A                     +            }       power-domain@17                     0                               B   C   D        }                power-domain@21                    0                                                                                                      E   F   G   H   I   J   K   L                     +            }       power-domain@23                    0      C      A                M        }          power-domain@14                     0                               =        }          power-domain@15                    0                          >        }          power-domain@22                    0                     N        }             power-domain@24                    0     [     Z     ]           O   P                     +            }       power-domain@25                  8  0                                   Z           Q        }             power-domain@26                  8  0                                   Q           R   S        }          power-domain@27                  0  0                                         T   U   V   W                     +            }       power-domain@28                     0                               X   Y        }          power-domain@29                  (  0                                    Z   [        }             power-domain@30                    0     z     {           \        }          power-domain@31                  @  0     W                                              ]   ^   _   `        }          power-domain@33            !        0     W     Z     [        }          power-domain@34            "        0     W     Z     [        }          power-domain@37            %        0          2           a        }          power-domain@38            &        0      4      5        }          power-domain@40            (           b        }                video-codec@fdb50000          +    rockchip,rk3588-vpu121 rockchip,rk3568-vpu                                      w               vdpu            0                
  #aclk hclk              c        /             iommu@fdb50800        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu                     @               v               #aclk iface          0                  /               =               c      rga@fdb80000          (    rockchip,rk3588-rga rockchip,rk3288-rga                                    t               0                       #aclk hclk sclk          p     r     q     p        Jcore axi ahb            /             video-codec@fdba0000              rockchip,rk3588-vepu121                                     z               0                
  #aclk hclk              d        /             iommu@fdba0800        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu                     @               y               0                  #aclk iface          /               =               d      video-codec@fdba4000              rockchip,rk3588-vepu121             @                       |               0                
  #aclk hclk              e        /             iommu@fdba4800        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu             H        @               {               0                  #aclk iface          /               =               e      video-codec@fdba8000              rockchip,rk3588-vepu121                                    ~               0                
  #aclk hclk              f        /             iommu@fdba8800        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu                     @               }               0                  #aclk iface          /               =               f      video-codec@fdbac000              rockchip,rk3588-vepu121                                                   0                
  #aclk hclk              g        /             iommu@fdbac800        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu                     @                              0                  #aclk iface          /               =               g      video-codec@fdc70000              rockchip,rk3588-av1-vpu                                     l               vdpu            7      A      C        Gׄ ׄ         0      A      C      
  #aclk hclk           /                p                           vop@fdd90000              rockchip,rk3588-vop                      B     P                vop gamma-lut                               8  0     ]     \     a     b     c     d     [      7  #aclk hclk dclk_vp0 dclk_vp1 dclk_vp2 dclk_vp3 pclk_vop             h        /               l   i           j           k           l      	  =disabled       ports                        +                  port@0                       +                      port@1                       +                     port@2                       +                     port@3                       +                           iommu@fdd97e00        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu              ~                                                  0     ]     \        #aclk iface          =            /             	  =disabled               h      i2s@fddc0000              rockchip,rk3588-i2s-tdm                                                    0                       #mclk_tx mclk_rx hclk            7                           L   m            Qtx          /               p             Jtx-m                      	  =disabled          i2s@fddf0000              rockchip,rk3588-i2s-tdm                                                    0     4     4     5        #mclk_tx mclk_rx hclk            7     1                      L   m           Qtx          /               p             Jtx-m                      	  =disabled          i2s@fddfc000              rockchip,rk3588-i2s-tdm                                                   0     0     0     ,        #mclk_tx mclk_rx hclk            7     -                      L   m           Qrx          /               p             Jrx-m                      	  =disabled          qos@fdf35000              rockchip,rk3588-qos syscon              P                    9      qos@fdf35200              rockchip,rk3588-qos syscon              R                    :      qos@fdf35400              rockchip,rk3588-qos syscon              T                    ;      qos@fdf35600              rockchip,rk3588-qos syscon              V                    <      qos@fdf36000              rockchip,rk3588-qos syscon              `                    \      qos@fdf39000              rockchip,rk3588-qos syscon                                  a      qos@fdf3d800              rockchip,rk3588-qos syscon                                  b      qos@fdf3e000              rockchip,rk3588-qos syscon                                  ^      qos@fdf3e200              rockchip,rk3588-qos syscon                                  ]      qos@fdf3e400              rockchip,rk3588-qos syscon                                  _      qos@fdf3e600              rockchip,rk3588-qos syscon                                  `      qos@fdf40000              rockchip,rk3588-qos syscon                                   Z      qos@fdf40200              rockchip,rk3588-qos syscon                                  [      qos@fdf40400              rockchip,rk3588-qos syscon                                  T      qos@fdf40500              rockchip,rk3588-qos syscon                                  U      qos@fdf40600              rockchip,rk3588-qos syscon                                  V      qos@fdf40800              rockchip,rk3588-qos syscon                                  W      qos@fdf41000              rockchip,rk3588-qos syscon                                  X      qos@fdf41100              rockchip,rk3588-qos syscon                                  Y      qos@fdf60000              rockchip,rk3588-qos syscon                                   ?      qos@fdf60200              rockchip,rk3588-qos syscon                                  @      qos@fdf60400              rockchip,rk3588-qos syscon                                  A      qos@fdf61000              rockchip,rk3588-qos syscon                                  B      qos@fdf61200              rockchip,rk3588-qos syscon                                  C      qos@fdf61400              rockchip,rk3588-qos syscon                                  D      qos@fdf62000              rockchip,rk3588-qos syscon                                   =      qos@fdf63000              rockchip,rk3588-qos syscon              0                    >      qos@fdf64000              rockchip,rk3588-qos syscon              @                    M      qos@fdf66000              rockchip,rk3588-qos syscon              `                    E      qos@fdf66200              rockchip,rk3588-qos syscon              b                    F      qos@fdf66400              rockchip,rk3588-qos syscon              d                    G      qos@fdf66600              rockchip,rk3588-qos syscon              f                    H      qos@fdf66800              rockchip,rk3588-qos syscon              h                    I      qos@fdf66a00              rockchip,rk3588-qos syscon              j                    J      qos@fdf66c00              rockchip,rk3588-qos syscon              l                    K      qos@fdf66e00              rockchip,rk3588-qos syscon              n                    L      qos@fdf67000              rockchip,rk3588-qos syscon              p                    N      qos@fdf67200              rockchip,rk3588-qos syscon              r               qos@fdf70000              rockchip,rk3588-qos syscon                                   7      qos@fdf71000              rockchip,rk3588-qos syscon                                  8      qos@fdf72000              rockchip,rk3588-qos syscon                                   4      qos@fdf72200              rockchip,rk3588-qos syscon              "                    5      qos@fdf72400              rockchip,rk3588-qos syscon              $                    6      qos@fdf80000              rockchip,rk3588-qos syscon                                   Q      qos@fdf81000              rockchip,rk3588-qos syscon                                  R      qos@fdf81200              rockchip,rk3588-qos syscon                                  S      qos@fdf82000              rockchip,rk3588-qos syscon                                   O      qos@fdf82200              rockchip,rk3588-qos syscon              "                    P      dfi@fe060000                                   rockchip,rk3588-dfi       @                       &              0              :                  n      pcie@fe180000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie               0   ?      0  0     C     H     >     M     R           )  #aclk_mst aclk_slv aclk_dbi pclk aux pipe             pci       P                                                                                sys pmc msg legacy err          
                                `  .                  o                      o                     o                     o           <           M           \  0    p  0            d           X   )         	  ]pcie-phy            /       "      T                                                       @      	       @         0     
@       @                                     dbi apb config          p     )     .      	  Jpwr pipe                         +         	  =disabled       legacy-interrupt-controller          n                     
                                                o         pcie@fe190000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie               @   O      0  0     D     I     ?     N     S     s      )  #aclk_mst aclk_slv aclk_dbi pclk aux pipe             pci       P                                                                                sys pmc msg legacy err          
                                `  .                  q                      q                     q                     q           <           M           \  @    p  @            d           X   r         	  ]pcie-phy            /       "      T                                                       @      
        @         0     
A        @                                     dbi apb config          p     *     /      	  Jpwr pipe                         +           =okay            default         y   s           t                  u   legacy-interrupt-controller          n                     
                                                q         ethernet@fe1c0000         &    rockchip,rk3588-gmac snps,dwmac-4.20a                                                                     macirq eth_wake_irq       (  0     6     7     Y     ^     5      0  #stmmaceth clk_mac_ref pclk_mac aclk_mac ptp_ref         /       !        p     $      
  Jstmmaceth           l   i           +           v                    w           x               	  =disabled       mdio              snps,dwmac-mdio                      +          stmmac-axi-config                                             
                         v      rx-queues-config            *              w   queue0        queue1           tx-queues-config            @              x   queue0        queue1              sata@fe210000         '    rockchip,rk3588-dwc-ahci snps,dwc-ahci              !                                    (  0     b     _     e     T     o        #sata pmalive rxoob ref asic         V                        +          	  =disabled       sata-port@0                     h @          X   r         	  ]sata-phy            u                         sata@fe230000         '    rockchip,rk3588-dwc-ahci snps,dwc-ahci              #                                    (  0     d     a     g     V     q        #sata pmalive rxoob ref asic         V                        +          	  =disabled       sata-port@0                     h @          X   )         	  ]sata-phy            u                         spi@fe2b0000              rockchip,sfc                +        @                               0     /     0        #clk_sfc hclk_sfc                         +            =okay            default         y   y   flash@0           jedec,spi-nor                                                       mmc@fe2c0000          0    rockchip,rk3588-dw-mshc rockchip,rk3288-dw-mshc             ,        @                                0   
      
   	                  #biu ciu ciu-drive ciu-sample                                default         y   z   {   |   }        /       (        =okay                                                                       ~                 mmc@fe2d0000          0    rockchip,rk3588-dw-mshc rockchip,rk3288-dw-mshc             -        @                                0                            #biu ciu ciu-drive ciu-sample                                default         y           /       %      	  =disabled          mmc@fe2e0000              rockchip,rk3588-dwcmshc             .                                       7     -     .     ,        G n6        (  0     ,     *     +     -     .        #core bus axi block timer                     y                       default       (  p                                 Jcore bus axi block timer            =okay                                 $         *         8         G      i2s@fe470000              rockchip,rk3588-i2s-tdm             G                                       0      +      /      (        #mclk_tx mclk_rx hclk            7      )      -                            L   .       .           Qtx rx           /       &        p      *      +      
  Jtx-m rx-m            a        default       (  y                                                	  =disabled          i2s@fe480000              rockchip,rk3588-i2s-tdm             H                                       0     y     }     u        #mclk_tx mclk_rx hclk            L   .      .           Qtx rx           p     ^     _      
  Jtx-m rx-m            a        default       (  y                                                	  =disabled          i2s@fe490000          (    rockchip,rk3588-i2s rockchip,rk3066-i2s             I                                       0                    #i2s_clk i2s_hclk            7                            L                     Qtx rx           /       &        default         y                              	  =disabled          i2s@fe4a0000          (    rockchip,rk3588-i2s rockchip,rk3066-i2s             J                                       0      %              #i2s_clk i2s_hclk            7      "                      L                    Qtx rx           /       &        default         y                              	  =disabled          interrupt-controller@fe600000             arm,gic-v3               `             h                       	                n        |    a               8                                      
            +                 msi-controller@fe640000           arm,gic-v3-its              d                                        p      msi-controller@fe660000           arm,gic-v3-its              f                                   ppi-partitions     interrupt-partition-0                                        interrupt-partition-1                       	                       dma-controller@fea10000           arm,pl330 arm,primecell                     @                 V              W                        0      n      	  #apb_pclk                          .      dma-controller@fea30000           arm,pl330 arm,primecell                     @                 X              Y                        0      o      	  #apb_pclk                                i2c@fea90000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              0            {      	  #i2c pclk                  >               y           default                      +          	  =disabled          i2c@feaa0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              0            |      	  #i2c pclk                  ?               y           default                      +            =okay       rtc@51            haoyu,hym8563              Q                    hym8563                   i2c@feab0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              0            }      	  #i2c pclk                  @               y           default                      +          	  =disabled          i2c@feac0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              0            ~      	  #i2c pclk                  A               y           default                      +          	  =disabled          i2c@fead0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              0                  	  #i2c pclk                  B               y           default                      +          	  =disabled          timer@feae0000        ,    rockchip,rk3588-timer rockchip,rk3288-timer                                     !               0      T      W        #pclk timer        watchdog@feaf0000              rockchip,rk3588-wdt snps,dw-wdt                              0      d      c      
  #tclk pclk                 ;             spi@feb00000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    F               0                    #spiclk apb_pclk         L   .      .           Qtx rx                      y                 default                      +          	  =disabled          spi@feb10000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    G               0                    #spiclk apb_pclk         L   .      .           Qtx rx                      y                 default                      +          	  =disabled          spi@feb20000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    H               0                    #spiclk apb_pclk         L                    Qtx rx                      y              default                      +            =okay            7              G    pmic@0            rockchip,rk806                                                default         y                     B@                 	   -        	   -        	   -        	'   -        	3   -        	?   -        	K   -        	W   -        	c   -        	o   -        	|           	   -        	           	           	   -         	        	      dvs1-null-pins          	gpio_pwrctrl1         	  	pin_fun0                     dvs2-null-pins          	gpio_pwrctrl2         	  	pin_fun0                     dvs3-null-pins          	gpio_pwrctrl3         	  	pin_fun0                     regulators     dcdc-reg1                    	           dp         ~        vdd_gpu_s0            0           "   regulator-state-mem          3         dcdc-reg2                              dp         ~        vdd_cpu_lit_s0            0              regulator-state-mem          3         dcdc-reg3                              
L         q        vdd_log_s0            0   regulator-state-mem          3        
 q         dcdc-reg4                              dp         ~        vdd_vdenc_s0              0   regulator-state-mem          3         dcdc-reg5                              
L                 vdd_ddr_s0            0   regulator-state-mem          3        
 P         dcdc-reg6                             vdd2_ddr_s3    regulator-state-mem          
         dcdc-reg7                                               vdd_2v0_pldo_s3           0              regulator-state-mem          
        
          dcdc-reg8                              2Z         2Z        vcc_3v3_s3                regulator-state-mem          
        
 2Z         dcdc-reg9                             vddq_ddr_s0    regulator-state-mem          3         dcdc-reg10                             w@         w@        vcc_1v8_s3     regulator-state-mem          
        
 w@         pldo-reg1                              w@         w@        avcc_1v8_s0               regulator-state-mem          3         pldo-reg2                              w@         w@        vcc_1v8_s0     regulator-state-mem          3        
 w@         pldo-reg3                              O         O        avdd_1v2_s0    regulator-state-mem          3         pldo-reg4                              2Z         2Z          0        vcc_3v3_s0     regulator-state-mem          3         pldo-reg5                              w@         2Z          0        vccio_sd_s0               regulator-state-mem          3         pldo-reg6                              w@         w@      	  pldo6_s3       regulator-state-mem          
        
 w@         nldo-reg1                              q         q        vdd_0v75_s3    regulator-state-mem          
        
 q         nldo-reg2                              P         P        vdd_ddr_pll_s0     regulator-state-mem          3        
 P         nldo-reg3                              q         q        avdd_0v75_s0       regulator-state-mem          3         nldo-reg4                              P         P        vdd_0v85_s0    regulator-state-mem          3         nldo-reg5                              q         q        vdd_0v75_s0    regulator-state-mem          3                  spi@feb30000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    I               0                    #spiclk apb_pclk         L                    Qtx rx                      y                 default                      +          	  =disabled          serial@feb40000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      L               0                    #baudclk apb_pclk            L   .      .   	        Qtx rx           y           default         e           [         	  =disabled          serial@feb50000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      M               0                    #baudclk apb_pclk            L   .   
   .           Qtx rx           y           default         e           [           =okay          serial@feb60000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      N               0                    #baudclk apb_pclk            L   .      .           Qtx rx           y           default         e           [         	  =disabled          serial@feb70000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      O               0                    #baudclk apb_pclk            L      	      
        Qtx rx           y           default         e           [         	  =disabled          serial@feb80000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      P               0                    #baudclk apb_pclk            L                    Qtx rx           y           default         e           [         	  =disabled          serial@feb90000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      Q               0                    #baudclk apb_pclk            L                    Qtx rx           y           default         e           [         	  =disabled          serial@feba0000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      R               0                    #baudclk apb_pclk            L   m      m           Qtx rx           y           default         e           [         	  =disabled          serial@febb0000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      S               0                    #baudclk apb_pclk            L   m   	   m   
        Qtx rx           y           default         e           [         	  =disabled          serial@febc0000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      T               0                    #baudclk apb_pclk            L   m      m           Qtx rx           y              default         e           [           =okay          pwm@febd0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              0      L      K      	  #pwm pclk            y           default         r         	  =disabled          pwm@febd0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                             0      L      K      	  #pwm pclk            y           default         r         	  =disabled          pwm@febd0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              0      L      K      	  #pwm pclk            y           default         r         	  =disabled          pwm@febd0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm              0               0      L      K      	  #pwm pclk            y           default         r         	  =disabled          pwm@febe0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              0      O      N      	  #pwm pclk            y           default         r         	  =disabled          pwm@febe0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                             0      O      N      	  #pwm pclk            y           default         r         	  =disabled          pwm@febe0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              0      O      N      	  #pwm pclk            y           default         r         	  =disabled          pwm@febe0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm              0               0      O      N      	  #pwm pclk            y           default         r           =okay                     pwm@febf0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              0      R      Q      	  #pwm pclk            y           default         r         	  =disabled          pwm@febf0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                             0      R      Q      	  #pwm pclk            y           default         r         	  =disabled          pwm@febf0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              0      R      Q      	  #pwm pclk            y           default         r           =okay                     pwm@febf0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm              0               0      R      Q      	  #pwm pclk            y           default         r           =okay                     thermal-zones      package-thermal         
6            
L            
Z          trips      package-crit            
j 8        
v          	  critical                bigcore0-thermal            
6   d        
L            
Z         trips      bigcore0-alert          
j L        
v          passive                  bigcore0-crit           
j 8        
v          	  critical             cooling-maps       map0            
           
                  bigcore2-thermal            
6   d        
L            
Z         trips      bigcore2-alert          
j L        
v          passive                  bigcore2-crit           
j 8        
v          	  critical             cooling-maps       map0            
           
      	            littlecore-thermal          
6   d        
L            
Z         trips      littlecore-alert            
j L        
v          passive                  littlecore-crit         
j 8        
v          	  critical             cooling-maps       map0            
         0  
                        center-thermal          
6            
L            
Z         trips      center-crit         
j 8        
v          	  critical                gpu-thermal         
6   d        
L            
Z         trips      gpu-alert           
j L        
v          passive                  gpu-crit            
j 8        
v          	  critical             cooling-maps       map0            
           
               npu-thermal         
6            
L            
Z         trips      npu-crit            
j 8        
v          	  critical                   tsadc@fec00000            rockchip,rk3588-tsadc                                                     0                    #tsadc apb_pclk          7              G         p      V      W        Jtsadc-apb tsadc         
         
            
            y           
           default sleep           
           =okay                     adc@fec10000              rockchip,rk3588-saradc                                                    
           0                    #saradc apb_pclk         p      U        Jsaradc-apb          =okay                                i2c@fec80000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              0                  	  #i2c pclk                  C               y           default                      +          	  =disabled          i2c@fec90000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              0                  	  #i2c pclk                  D               y           default                      +          	  =disabled          i2c@feca0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              0                  	  #i2c pclk                  E               y           default                      +          	  =disabled          spi@fecb0000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    J               0                    #spiclk apb_pclk         L   m      m           Qtx rx                      y                 default                      +          	  =disabled          efuse@fecc0000            rockchip,rk3588-otp                               0                                #otp apb_pclk phy arb            p                          Jotp apb arb                      +      cpu-code@2                      id@7                        cpu-leakage@17                      cpu-leakage@18                      cpu-leakage@19                      log-leakage@1a                      gpu-leakage@1b                      cpu-version@1c                                    npu-leakage@28             (         codec-leakage@29               )            dma-controller@fed10000           arm,pl330 arm,primecell                     @                 Z              [                        0      p      	  #apb_pclk                          m      phy@fed60000              rockchip,rk3588-hdptx-phy                                 0          T        #ref apb         V          8  p     #          c     d     e     !     "      "  Jphy apb init cmn lane ropll lcpll           l         	  =disabled          phy@fed80000              rockchip,rk3588-usbdp-phy                                V           0          l     V           #refclk immortal pclk utmi         (  p                                     Jinit cmn lane pcs_apb pma_apb           !           4           E           [         	  =disabled               $      phy@fee00000              rockchip,rk3588-naneng-combphy                               0          v     W        #ref apb pipe            7             G         V           p     <     C        Jphy apb         k   +        }           =okay               r      phy@fee20000              rockchip,rk3588-naneng-combphy                               0          x     W        #ref apb pipe            7             G         V           p     >     E        Jphy apb         k   +        }           =okay               )      sram@ff001000         
    mmio-sram                                                                +         pinctrl           rockchip,rk3588-pinctrl                  l                        +                 gpio@fd8a0000             rockchip,gpio-bank                                                    0     q     r         	                                n        	           
                    gpio@fec20000             rockchip,gpio-bank                                                    0      s      t         	                                n        	           
                    gpio@fec30000             rockchip,gpio-bank                                                    0      u      v         	                  @             n        	           
         gpio@fec40000             rockchip,gpio-bank                                                    0      w      x         	                  `             n        	           
              t      gpio@fec50000             rockchip,gpio-bank                                                    0      y      z         	                               n        	           
         pcfg-pull-up                              pcfg-pull-down                            pcfg-pull-none                            pcfg-pull-none-drv-level-2                                       pcfg-pull-up-drv-level-1                                         pcfg-pull-up-drv-level-2                                         pcfg-pull-none-smt                                     auddsm        bt1120        can0          can1          can2          cif       clk32k        cpu       ddrphych0         ddrphych1         ddrphych2         ddrphych3         dp0       dp1       emmc       emmc-rstnout                                         emmc-bus8                                                                                                                            emmc-clk                                         emmc-cmd                                          emmc-data-strobe                                            eth1          fspi       fspim2-pins       `                                                                                      y         gmac1         gpu       hdmi          i2c0       i2c0m2-xfer                                               ,         i2c1       i2c1m0-xfer                    	             	                       i2c2       i2c2m0-xfer                    	             	                       i2c3       i2c3m0-xfer                   	            	                       i2c4       i2c4m0-xfer                   	            	                       i2c5       i2c5m0-xfer                   	            	                       i2c6       i2c6m0-xfer                    	             	                       i2c7       i2c7m0-xfer                   	            	                       i2c8       i2c8m0-xfer                   	            	                       i2s0       i2s0-lrck                                        i2s0-sclk                                        i2s0-sdi0                                        i2s0-sdi1                                        i2s0-sdi2                                        i2s0-sdi3                                        i2s0-sdo0                                        i2s0-sdo1                                        i2s0-sdo2                                        i2s0-sdo3                                           i2s1       i2s1m0-lrck                                      i2s1m0-sclk                                      i2s1m0-sdi0                                      i2s1m0-sdi1                                      i2s1m0-sdi2                                      i2s1m0-sdi3                                      i2s1m0-sdo0               	                       i2s1m0-sdo1               
                       i2s1m0-sdo2                                      i2s1m0-sdo3                                         i2s2       i2s2m1-lrck                                      i2s2m1-sclk                                      i2s2m1-sdi                
                       i2s2m1-sdo                                          i2s3       i2s3-lrck                                        i2s3-sclk                                        i2s3-sdi                                         i2s3-sdo                                            jtag          litcpu        mcu       mipi          npu       pcie20x1          pcie30phy         pcie30x1          pcie30x2          pcie30x4          pdm0          pdm1          pmic       pmic-pins         p                                                                                                                  pmu       pwm0       pwm0m0-pins                                 0         pwm1       pwm1m0-pins                                 1         pwm2       pwm2m0-pins                                 2         pwm3       pwm3m0-pins                                 3         pwm4       pwm4m0-pins                                          pwm5       pwm5m0-pins                	                          pwm6       pwm6m0-pins                                          pwm7       pwm7m0-pins                                          pwm8       pwm8m0-pins                                         pwm9       pwm9m0-pins                                         pwm10      pwm10m0-pins                                             pwm11      pwm11m1-pins                                            pwm12      pwm12m0-pins                                            pwm13      pwm13m0-pins                                            pwm14      pwm14m1-pins                  
                          pwm15      pwm15m1-pins                                            refclk        sata          sata0         sata1         sata2         sdio       sdiom1-pins       `                                                                                               sdmmc      sdmmc-bus4        @                                                             }      sdmmc-clk                                  z      sdmmc-cmd                                  {      sdmmc-det                                   |         spdif0        spdif1        spi0       spi0m0-pins       0                                                          spi0m0-cs0                                        spi0m0-cs1                                           spi1       spi1m1-pins       0                                                       spi1m1-cs0                                       spi1m1-cs1                                          spi2       spi2m2-pins       0                                                          spi2m2-cs0                 	                          spi3       spi3m1-pins       0                                                       spi3m1-cs0                                       spi3m1-cs1                                          spi4       spi4m0-pins       0                                                       spi4m0-cs0                                       spi4m0-cs1                                          tsadc      tsadc-shut-org                                           uart0      uart0m1-xfer                                 	                 /         uart1      uart1m1-xfer                      
            
                       uart2      uart2m0-xfer                       
             
                       uart3      uart3m1-xfer                      
            
                       uart4      uart4m1-xfer                      
            
                       uart5      uart5m1-xfer                      
            
                       uart6      uart6m1-xfer                       
            
                       uart7      uart7m1-xfer                      
            
                       uart8      uart8m1-xfer                      
            
                       uart9      uart9m2-xfer                      
            
                    uart9m2-ctsn                     
                       vop       bt656         gpio-func      tsadc-gpio-func                                           vdd_sd     vdd-sd-en                                            pcie2      pcie2-2-rst                                 s      pcie2-2-vcc-en                                            usb    vcc5v0-host-en                	                           ir-receiver    ir-receiver-pin                                          wireless-bluetooth     bt-reset-pin                                bt-wake-pin                             bt-wake-host-irq                                      opp-table-cluster0            operating-points-v2                        opp-1008000000              <          
L 
L ~          @      opp-1200000000              G          
4 
4 ~          @      opp-1416000000              Tfr            ~          @         +      opp-1608000000              _"          P P ~          @      opp-1800000000              kI          ~ ~ ~          @         opp-table-cluster1            operating-points-v2                        opp-1200000000              G          
L 
L B@          @      opp-1416000000              Tfr            B@          @      opp-1608000000              _"            B@          @      opp-1800000000              kI          P P B@          @      opp-2016000000              x)          H H B@          @      opp-2208000000              h          l l B@          @      opp-2400000000                        B@ B@ B@          @         opp-table-cluster2            operating-points-v2                        opp-1200000000              G          
L 
L B@          @      opp-1416000000              Tfr            B@          @      opp-1608000000              _"            B@          @      opp-1800000000              kI          P P B@          @      opp-2016000000              x)          H H B@          @      opp-2208000000              h          l l B@          @      opp-2400000000                        B@ B@ B@          @         opp-table-gpu             operating-points-v2            !   opp-300000000                         
L 
L P      opp-400000000               ׄ          
L 
L P      opp-500000000               e          
L 
L P      opp-600000000               #F          
L 
L P      opp-700000000               )'          
` 
` P      opp-800000000               /          q q P      opp-900000000               5          5  5  P      opp-1000000000              ;          P P P         chosen          7serial2:1500000n8         adc-keys          	    adc-keys            C              Obuttons         ` w@        z   d   button-function       	  Function                        Bh         ir-receiver           gpio-ir-receiver                             default         y         leds          	    pwm-leds       led-0           red_led                    off       
  	indicator           none                                a          led-1         
  green_led                      on          	power           default-on                              a          led-2         	  blue_led                       off       
  	indicator           none                                a             vcc3v3-pcie-wl-regulator              regulator-fixed                                    default         y           vcc3v3_pcie_wl           2Z         2Z                  (   -           u      vcc5v0-host-regulator             regulator-fixed         vcc5v0_host                            LK@         LK@                       	            default         y           (   -           *      vcc5v0-sys-regulator              regulator-fixed         vcc5v0_sys                             LK@         LK@           -      vcc-1v1-nldo-s3-regulator             regulator-fixed         vcc_1v1_nldo_s3                                             (   -                 vdd-3v3-sd-regulator              regulator-fixed         vdd_3v3_sd                                               2Z         2Z        (           default         y              ~         	compatible interrupt-parent #address-cells #size-cells model gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 i2c6 i2c7 i2c8 serial0 serial1 serial2 serial3 serial4 serial5 serial6 serial7 serial8 serial9 spi0 spi1 spi2 spi3 spi4 mmc0 mmc1 cpu device_type reg enable-method capacity-dmips-mhz clocks assigned-clocks assigned-clock-rates cpu-idle-states i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache dynamic-power-coefficient #cooling-cells operating-points-v2 cpu-supply phandle entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us cache-level cache-unified ports arm,smc-id shmem #clock-cells #reset-cells interrupts clock-frequency clock-output-names interrupt-names ranges no-map clock-names power-domains status mali-supply dr_mode phys phy-names phy_type resets snps,dis_enblslpm_quirk snps,dis-u1-entry-quirk snps,dis-u2-entry-quirk snps,dis-u2-freeclk-exists-quirk snps,dis-del-phy-power-chg-quirk snps,dis-tx-ipgap-linecheck-quirk snps,dis_rxdet_inp3_quirk #iommu-cells reset-names #phy-cells phy-supply rockchip,grf pinctrl-0 pinctrl-names fcs,suspend-voltage-selector regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay vin-supply regulator-off-in-suspend dmas dma-names reg-shift reg-io-width #pwm-cells #power-domain-cells pm_qos iommus reg-names rockchip,vop-grf rockchip,vo1-grf rockchip,pmu assigned-clock-parents #sound-dai-cells bus-range #interrupt-cells interrupt-map-mask interrupt-map linux,pci-domain max-link-speed msi-map num-lanes interrupt-controller reset-gpios vpcie3v3-supply rockchip,php-grf snps,axi-config snps,mixed-burst snps,mtl-rx-config snps,mtl-tx-config snps,tso snps,blen snps,wr_osr_lmt snps,rd_osr_lmt snps,rx-queues-to-use snps,tx-queues-to-use ports-implemented hba-port-cap snps,rx-ts-max snps,tx-ts-max spi-max-frequency spi-rx-bus-width spi-tx-bus-width fifo-depth cap-sd-highspeed disable-wp no-mmc no-sdio sd-uhs-sdr104 vmmc-supply vqmmc-supply no-sd non-removable mmc-hs400-1_8v mmc-hs400-enhanced-strobe rockchip,trcm-sync-tx-only mbi-alias mbi-ranges msi-controller #msi-cells affinity arm,pl330-periph-burst #dma-cells wakeup-source num-cs system-power-controller vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply vcc10-supply vcc11-supply vcc12-supply vcc13-supply vcc14-supply vcca-supply gpio-controller #gpio-cells pins function regulator-enable-ramp-delay regulator-suspend-microvolt regulator-on-in-suspend polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device rockchip,hw-tshut-temp rockchip,hw-tshut-mode rockchip,hw-tshut-polarity pinctrl-1 #thermal-sensor-cells #io-channel-cells vref-supply bits rockchip,u2phy-grf rockchip,usb-grf rockchip,usbdpphy-grf rockchip,vo-grf rockchip,pipe-grf rockchip,pipe-phy-grf gpio-ranges bias-pull-up bias-pull-down bias-disable drive-strength input-schmitt-enable rockchip,pins opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend stdout-path io-channels io-channel-names keyup-threshold-microvolt poll-interval label linux,code press-threshold-microvolt color default-state linux,default-trigger max-brightness pwms enable-active-high startup-delay-us gpio 