  3   8  /   (              /h                                                      %   Marvell Armada 375 Development Board          "   !marvell,a375-db marvell,armada375      aliases          ,/soc/internal-regs/gpio@18100            2/soc/internal-regs/gpio@18140            8/soc/internal-regs/gpio@18180             >/soc/internal-regs/serial@12000           F/soc/internal-regs/serial@12100       clocks     mainpll          !fixed-clock          N             [;          k         oscillator           !fixed-clock          N             [}x@         k            cpus                                       smarvell,armada-375-smp     cpu@0            cpu          !arm,cortex-a9                      cpu@1            cpu          !arm,cortex-a9                        pmu          !arm,cortex-a9-pmu                        soc       "   !marvell,armada375-mbus simple-bus                                                                                        @                          		           	              bootrom          !marvell,bootrom                         devbus-bootcs            !marvell,mvebu-devbus                                 /                                                     	   disabled          devbus-cs0           !marvell,mvebu-devbus                                >                                                     	   disabled          devbus-cs1           !marvell,mvebu-devbus                                =                                                     	   disabled          devbus-cs2           !marvell,mvebu-devbus                                ;                                                     	   disabled          devbus-cs3           !marvell,mvebu-devbus                                 7                                                     	   disabled          internal-regs            !simple-bus                                                    cache-controller@8000            !arm,pl310-cache                                                         ,            E            Y         scu@c000             !arm,cortex-a9-scu                  X      timer@c600           !arm,cortex-a9-twd-timer                         g                             interrupt-controller@d000            !arm,cortex-a9-gic           r                                                       k         mdio@c0054                                     !marvell,orion-mdio             T                     ethernet-phy@0                        k         ethernet-phy@3                       k            ethernet@f0000                                     !marvell,armada-375-pp2                       0` @     P                                 pp_clk gop_clk           okay       ethernet-port@0         g       %                                     okay                     	  rgmii-id          ethernet-port@1         g       )                                   okay                       gmii             rtc@10300            !marvell,orion-rtc                          g                spi@10600         )   !marvell,armada-375-spi marvell,orion-spi                  P                                              g                                	   disabled                       default    flash@0                                   !n25q128a13 jedec,spi-nor                         o          spi@10680         )   !marvell,armada-375-spi marvell,orion-spi                 P                                             g       ?                         	   disabled          i2c@11000            !marvell,mv64xxx-i2c                                                  g                                   okay             [            	        default       i2c@11100            !marvell,mv64xxx-i2c                                                  g                                   okay             [            
        default       serial@12000             !snps,dw-apb-uart                                      g                                              okay          serial@12100             !snps,dw-apb-uart              !                       g                                           	   disabled          pinctrl@18000            !marvell,mv88f6720-pinctrl                 $   i2c0-pins           mpp14 mpp15         i2c0             k   	      i2c1-pins           mpp61 mpp62         i2c1             k   
      nand-pins         J  mpp0 mpp1 mpp2 mpp3 mpp4 mpp5 mpp6 mpp7 mpp8 mpp9 mpp10 mpp11 mpp12 mpp13           nand             k         sdio-pins         $  mpp24 mpp25 mpp26 mpp27 mpp28 mpp29         sd           k         spi0-pins           mpp0 mpp1 mpp4 mpp5 mpp8 mpp9           spi0             k         sdio-st-pins            mpp44 mpp45         gpio             k            gpio@18100           !marvell,orion-gpio                @        #             *        :                    r         0  g       5          6          7          8         gpio@18140           !marvell,orion-gpio            @   @        #             *        :                    r         0  g       :          ;          <          =            k         gpio@18180           !marvell,orion-gpio               @        #            *        :                    r           g       >         system-controller@18200       %   !marvell,armada-375-system-controller                        clock-gating-control@18220            !marvell,armada-375-gating-clock                                        N            k         usb-cluster@18400            !marvell,armada-375-usb-cluster                        F            k         mbus-controller@20000            !marvell,mbus-controller                              k         interrupt-controller@20a00           !marvell,mpic              
    p   X        r                     Q        g                  k         timer@20300       2   !marvell,armada-375-timer marvell,armada-370-timer                 0 @   0      P                          	             
                                                       nbclk fixed       watchdog@20300           !marvell,armada-375-wdt                4     T                              nbclk fixed       cpurst@20800             !marvell,armada-370-cpu-reset                        coherency-fabric@21010        $   !marvell,armada-375-coherency-fabric                    usb@50000            !marvell,orion-ehci                         g                                 `              eusb       	   disabled          usb@54000            !marvell,orion-ehci            @            g                                  okay          usb@58000            !marvell,armada-375-xhci                           g                                 `              eusb          okay          xor@60800            !marvell,orion-xor                  
                            okay       xor00           g                   o         }      xor01           g                   o         }                  xor@60900            !marvell,orion-xor             	                                 okay       xor10           g       A            o         }      xor11           g       B            o         }                  crypto@90000             !marvell,armada-375-crypto             	             regs            g                                                              cesa0 cesa1 cesaz0 cesaz1                                  sata@a0000           !marvell,armada-370-sata           
    P         g                                       0 1          okay                     nand-controller@d0000         "   !marvell,armada370-nand-controller                  T                                  g       T                           okay                       default    nand@0                       pxa3xx_nand-0                                                    "      partitions           !fixed-partitions                                partition@0         U-Boot                        partition@800000            Linux                        partition@1000000           Filesystem              ?                  mvsdio@d4000             !marvell,orion-sdio            @            g                                 5            ?         L         ]         okay                          default         o                  x                thermal@e8078            !marvell,armada375-thermal             x    |            okay          mvebu-sar@e8204          !marvell,armada-375-core-clock                         N            k         corediv-clock@e8250       !   !marvell,armada-375-corediv-clock              P            N                       nand             pcie@82000000            !marvell,armada-370-pcie          okay             pci                                                                                            @    @                                                                                                        pcie@1,0             pci                                                                                       intx                                  r         @                                                                                                       `                                                                                                                                       okay       interrupt-controller                     r            k            pcie@2,0             pci                @                                                                      intx                       !           r         @                                                                                                       `                                                                                                                                      okay       interrupt-controller                     r            k               sa-sram0          
   !mmio-sram            		                                                              		                  k         sa-sram1          
   !mmio-sram            	                                                              	                  k            chosen          serial0:115200n8          memory@0             memory               @            	#address-cells #size-cells model compatible gpio0 gpio1 gpio2 serial0 serial1 #clock-cells clock-frequency phandle enable-method device_type reg interrupts-extended controller interrupt-parent pcie-mem-aperture pcie-io-aperture ranges clocks status cache-unified cache-level arm,double-linefill-incr arm,double-linefill-wrap arm,double-linefill prefetch-data interrupts #interrupt-cells interrupt-controller clock-names port-id phy phy-mode cell-index pinctrl-0 pinctrl-names spi-max-frequency reg-shift reg-io-width marvell,pins marvell,function ngpios gpio-controller #gpio-cells #phy-cells msi-controller phys phy-names dmacap,memcpy dmacap,xor dmacap,memset reg-names marvell,crypto-srams marvell,crypto-sram-size nr-ports label nand-rb marvell,nand-keep-config nand-on-flash-bbt nand-ecc-strength nand-ecc-step-size bus-width cap-sdio-irq cap-sd-highspeed cap-mmc-highspeed cd-gpios wp-gpios clock-output-names msi-parent bus-range assigned-addresses interrupt-names interrupt-map-mask interrupt-map marvell,pcie-port marvell,pcie-lane stdout-path 