  JN   8  F   (              F                                 Marvell Armada XP Matrix Board        S   marvell,axp-matrix marvell,armadaxp-mv78460 marvell,armadaxp marvell,armada-370-xp                              aliases           ,/soc/internal-regs/serial@12000           4/soc/internal-regs/serial@12100           </soc/internal-regs/serial@12200           D/soc/internal-regs/serial@12300          L/soc/internal-regs/gpio@18100            R/soc/internal-regs/gpio@18140            X/soc/internal-regs/gpio@18180         cpus                                       ^marvell,armada-xp-smp      cpu@0            marvell,sheeva-v7            lcpu          x             |                 B@      cpu@1            lcpu          marvell,sheeva-v7            x            |                B@      cpu@2            lcpu          marvell,sheeva-v7            x            |                B@      cpu@3            lcpu          marvell,sheeva-v7            x            |                B@         pmu          arm,cortex-a9-pmu                        soc                                                                                    !   marvell,armadaxp-mbus simple-bus          P                                  		               	                  devbus-bootcs            marvell,mvebu-devbus             x                    /                                        |             	   disabled          devbus-cs0           marvell,mvebu-devbus             x                   >                                        |             	   disabled          devbus-cs1           marvell,mvebu-devbus             x                   =                                        |             	   disabled          devbus-cs2           marvell,mvebu-devbus             x                   ;                                        |             	   disabled          devbus-cs3           marvell,mvebu-devbus             x                    7                                        |             	   disabled          internal-regs            simple-bus                                                    rtc@10300            marvell,orion-rtc            x                  2      i2c@11000         (   marvell,mv78230-i2c marvell,mv64xxx-i2c                                                |             	   disabled             x           i2c@11100         (   marvell,mv78230-i2c marvell,mv64xxx-i2c                                                 |             	   disabled             x           serial@12000             snps,dw-apb-uart             x                              )                    |                okay          serial@12100             snps,dw-apb-uart             x !                            *                    |                okay          pin-ctrl@18000           x     8         marvell,mv78460-pinctrl    ge0-gmii-pins           mpp0 mpp1 mpp2 mpp3 mpp4 mpp5 mpp6 mpp7 mpp8 mpp9 mpp10 mpp11 mpp12 mpp13 mpp14 mpp15 mpp16 mpp17 mpp18 mpp19 mpp20 mpp21 mpp22 mpp23           !ge0       ge0-rgmii-pins        >  mpp0 mpp1 mpp2 mpp3 mpp4 mpp5 mpp6 mpp7 mpp8 mpp9 mpp10 mpp11           !ge0       ge1-rgmii-pins        H  mpp12 mpp13 mpp14 mpp15 mpp16 mpp17 mpp18 mpp19 mpp20 mpp21 mpp22 mpp23         !ge1       sdio-pins         $  mpp30 mpp31 mpp32 mpp33 mpp34 mpp35         !sd0       spi0-pins           mpp36 mpp37 mpp38 mpp39         !spi0            2         spi1-pins           mpp13 mpp14 mpp16 mpp17         !spi1            2         uart2-pins          mpp42 mpp43         !uart2           2   	      uart3-pins          mpp44 mpp45         !uart3           2   
         corediv-clock@18740       !   marvell,armada-370-corediv-clock             x @           :            |           Gnand            2         mbus-controller@20000            marvell,mbus-controller          x            P           2         interrupt-controller@20a00           marvell,mpic            Z            k                  x 
    p   X        2         coherency-fabric@20200           marvell,coherency-fabric             x               timer@20300          x     0 @   0            %   &   '   (               marvell,armada-xp-timer          |                 nbclk fixed       watchdog@20300           x     4             marvell,armada-xp-wdt            |                 nbclk fixed             ]   &      cpurst@20800             marvell,armada-370-cpu-reset             x            pmsu@22000           marvell,armada-370-pmsu          x            usb@50000            marvell,orion-ehci           x                  -         okay             |            usb@51000            marvell,orion-ehci           x                 .      	   disabled             |            ethernet@70000           x     @                      |            	   disabled             marvell,armada-xp-neta        mdio@72004                                     marvell,orion-mdio           x              |            ethernet@74000           x @   @             
         |            	   disabled             marvell,armada-xp-neta        sata@a0000           marvell,armada-370-sata          x 
    P             7         |                    0 1          okay                     nand-controller@d0000         "   marvell,armada370-nand-controller            x      T                                      q         |             	   disabled          mvsdio@d4000             marvell,orion-sdio           x @                6         |                                                  	   disabled          sdramc@1400       #   marvell,armada-xp-sdram-controller           x            l2-cache@8000            marvell,aurora-system-cache          x                                                    serial@12200             snps,dw-apb-uart               	        default          x "                            +                    |                okay          serial@12300             snps,dw-apb-uart               
        default          x #                            ,                    |                okay          system-controller@18200       (   marvell,armada-370-xp-system-controller          x           clock-gating-control@18220           marvell,armada-xp-gating-clock           x              |               :           2         mvebu-sar@18230          marvell,armada-xp-core-clock             x 0           :           2         thermal@182b0            marvell,armadaxp-thermal             x                 okay          clock-complex@18700         :            marvell,armada-xp-cpu-clock          x     $ T            |              2         cpu-config@21000             marvell,armada-xp-cpu-config             x           ethernet@30000           marvell,armada-xp-neta           x     @                      |               okay            *sgmii      fixed-link                     3         usb@52000            marvell,orion-ehci           x                  /         |            	   disabled          xor@60900            marvell,orion-xor            x 	                  |               okay       xor10               3         ?         M      xor11               4         ?         M         X         crypto@90000             marvell,armada-xp-crypto             x 	             fregs                0   1         |                    cesa0 cesa1         p                       bm@c0000             marvell,armada-380-neta-bm           x               |                       	   disabled          xor@f0900            marvell,orion-xor            x 	                  |               okay       xor00               ^         ?         M      xor01               _         ?         M         X         gpio@18100        +   marvell,armada-370-gpio marvell,orion-gpio           x     @          	  fgpio pwm                                                        k        Z               R   S   T   U         |             gpio@18140        +   marvell,armada-370-gpio marvell,orion-gpio           x @   @          	  fgpio pwm                                                        k        Z               W   X   Y   Z         |             gpio@18180        +   marvell,armada-370-gpio marvell,orion-gpio           x    @                                        k        Z               [      ethernet@34000           marvell,armada-xp-neta           x @   @                      |            	   disabled             spi@10600         l   x       (      ^                        _                                                                             |             	   disabled          (   marvell,armada-xp-spi marvell,orion-spi                    default       spi@10680         l   x      (      Z                        [                                                                   \         |             	   disabled          (   marvell,armada-xp-spi marvell,orion-spi                    default       bootrom          marvell,bootrom          x               sa-sram0          
   mmio-sram            x		                  |                                            		                 2         sa-sram1          
   mmio-sram            x	                  |                                            	                 2         bm-bppi       
   mmio-sram            x                                                                 |                     	   disabled            2         pcie@82000000            marvell,armada-xp-pcie           okay             lpci                                                         H                                                         @    @                                                                                                         @    @                                                                                                                                                                                                       x                       p                                                                                                                                                                 x                       p                   	                       	                       
                       
                    pcie@1,0             lpci                                   x                                                    intx                   :        Z         @                                                                                  )                     `  <                                                                                             J            \             |               okay       interrupt-controller             k        Z           2            pcie@2,0             lpci                @                  x                                                    intx                   ;        Z         @                                                                                  )                     `  <                                                                                             J            \            |            	   disabled       interrupt-controller             k        Z           2            pcie@3,0             lpci                                  x                                                    intx                   <        Z         @                                                                                  )                     `  <                                                                                             J            \            |            	   disabled       interrupt-controller             k        Z           2            pcie@4,0             lpci                                   x                                                     intx                   =        Z         @                                                                                  )                     `  <                                                                                             J            \            |            	   disabled       interrupt-controller             k        Z           2            pcie@5,0             lpci          (                         x  (                                                  intx                   >        Z         @                                                                                  )                     `  <                                                                                             J           \             |      	      	   disabled       interrupt-controller             k        Z           2            pcie@6,0             lpci          0      @                  x  0                                                  intx                   ?        Z         @                                                                                  )                     `  <                                                                                             J           \            |      
      	   disabled       interrupt-controller             k        Z           2            pcie@7,0             lpci          8                        x  8                                                  intx                   @        Z         @                                                                                  )                     `  <                                                                                             J           \            |            	   disabled       interrupt-controller             k        Z           2            pcie@8,0             lpci          @                        x  @                                                  intx                   A        Z         @                                                                                  )                     `  <                                                                                             J           \            |            	   disabled       interrupt-controller             k        Z           2            pcie@9,0             lpci          H                         x  H                                                  intx                   c        Z         @                    	                            	                                  )                     `  <                                                                                             J           \             |            	   disabled       interrupt-controller             k        Z           2            pcie@a,0             lpci          P                         x  P                                                  intx                   g        Z         @                    
                            
                                  )                     `  <                                                                                             J           \             |            	   disabled       interrupt-controller             k        Z           2                  clocks     mainpll          fixed-clock         :            nw5         2         oscillator           fixed-clock         :            n}x@        2            chosen          ~serial0:115200n8          memory@0             lmemory           x                        	model compatible #address-cells #size-cells serial0 serial1 serial2 serial3 gpio0 gpio1 gpio2 enable-method device_type reg clocks clock-latency interrupts-extended controller interrupt-parent pcie-mem-aperture pcie-io-aperture ranges status interrupts reg-shift reg-io-width marvell,pins marvell,function phandle #clock-cells clock-output-names #interrupt-cells interrupt-controller msi-controller clock-names nr-ports bus-width cap-sdio-irq cap-sd-highspeed cap-mmc-highspeed cache-id-part cache-level cache-unified wt-override pinctrl-0 pinctrl-names phy-mode full-duplex dmacap,memcpy dmacap,xor dmacap,memset reg-names marvell,crypto-srams marvell,crypto-sram-size internal-mem ngpios gpio-controller #gpio-cells #pwm-cells cell-index no-memory-wc msi-parent bus-range assigned-addresses interrupt-names interrupt-map-mask interrupt-map marvell,pcie-port marvell,pcie-lane clock-frequency stdout-path 