 *   8    (            1 d                             %    goldelico,gta04 ti,omap3630 ti,omap3                                     +            7Goldelico GTA04A4/Letux 2804       chosen           =/ocp@68000000/serial@49020000         aliases          I/ocp@68000000/i2c@48070000           N/ocp@68000000/i2c@48072000           S/ocp@68000000/i2c@48060000           X/ocp@68000000/mmc@4809c000           ]/ocp@68000000/mmc@480b4000           b/ocp@68000000/serial@4806a000            j/ocp@68000000/serial@4806c000            r/ocp@68000000/serial@49020000            z/ocp@68000000/serial@49042000            /spi/td028ttec1@0            /connector        cpus                         +       cpu@0             arm,cortex-a8            cpu                                   cpu                                                                      &         pmu@54000000              arm,cortex-a8-pmu            T                         debugss       soc           ti,omap-infra      mpu           ti,omap3-mpu            mpu       iva       
    ti,iva2.2           iva    dsp           ti,omap3-c64                ocp@68000000              ti,omap3-l3-smx simple-bus           h                 	   
                     +                    l3_main    l4@48000000           ti,omap3-l4-core simple-bus                      +               H         scm@2000              ti,omap3-scm simple-bus                                       +                          pinmux@30              ti,omap3-padconf pinctrl-single             0  8                     +            #           2            C        X           v          default                           hsusb2-pins       0                                            uart1-pins            R     L                      uart2-pins            J     H                      uart3-pins            n     p                      mmc1-pins         0                                           backlight-pinmux-pins                            0      dss-dpi-pins                                                                                                                                                                                                                                 gps-pins              F                     hdq-pins                                 bmp085-pins                               bma180-pins           
                    itg3200-pins                                   hmc5843-pins                                  penirq-pins           d                    camera-pins                                                                                                                        mcbsp1-pins       0    \    ^      `      b     f     h                    mcbsp2-pins                                                mcbsp3-pins            <      >     @     B                    mcbsp4-pins           T    V    Z                   twl4030-pins                A                     scm_conf@270              syscon simple-bus              p  0                     +                 p  0               pbias_regulator@2b0           ti,pbias-omap3 ti,pbias-omap                                pbias_mmc_omap2430          pbias_mmc_omap2430           w@         -                    clocks                       +       clock@68          
    ti,clksel               h                                +       clock-mcbsp5-mux-fck@4                                    ti,composite-mux-clock          mcbsp5_mux_fck                 	                  clock-mcbsp3-mux-fck@0                                     ti,composite-mux-clock          mcbsp3_mux_fck              
   	                  clock-mcbsp4-mux-fck@2                                    ti,composite-mux-clock          mcbsp4_mux_fck              
   	                     mcbsp5_fck                        ti,composite-clock                                  clock@4       
    ti,clksel                                               +       clock-mcbsp1-mux-fck@2                                    ti,composite-mux-clock          mcbsp1_mux_fck                 	                  clock-mcbsp2-mux-fck@6                                    ti,composite-mux-clock          mcbsp2_mux_fck              
   	                     mcbsp1_fck                        ti,composite-clock                                  mcbsp2_fck                        ti,composite-clock                            
      mcbsp3_fck                        ti,composite-clock                                  mcbsp4_fck                        ti,composite-clock                                        clockdomains          pinmux@a00             ti,omap3-padconf pinctrl-single            
    \                     +            #           2            C        X           v     gpio1-pins               A     A                  twl4030-vpins-pins                                                                 target-module@480a6000            ti,sysc-omap2 ti,sysc            H
`D   H
`H   H
`L           %rev sysc syss           /           <                  J                        ick                      +               H
`        aes1@0            ti,omap3-aes                    P                    W      	      
        \tx rx            target-module@480c5000            ti,sysc-omap2 ti,sysc            HPD   HPH   HPL           %rev sysc syss           /           <                  J                        ick                      +               HP        aes2@0            ti,omap3-aes                    P                    W      A      B        \tx rx            prm@48306000              ti,omap3-prm             H0`   @               clocks                       +       virt_16_8m_ck                         fixed-clock         f Y                   osc_sys_ck@d40                        ti,mux-clock                                          @                  sys_ck@1270                       ti,divider-clock                        v                         p                     #      sys_clkout1@d70                       ti,gate-clock                          p        v         dpll3_x2_ck                       fixed-factor-clock                                          dpll3_m2x2_ck                         fixed-factor-clock                                                 "      dpll4_x2_ck                       fixed-factor-clock              !                            corex2_fck                        fixed-factor-clock              "                                  $      wkup_l4_ick                       fixed-factor-clock              #                                  c      corex2_d3_fck                         fixed-factor-clock              $                                        corex2_d5_fck                         fixed-factor-clock              $                                           clockdomains             cm@48004000           ti,omap3-cm          H @   @    clocks                       +       dummy_apb_pclk                        fixed-clock         f          omap_32k_fck                          fixed-clock         f               I      virt_12m_ck                       fixed-clock         f                    virt_13m_ck                       fixed-clock         f ]@                  virt_19200000_ck                          fixed-clock         f$                   virt_26000000_ck                          fixed-clock         f                  virt_38_4m_ck                         fixed-clock         fI                   dpll4_ck@d00                          ti,omap3-dpll-per-j-type-clock              #   #                 D  0            !      dpll4_m2_ck@d48                       ti,divider-clock                !           ?           H                     %      dpll4_m2x2_mul_ck                         fixed-factor-clock              %                                  &      dpll4_m2x2_ck@d00                         ti,hsdiv-gate-clock             &        v                                    '      omap_96m_alwon_fck                        fixed-factor-clock              '                                  3      dpll3_ck@d00                          ti,omap3-dpll-core-clock                #   #                 @  0                  clock@1140        
    ti,clksel              @                                +       clock-dpll3-m3@16                                     ti,divider-clock            dpll3_m3_ck                                             -      clock-dpll4-m6@24                                     ti,divider-clock            dpll4_m6_ck             !           ?                     ?      clock-emu-src-mux@0                                    ti,mux-clock            emu_src_mux_ck              #   (   )   *            w      clock-pclk-fck@8                                      ti,divider-clock          	  pclk_fck                +                          clock-pclkx2-fck@6                                    ti,divider-clock            pclkx2_fck              +                          clock-atclk-fck@4                                     ti,divider-clock          
  atclk_fck               +                          clock-traceclk-src-fck@2                                      ti,mux-clock            traceclk_src_fck                #   (   )   *            ,      clock-traceclk-fck@11                                     ti,divider-clock            traceclk_fck                ,                             dpll3_m3x2_mul_ck                         fixed-factor-clock              -                                  .      dpll3_m3x2_ck@d00                         ti,hsdiv-gate-clock             .        v                                    /      emu_core_alwon_ck                         fixed-factor-clock              /                                  (      sys_altclk                        fixed-clock         f                6      mcbsp_clks                        fixed-clock         f                	      core_ck                       fixed-factor-clock                                                 0      dpll1_fck@940                         ti,divider-clock                0        v                         	@                     1      dpll1_ck@904                          ti,omap3-dpll-clock             #   1           	  	$  	@  	4                  dpll1_x2_ck                       fixed-factor-clock                                                2      dpll1_x2m2_ck@944                         ti,divider-clock                2                      	D                     F      cm_96m_fck                        fixed-factor-clock              3                                  4      clock@d40         
    ti,clksel              @                                +       clock-dpll3-m2@27                                     ti,divider-clock            dpll3_m2_ck                                                    clock-omap-96m-fck@6                                      ti,mux-clock            omap_96m_fck                4   #            Z      clock-omap-54m-fck@5                                      ti,mux-clock            omap_54m_fck                5   6            B      clock-omap-48m-fck@3                                      ti,mux-clock            omap_48m_fck                7   6            :         clock@e40         
    ti,clksel              @                                +       clock-dpll4-m3@8                                      ti,divider-clock            dpll4_m3_ck             !                                 8      clock-dpll4-m4@0                                       ti,divider-clock            dpll4_m4_ck             !                                ;         dpll4_m3x2_mul_ck                         fixed-factor-clock              8                                  9      dpll4_m3x2_ck@d00                         ti,hsdiv-gate-clock             9        v                                    5      cm_96m_d2_fck                         fixed-factor-clock              4                                  7      omap_12m_fck                          fixed-factor-clock              :                                  [      dpll4_m4x2_mul_ck                         ti,fixed-factor-clock               ;                                           <      dpll4_m4x2_ck@d00                         ti,gate-clock               <        v                                             _      dpll4_m5_ck@f40                       ti,divider-clock                !           ?           @                     =      dpll4_m5x2_mul_ck                         ti,fixed-factor-clock               =                                           >      dpll4_m5x2_ck@d00                         ti,hsdiv-gate-clock             >        v                                             {      dpll4_m6x2_mul_ck                         fixed-factor-clock              ?                                  @      dpll4_m6x2_ck@d00                         ti,hsdiv-gate-clock             @        v                                    A      emu_per_alwon_ck                          fixed-factor-clock              A                                  )      clock@d70         
    ti,clksel              p                                +       clock-clkout2-src-gate@7                                       ti,composite-no-wait-gate-clock         clkout2_src_gate_ck             0            D      clock-clkout2-src-mux@0                                    ti,composite-mux-clock          clkout2_src_mux_ck              0   #   4   B            E      clock-sys-clkout2@3                                   ti,divider-clock            sys_clkout2             C           @                  clkout2_src_ck                        ti,composite-clock              D   E            C      mpu_ck                        fixed-factor-clock              F                                  G      arm_fck@924                       ti,divider-clock                G           	$                 emu_mpu_alwon_ck                          fixed-factor-clock              G                                  *      clock@a40         
    ti,clksel              
@                                +       clock-l3-ick@0                                     ti,divider-clock            l3_ick              0                                H      clock-l4-ick@2                                    ti,divider-clock            l4_ick              H                                J      clock-gpt10-mux-fck@6                                     ti,composite-mux-clock          gpt10_mux_fck               I   #            W      clock-gpt11-mux-fck@7                                     ti,composite-mux-clock          gpt11_mux_fck               I   #            Y      clock-ssi-ssr-div-fck-3430es2@8                                   ti,composite-divider-clock          ssi_ssr_div_fck_3430es2             $      $                                                     clock@c40         
    ti,clksel              @                                +       clock-rm-ick@1                                    ti,divider-clock            rm_ick              J                          clock-gpt1-mux-fck@0                                       ti,composite-mux-clock          gpt1_mux_fck                I   #            b      clock-usim-mux-fck@3                                      ti,composite-mux-clock          usim_mux_fck          (      #   K   L   M   N   O   P   Q   R   S                              clock@a00         
    ti,clksel              
                                 +       clock-gpt10-gate-fck@11                                   ti,composite-gate-clock         gpt10_gate_fck              #            V      clock-gpt11-gate-fck@12                                   ti,composite-gate-clock         gpt11_gate_fck              #            X      clock-mmchs2-fck@25                                   ti,wait-gate-clock          mmchs2_fck                                clock-mmchs1-fck@24                                   ti,wait-gate-clock          mmchs1_fck                                clock-i2c3-fck@17                                     ti,wait-gate-clock        	  i2c3_fck                                  clock-i2c2-fck@16                                     ti,wait-gate-clock        	  i2c2_fck                                  clock-i2c1-fck@15                                     ti,wait-gate-clock        	  i2c1_fck                                  clock-mcbsp5-gate-fck@10                
                      ti,composite-gate-clock         mcbsp5_gate_fck             	                  clock-mcbsp1-gate-fck@9             	                      ti,composite-gate-clock         mcbsp1_gate_fck             	                  clock-mcspi4-fck@21                                   ti,wait-gate-clock          mcspi4_fck              T                  clock-mcspi3-fck@20                                   ti,wait-gate-clock          mcspi3_fck              T                  clock-mcspi2-fck@19                                   ti,wait-gate-clock          mcspi2_fck              T                  clock-mcspi1-fck@18                                   ti,wait-gate-clock          mcspi1_fck              T                  clock-uart2-fck@14                                    ti,wait-gate-clock        
  uart2_fck               T                  clock-uart1-fck@13                                    ti,wait-gate-clock        
  uart1_fck               T                  clock-hdq-fck@22                                      ti,wait-gate-clock          hdq_fck             U                  clock-modem-fck@31                                    ti,omap3-interface-clock          
  modem_fck               #                  clock-mspro-fck@23                                    ti,wait-gate-clock        
  mspro_fck                     clock-ssi-ssr-gate-fck-3430es2@0                                        ti,composite-no-wait-gate-clock         ssi_ssr_gate_fck_3430es2                $                  clock-mmchs3-fck@30                                   ti,wait-gate-clock          mmchs3_fck                                   gpt10_fck                         ti,composite-clock              V   W      gpt11_fck                         ti,composite-clock              X   Y      core_96m_fck                          fixed-factor-clock              Z                                        core_48m_fck                          fixed-factor-clock              :                                  T      core_12m_fck                          fixed-factor-clock              [                                  U      core_l3_ick                       fixed-factor-clock              H                                  \      clock@a10         
    ti,clksel              
                                +       clock-sdrc-ick@1                                      ti,wait-gate-clock        	  sdrc_ick                \                  clock-mmchs2-ick@25                                   ti,omap3-interface-clock            mmchs2_ick              ]                  clock-mmchs1-ick@24                                   ti,omap3-interface-clock            mmchs1_ick              ]                  clock-hdq-ick@22                                      ti,omap3-interface-clock            hdq_ick             ]                  clock-mcspi4-ick@21                                   ti,omap3-interface-clock            mcspi4_ick              ]                  clock-mcspi3-ick@20                                   ti,omap3-interface-clock            mcspi3_ick              ]                  clock-mcspi2-ick@19                                   ti,omap3-interface-clock            mcspi2_ick              ]                  clock-mcspi1-ick@18                                   ti,omap3-interface-clock            mcspi1_ick              ]                  clock-i2c3-ick@17                                     ti,omap3-interface-clock          	  i2c3_ick                ]                  clock-i2c2-ick@16                                     ti,omap3-interface-clock          	  i2c2_ick                ]                  clock-i2c1-ick@15                                     ti,omap3-interface-clock          	  i2c1_ick                ]                  clock-uart2-ick@14                                    ti,omap3-interface-clock          
  uart2_ick               ]                  clock-uart1-ick@13                                    ti,omap3-interface-clock          
  uart1_ick               ]                  clock-gpt11-ick@12                                    ti,omap3-interface-clock          
  gpt11_ick               ]                  clock-gpt10-ick@11                                    ti,omap3-interface-clock          
  gpt10_ick               ]                  clock-mcbsp5-ick@10             
                      ti,omap3-interface-clock            mcbsp5_ick              ]                  clock-mcbsp1-ick@9              	                      ti,omap3-interface-clock            mcbsp1_ick              ]                  clock-omapctrl-ick@6                                      ti,omap3-interface-clock            omapctrl_ick                ]                  clock-aes2-ick@28                                     ti,omap3-interface-clock          	  aes2_ick                ]                  clock-sha12-ick@27                                    ti,omap3-interface-clock          
  sha12_ick               ]                  clock-icr-ick@29                                      ti,omap3-interface-clock            icr_ick             ]      clock-des2-ick@26                                     ti,omap3-interface-clock          	  des2_ick                ]      clock-mspro-ick@23                                    ti,omap3-interface-clock          
  mspro_ick               ]      clock-mailboxes-ick@7                                     ti,omap3-interface-clock            mailboxes_ick               ]      clock-sad2d-ick@3                                     ti,omap3-interface-clock          
  sad2d_ick               H                  clock-hsotgusb-ick-3430es2@4                                  "    ti,omap3-hsotgusb-interface-clock           hsotgusb_ick_3430es2                \                  clock-ssi-ick-3430es2@0                                    ti,omap3-ssi-interface-clock            ssi_ick_3430es2             ^                 clock-mmchs3-ick@30                                   ti,omap3-interface-clock            mmchs3_ick              ]                     gpmc_fck                          fixed-factor-clock              \                            core_l4_ick                       fixed-factor-clock              J                                  ]      clock@e00         
    ti,clksel                                               +       clock-dss-tv-fck                          ti,gate-clock           dss_tv_fck              B        v                     clock-dss-96m-fck                         ti,gate-clock           dss_96m_fck             Z        v                     clock-dss2-alwon-fck                          ti,gate-clock           dss2_alwon_fck              #        v                     clock-dss1-alwon-fck-3430es2@0                                     ti,dss-gate-clock           dss1_alwon_fck_3430es2              _                              dummy_ck                          fixed-clock         f          clock@c00         
    ti,clksel                                               +       clock-gpt1-gate-fck@0                                      ti,composite-gate-clock         gpt1_gate_fck               #            a      clock-gpio1-dbck@3                                    ti,gate-clock           gpio1_dbck              `                  clock-wdt2-fck@5                                      ti,wait-gate-clock        	  wdt2_fck                `                  clock-sr1-fck@6                                   ti,wait-gate-clock          sr1_fck             #           "      clock-sr2-fck@7                                   ti,wait-gate-clock          sr2_fck             #           !      clock-usim-gate-fck@9               	                      ti,composite-gate-clock         usim_gate_fck               Z                     gpt1_fck                          ti,composite-clock              a   b                 wkup_32k_fck                          fixed-factor-clock              I                                  `      clock@c10         
    ti,clksel                                              +       clock-wdt2-ick@5                                      ti,omap3-interface-clock          	  wdt2_ick                c                  clock-wdt1-ick@4                                      ti,omap3-interface-clock          	  wdt1_ick                c                  clock-gpio1-ick@3                                     ti,omap3-interface-clock          
  gpio1_ick               c                  clock-omap-32ksync-ick@2                                      ti,omap3-interface-clock            omap_32ksync_ick                c                  clock-gpt12-ick@1                                     ti,omap3-interface-clock          
  gpt12_ick               c                  clock-gpt1-ick@0                                       ti,omap3-interface-clock          	  gpt1_ick                c                  clock-usim-ick@9                	                      ti,omap3-interface-clock          	  usim_ick                c                     per_96m_fck                       fixed-factor-clock              3                                  
      per_48m_fck                       fixed-factor-clock              :                                  d      clock@1000        
    ti,clksel                                               +       clock-uart3-fck@11                                    ti,wait-gate-clock        
  uart3_fck               d                  clock-gpt2-gate-fck@3                                     ti,composite-gate-clock         gpt2_gate_fck               #            f      clock-gpt3-gate-fck@4                                     ti,composite-gate-clock         gpt3_gate_fck               #            h      clock-gpt4-gate-fck@5                                     ti,composite-gate-clock         gpt4_gate_fck               #            j      clock-gpt5-gate-fck@6                                     ti,composite-gate-clock         gpt5_gate_fck               #            l      clock-gpt6-gate-fck@7                                     ti,composite-gate-clock         gpt6_gate_fck               #            n      clock-gpt7-gate-fck@8                                     ti,composite-gate-clock         gpt7_gate_fck               #            p      clock-gpt8-gate-fck@9               	                      ti,composite-gate-clock         gpt8_gate_fck               #            r      clock-gpt9-gate-fck@10              
                      ti,composite-gate-clock         gpt9_gate_fck               #            t      clock-gpio6-dbck@17                                   ti,gate-clock           gpio6_dbck              e                  clock-gpio5-dbck@16                                   ti,gate-clock           gpio5_dbck              e                  clock-gpio4-dbck@15                                   ti,gate-clock           gpio4_dbck              e                  clock-gpio3-dbck@14                                   ti,gate-clock           gpio3_dbck              e                  clock-gpio2-dbck@13                                   ti,gate-clock           gpio2_dbck              e                  clock-wdt3-fck@12                                     ti,wait-gate-clock        	  wdt3_fck                e                  clock-mcbsp2-gate-fck@0                                    ti,composite-gate-clock         mcbsp2_gate_fck             	                  clock-mcbsp3-gate-fck@1                                   ti,composite-gate-clock         mcbsp3_gate_fck             	                  clock-mcbsp4-gate-fck@2                                   ti,composite-gate-clock         mcbsp4_gate_fck             	                  clock-uart4-fck@18                                    ti,wait-gate-clock        
  uart4_fck               d                     clock@1040        
    ti,clksel              @                                +       clock-gpt2-mux-fck@0                                       ti,composite-mux-clock          gpt2_mux_fck                I   #            g      clock-gpt3-mux-fck@1                                      ti,composite-mux-clock          gpt3_mux_fck                I   #            i      clock-gpt4-mux-fck@2                                      ti,composite-mux-clock          gpt4_mux_fck                I   #            k      clock-gpt5-mux-fck@3                                      ti,composite-mux-clock          gpt5_mux_fck                I   #            m      clock-gpt6-mux-fck@4                                      ti,composite-mux-clock          gpt6_mux_fck                I   #            o      clock-gpt7-mux-fck@5                                      ti,composite-mux-clock          gpt7_mux_fck                I   #            q      clock-gpt8-mux-fck@6                                      ti,composite-mux-clock          gpt8_mux_fck                I   #            s      clock-gpt9-mux-fck@7                                      ti,composite-mux-clock          gpt9_mux_fck                I   #            u         gpt2_fck                          ti,composite-clock              f   g                 gpt3_fck                          ti,composite-clock              h   i      gpt4_fck                          ti,composite-clock              j   k      gpt5_fck                          ti,composite-clock              l   m      gpt6_fck                          ti,composite-clock              n   o      gpt7_fck                          ti,composite-clock              p   q      gpt8_fck                          ti,composite-clock              r   s      gpt9_fck                          ti,composite-clock              t   u      per_32k_alwon_fck                         fixed-factor-clock              I                                  e      per_l4_ick                        fixed-factor-clock              J                                  v      clock@1010        
    ti,clksel                                              +       clock-gpio6-ick@17                                    ti,omap3-interface-clock          
  gpio6_ick               v                  clock-gpio5-ick@16                                    ti,omap3-interface-clock          
  gpio5_ick               v                  clock-gpio4-ick@15                                    ti,omap3-interface-clock          
  gpio4_ick               v                  clock-gpio3-ick@14                                    ti,omap3-interface-clock          
  gpio3_ick               v                  clock-gpio2-ick@13                                    ti,omap3-interface-clock          
  gpio2_ick               v                  clock-wdt3-ick@12                                     ti,omap3-interface-clock          	  wdt3_ick                v                  clock-uart3-ick@11                                    ti,omap3-interface-clock          
  uart3_ick               v                  clock-uart4-ick@18                                    ti,omap3-interface-clock          
  uart4_ick               v                  clock-gpt9-ick@10               
                      ti,omap3-interface-clock          	  gpt9_ick                v                  clock-gpt8-ick@9                	                      ti,omap3-interface-clock          	  gpt8_ick                v                  clock-gpt7-ick@8                                      ti,omap3-interface-clock          	  gpt7_ick                v                  clock-gpt6-ick@7                                      ti,omap3-interface-clock          	  gpt6_ick                v                  clock-gpt5-ick@6                                      ti,omap3-interface-clock          	  gpt5_ick                v                  clock-gpt4-ick@5                                      ti,omap3-interface-clock          	  gpt4_ick                v                  clock-gpt3-ick@4                                      ti,omap3-interface-clock          	  gpt3_ick                v                  clock-gpt2-ick@3                                      ti,omap3-interface-clock          	  gpt2_ick                v                  clock-mcbsp2-ick@0                                     ti,omap3-interface-clock            mcbsp2_ick              v                  clock-mcbsp3-ick@1                                    ti,omap3-interface-clock            mcbsp3_ick              v                  clock-mcbsp4-ick@2                                    ti,omap3-interface-clock            mcbsp4_ick              v                     emu_src_ck                        ti,clkdm-gate-clock             w            +      secure_32k_fck                        fixed-clock         f               x      gpt12_fck                         fixed-factor-clock              x                                       wdt1_fck                          fixed-factor-clock              x                            security_l4_ick2                          fixed-factor-clock              J                                  y      clock@a14         
    ti,clksel              
                                +       clock-aes1-ick@3                                      ti,omap3-interface-clock          	  aes1_ick                y                  clock-rng-ick@2                                   ti,omap3-interface-clock            rng_ick             y           	      clock-sha11-ick@1                                     ti,omap3-interface-clock          
  sha11_ick               y      clock-des1-ick@0                                       ti,omap3-interface-clock          	  des1_ick                y      clock-pka-ick@4                                   ti,omap3-interface-clock            pka_ick             z         clock@f00         
    ti,clksel                                               +       clock-cam-mclk@0                                       ti,gate-clock         	  cam_mclk                {               clock-csi2-96m-fck@1                                      ti,gate-clock           csi2_96m_fck                                     cam_ick@f10                   !    ti,omap3-no-wait-interface-clock                J                   v                      security_l3_ick                       fixed-factor-clock              H                                  z      ssi_l4_ick                        fixed-factor-clock              J                                  ^      sr_l4_ick                         fixed-factor-clock              J                            dpll2_fck@40                          ti,divider-clock                0        v                          @                     |      dpll2_ck@4                        ti,omap3-dpll-clock             #   |               $   @   4                   2         :            }      dpll2_m2_ck@44                        ti,divider-clock                }                       D                     ~      iva2_ck@0                         ti,wait-gate-clock              ~                     v                      clock@a18         
    ti,clksel              
                               N             +       clock-mad2d-ick@3                                     ti,omap3-interface-clock          
  mad2d_ick               H                  clock-usbtll-ick@2                                    ti,omap3-interface-clock            usbtll_ick              ]                     ssi_ssr_fck_3430es2                       ti,composite-clock                                   ssi_sst_fck_3430es2                       fixed-factor-clock                                                     sys_d2_ck                         fixed-factor-clock              #                                  K      omap_96m_d2_fck                       fixed-factor-clock              Z                                  L      omap_96m_d4_fck                       fixed-factor-clock              Z                                  M      omap_96m_d8_fck                       fixed-factor-clock              Z                                  N      omap_96m_d10_fck                          fixed-factor-clock              Z                      
            O      dpll5_m2_d4_ck                        fixed-factor-clock                                                P      dpll5_m2_d8_ck                        fixed-factor-clock                                                Q      dpll5_m2_d16_ck                       fixed-factor-clock                                                R      dpll5_m2_d20_ck                       fixed-factor-clock                                                S      usim_fck                          ti,composite-clock                       dpll5_ck@d04                          ti,omap3-dpll-clock             #   #             $  L  4                   2                  dpll5_m2_ck@d50                       ti,divider-clock                                      P                           sgx_gate_fck@b00                          ti,composite-gate-clock             0        v                                 core_d3_ck                        fixed-factor-clock              0                                        core_d4_ck                        fixed-factor-clock              0                                        core_d6_ck                        fixed-factor-clock              0                                        omap_192m_alwon_fck                       fixed-factor-clock              '                                        core_d2_ck                        fixed-factor-clock              0                                        sgx_mux_fck@b40                       ti,composite-mux-clock                        4                       @                  sgx_fck                       ti,composite-clock                            #      sgx_ick@b10                       ti,wait-gate-clock              H                   v                      cpefuse_fck@a08                       ti,gate-clock               #           
        v                      ts_fck@a08                        ti,gate-clock               I           
        v                     usbtll_fck@a08                        ti,wait-gate-clock                         
        v                     dss_ick_3430es2@e10                       ti,omap3-dss-interface-clock                J                   v                      usbhost_120m_fck@1400                         ti,gate-clock                                   v                     usbhost_48m_fck@1400                          ti,dss-gate-clock               :                    v                      usbhost_ick@1410                          ti,omap3-dss-interface-clock                J                   v                         clockdomains       core_l3_clkdm             ti,clockdomain                       dpll3_clkdm           ti,clockdomain                    dpll1_clkdm           ti,clockdomain                    per_clkdm             ti,clockdomain        l                                                                                          emu_clkdm             ti,clockdomain              +      dpll4_clkdm           ti,clockdomain              !      wkup_clkdm            ti,clockdomain        $                                    dss_clkdm             ti,clockdomain                                core_l4_clkdm             ti,clockdomain                                                                                                                                cam_clkdm             ti,clockdomain                       iva2_clkdm            ti,clockdomain                    dpll2_clkdm           ti,clockdomain              }      d2d_clkdm             ti,clockdomain                          dpll5_clkdm           ti,clockdomain                    sgx_clkdm             ti,clockdomain                    usbhost_clkdm             ti,clockdomain                                target-module@48320000            ti,sysc-omap2 ti,sysc            H2     H2          	  %rev sysc            <                   `            fck ick                      +               H2        counter@0             ti,omap-counter32k                            interrupt-controller@48200000             ti,omap3-intc            C        2            H                        target-module@48056000            ti,sysc-omap2 ti,sysc            H`    H`,   H`(           %rev sysc syss           /  #        [                  <                  J               \         ick                      +               H`       dma-controller@0              ti,omap3630-sdma ti,omap-sdma                                               i           t               `                     gpio@48310000             ti,omap3-gpio            H1                        gpio1                                         C        2           default                       '      gpio@49050000             ti,omap3-gpio            I                        gpio2                                C        2                     gpio@49052000             ti,omap3-gpio            I                        gpio3                                C        2         gpio@49054000             ti,omap3-gpio            I@                        gpio4                                C        2                     gpio@49056000             ti,omap3-gpio            I`               !        gpio5                                C        2                     gpio@49058000             ti,omap3-gpio            I               "        gpio6                                C        2                     serial@4806a000           ti,omap3-uart            H                   H        W      1      2        \tx rx           uart1           fl         default                  serial@4806c000           ti,omap3-uart            H                  I        W      3      4        \tx rx           uart2           fl         default               gnss              wi2wi,w2sg0004          default                                                             serial@49020000           ti,omap3-uart            I                   J     n        W      5      6        \tx rx           uart3           fl         default                  i2c@48070000              ti,omap3-i2c             H                8                     +            i2c1            f '@   twl@48              H                                            fck           ti,twl4030           C        2           default                  audio             ti,twl4030-audio                  codec                       power             ti,twl4030-power-idle                  rtc           ti,twl4030-rtc                   bci           ti,twl4030-bci             	           6           D              Pvac         a 0         m         watchdog              ti,twl4030-wdt        regulator-vaux1           ti,twl4030-vaux1             &%         -      regulator-vaux2           ti,twl4030-vaux2             *         *         x      regulator-vaux3           ti,twl4030-vaux3             &%         &%      regulator-vaux4           ti,twl4030-vaux4             *         0                 regulator-vdd1            ti,twl4030-vdd1          	'                            regulator-vdac            ti,twl4030-vdac          w@         w@                 regulator-vio             ti,twl4030-vio                    regulator-vintana1            ti,twl4030-vintana1       regulator-vintana2            ti,twl4030-vintana2       regulator-vintdig             ti,twl4030-vintdig        regulator-vmmc1           ti,twl4030-vmmc1             :         0                 regulator-vmmc2           ti,twl4030-vmmc2             :         0      regulator-vusb1v5             ti,twl4030-vusb1v5                    regulator-vusb1v8             ti,twl4030-vusb1v8                    regulator-vusb3v1             ti,twl4030-vusb3v1                    regulator-vpll1           ti,twl4030-vpll1          regulator-vpll2           ti,twl4030-vpll2             w@         w@         x                 regulator-vsim            ti,twl4030-vsim          *         0                  gpio              ti,twl4030-gpio                              C        2                             twl4030-usb           ti,twl4030-usb             
                                                                            pwm           ti,twl4030-pwm                   pwmled            ti,twl4030-pwmled                    pwrbutton             ti,twl4030-pwrbutton                     keypad            ti,twl4030-keypad                                          	  disabled          madc              ti,twl4030-madc                                               i2c@48072000              ti,omap3-i2c             H                9                     +            i2c2            f    bmp085@77             bosch,bmp085                w        default                                              )           5         bma180@41             bosch,bma180                A        default                                            itg3200@68            invensense,itg3200              h        default                                            tca6507@45            ti,tca6507                       +                E                               5   led@0           Agta04:red:aux                      led@1           Agta04:green:aux                   led@3           Agta04:red:power                     Gdefault-on        led@4           Agta04:green:power                     led@6                         gpio             hmc5843@1e            honeywell,hmc5883l                      default                                            tsc2007@48            ti,tsc2007              H        default                                                                 ]  X        m                                                       
               m24lr64@50            atmel,24c64             P         i2c@48060000              ti,omap3-i2c             H                =                     +            i2c3            f       mailbox@48094000              ti,omap3-mailbox            mailbox          H	@                                             !      mbox-dsp            3                    >                    spi@48098000              ti,omap2-mcspi           H	               A                     +            mcspi1          I         @  W      #      $      %      &      '      (      )      *         \tx0 rx0 tx1 rx1 tx2 rx2 tx3 rx3       	  disabled          spi@4809a000              ti,omap2-mcspi           H	               B                     +            mcspi2          I            W      +      ,      -      .        \tx0 rx0 tx1 rx1       	  disabled          spi@480b8000              ti,omap2-mcspi           H               [                     +            mcspi3          I            W                                \tx0 rx0 tx1 rx1       	  disabled          spi@480ba000              ti,omap2-mcspi           H               0                     +            mcspi4          I           W      F      G        \tx0 rx0       	  disabled          1w@480b2000           ti,omap3-1w          H                :        hdq1w           default                 mmc@4809c000              ti,omap3-hsmmc           H	               S        mmc1             W        W      =      >        \tx rx           d          default                   q          }                           mmc@480b4000              ti,omap3-hsmmc           H@               V        mmc2            W      /      0        \tx rx           q          }                                     mmc@480ad000              ti,omap3-hsmmc           H
               ^        mmc3            W      M      N        \tx rx         	  disabled          mmu@480bd400                          ti,omap2-iommu           H                       mmu_isp                              mmu@5d000000                          ti,omap2-iommu           ]                         mmu_iva       	  disabled          wdt@48314000              ti,omap3-wdt             H1@          
  wd_timer2         mcbsp@48074000            ti,omap3-mcbsp           H@            %mpu               ;   <        common tx rx                       mcbsp1          W                     \tx rx                       fck         okay                        default                 target-module@480a0000            ti,sysc-omap2 ti,sysc            H
 <   H
 @   H
 D           %rev sysc syss           /           <               J              	         ick                      +               H
         rng@0             ti,omap2-rng                                4         mcbsp@49022000            ti,omap3-mcbsp           I     I            %mpu sidetone                  >   ?           common tx rx sidetone                      mcbsp2 mcbsp2_sidetone          W      !      "        \tx rx              
            fck ick         okay            default                      (      mcbsp@49024000            ti,omap3-mcbsp           I@    I            %mpu sidetone                  Y   Z           common tx rx sidetone                      mcbsp3 mcbsp3_sidetone          W                    \tx rx                          fck ick         okay                        default                 mcbsp@49026000            ti,omap3-mcbsp           I`            %mpu               6   7        common tx rx                       mcbsp4          W                    \tx rx                       fck                     okay            default                      *      mcbsp@48096000            ti,omap3-mcbsp           H	`            %mpu               Q   R        common tx rx                       mcbsp5          W                    \tx rx                       fck       	  disabled          sham@480c3000             ti,omap3-sham           sham             H0    d           1        W      E        \rx        target-module@48318000            ti,sysc-omap2-timer ti,sysc          H1    H1   H1           %rev sysc syss           /  '        <                  J                          fck ick                      +               H1                      !   timer@0           ti,omap3430-timer                                       fck            %         ,        ;          K   I         target-module@49032000            ti,sysc-omap2-timer ti,sysc          I     I    I            %rev sysc syss           /  '        <                  J                          fck ick                      +               I        timer@0           ti,omap3430-timer                              &         timer@49034000            ti,omap3430-timer            I@               '        timer3        timer@49036000            ti,omap3430-timer            I`               (        timer4        timer@49038000            ti,omap3430-timer            I               )        timer5           b      timer@4903a000            ti,omap3430-timer            I               *        timer6           b      timer@4903c000            ti,omap3430-timer            I               +        timer7           b      timer@4903e000            ti,omap3430-timer            I               ,        timer8           o         b      timer@49040000            ti,omap3430-timer            I                -        timer9           o      timer@48086000            ti,omap3430-timer            H`               .        timer10          o      timer@48088000            ti,omap3430-timer            H               /        timer11          o           1      target-module@48304000            ti,sysc-omap2-timer ti,sysc          H0@    H0@   H0@           %rev sysc syss           /  '        <                  J                          fck ick                      +               H0@       timer@0           ti,omap3430-timer                              _         ,         |         usbhstll@48062000             ti,usbhs-tll             H                N        usb_tll_hs        usbhshost@48064000            ti,usbhs-host            H@            usb_host_hs                      +                  	  ehci-phy       ohci@48064400             ti,ohci-omap3            HD               L               ehci@48064800             ti,ehci-omap             HH               M                       gpmc@6e000000             ti,omap3430-gpmc            gpmc             n                        W              \rxtx                                               +            C        2                                       0                    nand@0,0              ti,omap2-nand                                                                 ham1                                                      +                                     ,        ,   ,        >           M   "        `   ,        s   6           (           @           R           R           (                           x-loader@0        	  AX-Loader                          bootloaders@80000           AU-Boot                       bootloaders_env@240000          AU-Boot Env            $           kernel@280000           AKernel            (   `        filesystem@880000           AFile System                             target-module@480ab000            ti,sysc-omap2 ti,sysc            H
    H
   H
           %rev sysc syss           /           [                  <                  J            fck                      +               H
                   usb@0             ti,omap3-musb                              \   ]        mc dma                     	           	           	            	(                  	  	0usb2-phy                       	:   2         dss@48050000              ti,omap3-dss             H             okay          	  dss_core                         fck                      +                    default                   	@     dispc@48050400            ti,omap3-dispc           H                     
  dss_dispc                        fck       encoder@4804fc00              ti,omap3-dsi             H    H    @H             %proto phy pll                    	  disabled          	  dss_dsi1                            fck sys_clk                      +          encoder@48050800              ti,omap3-rfbi            H          	  disabled          	  dss_rfbi                            fck ick       encoder@48050c00              ti,omap3-venc            H            okay          	  dss_venc                            fck tv_dac_clk          )     port       endpoint            	P          	`            	l           3            port       endpoint            	P          	              .            ssi-controller@48058000           ti,omap3-ssi            ssi         okay             H    H            %sys gdd            G        gdd_mpu                      +                                      ssi_ssr_fck ssi_sst_fck ssi_ick    ssi-port@4805a000             ti,omap3-ssi-port            H    H            %tx rx              C   D      ssi-port@4805b000             ti,omap3-ssi-port            H    H            %tx rx              E   F         serial@49042000           ti,omap3-uart            I                P        W      Q      R        \tx rx           uart4           fl       regulator-abb-mpu         
    ti,abb-v1           abb_mpu_iva                       +             H0r   H0h           %base-address int-address            	               #        	           	         `  	 s                     O                     7                                                          pinmux@480025a0            ti,omap3-padconf pinctrl-single          H %   \                     +            #           2            C        X           v          default                hsusb2-2-pins         0     P      R      T     V     X     Z                   mcspi3hog-pins              <      >      @      B                    spi-gpio-pinmux-pins                8      F      H      D             ,         isp@480bc000              ti,omap3-isp             H   H                       	                        	                 ports                        +       port@0                  endpoint            	            	        }           
           
            
           
,           
8                  bandgap@48002524             H %$             ti,omap36xx-bandgap         
D               $      target-module@480cb000            ti,sysc-omap3630-sr ti,sysc         smartreflex_core             H8           %sysc            /           <                     !         fck                      +               H       smartreflex@0             ti,omap3-smartreflex-core                                       target-module@480c9000            ti,sysc-omap3630-sr ti,sysc         smartreflex_mpu_iva          H8           %sysc            /           <                     "         fck                      +               H       smartreflex@480c9000              ti,omap3-smartreflex-mpu-iva                                        target-module@50000000            ti,sysc-omap4 ti,sysc            P     P          	  %rev sysc            [                  <                     #            fck ick                      +               P         gpu@0         #    ti,omap3630-gpu img,powervr-sgx530                                         opp-table             operating-points-v2-ti-cpu                            opp-50-300000000            
Z             
a s s s s s s        
o            
      opp-100-600000000           
Z    #F         
a O O O O O O        
o         opp-130-800000000           
Z    /         
a 7 7 7 7 7 7        
o         opp-1000000000          
Z    ;         
a              
o            
         opp-supply            ti,omap-opp-supply          
       thermal-zones      cpu-thermal         
           
          
      N         
  $   trips      cpu_alert           
 8        
           passive            %      cpu_crit            
 _        
        	   critical             cooling-maps       map0            
  %          &               memory@80000000          memory                        fixedregulator            regulator-fixed         ldo_3v3          2Z         2Z         x                  oscillator                        fixed-clock         f                  gpio-keys         
    gpio-keys      aux-button          Aaux                      '                )         antenna-detect        
    gpio-keys      gps-antenna-button          AGPS_EXT_ANT         7                                                                  H   
         )         sound             ti,omap-twl4030         Zgta04           c  (      sound_telephony           simple-audio-card           lGTA04 voice           )          )        i2s                      simple-audio-card,cpu           $  *      simple-audio-card,codec         $  +           )         gsm_codec             option,gtm601                          +      spi       	    spi-gpio                         +            default           ,        .  '               8  '               C  '               N  '              W      td028ttec1@0              tpo,td028ttec1                       g          y                   -        Alcd    port       endpoint            	P  .                          backlight             pwm-backlight             /                
  backlight         ,                  (   2   <   F   P   Z   d           	        default           0           -      pwm-11            ti,omap-dmtimer-pwm           1                                 /      hsusb2-phy-pins           usb-nop-xceiv                                                 connector             composite-video-connector           Atv     port       endpoint            	P  2           4            opa362        
    ti,opa362             '          ports                        +       port@0                  endpoint            	P  3                    port@1                 endpoint            	P  4           2               wifi_pwrseq           mmc-pwrseq-simple             5                        pinmux@48002274           pinctrl-single           H "t                        +                     X            v           #           default           6   mcbsp1-devconf0-pins                                 6         pinmux@480022d8           pinctrl-single           H "                        +                     X            v           #           default           7   tv-acbias-devconf1-pins                            7            	compatible interrupt-parent #address-cells #size-cells model stdout-path i2c0 i2c1 i2c2 mmc0 mmc1 serial0 serial1 serial2 serial3 display0 display1 device_type reg clocks clock-names clock-latency operating-points-v2 vbb-supply #cooling-cells cpu0-supply phandle interrupts ti,hwmods ranges #pinctrl-cells #interrupt-cells interrupt-controller pinctrl-single,register-width pinctrl-single,function-mask pinctrl-names pinctrl-0 pinctrl-single,pins syscon regulator-name regulator-min-microvolt regulator-max-microvolt #clock-cells clock-output-names reg-names ti,sysc-mask ti,sysc-sidle ti,syss-mask dmas dma-names clock-frequency ti,bit-shift ti,max-div ti,index-starts-at-one clock-mult clock-div ti,set-bit-to-disable ti,clock-mult ti,clock-div ti,set-rate-parent ti,index-power-of-two ti,dividers ti,low-power-stop ti,lock ti,low-power-bypass #ssize-cells ti,sysc-midle #dma-cells dma-channels dma-requests ti,gpio-always-on gpio-controller #gpio-cells interrupts-extended sirf,onoff-gpios lna-supply vcc-supply ti,enable-vibra ti,ramp_delay_value ti,system-power-controller bci3v1-supply io-channels io-channel-names ti,bb-uvolt ti,bb-uamp regulator-always-on ti,pullups ti,pulldowns usb1v5-supply usb1v8-supply usb3v1-supply usb_mode #phy-cells #pwm-cells keypad,num-rows keypad,num-columns status #io-channel-cells vdda-supply vddd-supply label linux,default-trigger ti,x-plate-ohms touchscreen-size-x touchscreen-size-y touchscreen-max-pressure touchscreen-fuzz-x touchscreen-fuzz-y touchscreen-fuzz-pressure touchscreen-inverted-y #mbox-cells ti,mbox-num-users ti,mbox-num-fifos ti,mbox-tx ti,mbox-rx ti,spi-num-cs ti,dual-volt pbias-supply vmmc-supply bus-width ti,non-removable broken-cd cap-power-off-card mmc-pwrseq #iommu-cells ti,#tlb-entries interrupt-names ti,buffer-size #sound-dai-cells ti,no-reset-on-init ti,no-idle ti,timer-alwon assigned-clocks assigned-clock-parents ti,timer-dsp ti,timer-pwm ti,timer-secure port2-mode remote-wakeup-connected phys gpmc,num-cs gpmc,num-waitpins ti,nand-ecc-opt rb-gpios nand-bus-width gpmc,device-width gpmc,cs-on-ns gpmc,cs-rd-off-ns gpmc,cs-wr-off-ns gpmc,adv-on-ns gpmc,adv-rd-off-ns gpmc,adv-wr-off-ns gpmc,oe-off-ns gpmc,we-off-ns gpmc,access-ns gpmc,rd-cycle-ns gpmc,wr-cycle-ns gpmc,wr-access-ns gpmc,wr-data-mux-bus-ns gpmc,sync-clk-ps multipoint num-eps ram-bits interface-type usb-phy phy-names power vdds_dsi-supply remote-endpoint ti,channels ti,invert-polarity data-lines ti,tranxdone-status-mask ti,settling-time ti,clock-cycles ti,abb_info iommus ti,phy-type ti,isp-clock-divisor ti,strobe-mode data-shift hsync-active vsync-active data-active pclk-sample #thermal-sensor-cells opp-hz opp-microvolt opp-supported-hw opp-suspend turbo-mode ti,absolute-max-voltage-uv polling-delay-passive polling-delay coefficients thermal-sensors temperature hysteresis trip cooling-device linux,code wakeup-source linux,input-type debounce-interval ti,model ti,mcbsp simple-audio-card,name simple-audio-card,bitclock-master simple-audio-card,frame-master simple-audio-card,format simple-audio-card,bitclock-inversion simple-audio-card,frame-inversion sound-dai sck-gpios miso-gpios mosi-gpios cs-gpios num-chipselects spi-max-frequency spi-cpol spi-cpha backlight pwms pwm-names brightness-levels default-brightness-level ti,timers ti,clock-source reset-gpios enable-gpios pinctrl-single,bit-per-mux pinctrl-single,bits 