 g   8 \d   (            m \,                             H    gumstix,omap4-duovero-parlor gumstix,omap4-duovero ti,omap4430 ti,omap4                                  +         #   7OMAP4430 Gumstix Duovero on Parlor     chosen        B   =/ocp/interconnect@48000000/segment@0/target-module@20000/serial@0         aliases       ?   I/ocp/interconnect@48000000/segment@0/target-module@70000/i2c@0        ?   N/ocp/interconnect@48000000/segment@0/target-module@72000/i2c@0        ?   S/ocp/interconnect@48000000/segment@0/target-module@60000/i2c@0        E   X/ocp/interconnect@48000000/segment@200000/target-module@150000/i2c@0          ?   ]/ocp/interconnect@48000000/segment@0/target-module@9c000/mmc@0        ?   b/ocp/interconnect@48000000/segment@0/target-module@b4000/mmc@0        ?   g/ocp/interconnect@48000000/segment@0/target-module@ad000/mmc@0        ?   l/ocp/interconnect@48000000/segment@0/target-module@d1000/mmc@0        ?   q/ocp/interconnect@48000000/segment@0/target-module@d5000/mmc@0        B   v/ocp/interconnect@48000000/segment@0/target-module@6a000/serial@0         B   ~/ocp/interconnect@48000000/segment@0/target-module@6c000/serial@0         B   /ocp/interconnect@48000000/segment@0/target-module@20000/serial@0         B   /ocp/interconnect@48000000/segment@0/target-module@6e000/serial@0         	   /ocp/dsp             /ocp/ipu@55020000            /connector        cpus                         +       cpu@0             arm,cortex-a9            cpu                                               cpu                        	' O 5   a                              cpu@1             arm,cortex-a9            cpu                                  sram@40304000         
    mmio-sram            @0@                     interrupt-controller@48241000             arm,cortex-a9-gic                    ,            H$    H$                                 cache-controller@48242000             arm,pl310-cache          H$              =        K                    local-timer@48240600              arm,cortex-a9-twd-timer                      H$             W                          interrupt-controller@48281000             ti,omap4-wugen-mpu                   ,            H(                                 ocp           simple-pm-bus           b         $                            	                             +            p   l3-noc@44000000           ti,omap4-l3-noc          D      D      E              W       	          
         interconnect@4a300000             ti,omap4-l4-wkup simple-pm-bus          b   
                             fck          J0     J0    J0          
  wap la ia0                        +         $  p    J0        J1        J2        segment@0             simple-pm-bus                        +           p                               `   `                                  @   @      P   P                         target-module@4000            ti,sysc-omap2 ti,sysc              @      @         	  wrev sysc                                  0             fck                      +           p      @       counter@0             ti,omap-counter32k                            target-module@6000            ti,sysc-omap4 ti,sysc              `            wrev                      +           p      `        prm@0             ti,omap4-prm simple-bus                          W                               +           p               clocks                       +       sys_clkin_ck@110                          ti,mux-clock            sys_clkin_ck                                                                       abe_dpll_bypass_clk_mux_ck@108                        ti,mux-clock            abe_dpll_bypass_clk_mux_ck                                                  9      abe_dpll_refclk_mux_ck@10c                        ti,mux-clock            abe_dpll_refclk_mux_ck                                       8      dbgclk_mux_ck                         fixed-factor-clock          dbgclk_mux_ck                                           l4_wkup_clk_mux_ck@108                        ti,mux-clock            l4_wkup_clk_mux_ck                                  syc_clk_div_ck@100                        ti,divider-clock            syc_clk_div_ck                                                      usim_ck@1858                          ti,divider-clock            usim_ck                                   X                               usim_fclk@1858                        ti,gate-clock         
  usim_fclk                                     X      trace_clk_div_ck                          ti,clkdm-gate-clock         trace_clk_div_ck                                        bandgap_fclk@1888                         ti,gate-clock           bandgap_fclk                                               clockdomains       emu_sys_clkdm             ti,clockdomain          emu_sys_clkdm                        l4_wkup_cm@1800           ti,omap4-cm         l4_wkup_cm                                      +           p             clk@20            ti,clkctrl          l4_wkup_clkctrl                 \                               emu_sys_cm@1a00           ti,omap4-cm         emu_sys_cm                                      +           p             clk@20            ti,clkctrl          emu_sys_clkctrl                                                prm@300       #    ti,omap4-prm-inst ti,omap-prm-inst                                              prm@400       #    ti,omap4-prm-inst ti,omap-prm-inst                                                   d      prm@500       #    ti,omap4-prm-inst ti,omap-prm-inst                                              prm@600       #    ti,omap4-prm-inst ti,omap-prm-inst                                   prm@700       #    ti,omap4-prm-inst ti,omap-prm-inst                                                   4      prm@f00       #    ti,omap4-prm-inst ti,omap-prm-inst                                                         prm@1000          #    ti,omap4-prm-inst ti,omap-prm-inst                                              prm@1100          #    ti,omap4-prm-inst ti,omap-prm-inst                 @                             prm@1200          #    ti,omap4-prm-inst ti,omap-prm-inst                                              prm@1300          #    ti,omap4-prm-inst ti,omap-prm-inst                                   prm@1400          #    ti,omap4-prm-inst ti,omap-prm-inst                                              prm@1600          #    ti,omap4-prm-inst ti,omap-prm-inst                                   prm@1700          #    ti,omap4-prm-inst ti,omap-prm-inst                                        
      prm@1900          #    ti,omap4-prm-inst ti,omap-prm-inst                                              prm@1b00          #    ti,omap4-prm-inst ti,omap-prm-inst                 @                       target-module@a000            ti,sysc-omap4 ti,sysc                          wrev                      +           p             scrm@0            ti,omap4-scrm                       clocks                       +       auxclk0_src_gate_ck@310                        ti,composite-no-wait-gate-clock         auxclk0_src_gate_ck                                                    auxclk0_src_mux_ck@310                        ti,composite-mux-clock          auxclk0_src_mux_ck                                                           auxclk0_src_ck                        ti,composite-clock          auxclk0_src_ck                                  auxclk0_ck@310                        ti,divider-clock            auxclk0_ck                                                          .      auxclk1_src_gate_ck@314                        ti,composite-no-wait-gate-clock         auxclk1_src_gate_ck                                                    auxclk1_src_mux_ck@314                        ti,composite-mux-clock          auxclk1_src_mux_ck                                                            auxclk1_src_ck                        ti,composite-clock          auxclk1_src_ck                             !      auxclk1_ck@314                        ti,divider-clock            auxclk1_ck              !                                            /      auxclk2_src_gate_ck@318                        ti,composite-no-wait-gate-clock         auxclk2_src_gate_ck                                              "      auxclk2_src_mux_ck@318                        ti,composite-mux-clock          auxclk2_src_mux_ck                                                     #      auxclk2_src_ck                        ti,composite-clock          auxclk2_src_ck              "   #           $      auxclk2_ck@318                        ti,divider-clock            auxclk2_ck              $                                            0      auxclk3_src_gate_ck@31c                        ti,composite-no-wait-gate-clock         auxclk3_src_gate_ck                                              %      auxclk3_src_mux_ck@31c                        ti,composite-mux-clock          auxclk3_src_mux_ck                                                     &      auxclk3_src_ck                        ti,composite-clock          auxclk3_src_ck              %   &           '      auxclk3_ck@31c                        ti,divider-clock            auxclk3_ck              '                                            1      auxclk4_src_gate_ck@320                        ti,composite-no-wait-gate-clock         auxclk4_src_gate_ck                                               (      auxclk4_src_mux_ck@320                        ti,composite-mux-clock          auxclk4_src_mux_ck                                                      )      auxclk4_src_ck                        ti,composite-clock          auxclk4_src_ck              (   )           *      auxclk4_ck@320                        ti,divider-clock            auxclk4_ck              *                                             2      auxclk5_src_gate_ck@324                        ti,composite-no-wait-gate-clock         auxclk5_src_gate_ck                                   $           +      auxclk5_src_mux_ck@324                        ti,composite-mux-clock          auxclk5_src_mux_ck                                          $           ,      auxclk5_src_ck                        ti,composite-clock          auxclk5_src_ck              +   ,           -      auxclk5_ck@324                        ti,divider-clock            auxclk5_ck              -                                 $           3      auxclkreq0_ck@210                         ti,mux-clock            auxclkreq0_ck               .   /   0   1   2   3                            auxclkreq1_ck@214                         ti,mux-clock            auxclkreq1_ck               .   /   0   1   2   3                            auxclkreq2_ck@218                         ti,mux-clock            auxclkreq2_ck               .   /   0   1   2   3                            auxclkreq3_ck@21c                         ti,mux-clock            auxclkreq3_ck               .   /   0   1   2   3                            auxclkreq4_ck@220                         ti,mux-clock            auxclkreq4_ck               .   /   0   1   2   3                             auxclkreq5_ck@224                         ti,mux-clock            auxclkreq5_ck               .   /   0   1   2   3                      $         clockdomains                target-module@c000            ti,sysc-omap4 ti,sysc                             	  wrev sysc                                              +           p             scm@c000              ti,omap4-scm-wkup                              segment@10000             simple-pm-bus                        +         x  p                    @  @      P  P                                                       target-module@0           ti,sysc-omap2 ti,sysc                                      wrev sysc syss                                            -                                     
   fck dbclk                        +           p              gpio@0            ti,omap4-gpio                           W                   :         L        \                    ,            target-module@4000            ti,sysc-omap2 ti,sysc              @      @     @           wrev sysc syss               "                             -                               fck                      +           p      @       wdt@0             ti,omap4-wdt ti,omap3-wdt                           W       P            target-module@8000            ti,sysc-omap2-timer ti,sysc                                  wrev sysc syss              '                          -                                fck                      +           p                   h         |   timer@0           ti,omap3430-timer                                                  fck timer_sys_ck            W       %                                                  target-module@c000            ti,sysc-omap2 ti,sysc                                    wrev sysc syss              '                          -                  X             fck                      +           p             keypad@0              ti,omap4-keypad                         W       x           wmpu          target-module@e000            ti,sysc-omap4 ti,sysc                             	  wrev sysc                                              +           p             pinmux@40              ti,omap4-padconf pinctrl-single             @   8                     +                       ,                                    twl6030-wkup-pins                            u               segment@20000             simple-pm-bus                        +           p  `  `                                          0  0      @  @      P  P      p  p                       target-module@0           ti,sysc       	  disabled                         +           p                 target-module@2000            ti,sysc       	  disabled                         +           p                 target-module@4000            ti,sysc       	  disabled                         +           p      @          target-module@6000            ti,sysc       	  disabled                         +         0  p      `         p                0                   interconnect@4a000000             ti,omap4-l4-cfg simple-pm-bus           b   4            5                 fck          J      J     J           
  wap la ia0                        +         T  p    J         J        J        J         J       (  J(      0  J0        segment@0             simple-pm-bus                        +           p                                          0   0      @   @      P   P     `  `     p  p                 @           0  0                        `  `     p  p                      @  @     P  P       target-module@2000            ti,sysc-omap4 ti,sysc                               	  wrev sysc                                              +           p              scm@0             ti,omap4-scm-core simple-bus                                         +           p              scm_conf@0            syscon                                       +                    control-phy@300           ti,control-phy-usb2                        wpower              g      control-phy@33c           ti,control-phy-otghs               <           wotghs_control              f            target-module@4000            ti,sysc-omap4 ti,sysc              @            wrev                      +           p      @       cm1@0             ti,omap4-cm1 simple-bus                                       +           p               clocks                       +       extalt_clkin_ck                       fixed-clock         extalt_clkin_ck         "D      pad_clks_src_ck                       fixed-clock         pad_clks_src_ck         "             6      pad_clks_ck@108                       ti,gate-clock           pad_clks_ck             6                            pad_slimbus_core_clks_ck                          fixed-clock         pad_slimbus_core_clks_ck            "        secure_32k_clk_src_ck                         fixed-clock         secure_32k_clk_src_ck           "         slimbus_src_clk                       fixed-clock         slimbus_src_clk         "             7      slimbus_clk@108                       ti,gate-clock           slimbus_clk             7           
                 sys_32k_ck                        fixed-clock         sys_32k_ck          "                    virt_12000000_ck                          fixed-clock         virt_12000000_ck            "                   virt_13000000_ck                          fixed-clock         virt_13000000_ck            " ]@                 virt_16800000_ck                          fixed-clock         virt_16800000_ck            " Y                  virt_19200000_ck                          fixed-clock         virt_19200000_ck            "$                  virt_26000000_ck                          fixed-clock         virt_26000000_ck            "                 virt_27000000_ck                          fixed-clock         virt_27000000_ck            "                 virt_38400000_ck                          fixed-clock         virt_38400000_ck            "I                  tie_low_clock_ck                          fixed-clock         tie_low_clock_ck            "          utmi_phy_clkout_ck                        fixed-clock         utmi_phy_clkout_ck          "       xclk60mhsp1_ck                        fixed-clock         xclk60mhsp1_ck          "            `      xclk60mhsp2_ck                        fixed-clock         xclk60mhsp2_ck          "            a      xclk60motg_ck                         fixed-clock         xclk60motg_ck           "       dpll_abe_ck@1e0                       ti,omap4-dpll-m4xen-clock           dpll_abe_ck             8   9                            :      dpll_abe_x2_ck@1f0                        ti,omap4-dpll-x2-clock          dpll_abe_x2_ck              :                      ;      dpll_abe_m2x2_ck@1f0                          ti,divider-clock            dpll_abe_m2x2_ck                ;                   2                                D           <      abe_24m_fclk                          fixed-factor-clock          abe_24m_fclk                <                            abe_clk@108                       ti,divider-clock            abe_clk             <                               [      dpll_abe_m3x2_ck@1f4                          ti,divider-clock            dpll_abe_m3x2_ck                ;                   2                                D           =      core_hsd_byp_clk_mux_ck@12c                       ti,mux-clock            core_hsd_byp_clk_mux_ck                =                      ,           >      dpll_core_ck@120                          ti,omap4-dpll-core-clock            dpll_core_ck                   >              $  ,  (           ?      dpll_core_x2_ck                       ti,omap4-dpll-x2-clock          dpll_core_x2_ck             ?           @      dpll_core_m6x2_ck@140                         ti,divider-clock            dpll_core_m6x2_ck               @                   2              @                  D      dpll_core_m2_ck@130                       ti,divider-clock            dpll_core_m2_ck             ?                   2              0                  D           A      ddrphy_ck                         fixed-factor-clock        
  ddrphy_ck               A                            dpll_core_m5x2_ck@13c                         ti,divider-clock            dpll_core_m5x2_ck               @                   2              <                  D           B      div_core_ck@100                       ti,divider-clock            div_core_ck             B                                  M      div_iva_hs_clk@1dc                        ti,divider-clock            div_iva_hs_clk              B                               [           F      div_mpu_hs_clk@19c                        ti,divider-clock            div_mpu_hs_clk              B                               [           L      dpll_core_m4x2_ck@138                         ti,divider-clock            dpll_core_m4x2_ck               @                   2              8                  D           C      dll_clk_div_ck                        fixed-factor-clock          dll_clk_div_ck              C                            dpll_abe_m2_ck@1f0                        ti,divider-clock            dpll_abe_m2_ck              :                                          P      dpll_core_m3x2_gate_ck@134                         ti,composite-no-wait-gate-clock         dpll_core_m3x2_gate_ck              @                      4           D      dpll_core_m3x2_div_ck@134                         ti,composite-divider-clock          dpll_core_m3x2_div_ck               @                      4                    E      dpll_core_m3x2_ck                         ti,composite-clock          dpll_core_m3x2_ck               D   E                 dpll_core_m7x2_ck@144                         ti,divider-clock            dpll_core_m7x2_ck               @                   2              D                  D      iva_hsd_byp_clk_mux_ck@1ac                        ti,mux-clock            iva_hsd_byp_clk_mux_ck                 F                                 G      dpll_iva_ck@1a0                       ti,omap4-dpll-clock         dpll_iva_ck                G                            H        q7            H      dpll_iva_x2_ck                        ti,omap4-dpll-x2-clock          dpll_iva_x2_ck              H           I      dpll_iva_m4x2_ck@1b8                          ti,divider-clock            dpll_iva_m4x2_ck                I                   2                                D           J        q~            J      dpll_iva_m5x2_ck@1bc                          ti,divider-clock            dpll_iva_m5x2_ck                I                   2                                D           K        q]            K      dpll_mpu_ck@160                       ti,omap4-dpll-clock         dpll_mpu_ck                L           `  d  l  h                 dpll_mpu_m2_ck@170                        ti,divider-clock            dpll_mpu_m2_ck                                 2              p                  D      per_hs_clk_div_ck                         fixed-factor-clock          per_hs_clk_div_ck               =                                 Q      usb_hs_clk_div_ck                         fixed-factor-clock          usb_hs_clk_div_ck               =                                 W      l3_div_ck@100                         ti,divider-clock          
  l3_div_ck               M                                             N      l4_div_ck@100                         ti,divider-clock          
  l4_div_ck               N                                        lp_clk_div_ck                         fixed-factor-clock          lp_clk_div_ck               <                                       mpu_periphclk                         fixed-factor-clock          mpu_periphclk                                                      ocp_abe_iclk@528                          ti,divider-clock            ocp_abe_iclk                O                            (                    per_abe_24m_fclk                          fixed-factor-clock          per_abe_24m_fclk                P                            dummy_ck                          fixed-clock       	  dummy_ck            "             clockdomains          mpuss_cm@300              ti,omap4-cm       	  mpuss_cm                                        +           p             clk@20            ti,clkctrl          mpuss_clkctrl                                                  tesla_cm@400              ti,omap4-cm       	  tesla_cm                                        +           p             clk@20            ti,clkctrl          tesla_clkctrl                                         c         abe_cm@500            ti,omap4-cm         abe_cm                                      +           p             clk@20            ti,clkctrl          abe_clkctrl                 l                      O               target-module@8000            ti,sysc-omap4 ti,sysc                          wrev                      +           p              cm2@0             ti,omap4-cm2 simple-bus                                       +           p               clocks                       +       per_hsd_byp_clk_mux_ck@14c                        ti,mux-clock            per_hsd_byp_clk_mux_ck                 Q                      L           R      dpll_per_ck@140                       ti,omap4-dpll-clock         dpll_per_ck                R           @  D  L  H           S      dpll_per_m2_ck@150                        ti,divider-clock            dpll_per_m2_ck              S                      P                    [      dpll_per_x2_ck@150                        ti,omap4-dpll-x2-clock          dpll_per_x2_ck              S           P           T      dpll_per_m2x2_ck@150                          ti,divider-clock            dpll_per_m2x2_ck                T                   2              P                  D           Z      dpll_per_m3x2_gate_ck@154                          ti,composite-no-wait-gate-clock         dpll_per_m3x2_gate_ck               T                      T           U      dpll_per_m3x2_div_ck@154                          ti,composite-divider-clock          dpll_per_m3x2_div_ck                T                      T                    V      dpll_per_m3x2_ck                          ti,composite-clock          dpll_per_m3x2_ck                U   V                 dpll_per_m4x2_ck@158                          ti,divider-clock            dpll_per_m4x2_ck                T                   2              X                  D                 dpll_per_m5x2_ck@15c                          ti,divider-clock            dpll_per_m5x2_ck                T                   2              \                  D      dpll_per_m6x2_ck@160                          ti,divider-clock            dpll_per_m6x2_ck                T                   2              `                  D           Y      dpll_per_m7x2_ck@164                          ti,divider-clock            dpll_per_m7x2_ck                T                   2              d                  D                 dpll_usb_ck@180                       ti,omap4-dpll-j-type-clock          dpll_usb_ck                W                            X      dpll_usb_clkdcoldo_ck@1b4                         ti,fixed-factor-clock           dpll_usb_clkdcoldo_ck               X                   2                                  D      dpll_usb_m2_ck@190                        ti,divider-clock            dpll_usb_m2_ck              X                   2                                D           \      ducati_clk_mux_ck@100                         ti,mux-clock            ducati_clk_mux_ck               M   Y                  func_12m_fclk                         fixed-factor-clock          func_12m_fclk               Z                            func_24m_clk                          fixed-factor-clock          func_24m_clk                [                            func_24mc_fclk                        fixed-factor-clock          func_24mc_fclk              Z                            func_48m_fclk@108                         ti,divider-clock            func_48m_fclk               Z                               func_48mc_fclk                        fixed-factor-clock          func_48mc_fclk              Z                            func_64m_fclk@108                         ti,divider-clock            func_64m_fclk                                              func_96m_fclk@108                         ti,divider-clock            func_96m_fclk               Z                               init_60m_fclk@104                         ti,divider-clock            init_60m_fclk               \                                    _      per_abe_nc_fclk@108                       ti,divider-clock            per_abe_nc_fclk             P                            usb_phy_cm_clk32k@640                         ti,gate-clock           usb_phy_cm_clk32k                                     @           h         clockdomains       l3_init_clkdm             ti,clockdomain          l3_init_clkdm               X         l4_ao_cm@600              ti,omap4-cm       	  l4_ao_cm                                        +           p             clk@20            ti,clkctrl          l4_ao_clkctrl                                         j         l3_1_cm@700           ti,omap4-cm         l3_1_cm                                     +           p             clk@20            ti,clkctrl          l3_1_clkctrl                                                   l3_2_cm@800           ti,omap4-cm         l3_2_cm                                     +           p             clk@20            ti,clkctrl          l3_2_clkctrl                                                   ducati_cm@900             ti,omap4-cm       
  ducati_cm              	                         +           p      	       clk@20            ti,clkctrl          ducati_clkctrl                                                 l3_dma_cm@a00             ti,omap4-cm       
  l3_dma_cm              
                         +           p      
       clk@20            ti,clkctrl          l3_dma_clkctrl                                        ]         l3_emif_cm@b00            ti,omap4-cm         l3_emif_cm                                      +           p             clk@20            ti,clkctrl          l3_emif_clkctrl                                                d2d_cm@c00            ti,omap4-cm         d2d_cm                                      +           p             clk@20            ti,clkctrl          d2d_clkctrl                                       i         l4_cfg_cm@d00             ti,omap4-cm       
  l4_cfg_cm                                       +           p             clk@20            ti,clkctrl          l4_cfg_clkctrl                                        5         l3_instr_cm@e00           ti,omap4-cm         l3_instr_cm                                     +           p             clk@20            ti,clkctrl          l3_instr_clkctrl                    $                      	         ivahd_cm@f00              ti,omap4-cm       	  ivahd_cm                                        +           p             clk@20            ti,clkctrl          ivahd_clkctrl                                                  iss_cm@1000           ti,omap4-cm         iss_cm                                      +           p             clk@20            ti,clkctrl          iss_clkctrl                                       o         l3_dss_cm@1100            ti,omap4-cm       
  l3_dss_cm                                       +           p             clk@20            ti,clkctrl          l3_dss_clkctrl                                                 l3_gfx_cm@1200            ti,omap4-cm       
  l3_gfx_cm                                       +           p             clk@20            ti,clkctrl          l3_gfx_clkctrl                                                 l3_init_cm@1300           ti,omap4-cm         l3_init_cm                                      +           p             clk@20            ti,clkctrl          l3_init_clkctrl                                       ^         clock@1400            ti,omap4-cm       
  l4_per_cm                                       +           p             clock@20              ti,clkctrl          l4_per_clkctrl                 D                      p      clock@1a0             ti,clkctrl          l4_secure_clkctrl                 <                      {               target-module@56000           ti,sysc-omap2 ti,sysc             `     `,    `(           wrev sysc syss              #                                            -               ]                 fck                      +           p     `       dma-controller@0              ti,omap4430-sdma ti,omap-sdma                         0  W                                                                                     |         target-module@58000           ti,sysc-omap2 ti,sysc                                 wrev sysc syss               #                                                  -               ^                fck                      +           p        P    hsi@0             ti,omap4-hsi                   @   P            wsys gdd             ^                hsi_fck         W       G           gdd_mpu                      +           p          @    hsi-port@2000             ti,omap4-hsi-port                     (            wtx rx           W       C         hsi-port@3000             ti,omap4-hsi-port              0      8            wtx rx           W       D               target-module@5e000           ti,sysc       	  disabled                         +           p                target-module@62000           ti,sysc-omap2 ti,sysc                                    wrev sysc syss                                            ^   H             fck                      +           p             usbhstll@0            ti,usbhs-tll                            W       N            target-module@64000           ti,sysc-omap4 ti,sysc             @     @    @           wrev sysc syss                                                                     ^   8             fck                      +           p     @       usbhshost@0           ti,usbhs-host                                        +           p                       _   `   a      3   refclk_60m_int refclk_60m_ext_p1 refclk_60m_ext_p2        	  ehci-phy       ohci@800              ti,ohci-omap3                          W       L                  ehci@c00              ti,ehci-omap                           W       M              b            target-module@66000           ti,sysc-omap2 ti,sysc             `     `    `           wrev sysc syss                                            c                 fck         b   d           d           rstctrl                      +           p     `       mmu@0             ti,omap4-iommu                          W                                             segment@80000             simple-pm-bus                        +          p                                                           @  @     P  P     `  `     p  p     `  `     p  p                     
       
       
       
       
       
       target-module@29000           ti,sysc       	  disabled                         +           p               target-module@2b000           ti,sysc-omap2 ti,sysc                                 wrev sysc syss                                                              -               ^   @             fck                      +           p            usb_otg_hs@0              ti,omap4-musb                          W       \          ]           mc dma          ,   e           e      	  4usb2-phy            >           I           Q           Z   f        f                      u   2         target-module@2d000           ti,sysc-omap2 ti,sysc                                 wrev sysc syss                                         -               ^                fck                      +           p            ocp2scp@0             ti,omap-ocp2scp                                      +           p              usb2phy@80            ti,omap-usb2                   X        Z   g            h         wkupclk         {               e            target-module@36000           ti,sysc-omap2 ti,sysc             `     `    `           wrev sysc syss                                            -               i                 fck                      +           p     `          target-module@4d000           ti,sysc-omap2 ti,sysc                                 wrev sysc syss                                            -               i                 fck                      +           p               target-module@59000           ti,sysc-omap4-sr ti,sysc              8           wsysc                                                 j                fck                      +           p            smartreflex@0             ti,omap4-smartreflex-mpu                            W                   target-module@5b000           ti,sysc-omap4-sr ti,sysc              8           wsysc                                                 j                fck                      +           p            smartreflex@0             ti,omap4-smartreflex-iva                            W       f            target-module@5d000           ti,sysc-omap4-sr ti,sysc              8           wsysc                                                 j                fck                      +           p            smartreflex@0             ti,omap4-smartreflex-core                           W                   target-module@60000           ti,sysc       	  disabled                         +           p                target-module@74000           ti,sysc-omap4 ti,sysc             @     @         	  wrev sysc                                              5                fck                      +           p     @       mailbox@0             ti,omap4-mailbox                            W                                                         mbox-ipu                                                            mbox-dsp                                                                 target-module@76000           ti,sysc-omap2 ti,sysc             `     `    `           wrev sysc syss                                        -               5                fck                      +           p     `       spinlock@0            ti,omap4-hwspinlock                                        segment@100000            simple-pm-bus                        +         `  p                              0  0                                       target-module@0           ti,sysc-omap4 ti,sysc                               	  wrev sysc                                              +           p              pinmux@40              ti,omap4-padconf pinctrl-single             @                       +                       ,                                         default            k   l   m           q   mcpdm-pins        (                                            twl6040-pins              &     `         mcbsp1-pins                                                  hsusbb1-pins          `                                                                     hsusb1phy-pins             L                    w2cbw0015-pins             &      :                   i2c1-pins                                s      i2c4-pins                                      mmc1-pins         0                                           ~      mmc5-pins         0        
                                   twl6030-pins              ^  A           t      led-pins                             k      button-pins                         l      i2c2-pins                                z      i2c3-pins                                r      smsc-pins              (     *     0             m      dss-hdmi-pins               X     Z      \     ^                      omap4_padconf_global@5a0              syscon simple-bus                p                     +           p        p           n   pbias_regulator@60            ti,pbias-omap4 ti,pbias-omap                `              n   pbias_mmc_omap4         pbias_mmc_omap4          w@          -           }               target-module@2000            ti,sysc       	  disabled                         +           p                 target-module@8000            ti,sysc       	  disabled                         +           p                target-module@a000            ti,sysc-omap4 ti,sysc                             	  wrev sysc                                                            8               o                fck                      +           p                   segment@180000            simple-pm-bus                        +         segment@200000            simple-pm-bus                        +        h  p   !       !                        @   @      P   P      `   `      p   p        !      0  !0                          !        !     `  !`     p  !p     @  !@     P  !P       !       !        "        "     `  "`     p  "p       "       "       "       "       !       !       target-module@4000            ti,sysc       	  disabled                         +           p      @          target-module@6000            ti,sysc       	  disabled                         +           p      `          target-module@a000            ti,sysc       	  disabled                         +           p                target-module@c000            ti,sysc       	  disabled                         +           p                target-module@10000           ti,sysc       	  disabled                         +           p                target-module@12000           ti,sysc       	  disabled                         +           p                target-module@14000           ti,sysc       	  disabled                         +           p     @          target-module@16000           ti,sysc       	  disabled                         +           p     `          target-module@18000           ti,sysc       	  disabled                         +           p               target-module@1c000           ti,sysc       	  disabled                         +           p               target-module@1e000           ti,sysc       	  disabled                         +           p               target-module@20000           ti,sysc       	  disabled                         +           p                target-module@26000           ti,sysc       	  disabled                         +           p     `          target-module@28000           ti,sysc       	  disabled                         +           p               target-module@2a000           ti,sysc       	  disabled                         +           p                  segment@280000            simple-pm-bus                        +         segment@300000            simple-pm-bus                        +           p     0         4         2    @  @  2@      `  2`     p  2p       2       2        3        2        2   @    target-module@0           ti,sysc       	  disabled                         +         x  p                   @  @  @      `  `     p  p                                @                      interconnect@48000000             ti,omap4-l4-per simple-pm-bus           b               p                fck       0   H      H     H     H     H     H             wap la ia0 ia1 ia2 ia3                        +           p    H           H          segment@0             simple-pm-bus                        +          p                                                       0  0     @  @     P  P     `  `     p  p                                     P  P     `  `     p  p                                                                                                                                  0  0            	`  	`     	p  	p     `  `     p  p                   `  `     p  p                                   	  	     	  	     	  	     	  	     	  	     	  	     	  	     	  	     	   	       	   	      
@  
@     
`  
`     
  
   @  
  
     
  
     
  
              0  0     @  @     P  P                                                 P  P     `  `     
   
      
0  
0                                
P  
P       target-module@20000           ti,sysc-omap2 ti,sysc              P     T     X           wrev sysc syss                                            -               p  0             fck                      +           p             serial@0              ti,omap4-uart                           W       J           "l         I          J      q           target-module@32000           ti,sysc-omap2-timer ti,sysc                                  wrev sysc syss              '                          -               p                fck                      +           p             timer@0           ti,omap3430-timer                               p                  fck timer_sys_ck            W       &            target-module@34000           ti,sysc-omap4-timer ti,sysc           @     @         	  wrev sysc                                                 p                 fck                      +           p     @       timer@0           ti,omap4430-timer                               p                   fck timer_sys_ck            W       '            target-module@36000           ti,sysc-omap4-timer ti,sysc           `     `         	  wrev sysc                                                 p   (             fck                      +           p     `       timer@0           ti,omap4430-timer                               p   (               fck timer_sys_ck            W       (            target-module@3e000           ti,sysc-omap4-timer ti,sysc                         	  wrev sysc                                                 p   0             fck                      +           p            timer@0           ti,omap4430-timer                               p   0               fck timer_sys_ck            W       -            ]         target-module@40000           ti,sysc       	  disabled                         +           p                target-module@55000           ti,sysc-omap2 ti,sysc             P     P    Q           wrev sysc syss                                            -               p   @       p   @         
   fck dbclk                        +           p     P       gpio@0            ti,omap4-gpio                           W                   L        \                    ,                       target-module@57000           ti,sysc-omap2 ti,sysc             p     p    q           wrev sysc syss                                            -               p   H       p   H         
   fck dbclk                        +           p     p       gpio@0            ti,omap4-gpio                           W                   L        \                    ,                       target-module@59000           ti,sysc-omap2 ti,sysc                                 wrev sysc syss                                            -               p   P       p   P         
   fck dbclk                        +           p            gpio@0            ti,omap4-gpio                           W                    L        \                    ,                       target-module@5b000           ti,sysc-omap2 ti,sysc                                 wrev sysc syss                                            -               p   X       p   X         
   fck dbclk                        +           p            gpio@0            ti,omap4-gpio                           W       !            L        \                    ,            target-module@5d000           ti,sysc-omap2 ti,sysc                                 wrev sysc syss                                            -               p   `       p   `         
   fck dbclk                        +           p            gpio@0            ti,omap4-gpio                           W       "            L        \                    ,              w         target-module@60000           ti,sysc-omap2 ti,sysc                                    wrev sysc syss                                           -               p                fck                      +           p             i2c@0             ti,omap4-i2c                            W       =                        +            default            r        "    eeprom@51             atmel,24c01             Q        j               target-module@6a000           ti,sysc-omap2 ti,sysc             P    T    X           wrev sysc syss                                            -               p                fck                      +           p            serial@0              ti,omap4-uart                           W       H           "l          target-module@6c000           ti,sysc-omap2 ti,sysc             P    T    X           wrev sysc syss                                            -               p  (             fck                      +           p            serial@0              ti,omap4-uart                           W       I           "l          target-module@6e000           ti,sysc-omap2 ti,sysc             P    T    X           wrev sysc syss                                            -               p  8             fck                      +           p            serial@0              ti,omap4-uart                           W       F           "l          target-module@70000           ti,sysc-omap2 ti,sysc                                    wrev sysc syss                                           -               p                fck                      +           p             i2c@0             ti,omap4-i2c                            W       8                        +            default            s        "    twl@48              H        W                    ti,twl6030                   ,           default            t   u   rtc           ti,twl4030-rtc          W         regulator-vaux1           ti,twl6030-vaux1             B@          -      regulator-vaux2           ti,twl6030-vaux2             O          *      regulator-vaux3           ti,twl6030-vaux3             B@          -      regulator-vmmc            ti,twl6030-vmmc          O          -                 regulator-vpp             ti,twl6030-vpp           w@          &%      regulator-vusim           ti,twl6030-vusim             O          ,@       regulator-vdac            ti,twl6030-vdac                  regulator-vana            ti,twl6030-vana       regulator-vcxio           ti,twl6030-vcxio             s      regulator-vusb            ti,twl6030-vusb            v      regulator-v1v8            ti,twl6030-v1v8          s           x      regulator-v2v1            ti,twl6030-v2v1          s           y      usb-comparator            ti,twl6030-usb          W      
           v      pwm           ti,twl6030-pwm                   pwmled            ti,twl6030-pwmled                    gpadc             ti,twl6030-gpadc            W                       twl@4b            ti,twl6040                          K        W       w              w                   x           y                                target-module@72000           ti,sysc-omap2 ti,sysc                                    wrev sysc syss                                           -               p                fck                      +           p             i2c@0             ti,omap4-i2c                            W       9                        +            default            z        "          target-module@76000           ti,sysc-omap4 ti,sysc             `     `         	  wrev sysc                                                 p               fck                      +           p     `          target-module@78000           ti,sysc-omap2 ti,sysc                                 wrev sysc syss                                        -               p   8             fck                      +           p            elm@0             ti,am3352-elm                            W                	  disabled             target-module@86000           ti,sysc-omap2-timer ti,sysc           `     `    `           wrev sysc syss              '                          -               p                fck                      +           p     `       timer@0           ti,omap3430-timer                               p                  fck timer_sys_ck            W       .            ]         target-module@88000           ti,sysc-omap4-timer ti,sysc                         	  wrev sysc                                                 p                fck                      +           p            timer@0           ti,omap4430-timer                               p                  fck timer_sys_ck            W       /            ]         target-module@90000           ti,sysc-omap2 ti,sysc             	    	         	  wrev sysc                                           {                 fck                      +           p     	         rng@0             ti,omap4-rng                             W       4            target-module@96000           ti,sysc-omap2 ti,sysc             	`           wsysc                                             p                fck                      +           p     	`       mcbsp@0           ti,omap4-mcbsp                          wmpu             p               fck         W                  common                        |      |            tx rx         	  disabled             target-module@98000           ti,sysc-omap4 ti,sysc             	     	         	  wrev sysc                                                 p                fck                      +           p     	       spi@0             ti,omap4-mcspi                          W       A                        +                     @     |   #   |   $   |   %   |   &   |   '   |   (   |   )   |   *         tx0 rx0 tx1 rx1 tx2 rx2 tx3 rx3          target-module@9a000           ti,sysc-omap4 ti,sysc             	     	         	  wrev sysc                                                 p                fck                      +           p     	       spi@0             ti,omap4-mcspi                          W       B                        +                           |   +   |   ,   |   -   |   .        tx0 rx0 tx1 rx1          target-module@9c000           ti,sysc-omap4 ti,sysc             	     	         	  wrev sysc                                                                      ^                fck                      +           p     	       mmc@0             ti,omap4-hsmmc                          W       S                     #           |   =   |   >        tx rx           :   }        default            ~        G           S            `         target-module@9e000           ti,sysc       	  disabled                         +           p     	          target-module@a2000           ti,sysc       	  disabled                         +           p     
           target-module@a4000           ti,sysc       	  disabled                         +           p     
@        
P          target-module@a5000           ti,sysc-omap2 ti,sysc             
P0    
P4    
P8           wrev sysc syss                                            -               {                fck                      +           p     
P       des@0             ti,omap4-des                            W       R              |   u   |   t        tx rx            target-module@a8000           ti,sysc       	  disabled                         +           p     
   @       target-module@ad000           ti,sysc-omap4 ti,sysc             
     
         	  wrev sysc                                                                      p                fck                      +           p     
       mmc@0             ti,omap4-hsmmc                          W       ^            #           |   M   |   N        tx rx         	  disabled             target-module@b0000           ti,sysc       	  disabled                         +           p                target-module@b2000           ti,sysc-omap2 ti,sysc                                    wrev sysc syss                       -            h            p   h             fck                      +           p             1w@0              ti,omap3-1w                         W       :            target-module@b4000           ti,sysc-omap4 ti,sysc             @     @         	  wrev sysc                                                                      ^                fck                      +           p     @       mmc@0             ti,omap4-hsmmc                          W       V            #           |   /   |   0        tx rx         	  disabled             target-module@b8000           ti,sysc-omap4 ti,sysc                           	  wrev sysc                                                 p                fck                      +           p            spi@0             ti,omap4-mcspi                          W       [                        +                          |      |           tx0 rx0          target-module@ba000           ti,sysc-omap4 ti,sysc                           	  wrev sysc                                                 p                fck                      +           p            spi@0             ti,omap4-mcspi                          W       0                        +                          |   F   |   G        tx0 rx0          target-module@d1000           ti,sysc-omap4 ti,sysc                           	  wrev sysc                                                                      p               fck                      +           p            mmc@0             ti,omap4-hsmmc                          W       `            #           |   9   |   :        tx rx         	  disabled             target-module@d5000           ti,sysc-omap4 ti,sysc             P     P         	  wrev sysc                                                                      p  @             fck                      +           p     P       mmc@0             ti,omap4-hsmmc                          W       ;            #           |   ;   |   <        tx rx           default                    G           S            `         q                     segment@200000            simple-pm-bus                        +           p    5        5       target-module@150000              ti,sysc-omap2 ti,sysc                                    wrev sysc syss                                           -               p                fck                      +           p             i2c@0             ti,omap4-i2c                            W       >                        +            default                    "                target-module@48210000            ti,sysc-omap4-simple ti,sysc            b                                fck                      +           p    H!        mpu           ti,omap4-mpu                        interconnect@40100000             ti,omap4-l4-abe simple-pm-bus            @     @            wla ap           b                        +           p    @     I   I         segment@0             simple-pm-bus                        +        0  p                              0  0     @  @     P  P     `  `     p  p                                                                        0  0                                                                               
   
      
   
                                       I   I      I  I     I  I     I0 I0    I@ I@    IP IP    I` I`    Ip Ip    I I    I I    I I    I I    I I    I I    I  I     I I    I  I     I0 I0    I I    I I    I I    I I    I I    I I    I I    I I    I  I     I  I     I
  I
     I
  I
     I  I     I  I     I I    I  I        target-module@22000           ti,sysc-omap2 ti,sysc                         wsysc                                             O   (             fck                      +           p          I  I        mcbsp@0           ti,omap4-mcbsp                  I             wmpu dma             O   (            fck         W                  common                        |   !   |   "        tx rx           okay            default                     target-module@24000           ti,sysc-omap2 ti,sysc             @           wsysc                                             O   0             fck                      +           p     @    I@ I@       mcbsp@0           ti,omap4-mcbsp                  I@            wmpu dma             O   0            fck         W                  common                        |      |           tx rx         	  disabled             target-module@26000           ti,sysc-omap2 ti,sysc             `           wsysc                                             O   8             fck                      +           p     `    I` I`       mcbsp@0           ti,omap4-mcbsp                  I`            wmpu dma             O   8            fck         W                  common                        |      |           tx rx         	  disabled             target-module@28000           ti,sysc-mcasp ti,sysc                           	  wrev sysc                                  O                 fck                      +         0  p         I I             I I       mcasp@0           ti,omap4-mcasp-audio                     I            wmpu dat         W       m           tx             |           tx              O                 fck                             	  disabled             target-module@2e000           ti,sysc-omap4 ti,sysc                           	  wrev sysc                                                 O                fck                      +           p         I I       dmic@0            ti,omap4-dmic                   I            wmpu dma         W       r              |   C        up_link       	  disabled             target-module@30000           ti,sysc-omap2 ti,sysc                                    wrev sysc syss               "                             -               O   h             fck                      +           p          I  I        wdt@0             ti,omap4-wdt ti,omap3-wdt                           W       P            target-module@32000           ti,sysc-omap4 ti,sysc                             	  wrev sysc                                                 O                fck                      +           p          I  I             okay            default               mcpdm@0           ti,omap4-mcpdm                  I             wmpu dma         W       p              |   A   |   B        up_link dn_link                      pdmclk                      target-module@38000           ti,sysc-omap4-timer ti,sysc                         	  wrev sysc                                                 O   H             fck                      +           p         I I       timer@0           ti,omap4430-timer                   I                O   H               fck timer_sys_ck            W       )                     target-module@3a000           ti,sysc-omap4-timer ti,sysc                         	  wrev sysc                                                 O   P             fck                      +           p         I I       timer@0           ti,omap4430-timer                   I                O   P               fck timer_sys_ck            W       *                     target-module@3c000           ti,sysc-omap4-timer ti,sysc                         	  wrev sysc                                                 O   X             fck                      +           p         I I       timer@0           ti,omap4430-timer                   I                O   X               fck timer_sys_ck            W       +                     target-module@3e000           ti,sysc-omap4-timer ti,sysc                         	  wrev sysc                                                 O   `             fck                      +           p         I I       timer@0           ti,omap4430-timer                   I                O   `               fck timer_sys_ck            W       ,            ]                  target-module@80000           ti,sysc       	  disabled                         +           p          I  I           target-module@a0000           ti,sysc       	  disabled                         +           p     
     I
  I
           target-module@c0000           ti,sysc       	  disabled                         +           p          I  I           target-module@f1000           ti,sysc-omap4 ti,sysc                           	  wrev sysc                                                       O                fck                      +           p         I I                target-module@50000000            ti,sysc-omap2 ti,sysc            P      P     P             wrev sysc syss                             -                                        fck                      +           pP   P              @      gpmc@50000000             ti,omap4430-gpmc             P                           +           W                     |           rxtx                                      N         fck                  ,            L        \           p       ,         ethernet@gpmc             smsc,lan9221 smsc,lan9115                                           '        A   
        O   2        a   2        s               
           
                      2                      2           2           2           2                    -   #        D   #        ^            v              #           2                                                                                 W              mii         	            	         	"        	2  N             target-module@52000000            ti,sysc-omap4 ti,sysc            R      R           	  wrev sysc                                                                  8           b               o                 fck                      +           p    R            target-module@54000000            ti,sysc-omap4-simple ti,sysc            b                                fck                      +           p    T         pmu           arm,cortex-a9-pmu            target-module@55082000            ti,sysc-omap2 ti,sysc            U     U    U            wrev sysc syss                                                             fck            4           rstctrl         p    U              +                  mmu@0             ti,omap4-iommu                          W       d                        	C                    target-module@4012c000            ti,sysc-omap4 ti,sysc            @    @         	  wrev sysc                                                 O   @             fck                      +           p    @    I I          target-module@4e000000            ti,sysc-omap2 ti,sysc            N      N           	  wrev sysc                              p    N               +                  dmm@0             ti,omap4-dmm                            W       q            target-module@4c000000            ti,sysc-omap4-simple ti,sysc             L              wrev                             fck          |                     +           p    L         emif@0            ti,emif-4d                          W       n           	Y            	b         	y         	         target-module@4d000000            ti,sysc-omap4-simple ti,sysc             M              wrev                             fck          |                     +           p    M         emif@0            ti,emif-4d                          W       o           	Y            	b         	y         	         dsp           ti,omap4-dsp            	                 	              d                c                	omap4-dsp-fw.xe64T          	            	  disabled          ipu@55020000              ti,omap4-ipu             U             wl2ram           	              4       4                               	omap4-ipu-fw.xem3           	            	  disabled          target-module@4b501000            ti,sysc-omap2 ti,sysc            KP   KP   KP           wrev sysc syss                                            -               {                 fck                      +           p    KP       aes@0             ti,omap4-aes                            W       U              |   o   |   n        tx rx            target-module@4b701000            ti,sysc-omap2 ti,sysc            Kp   Kp   Kp           wrev sysc syss                                            -               {                fck                      +           p    Kp       aes@0             ti,omap4-aes                            W       @              |   r   |   q        tx rx            target-module@4b100000            ti,sysc-omap3-sham ti,sysc           K    K   K           wrev sysc syss                                         -               {   (             fck                      +           p    K        sham@0            ti,omap4-sham                           W       3              |   w        rx           regulator-abb-mpu         
    ti,abb-v2           abb_mpu                       +            	                       	   2        	           okay             J0{   J0`           wbase-address int-address          x  
                      O                                                              1                         regulator-abb-iva         
    ti,abb-v2           abb_iva                       +            	Ȁ                       	   2        	         	  disabled             J0{   J0`           wbase-address int-address          target-module@56000000            ti,sysc-omap4 ti,sysc            V     V          	  wrev sysc                                                      b                                fck                      +           p    V                                   q    O               gpu@0         #    ti,omap4430-gpu img,powervr-sgx540                          W                   target-module@58000000            ti,sysc-omap2 ti,sysc            X      X           	  wrev syss            -           b         0                        	          
                   fck hdmi_clk sys_clk tv_clk                      +           p    X         dss@0             ti,omap4-dss                            okay                                fck                      +           p              target-module@1000            ti,sysc-omap2 ti,sysc                                    wrev sysc syss                                                          -                                
         fck sys_clk                      +           p             dispc@0           ti,omap4-dispc                          W                                      fck          target-module@2000            ti,sysc-omap2 ti,sysc                                       wrev sysc syss                                         -                                
         fck sys_clk                      +           p              encoder@0                         	  disabled                          N         fck ick          target-module@3000            ti,sysc-omap2 ti,sysc              0            wrev                    
         sys_clk                      +           p      0       encoder@0             ti,omap4-venc                         	  disabled                                fck          target-module@4000            ti,sysc-omap2 ti,sysc              @      @     @           wrev sysc syss                                        -                        +           p      @       encoder@0             ti,omap4-dsi                          @               wproto phy pll           W       5         	  disabled                                 
         fck sys_clk                      +             target-module@5000            ti,sysc-omap2 ti,sysc              P      P     P           wrev sysc syss                                        -                        +           p      P       encoder@0             ti,omap4-dsi                          @               wproto phy pll           W       T         	  disabled                                 
         fck sys_clk                      +             target-module@6000            ti,sysc-omap4 ti,sysc              `      `         	  wrev sysc                                                  	                   fck dss_clk                      +           p      `        encoder@0             ti,omap4-hdmi                                              wwp pll phy core         W       e           okay                       	          
         fck sys_clk            |   L      	  audio_tx            
           default               port       endpoint            
                                   target-module@5a000000            ti,sysc-omap4 ti,sysc            Z    Z         	  wrev sysc                                                b                         rstctrl                              fck                      +           pZ   Z      [   [         iva       	    ti,ivahd             bandgap@4a002260             J "`   J #,             ti,omap4430-bandgap         
*                  
0                        thermal-zones      cpu_thermal         
F           
\          
j           
z      N    trips      cpu_alert           
         
           passive                  cpu_crit            
 H        
        	   critical             cooling-maps       map0            
           
                  memory@80000000          memory           ʀ   @         sound             ti,abe-twl6040          
DuoVero         
I         
           
         a  
Headset Stereophone HSOL Headset Stereophone HSOR HSMIC Headset Mic Headset Mic Headset Mic Bias          hsusb1_phy            usb-nop-xceiv           
                 {            default                        1      	   main_clk            "$            b      w2cbw0015_vmmc          default                      regulator-fixed       
  w2cbw0015            -          -                         
 p                  
                 leds          
    gpio-leds      led0            duovero:blue:led0           
*                
  "heartbeat            gpio_keys         
    gpio-keys                        +       button0         button0         8           
*                 C   
         U         connector             hdmi-connector          hdmi             d           c             port       endpoint            
                          regulator-vddvario            regulator-fixed       	  vddvario             s                 regulator-vdd33a              regulator-fixed         vdd33a           s                    	compatible interrupt-parent #address-cells #size-cells model stdout-path i2c0 i2c1 i2c2 i2c3 mmc0 mmc1 mmc2 mmc3 mmc4 serial0 serial1 serial2 serial3 rproc0 rproc1 display0 device_type next-level-cache reg clocks clock-names clock-latency operating-points #cooling-cells phandle interrupt-controller #interrupt-cells cache-unified cache-level interrupts power-domains ranges reg-names ti,sysc-sidle #clock-cells clock-output-names ti,index-starts-at-one ti,bit-shift clock-mult clock-div ti,max-div ti,dividers #power-domain-cells #reset-cells ti,sysc-mask ti,syss-mask ti,gpio-always-on gpio-controller #gpio-cells ti,no-reset-on-init ti,no-idle ti,timer-alwon assigned-clocks assigned-clock-parents #pinctrl-cells pinctrl-single,register-width pinctrl-single,function-mask pinctrl-single,pins status clock-frequency ti,autoidle-shift ti,invert-autoidle-bit ti,index-power-of-two assigned-clock-rates ti,clock-div ti,clock-mult ti,sysc-midle #dma-cells dma-channels dma-requests interrupt-names port1-mode remote-wakeup-connected phys resets reset-names #iommu-cells usb-phy phy-names multipoint num-eps ram-bits ctrl-module interface-type power #phy-cells #mbox-cells ti,mbox-num-users ti,mbox-num-fifos ti,mbox-tx ti,mbox-rx #hwlock-cells pinctrl-names pinctrl-0 syscon regulator-name regulator-min-microvolt regulator-max-microvolt ti,sysc-delay-us interrupts-extended ti,timer-pwm pagesize regulator-always-on usb-supply #pwm-cells #io-channel-cells ti,audpwron-gpio vio-supply v2v1-supply enable-active-high ti,buffer-size dmas dma-names ti,spi-num-cs ti,dual-volt ti,needs-special-reset pbias-supply vmmc-supply ti,bus-width ti,non-removable cap-power-off-card keep-power-in-suspend sram op-mode serial-dir ti,timer-dsp ti,no-idle-on-init gpmc,num-cs gpmc,num-waitpins bank-width gpmc,device-width gpmc,cycle2cycle-samecsen gpmc,cycle2cycle-diffcsen gpmc,cs-on-ns gpmc,cs-rd-off-ns gpmc,cs-wr-off-ns gpmc,adv-on-ns gpmc,adv-rd-off-ns gpmc,adv-wr-off-ns gpmc,oe-on-ns gpmc,oe-off-ns gpmc,we-on-ns gpmc,we-off-ns gpmc,rd-cycle-ns gpmc,wr-cycle-ns gpmc,access-ns gpmc,page-burst-access-ns gpmc,bus-turnaround-ns gpmc,cycle2cycle-delay-ns gpmc,wait-monitoring-ns gpmc,clk-activation-ns gpmc,wr-data-mux-bus-ns gpmc,wr-access-ns vddvario-supply vdd33a-supply reg-io-width smsc,save-mac-address phy-mode gpmc,mux-add-data gpmc,sync-read gpmc,sync-write gpmc,sync-clk-ps ti,iommu-bus-err-back phy-type hw-caps-read-idle-ctrl hw-caps-ll-interface hw-caps-temp-alert ti,bootreg iommus firmware-name mboxes ti,tranxdone-status-mask ti,settling-time ti,clock-cycles ti,abb_info vdda-supply remote-endpoint gpios #thermal-sensor-cells polling-delay-passive polling-delay thermal-sensors coefficients temperature hysteresis trip cooling-device ti,model ti,mclk-freq ti,mcpdm ti,twl6040 ti,audio-routing reset-gpios startup-delay-us regulator-boot-on label linux,default-trigger linux,code debounce-interval wakeup-source hpd-gpios 