  ]   8  XD   (              X                                                                  !   ,Rockchip RK3228 Evaluation board          $   2rockchip,rk3228-evb rockchip,rk3228    aliases          =/pinctrl/gpio@11110000           C/pinctrl/gpio@11120000           I/pinctrl/gpio@11130000           O/pinctrl/gpio@11140000           U/serial@11010000             ]/serial@11020000             e/serial@11030000             m/spi@11090000            r/mmc@30020000         cpus                                 cpu@f00          wcpu          2arm,cortex-a7                                                                 @                        psci                      cpu@f01          wcpu          2arm,cortex-a7                                                              psci                      cpu@f02          wcpu          2arm,cortex-a7                                                              psci                      cpu@f03          wcpu          2arm,cortex-a7                                                              psci                         opp-table-0          2operating-points-v2                          opp-408000000                Q           ~           @               opp-600000000                #F                 opp-816000000                0,           B@      opp-1008000000               <                 opp-1200000000               G           tx         arm-pmu          2arm,cortex-a7-pmu         0         L          M          N          O           $                  psci             2arm,psci-1.0 arm,psci-0.2            smc       timer            2arm,armv7-timer          7      0                                
          [n6       oscillator           2fixed-clock         [n6         kxin24m          ~                '      display-subsystem            2rockchip,display-subsystem                   i2s1@100b0000         (   2rockchip,rk3228-i2s rockchip,rk3066-i2s              @                           i2s_clk i2s_hclk                   Q                	      	           tx rx           default            
      	  disabled          i2s0@100c0000         (   2rockchip,rk3228-i2s rockchip,rk3066-i2s              @                           i2s_clk i2s_hclk                   P                	      	           tx rx         	  disabled          spdif@100d0000           2rockchip,rk3228-spdif                                                  S           
  mclk hclk              	   
        tx          default                  	  disabled          i2s2@100e0000         (   2rockchip,rk3228-i2s rockchip,rk3066-i2s              @                           i2s_clk i2s_hclk                   R                	       	           tx rx         	  disabled          syscon@11000000       &   2rockchip,rk3228-grf syscon simple-mfd                                                       (   io-domains        "   2rockchip,rk3228-io-voltage-domain         	  disabled          power-controller          !   2rockchip,rk3228-power-controller                                                     .   power-domain@4                    8                                                                                 power-domain@5                                                                     power-domain@6                                                               power-domain@7                                                                               power-domain@8                                                             usb2phy@760          2rockchip,rk3228-usb2phy            `                          phyclk          kusb480m_phy0            ~          	  disabled                B   otg-port          $         ;          <          =           otg-bvalid otg-id linestate                   	  disabled                A      host-port                  >         
  linestate                     	  disabled                C         usb2phy@800          2rockchip,rk3228-usb2phy                                       phyclk          kusb480m_phy1            ~          	  disabled                D   otg-port                   D         
  linestate                     	  disabled                E      host-port                  E         
  linestate                     	  disabled                F            serial@11010000          2snps,dw-apb-uart                                 7           [n6                M     U        baudclk apb_pclk            default                                              	  disabled          serial@11020000          2snps,dw-apb-uart                                 8           [n6                N     V        baudclk apb_pclk            default                                        	  disabled          serial@11030000          2snps,dw-apb-uart                                 9           [n6                O     W        baudclk apb_pclk            default                                          okay          efuse@11040000           2rockchip,rk3228-efuse                                G        pclk_efuse                              id@7                         cpu_leakage@17                          i2c@11050000             2rockchip,rk3228-i2c                              $                                     i2c               L        default                  	  disabled          i2c@11060000             2rockchip,rk3228-i2c                              %                                     i2c               M        default                  	  disabled          i2c@11070000             2rockchip,rk3228-i2c                              &                                     i2c               N        default                  	  disabled          i2c@11080000             2rockchip,rk3228-i2c                              '                                     i2c               O        default                  	  disabled          spi@11090000             2rockchip,rk3228-spi          	                    1                                            A     R        spiclk apb_pclk         default                      !   "      	  disabled          watchdog@110a0000             2rockchip,rk3228-wdt snps,dw-wdt          
                    (                 b      	  disabled          pwm@110b0000             2rockchip,rk3288-pwm                                        ^        default            #      	  disabled          pwm@110b0010             2rockchip,rk3288-pwm                                       ^        default            $      	  disabled          pwm@110b0020             2rockchip,rk3288-pwm                                        ^        default            %      	  disabled          pwm@110b0030             2rockchip,rk3288-pwm           0                            ^        default            &      	  disabled          timer@110c0000        ,   2rockchip,rk3228-timer rockchip,rk3288-timer                               +                 a   '        pclk timer        clock-controller@110e0000            2rockchip,rk3228-cru                           '        xin24m          #   (        ~           0         H  =                                  k                b      $  M#g0, e ррxhррxh                  dma-controller@110f0000          2arm,pl330 arm,primecell              @                                      b            m                     	  apb_pclk                	      thermal-zones      cpu-thermal            d                     )       trips      cpu_alert0           p                   ~passive             *      cpu_alert1           $                   ~passive             +      cpu_crit             _                	   ~critical             cooling-maps       map0               *      0                                map1               +      0                             tsadc@11150000           2rockchip,rk3228-tsadc                                :                  H     X        tsadc apb_pclk          =      H        M                  W      
  tsadc-apb           init default sleep             ,           -           ,                    s        okay            0            G               )      hdmi-phy@12030000            2rockchip,rk3228-hdmi-phy                                m   '              sysclk refoclk refpclk          ~            khdmiphy_phy                   	  disabled                3      gpu@20000000          "   2rockchip,rk3228-mali arm,mali-400                         H                                                                      gp gpmmu pp0 ppmmu0 pp1 ppmmu1                             	  bus core            b   .                  ~      	  disabled          video-codec@20020000          (   2rockchip,rk3228-vpu rockchip,rk3399-vpu                                         	         
  vepu vdpu                             
  aclk hclk           p   /        b   .         iommu@20020800           2rockchip,iommu                               
                               aclk iface          b   .           w                /      video-codec@20030000          *   2rockchip,rk3228-vdec rockchip,rk3399-vdec                                                                            axi ahb cabac core          =                    M          p   0        b   .         iommu@20030480           2rockchip,iommu               @    @                                              aclk iface          b   .           w                0      vop@20050000             2rockchip,rk3228-vop                                                                    aclk_vop dclk_vop hclk_vop                 d      e      f        axi ahb dclk            p   1        b   .         	  disabled       port                                             endpoint@0                          2            7            iommu@20053f00           2rockchip,iommu            ?                                                   aclk iface          b   .           w          	  disabled                1      rga@20060000          (   2rockchip,rk3228-rga rockchip,rk3288-rga                               !                                     aclk hclk sclk          b   .                  k      m      n        core axi ahb          iommu@20070800           2rockchip,iommu                                                              aclk iface          b   .           w          	  disabled          hdmi@200a0000            2rockchip,rk3228-dw-hdmi           
                               #           =                 3              l      {              iahb isfr cec           default            4   5   6               `        hdmi               3        hdmi            #   (      	  disabled       ports                                port@0                  endpoint               7            2         port@1                          mmc@30000000          0   2rockchip,rk3228-dw-mshc rockchip,rk3288-dw-mshc          0     @                                        D      r      v        biu ciu ciu-drive ciu-sample                       default            8   9   :      	  disabled          mmc@30010000          0   2rockchip,rk3228-dw-mshc rockchip,rk3288-dw-mshc          0    @                                        E      s      w        biu ciu ciu-drive ciu-sample                       default            ;   <   =      	  disabled          mmc@30020000          0   2rockchip,rk3228-dw-mshc rockchip,rk3288-dw-mshc          0    @                           [<4`        <4`                     G      u      y        biu ciu ciu-drive ciu-sample                                             default            >   ?   @               S        reset           okay                                        %      usb@30040000          2   2rockchip,rk3228-usb rockchip,rk3066-usb snps,dwc2            0                                             otg         3otg         ;           M          \            @                  A      	  usb2-phy          	  disabled          usb@30080000             2generic-ehci             0                                        B           C        usb       	  disabled          usb@300a0000             2generic-ohci             0
                                        B           C        usb       	  disabled          usb@300c0000             2generic-ehci             0                                        D           E        usb       	  disabled          usb@300e0000             2generic-ohci             0                                        D           E        usb       	  disabled          usb@30100000             2generic-ehci             0                    B                    D           F        usb       	  disabled          usb@30120000             2generic-ohci             0                    C                    D           F        usb       	  disabled          ethernet@30200000            2rockchip,rk3228-gmac             0                                macirq        8         ~                                   o      M  stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac                   8      
  stmmaceth           #   (        okay            =      |        M        koutput          x   G        rmii               H   mdio             2snps,dwmac-mdio                              ethernet-phy@0        4   2ethernet-phy-id1234.d400 ethernet-phy-ieee802.3-c22                                            ?                     H            qos@31030080             2rockchip,rk3228-qos syscon           1                       qos@31030100             2rockchip,rk3228-qos syscon           1                       qos@31030180             2rockchip,rk3228-qos syscon           1                      qos@31030200             2rockchip,rk3228-qos syscon           1                       qos@31040000             2rockchip,rk3228-qos syscon           1                        qos@31050000             2rockchip,rk3228-qos syscon           1                        qos@31060000             2rockchip,rk3228-qos syscon           1                        qos@31070000             2rockchip,rk3228-qos syscon           1                        qos@31070080             2rockchip,rk3228-qos syscon           1                       interrupt-controller@32010000            2arm,gic-400                                             2    2      2@     2`                   	                    pinctrl          2rockchip,rk3228-pinctrl         #   (                                     gpio@11110000            2rockchip,gpio-bank                               3                 @                                              gpio@11120000            2rockchip,gpio-bank                               4                 A                                              gpio@11130000            2rockchip,gpio-bank                               5                 B                                              gpio@11140000            2rockchip,gpio-bank                               6                 C                                              pcfg-pull-up                         L      pcfg-pull-down                       K      pcfg-pull-none                       J      pcfg-pull-none-drv-12ma                        I      sdmmc      sdmmc-clk           *            I            8      sdmmc-cmd           *            I            9      sdmmc-bus4        @  *            I            I            I            I            :         sdio       sdio-clk            *             I            ;      sdio-cmd            *            I            <      sdio-bus4         @  *            I            I            I            I            =         emmc       emmc-clk            *            J            >      emmc-cmd            *            J            ?      emmc-bus8           *            J            J            J            J            J            J            J            J            @         gmac       rgmii-pins          *            J            J            J            I            I            I            I      	      I            I            J            J            J            J            J            J      rmii-pins           *            J            J            J            I            I            I            J            J            J            J      phy-pins             *            J            J         hdmi       hdmi-hpd            *             K            5      hdmii2c-xfer             *             J             J            4      hdmi-cec            *             J            6         i2c0       i2c0-xfer            *              J             J                     i2c1       i2c1-xfer            *             J             J                     i2c2       i2c2-xfer            *            J            J                     i2c3       i2c3-xfer            *             J             J                     spi0       spi0-clk            *       	      L                  spi0-cs0            *             L            !      spi0-tx         *             L                  spi0-rx         *             L                   spi0-cs1            *            L            "         spi1       spi1-clk            *             L      spi1-cs0            *            L      spi1-rx         *             L      spi1-tx         *            L      spi1-cs1            *            L         i2s1       i2s1-bus            *             J       	      J             J             J             J             J            J            J            J            
         pwm0       pwm0-pin            *            J            #         pwm1       pwm1-pin            *             J            $         pwm2       pwm2-pin            *            J            %         pwm3       pwm3-pin            *            J            &         spdif      spdif-tx            *            J                     tsadc      otp-pin         *              J            ,      otp-out         *             J            -         uart0      uart0-xfer           *            J            J                  uart0-cts           *            J                  uart0-rts           *             J                     uart1      uart1-xfer           *      	      J      
      J                  uart1-cts           *            J      uart1-rts           *            J         uart2      uart2-xfer           *            L            J                  uart21-xfer          *      
      L      	      J      uart2-cts           *             J      uart2-rts           *             J            memory@60000000          wmemory           `   @         vcc-phy-regulator            2regulator-fixed          8        Kvcc_phy         Z w@        r w@                              G         	#address-cells #size-cells interrupt-parent model compatible gpio0 gpio1 gpio2 gpio3 serial0 serial1 serial2 spi0 mmc0 device_type reg resets operating-points-v2 #cooling-cells clock-latency clocks enable-method phandle opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend interrupts interrupt-affinity arm,cpu-registers-not-fw-configured clock-frequency clock-output-names #clock-cells ports clock-names dmas dma-names pinctrl-names pinctrl-0 status #power-domain-cells pm_qos interrupt-names #phy-cells reg-shift reg-io-width #pwm-cells rockchip,grf #reset-cells assigned-clocks assigned-clock-rates #dma-cells arm,pl330-periph-burst polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device reset-names pinctrl-1 pinctrl-2 #thermal-sensor-cells rockchip,hw-tshut-temp rockchip,hw-tshut-mode rockchip,hw-tshut-polarity power-domains iommus #iommu-cells remote-endpoint assigned-clock-parents phys phy-names fifo-depth max-frequency bus-width rockchip,default-sample-phase cap-mmc-highspeed mmc-ddr-1_8v disable-wp non-removable dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size clock_in_out phy-supply phy-mode phy-handle phy-is-integrated interrupt-controller #interrupt-cells ranges gpio-controller #gpio-cells bias-pull-up bias-pull-down bias-disable drive-strength rockchip,pins enable-active-high regulator-name regulator-min-microvolt regulator-max-microvolt regulator-always-on regulator-boot-on 